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CN113805832B - Image data transmission method, device, terminal and medium - Google Patents

Image data transmission method, device, terminal and medium Download PDF

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Publication number
CN113805832B
CN113805832B CN202111078949.XA CN202111078949A CN113805832B CN 113805832 B CN113805832 B CN 113805832B CN 202111078949 A CN202111078949 A CN 202111078949A CN 113805832 B CN113805832 B CN 113805832B
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ddic
frame
image data
timer
signal
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CN113805832A (en
Inventor
高延凯
王月文
苗守飞
钟柳和
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Guangdong Oppo Mobile Telecommunications Corp Ltd
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Guangdong Oppo Mobile Telecommunications Corp Ltd
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Priority to CN202111078949.XA priority Critical patent/CN113805832B/en
Publication of CN113805832A publication Critical patent/CN113805832A/en
Priority to PCT/CN2022/114024 priority patent/WO2023040592A1/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/147Digital output to display device ; Cooperation and interconnection of the display device with other functional units using display panels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/393Arrangements for updating the contents of the bit-mapped memory

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Human Computer Interaction (AREA)
  • General Engineering & Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Controls And Circuits For Display Device (AREA)

Abstract

The embodiment of the application discloses an image data transmission method, an image data transmission device, a terminal and a medium. The method comprises the following steps: transmitting m-th frame image data to the DDIC, m being a positive integer; determining a history refresh frequency of the DDIC when displaying the m-n to m-1 th frame images, n being an integer less than m and greater than or equal to 2; in response to the history refresh frequency satisfying the display delay condition, performing a display delay operation on the m+1th frame image data, the display delay operation being for delaying transmission of the m+1th frame image data to the DDIC; in response to completion of the transmission delay operation, the m+1th frame image data is transmitted to the DDIC. In the embodiment of the application, by introducing the display sending delay mechanism, the problem of DDIC refreshing frequency jump caused by the fluctuation of the AP output frame rate is avoided, and further, the problem of flicker and jitter of pictures is solved, the stability of the DDIC refreshing frequency in the image display process is improved, and the effect of improving the image display quality is achieved.

Description

Image data transmission method, device, terminal and medium
Technical Field
The embodiment of the application relates to the technical field of display, in particular to an image data transmission method, an image data transmission device, a terminal and a medium.
Background
With the continuous development of display screen technology, more and more display screens capable of supporting high refresh frequency display are developed, and in the process of running high frame rate application programs or sliding operation, the smoothness of pictures can be improved by setting the display screens to a high refresh frequency mode.
For a display screen adopting an application processor (Application Processor, AP) -display driving chip (DISPLAY DRIVER INTEGRATED Circuit, DDIC) -display Panel (Panel) driving architecture, in the image display process, the DDIC adaptively adjusts the refresh frequency according to the output frame rate of the AP (i.e. the rate of outputting image data), so as to realize adaptive frequency conversion.
However, since the output frame rate of the AP fluctuates in a certain range, the refresh frequency of the DDIC fluctuates, and when the refresh frequency jumps, for example, when the refresh frequency jumps from 45Hz to 72Hz, the problem of flicker and jitter of the picture occurs, which affects the image display quality.
Disclosure of Invention
The embodiment of the application provides an image data transmission method, an image data transmission device, a terminal and a medium. The technical scheme is as follows:
In one aspect, an embodiment of the present application provides an image data transmission method, which is used for an AP, and the method includes:
Transmitting m-th frame image data to the DDIC, m being a positive integer;
determining a history refresh frequency of the DDIC when displaying the m-n to m-1 th frame images, n being an integer less than m and greater than or equal to 2;
In response to the history refresh frequency meeting a transmission delay condition, performing a transmission delay operation on the m+1st frame of image data, the transmission delay operation being used for delaying transmission of the m+1st frame of image data to the DDIC;
and transmitting the m+1th frame image data to the DDIC in response to completion of the display delay operation.
In another aspect, an embodiment of the present application provides an image data transmission apparatus, including:
A transmission module for transmitting the mth frame of image data to the DDIC, m being a positive integer;
A first determining module for determining a history refresh frequency of the DDIC when displaying the m-n to m-1 th frame images, n being an integer less than m and greater than or equal to 2;
A delay module, configured to perform a display delay operation on the m+1st frame of image data in response to the history refresh frequency satisfying a display delay condition, where the display delay operation is configured to delay transmission of the m+1st frame of image data to the DDIC;
the transmission module is further configured to transmit the (m+1) -th frame image data to the DDIC in response to completion of the send-display delay operation.
On the other hand, the embodiment of the application provides a terminal, which comprises an AP, a display screen and a DDIC, wherein the AP is connected with the DDIC through a mobile industry processor interface (Mobile Industry Processor Interface, MIPI), and the AP is used for executing at least one instruction in a memory to realize the image data transmission method.
In another aspect, embodiments of the present application provide a computer-readable storage medium storing at least one instruction for execution by a processor to implement an image data transmission method as described above.
In another aspect, embodiments of the present application provide a computer program product or computer program comprising computer instructions stored in a computer readable storage medium. The processor of the terminal reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions so that the terminal performs the image data transmission method provided in the above aspect.
In the embodiment of the application, after transmitting the m-th frame of image data to the DDIC by introducing a display delay mechanism, the AP determines whether the display delay condition is met based on the historical refresh frequency of the DDIC in the display process of the latest n frames of images, and when the display delay condition is met, the m+1th frame of image data is transmitted to the DDIC after the display delay operation is carried out on the m+1th frame of image data, so that the problem of DDIC refresh frequency jump caused by the fluctuation of the AP output frame rate and further the problem of flicker and jitter of images is avoided, the stability of the DDIC refresh frequency in the image display process is improved, and the effect of improving the image display quality is achieved.
Drawings
FIG. 1 is a schematic diagram of an image display process under an AP-DDCI-Panel architecture;
Fig. 2 is a schematic diagram of an image data transmission method according to an embodiment of the present application;
FIG. 3 illustrates a flowchart of an image data transmission method according to an exemplary embodiment of the present application;
FIG. 4 is a graph comparing refresh rates when a send delay is introduced and when a send delay mechanism is not introduced;
FIG. 5 is a flowchart illustrating a history refresh frequency determination process according to an exemplary embodiment of the present application;
FIG. 6 is a schematic diagram illustrating an implementation of a history refresh frequency determination process according to an exemplary embodiment of the present application;
Fig. 7 shows a flowchart of an image data transmission method according to another exemplary embodiment of the present application;
FIG. 8 is a schematic diagram illustrating the implementation of the image data transmission method shown in FIG. 7;
fig. 9 is a flowchart illustrating an image data transmission method according to another exemplary embodiment of the present application;
FIG. 10 is a schematic diagram showing an implementation of the image data transmission method shown in FIG. 9;
fig. 11 is a block diagram showing the configuration of an image data transmission apparatus according to an embodiment of the present application;
Fig. 12 is a block diagram showing the structure of a terminal according to an exemplary embodiment of the present application.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present application more apparent, the embodiments of the present application will be described in further detail with reference to the accompanying drawings.
References herein to "a plurality" means two or more. "and/or", describes an association relationship of an association object, and indicates that there may be three relationships, for example, a and/or B, and may indicate: a exists alone, A and B exist together, and B exists alone. The character "/" generally indicates that the context-dependent object is an "or" relationship.
As shown in fig. 1, under the AP-DDIC-Panel architecture, the AP side performs layer drawing rendering through Application (App), then performs layer synthesis on the drawn layer through SurfaceFlinger (layer synthesizer) to obtain image data, and further sends (writes) the image data to the DDIC through MIPI. The DDIC stores the image data transmitted from the AP in a Buffer (Buffer), and controls the Panel to perform image refresh Display (Display) by scanning (reading) the image data in the Buffer. In implementing adaptive frequency conversion, the DDIC adaptively adjusts the refresh frequency according to the output frame rate of the AP (i.e., the number of image data the AP transmits to the DDIC in a unit time, or the speed at which the AP transmits the image data to the DDIC). For example, when the output frame rate of the AP decreases, the DDIC down-regulates the refresh frequency, and when the output frame rate of the AP increases, the DDIC up-regulates the refresh frequency.
In the self-adaptive frequency conversion process, the small-range change of the refresh frequency in a short time does not affect the image display quality, and when the refresh frequency is changed in a large range in a short time, the problems of flickering, shaking and the like can occur, so that the image display quality is affected.
For example, in some scenes, since there is a fluctuation in the speed of preparing image data at the AP side, the refresh frequency of the DDIC does not cause flicker and jitter when the output frame rate of the AP is changed from 60Hz to 45Hz and then from 45Hz to 72Hz in a short time, and when the refresh frequency of the DDIC is changed from 45Hz to 72Hz, flicker and jitter occurs because the change amplitude of the refresh frequency is too large.
In order to solve the above technical problems, in the embodiment of the present application, the AP side introduces a send-display delay mechanism. Under the mechanism, as shown in fig. 2, the AP acquires the historical refresh frequency of the DDIC in the display process of the last n frames of images (that is, the refresh frequency of the DDIC when each frame of image in the last n frames of images is displayed), and detects the transmission delay condition of the historical refresh frequency based on the DDIC refresh frequency stabilizing algorithm, so that when the transmission delay condition is met, the transmission delay operation is performed on the next frame of image data, the problem that the refresh frequency is greatly jumped is avoided, the effect of stabilizing the DDIC refresh frequency is achieved, and the problem of flickering of the display picture caused by the fact is further reduced.
For example, the AP acquires the historical refresh frequency of the DDIC in the display process of the last two frames of images, and when detecting that the historical refresh frequency of the DDIC is 60Hz (the refresh frequency of the last second frame of image) and 45Hz (the refresh frequency of the last frame of image) respectively in the display process of the last two frames of images, if the AP directly transmits the next frame of image data to the DDIC after completing the data preparation, the refresh frequency of the DDIC will become 72Hz; after the transmission delay mechanism is introduced, the AP detects that the historical refresh frequency of the DDIC meets the transmission delay condition, so that the next frame of image data is transmitted to the DDIC after a certain time delay, the refresh frequency of the DDIC is changed to 60Hz, and the refresh frequency of the DDIC is prevented from being directly and greatly hopped from 45Hz to 72Hz.
The method provided by the embodiment of the application is applied to the terminal, and the AP in the terminal executes the image data transmission method. The terminal may include a smart phone, a tablet computer, a wearable device (such as a smart watch), a portable personal computer, a smart television, etc., and the embodiment of the present application does not limit the specific type of the terminal.
Referring to fig. 3, a flowchart of an image data transmission method according to an exemplary embodiment of the present application is shown. The method comprises the following steps:
Step 301, transmitting the mth frame of image data to the DDIC, where m is a positive integer.
In one possible implementation, the AP and the DDIC are connected through MIPI, and after the image data preparation is completed, the AP transmits the image data to the DDIC through MIPI, and the DDIC controls a display screen (Panel) based on the image data to perform image display.
Step 302, determining a history refresh frequency of the DDIC when displaying the m-n to m-1 th frame images, n being an integer less than m and greater than or equal to 2.
In order to avoid a jump in refresh frequency of the DDIC, the AP needs to determine a historical refresh frequency of the DDIC during the display of the last n frames of images (i.e., the m-n to m-1 th frames of images) before transmitting the next frame of image data (i.e., the m+1th frame of image data) to the DDIC, so as to detect whether the transmission delay condition is satisfied based on the historical refresh frequency in the following. The following examples will be described in detail with respect to specific implementations for determining the DDIC-side history refresh frequency.
In one possible implementation manner, during the image display process, the AP monitors the refresh frequency of the DDIC during each frame of image display process in real time, and stores the refresh frequency corresponding to each of the n frames of images nearest to the mth frame (the current display frame), that is, the AP stores the historical refresh frequency of the nearest n frames. When transmitting the m+1st frame of image data, the AP acquires the stored n history refresh frequencies.
In one illustrative example, when m=10, n=2, the AP determines a first history refresh frequency of the DDIC during the display of the 8 th frame image and a second history refresh frequency of the DDIC during the display of the 9 th frame image during the display of the 10 th frame image and before the transmission of the 11 th frame image data.
In step 303, in response to the history refresh frequency satisfying the transmission delay condition, a transmission delay operation is performed on the m+1th frame image data, the transmission delay operation being used to delay transmission of the m+1th frame image data to the DDIC.
In some embodiments, the propagation delay condition is used to filter scattered acceleration requests on the AP side, avoiding the DDIC from directly increasing from a low refresh rate to a high refresh rate. When the image data preparation speed on the AP side suddenly changes in a short time, the AP generates a scattered acceleration request, and the speed of the image data preparation on the AP side after the scattered acceleration request, which usually occurs after the delay of the image frame data preparation on the AP side, decreases, cannot be maintained for a long time.
In one possible implementation manner, the AP determines whether the image preparation delay exists in the n-th frame image based on the historical refresh frequency of the n-th frame image, if the image preparation delay exists, it determines that the display delay condition is satisfied, so as to perform the display delay operation on the m+1th frame image data, so that the refresh frequency jump is avoided (because the transmission interval between two adjacent frames of image data is shorter due to the previous display delay) caused by immediately transmitting the m+1th frame image data to the DDIC when the m+1th frame image data is ready in advance.
In the embodiment of the application, the purpose of the display delay operation is to reduce the refresh frequency of the DDIC, so as to avoid the jump rise of the refresh frequency of the DDIC caused by the abrupt rise of the image preparation speed at the AP side under the condition that the image preparation delay exists in the image of the last n frames.
Optionally, the manner of performing the display delay operation on the m+1st frame image data may include skipping the tearing effect (TEARING EFFECT, TE) signal (Skip TE) or blocking MIPI (MIPI Block), and the following embodiments will describe the above two modes in detail.
Optionally, when the history refresh frequency of the last n frames does not meet the display delay condition, the AP does not need to perform display delay operation on the m+1th frame of image data, and transmits the m+1th frame of image data to the DDIC according to the conventional display logic.
In response to completion of the display delay operation, m+1st frame image data is transmitted to the DDIC, step 304.
In one possible implementation, after completing the display delay operation for the m+1th frame image data, the AP transmits the m+1th frame image data to the DDIC according to the TE signal output from the DDIC. After the transmission of the m+1th frame image data is completed, the AP re-executes steps 302 to 303 before the transmission of the m+2th frame image data, which is not described herein again in this embodiment.
Optionally, when the refresh frequency of the DDIC changes, in order to avoid the influence of the frequency change on the display of the picture, the DDIC performs parameter adjustment according to the display screen parameter corresponding to the refresh frequency in the frame register (a register in the DDIC for storing the correspondence between the refresh frequency and the display screen parameter), where the adjusted display screen parameter may include a Gamma parameter and a Demura parameter, which is not limited in this embodiment.
In an illustrative example, as shown in fig. 4, without introducing a display delay mechanism, the refresh frequency of the DDIC jumps from 45Hz to 72Hz during the display of the 5 th and 6 th frames of images, and from 51Hz to 72Hz during the display of the 13 th and 14 th frames of images.
After introducing the display delay mechanism, before sending the 7 th frame of image data to the DDIC, the AP determines that the historical refresh frequency of the DDIC is 60Hz and 45Hz respectively in the display process of the 4 th frame and the 5 th frame of image, so that the display delay condition is determined to be met, thereby implementing the display delay operation, delaying the transmission of the 7 th frame of image data to the DDIC, and reducing the refresh frequency of the DDIC to 60Hz in the display process of the 6 th frame of image, namely, increasing the refresh frequency of the DDIC from 45Hz to 60Hz in the display process of the 5 th frame and the 6 th frame of image, and not directly jumping to 72Hz; another example is: after introducing the transmission delay mechanism, before transmitting the 15 th frame of image data to the DDIC, the AP determines that the transmission delay condition is satisfied based on the historical refresh frequency of the DDIC in the 12 th and 13 th frame of image display processes being 60Hz and 51Hz respectively, so as to delay the transmission of the 15 th frame of image data to the DDIC, so that the refresh frequency of the DDIC in the 14 th frame of image display process is reduced to 60Hz, that is, the refresh frequency of the DDIC is increased from 51Hz to 60Hz in the 13 th and 14 th frame of image display process, but is not directly jumped to 72Hz.
In summary, in the embodiment of the present application, after the AP transmits the mth frame of image data to the DDIC by introducing the send-display delay mechanism, it is determined whether the send-display delay condition is satisfied based on the historical refresh frequency of the DDIC in the display process of the last n frames of images, and when the send-display delay condition is satisfied, the m+1th frame of image data is transmitted to the DDIC after the send-display delay operation is performed on the m+1th frame of image data, so that the problem that the refresh frequency of the DDIC is greatly hopped due to the fluctuation of the output frame rate of the AP, and further, the problem of flicker and jitter of the picture is caused, which is helpful to improve the stability of the refresh frequency of the DDIC in the image display process, and achieve the effect of improving the image display quality.
In one possible implementation, the DDIC outputs a TE signal when the display of an image is completed based on the image data transmitted from the AP and the next frame of image is ready to be refreshed, and correspondingly, the AP transmits the next frame of image data to the DDIC when the preparation of the next frame of image data is completed and the TE signal is detected. In the embodiment of the application, the TE signal output by the DDIC is a Multiple-TE (Multiple tearing effect) signal, that is, when the next frame of image is ready to be refreshed, the DDIC continuously outputs a plurality of TE signals according to a preset frequency. When the AP detects the rising edge of the TE signal, image data is transmitted to the DDIC. By outputting Multiple-TE signals (which is equivalent to increasing the probability that the AP can detect the rising edge of the TE signals), the AP can timely transmit the image data to the DDIC after finishing the preparation of the image data, thereby being beneficial to reducing the image display time delay.
Optionally, the TE frequency of the Multiple-TE signal is the same as the Emission (EM) frequency of the display screen, or the EM frequency is an integer Multiple of the TE frequency. For example, when the EM frequency of the display screen is 360Hz, the TE frequency of the Multiple-TE signal is 360Hz, i.e., one Multiple-TE signal is output every 2.8ms (1000/360), or the TE frequency of the Multiple-TE signal is 180Hz, i.e., one Multiple-TE signal is output every 5.6 ms. The TE frequency is not limited by the embodiments of the present application. Accordingly, the AP side can determine the history refresh frequency of the DDIC by detecting the number of Multiple-TE signals output by the DDIC. In one possible implementation, as shown in FIG. 5, the process of determining the historical refresh frequency may include the following steps.
Step 302A, for the m-n to m-1 frame images, obtaining the historical number of Multiple-TE signals output by the DDIC in the display process of each frame image.
For each frame of the most recent n frames of images, the AP counts the number of Multiple-TE signals output by the DDIC in the display process of each frame of image to obtain the corresponding historical number of each frame of image, wherein the historical number is the number of Multiple-TE signals detected between the AP transmitting two adjacent frames of image data.
The display process of one frame image includes a process in which the DDIC performs frame scanning, and a process in which the DDIC waits for the next frame image data (the currently displayed image frame is maintained in this process) after the frame scanning is completed, and since the DDIC does not output Multiple-TE signals in the process of performing frame scanning, the interval between the Multiple-TE signals respectively output after the DDIC completes the scanning of two adjacent frames of image frames (i.e., the interval between the Multiple-TE signals output after the DDIC completes the scanning of the previous frame of image frame and the Multiple-TE signals output after the completion of the scanning of the next frame of image frame) is significantly larger than the interval between two or more Multiple-TE signals output after the DDIC completes the scanning of the same frame of image frame. Based on the above characteristics, the AP may record the number of Multiple-TE signals during the display of each frame image using a counter based on the time interval between adjacent Multiple-TE signals.
Alternatively, this step may include the following sub-steps.
1. A counter is set.
The AP sets a counter by which the number of Multiple-TE signals output by the DDIC in the display of each frame of image is recorded. Wherein the initial count value of the counter is 0, and the counter can be set by calling a counting thread.
Schematically, as shown in fig. 6, the AP starts a counter after completing transmission of image data corresponding to image frame a.
Each time a Multiple-TE signal output by the DDIC is detected, the AP calculates a time interval between the Multiple-TE signal and a forward adjacent Multiple-TE signal (i.e., the last Multiple-TE signal received before), in the presence of the forward adjacent Multiple-TE signal, and detects whether the time interval is less than an interval threshold. If the number is smaller than the first threshold value, executing the second step, and if the number is larger than the second threshold value, executing the third step.
Optionally, the interval threshold is determined based on a TE frequency of the Multiple-TE signal, wherein the interval threshold is slightly greater than 1/k when the TE frequency is k. For example, when the TE frequency is 360Hz, the interval threshold is 3ms.
2. In response to detecting the Multiple-TE signal, and a time interval between the Multiple-TE signal and a forward adjacent Multiple-TE signal is less than an interval threshold, a count value of the counter is updated.
Optionally, the count value of the counter is updated, i.e. the current count value of the counter is +1.
When the Multiple-TE signal is detected and the time interval between the Multiple-TE signal and the forward adjacent Multiple-TE signal is smaller than the interval threshold, the currently detected Multiple-TE signal and the forward adjacent Multiple-TE signal are indicated to be output after the DDIC finishes scanning the frames of the same frame of image, so that the count value of the counter is added by one.
Schematically, as shown in fig. 6, the TE frequency=360 Hz, the interval threshold is 3ms, and when a Multiple-TE signal is detected for the first time in the display process of the image frame a, the AP updates the count value of the counter to 1; when the Multiple-TE signal is detected again, since the time interval between the detection of the Multiple-TE signal and the last Multiple-TE signal is 2.8ms at this time, the time interval 2.8ms is less than the interval threshold value 3ms, and thus the AP updates the count value of the counter to 2. Similarly, during the display of the image frame B, the count value of the counter is updated from 1 to 4.
3. In response to detecting the Multiple-TE signal and the time interval between the Multiple-TE signal and the forward adjacent Multiple-TE signal is greater than an interval threshold, a count value of the counter is determined as a historical number and the count value of the counter is set to 1.
When a Multiple-TE signal is detected and the time interval between the Multiple-TE signal and a forward adjacent Multiple-TE signal is larger than an interval threshold, the fact that the currently detected Multiple-TE signal and the forward adjacent Multiple-TE signal are output after the DDIC finishes scanning frames of adjacent frame images is indicated, so that the AP determines the current count value of the counter as the historical number corresponding to the current frame image, and sets the count value of the counter as 1 so as to count the historical number of the Multiple-TE signal in the display process of the next frame image.
Illustratively, as shown in fig. 6, TE frequency=360 Hz, the interval threshold is 3ms, in the case where the count value of the counter is 2 during the display of the image frame a, when the Multiple-TE signal is detected again, since the time interval with the last Multiple-TE signal is greater than the time threshold, the AP determines the number of histories corresponding to the image frame a as 2, and sets the count value of the counter to 1; similarly, in the display process of the image frame B, in the case where the count value of the counter is 4, when the Multiple-TE signal is detected again, since the time interval with the last Multiple-TE signal is greater than the time threshold value, the AP determines the number of histories corresponding to the image frame B as 4 and sets the count value of the counter to 1.
Step 302B, a historical refresh frequency of the DDIC is determined based on the historical number.
In a possible implementation manner, a corresponding relation between the number of TE signals and the refresh frequency of the DDIC is preset in the terminal, and after the historical number is determined, the AP determines the historical refresh frequency of the DDIC corresponding to the historical number based on the corresponding relation.
Illustratively, the correspondence between the number of TE signals and the refresh frequency of the DDIC is shown in table one.
List one
TE signal count Refresh frequency of DDIC
1 72Hz
2 60Hz
3 51Hz
4 45Hz
In combination with the correspondence shown in table one, as shown in fig. 6, the AP determines that the historical refresh frequency of the DDIC is 60Hz during the display of the image frame a, and determines that the historical refresh frequency of the DDIC is 45Hz during the display of the image frame B.
It should be noted that, in other possible embodiments, the AP may monitor the refresh frequency of the DDIC in other manners, which is not limited in this embodiment.
In one possible scenario, when the reference Frame rate during running of the foreground application is 60FPS (Frame Per Second), the refresh frequency of the DDIC should be designed to stabilize the Frame with a target refresh frequency of 60Hz, i.e., the target refresh frequency matches the reference Frame rate during running of the foreground application. Wherein the target refresh rate matches the reference frame rate means that the difference between the target refresh rate and the reference frame rate is less than a threshold (e.g., 5 FPS), optionally the target refresh rate is equal to the reference frame rate, or the target refresh rate is slightly greater than the reference frame rate, or the target refresh rate is slightly less than the reference frame rate.
Wherein when the AP is ready for image data on time (i.e., at a frequency of 60 Hz) or delayed (i.e., less than 60 Hz), the DDIC may wait appropriately, ensuring that the refresh frequency of the DDIC remains within a range of no more than the target refresh frequency (e.g., 45Hz to 60 Hz) in most scenarios.
In order to avoid the direct jump of the refresh rate of the DDIC from a low refresh rate to a high refresh rate (i.e., from a refresh rate below 60Hz to a refresh rate above 60 Hz) when the AP is ready for image data in advance (i.e., when there is an acceleration demand), in the present application, the AP performs a transmission delay operation.
Since the refresh rate hopping occurs when the historical refresh rate is low and the current refresh rate is high, in one possible implementation, after the AP acquires the historical refresh rate, it detects whether the historical refresh rate is less than the target refresh rate. If the historical refreshing frequency corresponding to at least one frame of image is smaller than the target refreshing frequency, determining that the transmission delay condition is met, and further performing transmission delay operation on the (m+1) th frame of image data.
If the historical refresh frequency corresponding to each frame of image is greater than or equal to the target refresh frequency, determining that the transmission delay condition is not met, and transmitting the m+1st frame of image data to the DDIC according to the conventional transmission logic (namely, when the rising edge of the Multiple-TE signal is detected, the AP transmits the m+1st frame of image data to the DDIC).
Since the reference frame rates corresponding to different applications are different, different target refresh frequencies need to be set for different applications. In one possible embodiment, the AP determines a reference frame rate of the foreground application before image data transmission, thereby setting the transmission delay condition based on the reference frame rate.
In one illustrative example, when the foreground application is a game application and the reference frame rate of the game application is 60FPS, the AP sets the transmission delay condition as: in the historical refresh frequency corresponding to the last 2 frames of images, the historical refresh frequency is smaller than 60Hz. The AP performs a display delay operation as long as the history refresh frequency corresponding to the existing image is less than 60 Hz; if the historical refreshing frequency corresponding to the two frames of images is not less than 60Hz, the AP does not need to carry out display transmission delay operation.
Regarding a specific manner of performing the display delay operation on the image data, in one possible embodiment, when the history refresh frequency satisfies the display delay condition and the m+1st frame of image data is ready, the AP implements the display delay by skipping the TE signal. The following description uses exemplary embodiments.
Referring to fig. 7, a flowchart of an image data transmission method according to another exemplary embodiment of the present application is shown. The method comprises the following steps:
step 701, transmitting the mth frame of image data to the DDIC, where m is a positive integer.
Step 702, determining a history refresh frequency of the DDIC when displaying the m-n to m-1 th frame images, n being an integer less than m and greater than or equal to 2.
The implementation of steps 701 to 702 may refer to the above-mentioned embodiments, and this embodiment is not repeated here.
Illustratively, as shown in FIG. 8, after the AP transmits the image data of image frame C to the DDIC, it determines that the history refresh frequency of the DDIC is 60Hz when image frame A is displayed, and that the history refresh frequency of the DDIC is 45Hz when image frame B is displayed.
In step 703, in response to the existence of at least one frame of image having a history refresh frequency less than the target refresh frequency, determining the real-time duration number of Multiple-TE signals during the display of the mth frame of image when the preparation of the mth+1st frame of image data is completed.
When the delay display condition is satisfied, the AP detects the real-time continuous number of Multiple-TE signals generated by the DDIC before transmitting the m+1th frame of image data to the DDIC (the m+1th frame of image data is ready), and further determines whether display delay operation is required.
In one possible implementation manner, the AP determines the real-time continuous number of Multiple-TE signals in the display process of the mth frame image by acquiring the real-time count value of the counter, so as to determine the output position of the current Multiple-TE signal. The real-time duration number is based on the real-time count value of the counter and the image frame corresponding to the real-time count value, wherein the update mode of the count value of the counter can refer to the above embodiment, and this embodiment is not described herein again.
Optionally, if the image frame corresponding to the real-time count value of the counter is the mth image, the real-time continuous number of Multiple-TE signals in the display process of the mth image is the real-time count value of the counter; if the image frame corresponding to the real-time count value of the counter is the m-1 th image, the real-time continuous number of the Multiple-TE signal in the display process of the m-th image is 0.
Illustratively, as shown in fig. 8, when the preparation of the image data of the image frame D is completed, the DDIC scans the image frame C, and the image frame corresponding to the real-time count value of the counter is the image frame B, but not the image frame C, so that the real-time continuous number of Multiple-TE signals in the display process of the image frame C is 0, that is, the image data of the image frame D is ready to be completed before the DDIC outputs the Multiple-TE signals.
In step 704, in response to the number of real-time durations being less than a number threshold, a TE signal skip operation is performed, the number threshold being set based on the target refresh frequency.
In order to avoid the refresh frequency hopping above the target refresh frequency, the AP sets a count threshold based on the target refresh frequency and detects whether the real-time number of sustained counts is less than the count threshold. If the number of the continuous real-time frames is smaller than the number threshold value, the m+1st frame of image is ready to be completed in advance, and if the image data transmission is directly carried out based on the next Multiple-TE signal, the refreshing frequency is greatly jumped, so that the AP skips at least one Multiple-TE signal, and the effect of delaying display is achieved.
Optionally, when the DDIC scans an image at the target refresh frequency, after the image scanning is completed, the number of Multiple-TE signals generated before the next frame of image is scanned is a number threshold-1, and correspondingly, the number of Multiple-TE signals skipped during the TE signal skipping operation is the difference between the number threshold and the real-time continuous number, that is, after the TE signal skipping operation is completed, the refresh frequency of the DDIC in the mth frame of image displaying process is the target refresh frequency.
In one possible implementation, in response to the number of real-time durations being less than the number threshold, the AP determines a target number of skips for the Multiple-TE signal based on a difference between the number threshold and the number of real-time durations; when receiving the Multiple-TE signal output by the DDIC and the real-time skip number does not reach the target skip number, the AP skips the Multiple-TE signal, i.e. does not transmit image data to the DDIC according to the Multiple-TE signal. Further, the AP updates the real-time skip number, i.e., performs an operation of adding one to the real-time skip number, so as to compare the updated real-time skip number with the target skip number when the Multiple-TE signal is detected again.
Optionally, if the number of the real-time continuous frames is not smaller than the number threshold, it indicates that the m+1st frame of image is not ready in advance, and image data transmission is directly performed based on the next Multiple-TE signal, so that the refreshing frequency is not greatly hopped.
Illustratively, as shown in fig. 8, when the target refresh frequency is 60Hz, the AP determines that the number threshold is 1 (which can be determined by looking up the correspondence between the refresh frequency and the number threshold). Since the real-time duration of the Multiple-TE signal is 0 during the display of the image frame C, the AP skips the current Multiple-TE signal and transmits the m+1st frame image data to the DDIC (i.e., delays the transmission of the m+1st frame image data to the DDIC by 2.8 ms) when the rising edge of the next Multiple-TE signal is detected.
Step 705, in response to completion of the TE signal skip operation, transmitting the m+1th frame image data to the DDIC.
Optionally, after completing the TE signal skipping operation, the AP transmits the m+1st frame of image data to the DDIC when detecting the next Multiple-TE signal, so that the refresh frequency of the DDIC in the mth frame of image display process is the target refresh frequency.
Illustratively, as shown in FIG. 8, after introducing the send-display delay mechanism, the AP skips the first Multiple-TE signal and then transmits the m+1th image data to the DDIC when the rising edge of the second Multiple-TE signal is detected. Through TE signal skipping operation, the change condition of the DDIC refresh frequency is changed from 60 Hz-45 Hz-72 Hz (without introducing a display transmission delay mechanism) to 60 Hz-45 Hz-60 Hz (with introducing a display transmission delay mechanism), and the jump of the refresh frequency is avoided. In addition, after the TE signal skips operation, the transmission interval between the current frame and the next frame is shortened, so that the refresh frequency corresponding to the next frame transmission is improved, the occurrence frequency of low refresh frequencies such as 45Hz is reduced, and the stability of the refresh frequency is further improved.
In another possible implementation, since data transmission is performed between the AP and the DDIC through the MIPI, the AP can implement the transmission delay by blocking the MIPI when the history refresh frequency satisfies the transmission delay condition and the m+1st frame of image data is ready to be provided. The following description uses exemplary embodiments.
Referring to fig. 9, a flowchart of an image data transmission method according to another exemplary embodiment of the present application is shown. The method comprises the following steps:
Step 901, transmitting the mth frame of image data to the DDIC, m being a positive integer.
Step 902, starting a first timer, wherein the MIPI is in a channel state within the timer duration of the first timer.
In one possible implementation, after transmitting the image data to the DDIC, the AP starts a first timer, and ensures that the MIPI is in a path state within the timer duration of the first timer, so that the AP can transmit an instruction other than the image data to the DDIC through the MIPI during the frame scanning process, where the first timer may be started by the AP by calling a timing thread.
Illustratively, as shown in fig. 10, the AP starts a first timer after transmitting image data of image frame C to the DDIC.
Step 903, determining a history refresh frequency of the DDIC when displaying the m-n to m-1 th frame images, n being an integer less than m and equal to or greater than 2.
Illustratively, as shown in FIG. 10, after the AP transmits the image data of image frame C to the DDIC, it determines that the history refresh frequency of the DDIC is 60Hz when image frame A is displayed, and that the history refresh frequency of the DDIC is 45Hz when image frame B is displayed.
In step 904, in response to the existence of at least one frame of image having a history refresh frequency less than the target refresh frequency, when the timer duration of the first timer is reached, starting a second timer, and setting the MIPI to a blocking state within the timer duration of the second timer.
In this embodiment, when the first timer reaches the timer duration, the AP sets the MIPI from the access state to the blocking state, and starts the second timer, so as to ensure that the MIPI remains in the blocking state within the timer duration of the second timer. Since the MIPI is in the blocked state, the TE signal cannot be detected during the second timer period, and thus the AP cannot transmit the m+1st frame of image data to the DDIC during the second timer period, thereby achieving the effect of delay transmission.
Wherein the timer duration of the first timer and the timer duration of the second timer are set based on the target refresh frequency. In one possible implementation, when the target refresh frequency is i and the highest refresh frequency required by the DDIC during the running process of the foreground application is j, the timer duration of the first timer is less than 1/j, and the sum of the timer durations of the first timer and the second timer is greater than 1/j and less than 1/i, so that the MIPI enters the blocking state before the rising edge of the next TE signal, and the refresh frequency of the DDIC is the target refresh frequency during the display process of the mth frame image.
Illustratively, as shown in fig. 10, when the target refresh frequency of the running foreground application is 60Hz and the highest refresh frequency required by the DDIC during the running of the foreground application is 72Hz, the AP sets the timer duration of the first timer to 13ms (less than 1000++72=13.9 ms) and sets the timer duration of the second timer to 2ms (the sum of the timer duration of the first timer and the timer duration of the second timer is 15ms,15ms is less than 1000++60=16.7 ms). During the second timer period, the AP cannot transmit image data of image frame D to the DDIC during this period because the MIPI is in the blocked state.
In response to the timer duration reaching the second timer, MIPI is set to a pass state and the m+1st frame of image data is transmitted to the DDIC, step 905.
Optionally, when the timer duration of the second timer is reached, the AP resets the MIPI to the on state, and when detecting the next TE signal, transmits the m+1st frame of image data to the DDIC, so that the refresh frequency of the DDIC in the display process of the mth frame of image is the target refresh frequency.
Illustratively, as shown in fig. 10, after the timer duration of the second timer is reached, the MIPI is restored to the channel state, and the AP transmits the image data of the image frame D to the DDIC upon detecting the next TE signal output from the DDIC.
It should be noted that, the foregoing embodiments are only described by taking two delay transmission modes of skipping TE signals and blocking MIPI as an example, and in other possible embodiments, the AP may delay the transmission timing by other modes, and the embodiments of the present application are not limited to specific delay transmission modes.
Referring to fig. 11, a block diagram of an image data transmission device according to an embodiment of the present application is shown. The device comprises:
A transmission module 1101, configured to transmit image data of an mth frame to a display driving chip DDIC, where m is a positive integer;
a first determining module 1102, configured to determine a history refresh frequency of the DDIC when displaying the m-n to m-1 th frame images, where n is an integer less than m and greater than or equal to 2;
A delay module 1103, configured to perform a display delay operation on the m+1st frame of image data in response to the history refresh frequency meeting a display delay condition, where the display delay operation is used to delay transmission of the m+1st frame of image data to the DDIC;
The transmission module 1101 is further configured to transmit the (m+1) -th frame image data to the DDIC in response to completion of the transmission delay operation.
Optionally, the AP is configured to perform image data transmission based on a rising edge of a Multiple-tearing-effect Multiple-TE signal, where the Multiple-TE signal is output by the DDIC;
The first determining module 1102 includes:
An obtaining unit, configured to obtain, for the m-n to m-1 th frame images, a historical number of the Multiple-TE signals output by the DDIC in a display process of each frame image;
and a determining unit for determining the history refresh frequency of the DDIC for each of the m-n to m-1 th frame images based on the history number.
Optionally, the acquiring unit is configured to:
in response to detecting the Multiple-TE signal, and the time interval between the Multiple-TE signal and the forward adjacent Multiple-TE signal is smaller than an interval threshold value, updating the count value of a counter, wherein the counter is used for recording the number of the Multiple-TE signals output by a DDIC in the display process of each frame of image;
In response to detecting the Multiple-TE signal and a time interval between the Multiple-TE signal and a forward adjacent Multiple-TE signal being greater than the interval threshold, the count value of the counter is determined to be the historical number and the count value of the counter is set to 1.
Optionally, the determining unit is configured to:
and determining the history refreshing frequency from the corresponding relation between the TE signal number and the refreshing frequency based on the history number.
Optionally, the frequency of the DDIC output Multiple-TE signal is a TE frequency, where the TE frequency is the same as the light emitting EM frequency of the display screen, or the TE frequency is an integer Multiple of the EM frequency.
Optionally, the delay module 1103 is configured to:
And in response to the fact that the historical refreshing frequency corresponding to at least one frame of image is smaller than a target refreshing frequency, determining that the transmission delay condition is met, and carrying out the transmission delay operation on the (m+1) th frame of image data, wherein the target refreshing frequency is matched with a reference frame rate in the running process of a foreground application.
Optionally, the AP is configured to perform image data transmission based on a rising edge of a Multiple-TE signal, where the Multiple-TE signal is output by the DDIC;
the delay module 1103 includes:
A first delay unit for determining the real-time continuous number of the Multiple-TE signal in the display process of the mth frame image in response to the preparation of the mth+1th frame image data; and responding to the real-time continuous number being smaller than a number threshold value, and performing TE signal skipping operation, wherein the number threshold value is set based on the target refresh frequency.
Optionally, the first delay unit is configured to:
responsive to the number of real-time sustained numbers being less than the number threshold, determining a target skip number for the Multiple-TE signal based on a difference between the number threshold and the number of real-time sustained numbers;
in response to receiving the Multiple-TE signal output by the DDIC and the real-time skip number not reaching the target skip number, performing a skip process on the Multiple-TE signal;
updating the real-time skip number.
Optionally, data transmission is performed between the AP and the DDIC through a mobile industry processor interface MIPI;
The apparatus further comprises:
The timing module is used for starting a first timer, wherein the MIPI is in a channel state within the timer duration of the first timer;
the delay module 1103 includes:
A second delay unit, configured to start a second timer in response to reaching a timer duration of the first timer, and set the MIPI to a blocking state within the timer duration of the second timer;
The timer duration of the first timer and the second timer is set based on the target refresh frequency.
Optionally, the target refresh frequency is i, and the highest refresh frequency required by the DDIC in the running process of the foreground application is j, where j is greater than i;
the timer duration of the first timer and the second timer is less than 1/j;
The sum of the timer duration of the first timer and the timer duration of the second timer is more than 1/j and less than 1/i.
Optionally, the apparatus further includes:
a second determining module, configured to determine the reference frame rate of the foreground application;
And the setting module is used for setting the transmission delay condition based on the reference frame rate.
In summary, in the embodiment of the present application, after the AP transmits the mth frame of image data to the DDIC by introducing the send-display delay mechanism, it is determined whether the send-display delay condition is satisfied based on the historical refresh frequency of the DDIC in the display process of the last n frames of images, and when the send-display delay condition is satisfied, the m+1th frame of image data is transmitted to the DDIC after the send-display delay operation is performed on the m+1th frame of image data, so that the problem of flicker and jitter of the screen caused by the jump of the refresh frequency of the DDIC due to the fluctuation of the output frame rate of the AP is avoided, which is helpful to improve the stability of the refresh frequency of the DDIC in the image display process, and achieve the effect of improving the image display quality.
Referring to fig. 12, a block diagram illustrating a structure of a terminal 1200 according to an exemplary embodiment of the present application is shown. The terminal 1200 may be a smart phone, tablet computer, notebook computer, etc. The terminal 1200 in the present application may include one or more of the following components: processor 1210, memory 1220, display module 1230.
Processor 1210 may include one or more processing cores and processor 1210 may be an AP as described in the embodiments above. The processor 1210 connects various parts within the overall terminal 1200 using various interfaces and lines, and performs various functions of the terminal 1200 and processes data by executing or executing instructions, programs, code sets, or instruction sets stored in the memory 1220, and invoking data stored in the memory 1220. Alternatively, the processor 1210 may be implemented in at least one hardware form of digital signal Processing (DIGITAL SIGNAL Processing, DSP), field-Programmable gate array (Field-Programmable GATE ARRAY, FPGA), programmable logic array (Programmable Logic Array, PLA). The processor 1210 may integrate one or a combination of several of a central processing unit (Central Processing Unit, CPU), an image processor (Graphics Processing Unit, GPU), a neural network processor (Neural-network Processing Unit, NPU), and a modem, etc. The CPU mainly processes an operating system, a user interface, an application program and the like; the GPU is used for rendering and drawing the content required to be displayed by the touch display screen module 1230; the NPU is used for realizing an artificial intelligence (ARTIFICIAL INTELLIGENCE, AI) function; the modem is used to handle wireless communications. It will be appreciated that the modem may not be integrated into the processor 1210 and may be implemented by a single chip.
Memory 1220 may include random access Memory (Random Access Memory, RAM) or Read-Only Memory (ROM). Optionally, the memory 1220 includes a non-transitory computer-readable medium (non-transitory computer-readable storage medium). Memory 1220 may be used to store instructions, programs, code, sets of codes, or sets of instructions. The memory 1220 may include a stored program area and a stored data area, wherein the stored program area may store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playing function, an image playing function, etc.), instructions for implementing various method embodiments of the present application, etc.; the storage data area may store data (e.g., audio data, phonebook) created according to the use of the terminal 1200, etc.
The display module 1230 is a display module for displaying images, and is generally disposed on the front panel of the terminal 1200. The display screen module 1230 may be designed as a full screen, a curved screen, a contoured screen, a double-sided screen, or a folded screen. The display module 1230 may also be designed to be a combination of a full screen and a curved screen, a combination of a special-shaped screen and a curved screen, which is not limited in this embodiment.
In an embodiment of the present application, the display module 1230 includes a DDIC1231 and a display 1232 (panel). The display 1232 may be an OLED display, which may be a Low Temperature Polysilicon (LTPS) AMOLED display or a low temperature polycrystalline oxide (Low Temperature Polycrystalline Oxide, LTPO) AMOLED display.
DDIC1231 is used to drive display screen 1232 for image display. In addition, the DDIC1231 is connected to the processor 1210 via MIPI interface, and is configured to receive image data and instructions issued by the processor 1210.
In one possible implementation, the display module 1230 also has a touch function by which a user can perform a touch operation on the display module 1230 using any suitable object such as a finger, a stylus, or the like.
In addition, those skilled in the art will appreciate that the structure of the terminal 1200 shown in the above-described figures does not constitute a limitation of the terminal 1200, and the terminal may include more or less components than illustrated, or may combine certain components, or may have a different arrangement of components. For example, the terminal 1200 further includes a microphone, a speaker, a radio frequency circuit, an input unit, a sensor, an audio circuit, a wireless fidelity (WIRELESS FIDELITY, WIFI) module, a power supply, a bluetooth module, and the like, which are not described herein.
The embodiment of the application also provides a computer readable storage medium, which stores at least one instruction for being executed by a processor to implement the image data transmission method according to the above embodiment.
Those skilled in the art will appreciate that in one or more of the examples described above, the functions described in the embodiments of the present application may be implemented in hardware, software, firmware, or any combination thereof. When implemented in software, these functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer.
The foregoing description of the preferred embodiments of the present application is not intended to limit the application, but rather, the application is to be construed as limited to the appended claims.

Claims (20)

1. The image data transmission method is characterized by being used for an application processor AP, wherein the AP is used for transmitting image data based on the rising edge of a Multiple-tearing effect Multiple-TE signal output by a display driving chip DDIC;
The method comprises the following steps:
transmitting the m-th frame of image data to a display driving chip DDIC, wherein m is a positive integer;
Determining a history refresh frequency of the DDIC when displaying the m-n to m-1 frame images, wherein the history refresh frequency is obtained based on the history number of Multiple-TE signals output by the DDIC in the image display process, and n is an integer smaller than m and more than or equal to 2;
In response to the fact that the historical refreshing frequency corresponding to at least one frame of image is smaller than a target refreshing frequency, carrying out display sending delay operation on the (m+1) th frame of image data, wherein the target refreshing frequency is matched with a reference frame rate in the running process of a foreground application, and the display sending delay operation is used for delaying transmission of the (m+1) th frame of image data to the DDIC;
and transmitting the m+1th frame image data to the DDIC in response to completion of the display delay operation.
2. The method of claim 1, wherein the determining a historical refresh frequency of the DDIC when displaying the m-n to m-1 th frame of images comprises:
in response to detecting the Multiple-TE signal, and the time interval between the Multiple-TE signal and the forward adjacent Multiple-TE signal is smaller than an interval threshold value, updating the count value of a counter, wherein the counter is used for recording the number of the Multiple-TE signals output by a DDIC in the display process of each frame of image;
In response to detecting the Multiple-TE signal and a time interval between the Multiple-TE signal and a forward adjacent Multiple-TE signal being greater than the interval threshold, determining the count value of the counter as the historical number and setting the count value of the counter to 1;
The history refresh frequency of each of the m-n to m-1 th frame images is determined based on the history number.
3. The method of claim 2, wherein the determining the historical refresh frequency for each of the m-n through m-1 th frame images based on the historical number comprises:
and determining the history refreshing frequency from the corresponding relation between the TE signal number and the refreshing frequency based on the history number.
4. The method of claim 1, wherein the frequency of the DDIC output Multiple-TE signal is a TE frequency that is the same as the light emitting EM frequency of the display screen or an integer Multiple of the TE frequency.
5. The method according to claim 1, wherein said performing said display delay operation on said m+1th frame of image data comprises:
determining a real-time continuous number of the Multiple-TE signal in the display process of the mth frame image in response to the preparation of the mth+1th frame image data;
And responding to the real-time continuous number being smaller than a number threshold value, and performing TE signal skipping operation, wherein the number threshold value is set based on the target refresh frequency.
6. The method of claim 5, wherein said performing a TE signal skip operation in response to said real-time persistence number being less than a number threshold comprises:
responsive to the number of real-time sustained numbers being less than the number threshold, determining a target skip number for the Multiple-TE signal based on a difference between the number threshold and the number of real-time sustained numbers;
in response to receiving the Multiple-TE signal output by the DDIC and the real-time skip number not reaching the target skip number, performing a skip process on the Multiple-TE signal;
updating the real-time skip number.
7. The method of claim 1, wherein data transmission between the AP and the DDIC is via a mobile industry processor interface MIPI;
After the transmission of the mth frame of image data to the display driver chip DDIC, the method further comprises:
Starting a first timer, wherein the MIPI is in a channel state within the timer duration of the first timer;
The performing the display delay operation on the m+1th frame image data includes:
in response to reaching the timer duration of the first timer, starting a second timer, and setting the MIPI to a blocking state in the timer duration of the second timer;
The timer duration of the first timer and the second timer is set based on the target refresh frequency.
8. The method of claim 7, wherein the target refresh frequency is i, and the highest refresh frequency required by the DDIC during operation of the foreground application is j, j being greater than i;
The timer duration of the first timer is less than 1/j;
The sum of the timer duration of the first timer and the timer duration of the second timer is more than 1/j and less than 1/i.
9. The method according to claim 1, wherein the method further comprises:
determining the reference frame rate of the foreground application;
The target refresh frequency is set based on the reference frame rate.
10. An image data transmission apparatus, characterized in that the apparatus comprises:
The transmission module is used for transmitting the image data of the m frame to the display driving chip DDIC, wherein m is a positive integer;
the first determining module is used for determining the historical refreshing frequency of the DDIC when the m-n to m-1 frame of images are displayed, the historical refreshing frequency is determined and obtained based on the historical number of Multiple-tearing-effect Multiple-TE signals output by the DDIC in the image display process, the rising edge of the Multiple-TE signals is used for triggering an application processor AP to transmit image data, and n is an integer smaller than m and larger than or equal to 2;
The delay module is used for responding to the fact that the historical refreshing frequency corresponding to at least one frame of image is smaller than a target refreshing frequency, carrying out a display sending delay operation on the (m+1) th frame of image data, wherein the target refreshing frequency is matched with a reference frame rate in the running process of a foreground application, and the display sending delay operation is used for delaying the transmission of the (m+1) th frame of image data to the DDIC;
the transmission module is further configured to transmit the (m+1) -th frame image data to the DDIC in response to completion of the send-display delay operation.
11. The apparatus of claim 10, wherein the first determining module comprises:
the acquisition unit is used for responding to the detection of the Multiple-TE signals, the time interval between the Multiple-TE signals and the forward adjacent Multiple-TE signals is smaller than an interval threshold value, and updating the count value of a counter, wherein the counter is used for recording the number of the Multiple-TE signals output by the DDIC in the display process of each frame of image;
In response to detecting the Multiple-TE signal and a time interval between the Multiple-TE signal and a forward adjacent Multiple-TE signal being greater than the interval threshold, determining the count value of the counter as the historical number and setting the count value of the counter to 1;
a determining unit configured to determine the history refresh frequency of each of the m-n to m-1 th frame images based on the history number.
12. The apparatus according to claim 11, wherein the determining unit is configured to:
and determining the history refreshing frequency from the corresponding relation between the TE signal number and the refreshing frequency based on the history number.
13. The apparatus of claim 10, wherein the frequency of the DDIC output Multiple-TE signal is a TE frequency that is the same as a light emitting EM frequency of a display screen or an integer Multiple of the TE frequency.
14. The apparatus of claim 10, wherein the delay module comprises:
A first delay unit for determining the real-time continuous number of the Multiple-TE signal in the display process of the mth frame image in response to the preparation of the mth+1th frame image data; and responding to the real-time continuous number being smaller than a number threshold value, and performing TE signal skipping operation, wherein the number threshold value is set based on the target refresh frequency.
15. The apparatus of claim 14, wherein the first delay unit is configured to:
responsive to the number of real-time sustained numbers being less than the number threshold, determining a target skip number for the Multiple-TE signal based on a difference between the number threshold and the number of real-time sustained numbers;
in response to receiving the Multiple-TE signal output by the DDIC and the real-time skip number not reaching the target skip number, performing a skip process on the Multiple-TE signal;
updating the real-time skip number.
16. The apparatus of claim 10, wherein data transmission between the AP and the DDIC is via a mobile industry processor interface MIPI;
The apparatus further comprises:
The timing module is used for starting a first timer, wherein the MIPI is in a channel state within the timer duration of the first timer;
The delay module includes:
A second delay unit, configured to start a second timer in response to reaching a timer duration of the first timer, and set the MIPI to a blocking state within the timer duration of the second timer;
The timer duration of the first timer and the second timer is set based on the target refresh frequency.
17. The apparatus of claim 16, wherein the target refresh frequency is i, and the highest refresh frequency required by the DDIC during operation of the foreground application is j, j being greater than i;
the timer duration of the first timer and the second timer is less than 1/j;
The sum of the timer duration of the first timer and the timer duration of the second timer is more than 1/j and less than 1/i.
18. The apparatus of claim 10, wherein the apparatus further comprises:
a second determining module, configured to determine the reference frame rate of the foreground application;
And the setting module is used for setting the target refresh frequency based on the reference frame rate.
19. A terminal, characterized in that the terminal comprises an application processor AP, a display screen and a display driving circuit chip DDIC, the AP is connected with the DDIC through a mobile industry processor interface MIPI, and the AP is configured to execute at least one instruction in a memory to implement the image data transmission method according to any one of claims 1 to 9.
20. A computer readable storage medium storing at least one instruction for execution by a processor to implement the image data transmission method of any one of claims 1 to 9.
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