CN113784497A - Circuit board with shielding hole and manufacturing method thereof - Google Patents
Circuit board with shielding hole and manufacturing method thereof Download PDFInfo
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- CN113784497A CN113784497A CN202010525729.6A CN202010525729A CN113784497A CN 113784497 A CN113784497 A CN 113784497A CN 202010525729 A CN202010525729 A CN 202010525729A CN 113784497 A CN113784497 A CN 113784497A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 26
- 238000000034 method Methods 0.000 claims abstract description 31
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 26
- 229910052802 copper Inorganic materials 0.000 claims abstract description 26
- 239000010949 copper Substances 0.000 claims abstract description 26
- 238000009713 electroplating Methods 0.000 claims abstract description 26
- 230000008021 deposition Effects 0.000 claims abstract description 19
- 238000010030 laminating Methods 0.000 claims abstract description 6
- 239000011347 resin Substances 0.000 claims description 8
- 229920005989 resin Polymers 0.000 claims description 8
- 230000000149 penetrating effect Effects 0.000 abstract description 4
- 239000002184 metal Substances 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 6
- 230000004323 axial length Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 239000000047 product Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000013589 supplement Substances 0.000 description 1
- 230000002195 synergetic effect Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
- H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
- H05K1/0222—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors for shielding around a single via or around a group of vias, e.g. coaxial vias or vias surrounded by a grounded via fence
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/07—Electric details
- H05K2201/0707—Shielding
- H05K2201/0715—Shielding provided by an outer layer of PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/07—Electric details
- H05K2201/0707—Shielding
- H05K2201/0723—Shielding provided by an inner layer of PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02A—TECHNOLOGIES FOR ADAPTATION TO CLIMATE CHANGE
- Y02A30/00—Adapting or protecting infrastructure or their operation
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The application provides a circuit board with a shielding hole and a manufacturing method thereof. The method comprises the following steps: a first shielding hole penetrating through the first surface and the second surface is formed in the inner layer plate, and the first shielding hole is electroplated and filled; laminating outer laminates on the first surface and the second surface of the inner laminate to form a multilayer laminate, respectively; forming a signal hole concentric with the first shielding hole on the multilayer board, and carrying out copper deposition electroplating treatment on the signal hole; the aperture of the signal hole is smaller than that of the first shielding hole, and the signal hole penetrates through the first surface and the second surface opposite to the first surface of the multilayer board; forming a plurality of second shielding holes in a first preset position of the outer layer plate around the axis of the first shielding hole, and carrying out electroplating hole filling on the second shielding holes; and manufacturing a signal wire at a second preset position of the outer layer plate and connecting the signal wire with the signal hole. The manufacturing method of the circuit board with the shielding hole not only can enable the signal wire to be connected with the signal hole, but also can greatly reduce the probability of signal leakage.
Description
Technical Field
The invention relates to the technical field of circuit board processing, in particular to a circuit board with shielding holes and a manufacturing method thereof.
Background
The circuit board is a provider of electrical connection of electronic components, and is generally provided with multiple layers of signal lines, and the multiple layers of signal lines are communicated with each other through signal holes.
Referring now to fig. 1, fig. 1 is a perspective view of a shielding hole and a signal hole of a circuit board in the prior art; specifically, in order to prevent signal leakage, a plurality of shielding holes 12 are often arranged around the signal hole 11 at intervals, so that the shielding holes 12 surround the signal hole 11 to shield the signal; however, since the signal holes 11 need to be connected to the outer signal lines 13, in the process of disposing the shielding holes 12, generally, 1-2 shielding holes 12 are less needed to be disposed to avoid the space of the signal lines 13. However, this makes signal leakage more severe.
Disclosure of Invention
The application provides a circuit board with a shielding hole and a manufacturing method thereof.
In order to solve the technical problem, the application adopts a technical scheme that: a method for manufacturing a circuit board with a shielding hole is provided. The method comprises the following steps: forming a first shielding hole on the inner layer plate and carrying out electroplating and hole filling on the first shielding hole; the first shielding hole penetrates through a first surface of the inner layer plate and a second surface opposite to the first surface; laminating outer laminates on the first surface and the second surface of the inner laminate to form a multilayer laminate, respectively; forming a signal hole concentric with the first shielding hole on the multilayer board, and carrying out copper deposition electroplating treatment on the signal hole; the aperture of the signal hole is smaller than that of the first shielding hole, and the signal hole penetrates through the first surface and the second surface opposite to the first surface of the multilayer board; forming a plurality of second shielding holes in a first preset position of the outer layer plate around the axis of the first shielding hole, and carrying out electroplating hole filling on the second shielding holes; the diameter of a graph formed by enclosing the plurality of second shielding holes is the same as the aperture of the first shielding hole; and manufacturing a signal wire at a second preset position of the outer layer plate and connecting the signal wire with the signal hole.
In order to solve the above technical problem, another technical solution adopted by the present application is: a circuit board having a shield hole is provided. This circuit board includes: the signal hole penetrates through the first outer layer plate and the second outer layer plate; the signal hole is used for communicating a first signal wire on the first outer layer plate with a second signal wire on the second outer layer plate; the inner layer plate is provided with a first shielding hole, the first shielding hole surrounds the first hole section of the signal hole and is used for preventing a signal of the first hole section of the signal hole from leaking; a plurality of second shielding holes are formed in the first preset position of the first outer layer plate around the signal hole and used for preventing signals of the second hole section of the signal hole from leaking; a plurality of third shielding holes are respectively formed in the first preset position of the second outer layer plate around the signal hole, and the third shielding holes are used for preventing signals of a third hole section of the signal hole from leaking; the diameter of a graph formed by enclosing the plurality of second shielding holes and the plurality of third shielding holes is the same as the diameter of the first shielding holes.
According to the manufacturing method of the circuit board with the shielding hole, the first shielding hole is formed in the inner layer board, electroplating is carried out on the first shielding hole for hole filling, and then the outer layer board is laminated on the first surface and the second surface of the inner layer board respectively to form the multilayer board; forming a signal hole concentric with the first shielding hole on the multilayer board, and carrying out copper deposition electroplating treatment on the signal hole; then, a plurality of second shielding holes are formed in a first preset position of the outer layer plate around the axis of the first shielding hole, and the second shielding holes are subjected to electroplating hole filling; and finally, manufacturing a signal wire at a second preset position of the outer plate and connecting the signal wire with the signal hole, so that the connection between the signal hole and the signal wire can be realized, and because the position for setting the signal wire in the method is avoided by less setting the second shielding holes, the signals shielded by the second shielding holes are less, and the signal shielding at the position of the first shielding hole cannot be influenced by less setting the second shielding holes, compared with the scheme in the prior art, the method can greatly reduce the probability of signal leakage.
Drawings
FIG. 1 is a perspective view of a prior art shielding hole and signal hole in a circuit board;
fig. 2 is a flowchart of a method for manufacturing a circuit board having a shielding hole according to an embodiment of the present application;
fig. 3 is a perspective view of a first shielding hole, a signal hole, a second shielding hole and a signal line according to an embodiment of the method for manufacturing a circuit board with a shielding hole of the present application;
FIG. 4 is a top view of FIG. 3;
FIG. 5 is a sub-flowchart of step S11 in FIG. 2;
fig. 6 is a schematic structural diagram of a first shielding hole according to an embodiment of the present application;
FIG. 7 is a schematic diagram of a pattern surrounded by a plurality of second shielding holes according to an embodiment of the present application;
FIG. 8 is a perspective view of a first shielding hole, a signal hole, and a second shielding hole provided in an embodiment of the present application;
FIG. 9 is a sub-flowchart of step S14 in FIG. 2;
fig. 10 is a perspective view of a first shielding hole, a signal hole, a second shielding hole, a third shielding hole and a signal line provided in an embodiment of the present application;
FIG. 11 is a top view of FIG. 10;
fig. 12 is a side view of fig. 10.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms "first", "second" and "third" in this application are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any indication of the number of technical features indicated. Thus, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of the feature. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless explicitly specifically limited otherwise. All directional indications (such as up, down, left, right, front, and rear … …) in the embodiments of the present application are only used to explain the relative positional relationship between the components, the movement, and the like in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indication is changed accordingly. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
The present application will be described in detail with reference to the accompanying drawings and examples.
Referring to fig. 2 to 4, fig. 2 is a flowchart illustrating a method for manufacturing a circuit board with a shielding hole according to an embodiment of the present application; fig. 3 is a perspective view of a first shielding hole, a signal hole, a second shielding hole and a signal line according to an embodiment of the method for manufacturing a circuit board with a shielding hole of the present application; FIG. 4 is a top view of FIG. 3; in this embodiment, a method for manufacturing a circuit board with shielding holes is provided, in which a plurality of first shielding holes 21 and second shielding holes 23 are disposed on the periphery of a signal hole 22, so as to surround most positions of the signal hole 22 through the first shielding holes 21, surround other positions at two ends of the signal hole 22 through a plurality of second shielding holes 23 bordering on the first shielding holes 21, and further shield signals through the first shielding holes 21 and the second shielding holes 23, wherein, because the positions of the signal lines 24 that are shielded in the method are avoided by the second shielding holes 23 that are less disposed, the signals shielded by the second shielding holes 23 are fewer, and the signal shielding at the positions of the first shielding holes 21 is not affected by the second shielding holes 23 that are less disposed, compared with the solutions in the prior art, the method not only can realize the connection between the signal lines 24 and the signal hole 22, and the probability of signal leakage can be greatly reduced.
Specifically, the method comprises the following steps:
step S11: and forming a first shielding hole on the inner layer plate and carrying out electroplating and hole filling on the first shielding hole.
Specifically, referring to fig. 5, fig. 5 is a sub-flowchart of step S11 in fig. 2, where step S11 specifically includes:
step S111: a first shielding hole is formed in the inner layer plate.
Wherein, the inner layer plate can be a core plate; in one embodiment, the core board may be a copper-clad board; the first shielding hole 21 specifically penetrates through a first surface and a second surface opposite to the first surface of the inner plate; the first shielding holes 21 may be circular holes, and the specific structure thereof can be shown in fig. 6, where fig. 6 is a schematic structural diagram of the first shielding holes according to an embodiment of the present disclosure; in one embodiment, the aperture diameter Φ 1 of the first shielding aperture 21 may be 1.6 millimeters.
Step S112: and carrying out copper deposition electroplating treatment on the first shielding hole.
Specifically, a copper layer 211 having a thickness of 0.05 mm may be electroplated.
Step S113: and performing resin hole plugging treatment on the first shielding hole after the copper deposition electroplating treatment.
Specifically, a resin plug hole process is performed in the first shield hole 21 to form a first shield layer so that a signal at a corresponding position is shielded by the first shield layer at a later stage.
Step S12: the outer laminate sheets are laminated on the first and second surfaces of the inner laminate sheet, respectively, to form a multilayer sheet.
Wherein, the outer layer plate can be a core plate, and the core plate can be a copper-clad plate.
In one embodiment, outer laminates of the same thickness are laminated on the first and second surfaces of the inner laminate, respectively, to form a multi-layer laminate.
Specifically, an outer laminate having a thickness of 0.3 mm may be laminated on each of the first and second surfaces of the inner laminate. At this time, because the first shielding hole 21 is totally closed, the problem of signal leakage does not occur at the position corresponding to the first shielding hole 21, and the height of the first shielding hole 21 from the signal line 24 on the outer board is only 0.25 mm, at this time, the influence of the 1-2 second shielding holes 23 arranged at this part on the signal leakage is extremely small and can be almost ignored, so that the probability of signal leakage can be greatly reduced. The height of the first shielding hole 21 from the signal line 24 on the outer plate can be obtained by subtracting the thickness of the signal line 24 from the thickness of the outer plate; the thickness of the signal line 24 is typically 0.05 mm.
Of course, in other embodiments, the outer laminates with different thicknesses may be laminated on the first surface and the second surface of the inner laminate, for example, the outer laminate with 0.3 mm thickness is laminated on the first surface of the inner laminate, and the outer laminate with 0.6 mm thickness is laminated on the second surface of the inner laminate, so as to form the multilayer board, which is not limited in this embodiment.
Step S13: and forming a signal hole concentric with the first shielding hole on the multilayer board, and carrying out copper deposition electroplating treatment on the signal hole.
In a specific implementation, a copper layer may be plated on the inner sidewalls of the signal hole 22 to form a conductive layer.
Specifically, the aperture Φ 2 of the signal hole 22 is smaller than the aperture Φ 1 of the first shielding hole 21, and the signal hole 22 penetrates through a first surface and a second surface opposite to the first surface of the multilayer board. Specifically, the aperture Φ 2 of the signal hole 22 may be 0.3 mm; it can be understood that, since the outer laminate is obtained by laminating the outer laminate on the first and second surfaces of the inner laminate, the axial length of the signal hole 22 penetrating the first and second surfaces of the multilayer board is greater than the first shield hole 21 penetrating the first and second surfaces of the inner laminate.
Step S14: and a plurality of second shielding holes are formed in the first preset position of the outer layer plate around the axis of the first shielding hole, and the second shielding holes are electroplated and filled.
Specifically, the diameter of the pattern surrounded by the plurality of second shielding holes 23 is the same as the aperture Φ 1 of the first shielding hole 21; specifically, after the first shielding hole 21 is formed and the first shielding hole 21 is subjected to copper deposition electroplating, the diameter of a pattern surrounded by the plurality of second shielding holes 23 is specifically the same as the diameter of the pattern surrounded by the first shielding hole 21 after the copper deposition electroplating, so that the second shielding holes 23 border the first shielding hole 21, and further, the signals are shielded through the synergistic effect of the first shielding holes and the second shielding holes; it is understood that if the maximum diameter of the pattern surrounded by the second shielding hole 23 is smaller than the diameter of the first shielding hole 21 after the copper deposition plating or the minimum diameter of the pattern surrounded by the second shielding hole 23 is larger than the diameter of the first shielding hole 21 after the copper deposition plating, a signal may leak through a gap therebetween.
Specifically, referring to fig. 7, fig. 7 is a schematic diagram of a graph surrounded by a plurality of second shielding holes according to an embodiment of the present application, and the graph surrounded by the plurality of second shielding holes 23 may be all circles, for example, a circle C, which uses the axis of the first shielding hole 21 as a center and passes through the plurality of first shielding holes 211、C2、C3.....Cn(ii) a In one embodiment, referring to fig. 8, fig. 8 is a perspective view of a first shielding hole, a signal hole, and a second shielding hole provided in an embodiment of the present application; the diameter of the circle C1 surrounded by the second shielding holes 23 is the same as the diameter of the first shielding hole 21 after the copper deposition plating.
Specifically, referring to fig. 9, fig. 9 is a sub-flowchart of step S14 in fig. 2, and step S14 specifically includes:
step S141: and a plurality of second shielding holes are formed in the first preset position of the outer layer plate around the axis of the first shielding hole.
Specifically, the second shielding hole 23 penetrates through the first surface and the second surface of the outer laminate, and the positional relationship among the second shielding hole 23, the first shielding hole 21 and the signal hole 22 can be seen in fig. 8; and in one embodiment, in order to avoid the position where the signal line 24 is connected to the signal hole 22, a plurality of second shielding holes 23 are disposed at a first predetermined position of the outer plate and are disposed at equal intervals along the circumferential direction of the signal hole 22.
Specifically, the aperture diameter Φ 3 of the second shielding hole 23 may be 0.3 mm.
Step S142: and carrying out copper deposition electroplating treatment on the second shielding hole.
Specifically, a copper layer 231 having a thickness of 0.05 mm may be electroplated.
Step S143: and performing resin hole plugging treatment on the second shielding hole after the copper deposition electroplating treatment.
Specifically, the resin plug-hole process is performed in the second shield hole 23 to form a second shield layer so that the signal at the corresponding position is shielded by the second shield layer at a later stage.
Step S15: and manufacturing a signal wire at a second preset position of the outer layer plate and connecting the signal wire with the signal hole.
It will be appreciated that the signal lines 24 laminated on the outer laminate of the first and second surfaces of the inner laminate are in particular connected by a conductive layer plated in the signal holes 22.
The second preset position of the outer plate is independent of the first preset position of the outer plate; it can be understood that, the signal line 24 of preparation in this application, its position of realizing being connected with signal hole 22 specifically is avoided out through set up second shielding hole 23 on the outer layer board less, and second shielding hole 23 only encloses a small part of signal hole 22, most position of signal hole 22 is wrapped up by first shielding hole 21, and first shielding hole 21 is totally closed again, the signal leakage problem can not appear, consequently, set up 1-2 second shielding holes 23 less in order to avoid out the position of preparation signal line 24, the influence that causes the signal leakage is less, compare in prior art, the probability that can greatly reduced signal leakage.
Specifically, referring to fig. 3 and 4, the signal line 24 is specifically disposed at a second preset position of the outer plate, and the signal line 24 is specifically communicated with the signal hole 22 through a position where at least one second shielding hole 23 is disposed on the outer plate and is avoided; specifically, referring to fig. 4, nine second shield holes 23 may be provided at equal intervals in the axial direction of the signal hole 22 at a first preset position of the outer plate.
According to the manufacturing method of the circuit board with the shielding holes, the centers of the signal hole 22 and the first shielding hole 21 are kept consistent, the first shielding hole 21 is made large and short relative to the signal hole 22, and the signal hole 22 is made small and long relative to the first shielding hole 21 (see fig. 3), so that most of the signal hole 22 is completely wrapped by the first shielding hole 21; for a part of the length of the signal hole 22, the second shielding hole 23 is designed to supplement the shielding effect of the part; wherein, the density of the second shielding holes 23 is controlled by the influence of the depth (i.e. the axial length of the second shielding holes 23), and the shallower the depth is, the greater the density is, i.e. the smaller the hole wall is; if in the specific implementation process, the hole wall of the second shielding hole 23 can be designed to be 0.15 mm in consideration of a smaller depth control depth of 0.1 mm, compared with the conventional scheme, the reliability of the second shielding hole 23 is stronger; further, the coaxial shielding hole of the present application has a better shielding effect, and besides the coaxial hole of the existing design (i.e. the coaxially arranged signal hole 11 and shielding hole 12) can be replaced, the coaxial shielding hole is also suitable for future products with higher frequency, and a very good solution can be provided for future products.
In the manufacturing method of the circuit board with the shielding hole provided in this embodiment, the first shielding hole 21 is formed in the inner board, the first shielding hole 21 is plated and filled with a hole, and then the outer board is laminated on the first surface and the second surface of the inner board respectively to form a multi-layer board; forming a signal hole 22 concentric with the first shielding hole 21 on the multilayer board, and carrying out copper deposition electroplating treatment on the signal hole 22; then, a plurality of second shielding holes 23 are formed in the first preset position of the outer layer plate around the axis of the first shielding hole 21, and the second shielding holes 23 are plated and filled; finally, the signal line 24 is manufactured at a second preset position of the outer layer plate, and the signal line 24 is connected with the signal hole 22, so that the connection between the signal hole 22 and the signal line 24 can be realized, and because the position of the signal line 24 is avoided by less arrangement of the second shielding holes 23 in the method, the signals shielded by the second shielding holes 23 are less, the signal shielding at the position of the first shielding hole 21 cannot be influenced by less arrangement of the second shielding holes 23, and meanwhile, the first shielding hole 21 is totally enclosed, so that the problem of signal leakage cannot occur, and therefore, compared with the scheme in the prior art, the method can greatly reduce the probability of signal leakage.
Referring to fig. 10 to 12, fig. 10 is a perspective view of a first shielding hole, a signal hole, a second shielding hole, a third shielding hole and a signal line provided in an embodiment of the present invention; FIG. 11 is a top view of FIG. 10; FIG. 12 is a side view of FIG. 10; in the present embodiment, a circuit board with a shielding hole is provided, which specifically includes a first outer layer board, an inner layer board, a second outer layer board, and a signal hole 32 penetrating through the first outer layer board and the second outer layer board, which are stacked.
The inner layer plate, the first outer layer plate and the second outer layer plate can be core plates, and the core plates can be copper clad plates; the first outer layer plate is provided with a first signal line 35, the second outer layer plate is provided with a second signal line 36, and the signal hole 32 is used for communicating the first signal line 35 and the second signal line 36.
Specifically, a conductive layer is electroplated in the signal hole 32, the two end ports of the signal hole 32 are respectively provided with a bonding pad 37, and the bonding pad 37 is connected with the conductive layer; in a specific implementation process, the first signal line 35 and the second signal line 36 are specifically connected with a pad 37 disposed at a port of the signal hole 32, so as to connect the conductive layer in the signal hole 32 through the pad 37, and further communicate the first signal line 35 and the second signal line 36 through the conductive layer in the signal hole 32; the conductive layer may be a copper layer.
The inner plate is provided with a first shielding hole 31, the first shielding hole 31 surrounds a first hole section L1 of the signal hole 32, and the first shielding hole 31 is filled with an insulating material, such as resin, to form a first shielding layer, so that the first shielding layer is used to prevent a signal of the first hole section L1 of the signal hole 32 from leaking; specifically, the aperture Φ 1 of the first shielding hole 31 is larger than the aperture Φ 2 of the signal hole 32, and in an embodiment, the aperture Φ 1 of the first shielding hole 31 may be 1.6 mm, and the aperture Φ 2 of the signal hole 32 may be 0.3 mm.
In the specific implementation process, the wall of the first shielding hole 31 is further plated with a metal layer 311, and the metal layer 311 may be a copper layer.
A plurality of second shielding holes 33 are formed in the first preset position of the first outer layer plate around the signal hole 32, and insulating materials such as resin are filled in the plurality of second shielding holes 33 to form a plurality of second shielding layers, so that the signal leakage of the second hole section L2 of the signal hole 32 is prevented by the plurality of second shielding layers; in an embodiment, nine second shielding holes 33 are opened in the first predetermined position of the first outer layer board around the signal hole 32, and the nine second shielding holes 33 are disposed at equal intervals along the circumferential direction of the signal hole 32.
In the implementation process, the wall of the second shielding hole 33 is further plated with a metal layer 331, and the metal layer 331 is, for example, a copper layer.
Specifically, the diameter of the pattern surrounded by the second shielding holes 33 is the same as the aperture Φ 1 of the first shielding hole 31; referring to fig. 7, the diameter of the pattern surrounded by the second shielding holes 33 is the same as the diameter of the circle C1 surrounded by the second shielding holes 33 after the metal layer is plated on the first shielding holes 31.
Specifically, the aperture diameter Φ 3 of the second shielding hole 33 may be 0.3 mm.
The first preset position of the second outer layer plate is provided with a plurality of third shielding holes 34 around the signal hole 32, and the plurality of third shielding holes 34 are used for preventing the signal of the third hole section L3 of the signal hole 32 from leaking. In one embodiment, the first predetermined position of the second outer layer board opens nine third shielding holes 34 around the signal hole 32, and the nine third shielding holes 34 are disposed at equal intervals along the circumferential direction of the signal hole 32.
Specifically, the diameter of the pattern surrounded by the plurality of third shielding holes 34 is also the same as the aperture Φ 1 of the first shielding hole 31; referring to fig. 7, the diameter of the pattern surrounded by the third shielding holes 34 is the same as the diameter of the circle C1 surrounded by the third shielding holes 34 after the metal layer is plated on the first shielding hole 31.
Specifically, the second shielding holes 33 and the third shielding holes 34 may have the same shape, size, and arrangement, that is, the aperture of the third shielding holes 34 may also be 0.3 mm, and the depth thereof may be the same as the depth of the second shielding holes 33. Specifically, each of the second shielding holes 33 penetrates through a first surface of the first outer laminate and a second surface opposite to the first surface; each of the third shielding holes 34 extends through a first surface of the second outer layer board and a second surface opposite to the first surface.
Specifically, the axial length of the first hole segment L1 of the signal hole 32 is much greater than the axial lengths of the second hole segment L2 and the third hole segment L3 of the signal hole 32, so as to avoid the position of the signal line and reduce the probability of signal leakage as much as possible.
Specifically, the first outer layer plate and the second outer layer plate have the same thickness; and in one embodiment, the thickness of the first outer plate and the second outer plate may be 0.3 mm. At this time, because the first shielding hole 31 is totally closed, the problem of signal leakage cannot occur at the position corresponding to the first shielding hole 31, and the distance from the first shielding hole 31 to the first signal line 35 and the height from the third shielding hole 34 to the second signal line 36 are only 0.25 mm, at this time, the influence of the 1-2 second shielding holes 33 and the third shielding holes 34 on the signal leakage is extremely small and can be almost ignored, so that the probability of signal leakage can be greatly reduced. It should be noted that the height of the first shielding hole 31 from the first signal line 35 can be obtained by subtracting the thickness of the first signal line 35 from the thickness of the first outer board; the height of the first shielding hole 31 from the second signal line 36 can be obtained by subtracting the thickness of the second signal line 36 from the thickness of the second outer plate; the thickness of the first signal line 35 and the second signal line 36 is typically 0.05 mm. It will be appreciated that in this embodiment, the axial lengths of the second and third bore sections L2, L3 of the signal bore 32 are the same.
The circuit board with the shielding holes provided in the embodiment is provided with the signal holes 32 to communicate the first signal lines 35 of the first outer layer board with the second signal lines 36 of the second outer layer board; meanwhile, by arranging the first shielding hole 31 at the periphery of the first hole section L1 of the signal hole 32 to shield the signal at the opposite position, since the first shielding hole 31 is fully closed, the signal leakage problem does not occur at the position; in addition, the signal at the corresponding position is shielded by providing the second shielding hole 33 and the third shielding hole 34 at the peripheries of the second hole section L2 and the third hole section L3 of the signal hole 32, respectively; because the position of the circuit board where the signal line is disposed is avoided by less disposing the second shielding hole 33 and the third shielding hole 34, and the first shielding hole 31 is totally enclosed in the first hole section L1 of the signal hole 32, the second shielding hole 33 and the third shielding hole 34 do not affect the signal corresponding to the first shielding hole 31 while avoiding the space for fabricating the signal line, therefore, in a specific embodiment, 1-2 second shielding holes 33 and third shielding holes 34 are less disposed in order to avoid the position for fabricating the signal line, which has a smaller effect on signal leakage, and compared with the prior art, the probability of signal leakage can be greatly reduced.
The above embodiments are merely examples and are not intended to limit the scope of the present disclosure, and all modifications, equivalents, and flow charts using the contents of the specification and drawings of the present disclosure or those directly or indirectly applied to other related technical fields are intended to be included in the scope of the present disclosure.
Claims (10)
1. A manufacturing method of a circuit board with a shielding hole is characterized by comprising the following steps:
forming a first shielding hole on the inner layer plate and carrying out electroplating and hole filling on the first shielding hole; wherein the first shielding hole penetrates through a first surface of the inner plate and a second surface opposite to the first surface;
laminating outer laminates on the first surface and the second surface of the inner laminate to form a multilayer laminate, respectively;
forming a signal hole concentric with the first shielding hole on the multilayer board, and carrying out copper deposition electroplating treatment on the signal hole; wherein the aperture of the signal hole is smaller than the aperture of the first shielding hole, and the signal hole penetrates through a first surface and a second surface opposite to the first surface of the multilayer board;
forming a plurality of second shielding holes in a first preset position of the outer layer plate around the axis of the first shielding hole, and carrying out electroplating hole filling on the second shielding holes; the diameter of a graph formed by enclosing the plurality of second shielding holes is the same as the aperture of the first shielding hole;
and manufacturing a signal wire at a second preset position of the outer layer plate and connecting the signal wire with the signal hole.
2. The method for manufacturing a circuit board with shielding holes according to claim 1, wherein the step of forming the first shielding hole on the inner board and filling the first shielding hole by electroplating specifically comprises:
a first shielding hole is formed in the inner layer plate;
carrying out copper deposition electroplating treatment on the first shielding hole;
and carrying out resin hole plugging treatment on the first shielding hole after the copper deposition electroplating treatment.
3. The method for manufacturing a circuit board with a shielding hole according to claim 1, wherein the step of laminating an outer board on the first surface and the second surface of the inner board to form a multilayer board comprises:
and laminating outer laminates with the same thickness on the first surface and the second surface of the inner laminate to form a multilayer board.
4. The method for manufacturing a circuit board with a shielding hole according to claim 3, wherein the thickness of the outer layer plate is 0.3 mm.
5. The method for manufacturing a circuit board with shielding holes according to claim 1, wherein the step of forming a plurality of second shielding holes in the first preset position of the outer layer board around the axis of the first shielding hole and filling the second shielding holes with electroplating specifically comprises:
a plurality of second shielding holes are formed in the first preset position of the outer plate around the axis of the first shielding hole;
carrying out copper deposition electroplating treatment on the second shielding hole;
and performing resin hole plugging treatment on the second shielding hole after the copper deposition electroplating treatment.
6. The method for manufacturing a circuit board with a shielding hole according to any one of claims 1 to 5, wherein the aperture of the first shielding hole is 1.6 mm, and the aperture of the second shielding hole and the aperture of the signal hole are 0.3 mm.
7. A wiring board having a shielding hole, comprising: the signal hole penetrates through the first outer layer plate and the second outer layer plate;
the signal hole is used for communicating a first signal wire on the first outer layer plate with a second signal wire on the second outer layer plate; the inner plate is provided with a first shielding hole, the first shielding hole surrounds the first hole section of the signal hole and is used for preventing a signal of the first hole section of the signal hole from leaking; a plurality of second shielding holes are formed in the first preset position of the first outer layer plate around the signal hole, and the second shielding holes are used for preventing signals of the second hole section of the signal hole from leaking; a plurality of third shielding holes are formed in the first preset position of the second outer layer plate around the signal hole, and the third shielding holes are used for preventing signals of a third hole section of the signal hole from leaking; the diameter of a graph formed by enclosing the plurality of second shielding holes and the plurality of third shielding holes is the same as the diameter of the first shielding hole.
8. The wiring board with shielding holes of claim 7, wherein the first outer layer board and the second outer layer board have the same thickness.
9. The wiring board with shielding holes according to claim 7, wherein the second shielding holes are arranged at equal intervals along a circumferential direction of the signal hole; the plurality of third shielding holes are arranged at equal intervals along the circumferential direction of the signal hole.
10. The wiring board with shielding holes according to claim 7, wherein the first shielding hole has a diameter of 1.6 mm, the second shielding hole, the third shielding hole and the signal hole have a diameter of 0.3 mm, and the first outer board and the second outer board have a thickness of 0.3 mm.
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| CN202010525729.6A CN113784497B (en) | 2020-06-10 | 2020-06-10 | Circuit board with shielding hole and manufacturing method thereof |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010525729.6A CN113784497B (en) | 2020-06-10 | 2020-06-10 | Circuit board with shielding hole and manufacturing method thereof |
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| CN113784497A true CN113784497A (en) | 2021-12-10 |
| CN113784497B CN113784497B (en) | 2023-07-07 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114423164A (en) * | 2022-01-29 | 2022-04-29 | 沪士电子股份有限公司 | PCB capable of preventing electronic migration failure and manufacturing method thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040069529A1 (en) * | 2002-10-10 | 2004-04-15 | International Business Machines Corporation | Coaxial via structure for optimizing signal transmission in multiple layer electronic device carriers |
| US20100289596A1 (en) * | 2006-08-22 | 2010-11-18 | Molex Incorporated | Impedance matched circuit board |
| CN207820316U (en) * | 2018-02-02 | 2018-09-04 | 中山奥士森电子有限公司 | Multilayer impedance circuit board with hole-in-hole shielding effect |
| CN110300492A (en) * | 2019-07-25 | 2019-10-01 | 生益电子股份有限公司 | PCB manufacturing method and PCB |
-
2020
- 2020-06-10 CN CN202010525729.6A patent/CN113784497B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040069529A1 (en) * | 2002-10-10 | 2004-04-15 | International Business Machines Corporation | Coaxial via structure for optimizing signal transmission in multiple layer electronic device carriers |
| US20100289596A1 (en) * | 2006-08-22 | 2010-11-18 | Molex Incorporated | Impedance matched circuit board |
| CN207820316U (en) * | 2018-02-02 | 2018-09-04 | 中山奥士森电子有限公司 | Multilayer impedance circuit board with hole-in-hole shielding effect |
| CN110300492A (en) * | 2019-07-25 | 2019-10-01 | 生益电子股份有限公司 | PCB manufacturing method and PCB |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114423164A (en) * | 2022-01-29 | 2022-04-29 | 沪士电子股份有限公司 | PCB capable of preventing electronic migration failure and manufacturing method thereof |
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| CN113784497B (en) | 2023-07-07 |
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