CN113764575A

CN113764575A - 3D Hall magnetic sensor and manufacturing method thereof

Info

Publication number: CN113764575A
Application number: CN202110902648.8A
Authority: CN
Inventors: 何渊
Original assignee: Suzhou Juzhen Photoelectric Co ltd
Current assignee: Suzhou Juzhen Photoelectric Co ltd
Priority date: 2021-08-06
Filing date: 2021-08-06
Publication date: 2021-12-07

Abstract

The embodiment of the invention discloses a 3D Hall magnetic sensor and a manufacturing method thereof. The 3D Hall magnetic sensor comprises a 3D frame structure, wherein the 3D frame structure at least comprises 3 surfaces which are orthogonally connected with each other, and the 3 surfaces of the 3D frame structure are formed by a bendable substrate; 3 Hall element chips respectively arranged on the 3 surfaces; and the 3 Hall element chips are respectively bonded to the 3 surfaces by the adhesive layers. The electrode portions of the 3 hall element chips are connected in parallel with each other and led out on one of the 3 surfaces in the form of pins. The invention belongs to the technical field of semiconductors. The 3D Hall magnetic sensor can perform 3D space detection, occupies a small space and has high integration level.

Description

3D Hall magnetic sensor and manufacturing method thereof

Technical Field

The present disclosure relates to the field of semiconductor technologies, and in particular, to a three-dimensional (3D) hall magnetic sensor for detecting a 3D magnetic field and a method for manufacturing the same.

Background

Magnetic sensors composed of hall elements (or hall magnetic sensors) play an important role in many fields, for example, consumer electronics, industrial automation, automotive electronics, doctor health systems, and the like. With the development of application technology, higher requirements are also put forward for the hall magnetic sensor, and instead of performing magnetic field detection in a one-dimensional direction traditionally, it is expected that magnetic field detection can be performed in a three-dimensional direction, that is, magnetic fields are detected in three mutually orthogonal directions in space at the same time, so as to determine the magnitude and direction of the magnetic field.

A Hall magnetic sensor for detecting a magnetic field in a three-dimensional space is formed by assembling three Hall element units in an orthogonal mode outside an induction unit, wherein the Hall elements are GaAs-based Hall sensors, and therefore magnetic field sensing in three orthogonal directions of XYZ is achieved. However, such a module has a disadvantage of being bulky in structure, which is disadvantageous for integration.

Disclosure of Invention

The invention aims to provide a 3D Hall magnetic sensor which can solve the problems of large occupied space and low integration level.

It is further desirable that the 3D hall magnetic sensor includes a film of a compound semiconductor material having high mobility and, at the same time, a high sheet resistance.

In at least one technical scheme of the invention, the manufacturing of the hall elements and the corresponding circuit arrangement are completed after the compound semiconductor film is transferred to a bendable Cu substrate or a flexible substrate, for example, a 3D frame is manufactured, 3 hall elements arranged in 3 orthogonal directions are connected in a routing way and then are directly injected, so that the problems of weak integration and complex process of the original magnetic field induction are greatly improved, the hall element chips in 3 different directions are integrated into one plastic package body, and the method and the device can be applied to the application field with smaller space.

Desirably, the hall element includes a film of a compound semiconductor material, which has not only high mobility but also high sheet resistance at the same time.

According to an aspect of the present invention, there is provided a 3D hall magnetic sensor including:

a 3D frame structure comprising at least 3 surfaces orthogonally connected to each other, wherein the 3 surfaces of the 3D frame structure are formed by a bendable substrate;

3 Hall element chips respectively arranged on the 3 surfaces;

an adhesive layer bonding the 3 hall element chips to 3 surfaces, respectively;

wherein the electrode portions of the 3 hall element chips are connected in parallel with each other and led out on one of the 3 surfaces in the form of pins.

In one example, the substrate includes a Cu substrate, a flexible substrate, or a bendable substrate.

In one example, the hall element chip includes a magnetic induction portion bonded to a substrate through an adhesive layer, and an electrode portion located at a periphery of the magnetic induction portion and forming ohmic contact with the magnetic induction portion.

In one example, the magnetic induction part is prepared by the following steps:

epitaxially growing a compound semiconductor material film on a semiconductor single crystal substrate as a magnetic induction functional layer of a compound semiconductor Hall;

coating an adhesive layer on at least one of the compound semiconductor material film and the substrate, and bonding the compound semiconductor material film and the substrate face to face through the adhesive layer;

selectively removing a part of the semiconductor single crystal substrate and the compound semiconductor material film, and forming the magnetic induction part by a patterning process;

wherein the semiconductor single crystal substrate comprises a GaAs, InP, GaN or Si single crystal substrate, and the magnetic induction part comprises InSb, GaAs, InAs, InGaAs or InGaP.

In one example, the mobility of the magnetic induction portion from which only the semiconductor single crystal substrate is removed is larger than 40000cm²and/Vs, the thickness of the magnetic induction part is 500nm-10 μm.

In one example, the mobility of the magnetic induction part where the semiconductor single crystal substrate and a part of the film of the compound semiconductor material are simultaneously removed is more than 50000cm²Vs and less than 78000cm²Vs, magnetic inductionThe thickness of the stress part is 10nm-9 μm.

In one example, electrode portions of 3 hall element chips are connected to each other by electrode leads formed simultaneously with the electrode portions by a metal evaporation process.

In one example, the 3D hall magnetic sensor further comprises a protective layer, the protective layer covers the magnetic induction part and the electrode part, the path of the electrode lead is provided with an opening, and the electrode parts of the three hall element chips are connected in parallel through the opening by wire bonding.

In one example, the substrate is cut into a 3D frame structure by punching, and the leads are formed after the cutting ribs of the lead area of the substrate are electroplated.

According to another aspect of the present invention, there is provided a method of manufacturing the 3D hall magnetic sensor, the method including:

providing a substrate for manufacturing a 3D frame structure;

coating an adhesive on at least one of a hall function region on a base plate and a semiconductor material film formed on a semiconductor single crystal substrate to form an adhesive layer;

bonding a semiconductor material film formed on a semiconductor single crystal substrate to a base plate through an adhesive layer;

forming an electrode part and an electrode lead on the magnetic induction part;

forming a 3D frame structure by punching and bending, wherein the 3D frame structure at least comprises 3 surfaces which are orthogonally connected with each other, and the 3 surfaces of the 3D frame structure are respectively provided with a Hall element chip;

routing and connecting the electrode lead and the cutting rib to form a pin;

and carrying out injection molding packaging to form the 3D Hall magnetic sensor.

Other objects and advantages of the present disclosure will become apparent from the following description of the embodiments of the present disclosure, which is made with reference to the accompanying drawings, and can assist in a comprehensive understanding of the present disclosure.

Drawings

These and/or other aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the preferred embodiments, taken in conjunction with the accompanying drawings of which:

fig. 1 is a schematic perspective view of a 3D hall magnetic sensor according to an embodiment of the present invention;

fig. 2A shows a schematic view of a region where 3 hall elements are fabricated on a semiconductor single crystal substrate;

FIG. 2B shows a schematic cross-sectional structure of a compound semiconductor material film heteroepitaxially growing a Hall element on a semiconductor single-crystal substrate;

FIG. 2C is a schematic cross-sectional view of the structure of FIG. 2B after an adhesion layer is applied and a Cu substrate is bonded;

FIG. 2D shows a schematic diagram of the cross-sectional structure after selective removal of the semiconductor single-crystal substrate originally used for hetero-epitaxial growth of a compound semiconductor material film on the basis of the structure of FIG. 2C;

fig. 2E shows a schematic diagram of a cross-sectional structure after removing a first portion of the film of compound semiconductor material on the basis of the structure of fig. 2D;

FIG. 2F is a schematic cross-sectional view of the magnetic sensor part patterned based on the structure shown in FIG. 2E;

FIG. 2G is a schematic cross-sectional view of the patterned electrode layer formed on the structure of FIG. 2F;

FIG. 2H shows a schematic structural diagram of 3 Hall elements formed on the Cu substrate after the step of FIG. 2G;

FIG. 2I shows a block schematic diagram of stamping and bending a substrate to form a 3D frame structure based on the structure of FIG. 2H;

FIG. 2J is a schematic plane projection of the connection relationship after the hole is opened and the wire is bonded based on the structure of FIG. 2I;

fig. 2K shows a block schematic diagram of a 3D hall magnetic sensor obtained on the basis of the structure of fig. 2J.

Detailed Description

The technical scheme of the invention is further specifically described by the following embodiments and the accompanying drawings. In the specification, the same or similar reference numerals denote the same or similar components. The following description of the embodiments of the present invention with reference to the accompanying drawings is intended to explain the general inventive concept of the present invention and should not be construed as limiting the invention.

In at least one embodiment of the present invention, a solution is provided that can disregard the lattice mismatch problem of the substrate and produce a film of compound semiconductor material with high electron mobility and low power consumption.

It should be noted here that it is on the basis of the present invention that the above-described solution is obtained to make it possible to produce 3D hall magnetic sensors on Cu substrates.

As shown in fig. 1, a 3D hall magnetic sensor 100 according to an embodiment of the present invention includes a 3D frame structure 90 and 3 hall element chips 31, 32, 33 on three surfaces of the 3D frame structure 90 that are orthogonal to each other. The 3D frame structure 90 includes at least three surfaces orthogonally connected to each other, referred to herein as X, Y and Z surfaces (X, Y and Z surfaces are indicated in the drawings) for simplicity of description. The 3D frame structure 90 further includes pins 13 in a pin area 11 (see fig. 2A) extending outward from the Z plane, and areas where the X plane, the Y plane, and the Z plane of the 3 hall element chips are located may also be referred to as a hall function area 12.

Any one of the hall element chips 31, 32, 33 in the X, Y, and Z planes includes the substrate 10, the adhesive layer 20, the magnetic induction part 30, and the electrode part 40 (shown in conjunction with fig. 2G); optionally a protective layer may also be included.

The substrate 10 may be a Cu substrate, a flexible substrate or a bendable substrate made of any similar material. The substrate 10 has a thickness of 0.1-0.3mm and is used as a frame raw plate of the 3D frame structure 90. The substrate 10 includes a pin area 11 and a hall function area 12.

The adhesive layer 20 may comprise any suitable adhesive material such as polyimide or epoxy.

The magnetic induction portion 30 is bonded to the substrate 10 through the adhesive layer 20, and includes any suitable semiconductor thin film material such as InSb, GaAs, InAs, InGaAs, or InGaP. Alternatively, the magnetic induction unit 30 is generally electrically isolated from the substrate 10. The magnetic induction portion 30 has a cross-sectional shape in plan view.

As shown in fig. 1, since the Y-plane and the Z-plane are formed after the substrate is punched after the magnetic induction parts 30 are formed on the surface of the substrate 10 on which the X-plane is located, the X-plane, the Y-plane, and the Z-plane are orthogonal to each other and the magnetic induction parts 30 are provided on the inner surface of the structure enclosed by them.

The input electrodes of the magnetic induction portions 30 of the 3 hall element chips 31, 32, and 33 are connected in parallel, and are connected to the outside through 8 pins or 12 pins in the pin area 11.

In one example of the present invention, a compound semiconductor hall element manufactured by obtaining the magnetic induction portion 30 in the following manner has advantages of high mobility, large sheet resistance, and appropriate thickness.

As shown in fig. 2B in conjunction therewith, a film 70 of a compound semiconductor material is epitaxially grown on a semiconductor single-crystal substrate 60, wherein the film 70 of the compound semiconductor material includes a first portion 71 of inferior quality grown first and a second portion 72 of superior quality grown subsequently. Here, the first portion 71 and the second portion 72 to be explained do not have a clear interface as shown in the drawing, and they are artificially divided into two portions only for the convenience of the following description.

Referring to fig. 2C, the second portion 72 of the compound semiconductor material film 70 and/or the substrate 10 is coated with the adhesive layer 20 and bonded to the substrate 10 through the adhesive layer 20.

Referring to fig. 2C to 2F, the first portions 71 of the semiconductor single-crystal substrate 60 and the compound semiconductor material film 70 are removed, and a patterning process is employed to form the magnetic induction parts 30.

The specific process steps can be seen in the flow charts shown in fig. 2A-2K described below, and will not be described again here.

Therefore, the mobility of the magnetic induction part 30 prepared by the above process with only the semiconductor single crystal substrate 60 removed is more than 40000cm²Vs and a thickness of 500nm to 10 μm. Preferably, the semiconductor single-crystal substrate 6 is removed at the same time0 and a part of the compound semiconductor material film 71 has a mobility of the magnetic induction part 30 of more than 50000cm²Vs and less than 78000cm²Vs and the sheet resistance can be selectively increased to a target value by etching the thickness of the magnetic induction portion to 10nm-9 μm.

As described previously, in the present invention, the first portion 71 of the compound semiconductor material film 70 of poor quality grown on the semiconductor single-crystal substrate 60 is etched away, and therefore the mobility of the compound semiconductor material film 70 can be made at least larger than 50000cm²/Vs, preferably greater than 60000cm²Vs. In summary, the method of the present invention can select the compound semiconductor material film 70 having an appropriate mobility and thickness while taking into account the thickness and sheet resistance of the compound semiconductor material film 70, and thus not only is the process simple and inexpensive, but also provides a solution to the relative contradiction between mobility and sheet resistance.

In an alternative embodiment, a protective layer is provided to cover all of the magnetic induction portions 30 and the adhesive layer 20, but to expose at least a portion of the electrode portions 40. The protective layer includes any one of a silicon nitride film, a silicon oxide film, an aluminum oxide film, a silicon oxynitride film, an epoxy resin, a silica gel, a silicon dioxide, and a polyimide film.

Referring to fig. 2A-2K, a manufacturing flow diagram of a 3D hall magnetic sensor 100 according to an embodiment of the invention is shown.

Specifically, as shown in fig. 2A, 3 hall element chips are provided on the hall functional region 12 of the substrate 10, and the region where they are located becomes a Pad region, schematically shown by a broken line. The substrate 10 is further provided with a lead area 11 where leads of 3 hall element chips are arranged.

Referring to fig. 2B, a compound semiconductor material film 70 is grown on a semiconductor single-crystal substrate 60 by epitaxial means (e.g., MOCVD or MBE), the compound semiconductor material film 70 including a first portion 71 of inferior quality and a second portion 72 of superior quality. In one example, the semiconductor single crystal substrate may be any suitable single crystal substrate of GaAs, InP, GaN, Si, or the like. The film of compound semiconductor material may comprise a binary, ternary, quaternary material composed of In, Sb, As, Ga, P, etc., such As GaAs, InAs, InSb, InGaAs, InGaP, InGaAsP, etc., preferably an InSb film.

The following will exemplify InSb. In one example, the thickness of the compound semiconductor material film 70 is between 10nm-10 microns, preferably between 500nm-3 microns, more preferably 800nm-2 microns. Taking InSb film as an example, the mobility is more than 40000cm²Vs, preferably greater than 50000cm²Vs, more preferably greater than 60000cm²/Vs。

As shown in fig. 2C, an adhesive is applied on the hall function region 12 of the substrate 10 and/or the compound semiconductor material film 70 to form an adhesive layer 20. In one example, an adhesive such as polyimide or epoxy is applied to the compound semiconductor material film 70 or the hall function region 12 by means of coating or doctor blading. Subsequently, the compound semiconductor material film 70 is bonded face-to-face with the hall-function region 12 of the substrate 10 by this adhesive layer 20, the substrate 10 including a Cu substrate having a thickness of 0.1 to 0.3mm or any other suitable material substrate.

In one example, an adhesive is spin-coated on the substrate 10, and the adhesive in the pin region 11 is removed by photolithography and development, etc., and remains on the hall function region 12, thereby facilitating subsequent bonding with the adapted compound semiconductor material film 70.

As shown in fig. 2D, the semiconductor single-crystal substrate 60 is selectively removed to expose the back surface of the compound semiconductor material film 70, i.e., to expose the first portion 71 of the compound semiconductor material film 70. In one example, mechanical grinding or chemical etching may be used. The mechanical grinding can be traditional semiconductor grinding equipment, and the chemical corrosion solution can adopt a mixed solution of phosphoric acid and hydrogen peroxide or a hydrochloric acid solution. It will be appreciated by those skilled in the art that the mechanical grinding or chemical etching herein may take other alternative forms known in the art.

In one example, after the semiconductor single crystal substrate 60 is thinned to 50 μm to 100 μm by a physical polishing process, the semiconductor single crystal substrate 60 is immersed in a chemical etching solution to completely remove the semiconductor single crystal substrate material, exposing the compound semiconductor material film 70.

As shown in fig. 2E, the exposed first portions 71 of the compound semiconductor material film 70 are removed to leave high-quality second portions 72 of the compound semiconductor material film 70. In one example, the exposed first portion 71 of the compound semiconductor material film 70 may be removed by dry or wet etching, i.e., the first portion 71 that was previously grown on the semiconductor single-crystal substrate 60 is removed, and the first portion 71 is of poor quality due to lattice mismatch, so that the second portion 72 of the compound semiconductor material film 70 of high quality (e.g., high mobility) may be retained. The dry etching described herein may be ion beam etching or the like, and the wet etching may be etching using any suitable solution.

It will be understood by those skilled in the art that the mobility and thickness of the compound semiconductor material film 70 can be selected in accordance with the design requirements of the device in the manner described in the present invention, thereby providing great flexibility in selection of the mobility and thickness of the compound semiconductor material film 70, so that a compound semiconductor material film 70 having a higher mobility and a thinner thickness (higher sheet resistance) can be obtained at the same time.

As shown in fig. 2F, the second portion 72 of the etched compound semiconductor material film 70 is patterned, thereby forming the magnetic induction parts 30. In one example, the mesa pattern of the magnetic induction part 30 of the compound semiconductor hall element can be prepared by photolithography, and specifically, the mesa pattern of the compound semiconductor hall element can be formed by removing the regions not protected by the photoresist by dry etching or wet etching. The mesa pattern of the compound semiconductor hall element described herein may be a step shape, or a rectangular or cross shape in a plan view thereof.

In one example, the magnetic induction is formed in a photolithographic process. A photoresist pattern covering the second portion 72 of the compound semiconductor material film 70 is first formed by applying a photoresist material and exposing and developing using a photolithography process. Then, with this pattern as a mask, the area of the second portion 72 of the compound semiconductor material film 70 not masked by the photoresist pattern is removed by a wet or dry process. Finally, the photoresist pattern is removed. Thereby, for example, the magnetic induction unit 30 is formed in a cross shape.

As shown in fig. 2G, the electrode portions 40 are prepared at four corners of the magnetic induction portion 30. In one example, a metal electrode layer is formed by deposition such as electron beam evaporation or magnetron sputtering, and the material of the metal electrode layer may include Au, Ge, Ni, Ti, Cr, Cu, or their alloys; then, forming an electrode portion 40 from the metal electrode layer by stripping or etching; the electrode part 40 is optionally subjected to an annealing process to form a better ohmic contact between the electrode part 40 and the magnetic induction part 30.

The electrode portions 40 forming ohmic contact can be formed around the magnetic induction portions 30 by a metal lift off method or an etching method. Prepared in a manner of thermal evaporation, electron beam evaporation, sputter plating, or electroless plating, etc., to form four electrode portions 40.

In some examples, a photoresist pattern exposing the end portions of the magnetic induction portions is first formed using a photolithography process through coating of a photoresist material and an exposure and development process. Then, using the pattern as a mask, a metal electrode material layer is deposited, and the photoresist pattern and the metal electrode material layer thereon are stripped by a metal stripping process, thereby obtaining an electrode portion 40 covering the end portion of the magnetic induction portion 30.

In other examples, the metal electrode layer is first deposited, then a photoresist pattern covering the end portions of the magnetic induction portions 30 is formed by applying a photoresist material and exposing and developing processes using a photolithography process, and then the photoresist material is stripped using an etching process using the pattern as a mask to remove portions of the metal electrode layer exposed through the resist pattern, resulting in the electrode portions 40 covering the end portions of the magnetic induction portions 30.

Of course, those skilled in the art may set the shape and height of the electrode portion as desired, not limited to the illustrated case, and for example, the shape of the electrode portion may be set to be square, circular, elliptical, stepped, trapezoidal, or the like.

Thus, referring to fig. 2H, the metal electrode portions 40 of 3 magnetic induction parts 30 are formed at three Pad positions of the hall functional region 12 at the same time, and the electrode leads 34 are formed on the substrate 10 at the three Pad positions and the lead region 11, and the metal electrode portions 40 of the 3 magnetic induction parts 30 and the electrode leads 34 are formed by a metal evaporation process (5 to 10 μm), thereby reducing the process complexity and the cost.

As shown in fig. 2H, a protective layer 50 is formed on at least a portion (e.g., the entire surface) of the magnetic induction portion 30 and the electrode portion 40 on the substrate 10, and an opening 35 is formed on the path of the electrode lead 34 to reserve an opening for subsequent wire bonding.

In one example, the protective layer 50 is formed by spin-coating an adhesive on the entire face of the substrate 10. The protective layer 50 can prevent the magnetic sensing part 30 from being damaged in the subsequent process, and prevent water vapor, impurity particles, etc. from entering the magnetic sensing part 30. The protective layer 50 includes any one of a silicon nitride film, a silicon oxide film, an aluminum oxide film, a silicon oxynitride film, an epoxy resin, a silica gel, a silicon dioxide, and a polyimide film. A photoresist pattern may be formed on the magnetic induction portions 30 and on portions other than the exposed regions of the electrode portions 40 by Plasma Enhanced Chemical Vapor Deposition (PECVD), sputtering, or other conventional film forming means using the photoresist pattern as a mask, thereby obtaining the compound semiconductor hall element chip shown in fig. 1 with high sensitivity and low power consumption.

Referring to fig. 2I, the substrate 10 is cut into a desired frame shape by using a die cutting method, and the substrate 10 of the hall functional region 12 is formed into three XYZ surfaces by mechanical forming (for example, bending), and 3 hall element chips 31, 32, and 33 are respectively located on the three XYZ surfaces. Since the substrate 10 is made of metal, Cu, or a flexible substrate, these materials and the adhesive have good ductility, and thus, the hall element chips 31, 32, and 33 are not broken in the circuit during the punching and mechanical molding.

Referring to fig. 2J and 2K, wire bonding is performed at the plurality of openings 35, 8 input electrodes of 3 hall element chips 31, 32, and 33 are connected in parallel, then epoxy resin injection molding is directly performed, and the 3D hall magnetic inductor is formed after the rib cutting and electroplating are performed on the pin area.

For the sake of illustration, fig. 2K only shows the hall functional region 12, and does not show the package after injection molding.

When the compound semiconductor material film of the magnetic induction part 30 is made of InSb material, the mobility of the compound semiconductor material film may exceed 60000cm when the 3D hall magnetic sensor 100 is manufactured using the embodiment of fig. 2A to 2K of the present invention²Vs, and at the same time, the sheet resistance of the compound semiconductor material film can be designed to a desired value, so that an InSb compound semiconductor hall element with high sensitivity and low power consumption can be finally obtained.

In summary, in the embodiment of the present invention, the compound semiconductor thin film is transferred to the Cu substrate or other bendable substrates to complete the fabrication of the hall elements and the corresponding circuit arrangement, and then the 3D frame is fabricated and 3 hall elements arranged in 3 orthogonal directions are wire bonded and connected and then directly injection molded, so that the problems of weak magnetic field sensing integration and complex process are greatly improved, and the hall element chips in 3 different directions are integrated into one plastic package body, which is applicable to the application field with smaller space.

Although a few embodiments of the present general inventive concept have been shown and described, it will be appreciated by those skilled in the art that changes may be made in these embodiments without departing from the principles and spirit of the general inventive concept, the scope of which is defined in the appended claims and their equivalents.

Claims

1. A 3D hall magnetic sensor comprising:

3 Hall element chips respectively arranged on the 3 surfaces;

an adhesive layer bonding the 3 hall element chips to 3 surfaces, respectively;

2. The 3D Hall magnetic sensor of claim 1, wherein,

the substrate comprises a Cu substrate, a flexible substrate or a bendable substrate.

3. The 3D Hall magnetic sensor of claim 1, wherein,

the Hall element chip comprises a magnetic induction part and an electrode part, wherein the magnetic induction part is bonded on the substrate through an adhesive layer, and the electrode part is positioned at the periphery of the magnetic induction part and forms ohmic contact with the magnetic induction part.

4. The 3D Hall magnetic sensor of claim 3, wherein,

the magnetic induction part is prepared by the following steps:

5. The 3D Hall magnetic sensor of claim 4, wherein the mobility of the magnetic induction portion with only the semiconductor single crystal substrate removed is greater than 40000cm²and/Vs, the thickness of the magnetic induction part is 500nm-10 μm.

6. The 3D Hall magnetic sensor of claim 5, wherein,

the mobility of the magnetic induction part in which the semiconductor single crystal substrate and a part of the compound semiconductor material film are simultaneously removed is more than 50000cm²Vs and less than 78000cm²and/Vs, the thickness of the magnetic induction part is 10nm-9 μm.

7. The 3D Hall magnetic sensor of any of claims 1-6, wherein,

the electrode portions of the 3 hall element chips are connected to each other by electrode leads formed simultaneously with the electrode portions by a metal evaporation process.

8. The 3D Hall magnetic sensor of claim 7, wherein,

the 3D Hall magnetic sensor further comprises a protective layer, the protective layer covers the magnetic induction part and the electrode part, an opening is formed in the path of the electrode lead, and the electrode part of the three Hall element chips is connected in parallel in a routing mode through the opening.

9. The 3D Hall magnetic sensor of claim 8, wherein,

the substrate is cut into a 3D frame structure in a punching mode, and the pins are formed after the rib cutting of the pin area of the substrate is electroplated.

10. A method of manufacturing a 3D hall magnetic sensor according to any one of claims 1 to 9, the method comprising:

providing a substrate for manufacturing a 3D frame structure;

forming an electrode part and an electrode lead on the magnetic induction part;

routing and connecting the electrode lead and the cutting rib to form a pin;