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CN113724592A - Display module and display device - Google Patents

Display module and display device Download PDF

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Publication number
CN113724592A
CN113724592A CN202110994440.3A CN202110994440A CN113724592A CN 113724592 A CN113724592 A CN 113724592A CN 202110994440 A CN202110994440 A CN 202110994440A CN 113724592 A CN113724592 A CN 113724592A
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China
Prior art keywords
signal line
electrically connected
driving
circuit board
sub
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Granted
Application number
CN202110994440.3A
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Chinese (zh)
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CN113724592B (en
Inventor
李传勇
胡振文
刘文红
贾群
王中杰
陈腾
喻勇
张昌
兰传艳
刘奇
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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Priority to CN202110994440.3A priority Critical patent/CN113724592B/en
Publication of CN113724592A publication Critical patent/CN113724592A/en
Application granted granted Critical
Publication of CN113724592B publication Critical patent/CN113724592B/en
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/301Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements flexible foldable or roll-able electronic displays, e.g. thin LCD, OLED
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The application discloses display module assembly and display device for when realizing different printed circuit board communication bridging, improve display module assembly installation effectiveness and yield, reduce display module assembly cost of manufacture. The embodiment of the application provides a display module assembly includes: a display panel, and a plurality of printed circuit boards; the display panel comprises a display area and a peripheral area; the display panel is divided into at least one bending area and a non-bending area; the peripheral area includes: a plurality of binding regions; the binding area is bound with at least one printed circuit board; each printed circuit board comprises at least one first driving signal line; the peripheral area comprises at least one connecting lead; the connecting lead extends from the bending area to the binding areas positioned at two sides of the bending area along the first direction; in the binding regions on two sides of the bending region, the first driving signal lines in two adjacent printed circuit boards are electrically connected through the connecting lead.

Description

Display module and display device
Technical Field
The application relates to the technical field of display, in particular to a display module and a display device.
Background
At present, the Organic Light Emitting Diode (OLED) display technology is applied to terminal products such as mobile phones and wearing products in a large scale, and good market acceptance and economic benefits are obtained.
The flexible foldable OLED product is applied to a foldable notebook computer (NB), so that the full screen and keyboard-free of the notebook computer are realized, and the flexible foldable OLED product is a hot development direction for the current continuous expansion. The OLED display screen suitable for folding NB product, two Printed Circuit Board Assembly (PCBA) that module circuit generally needs use in coordination, simultaneously for satisfying the foldability of product, present scheme is with connecting two PCBA for adopting, flexible folding flexible circuit board (FPC) board between. However, this solution has the following problems: 1. the assembly operation difficulty of the flexible FPC between the left PCBA and the right PCBA is very high, the bound Chip On Film (COF) and the display Panel (Panel) are extremely easy to tear in the process of fastening the flexible FPC, and the yield and the operation efficiency of a module are greatly influenced; 2. the flexible FPC is always dynamically folded along with Panel to form vibration, so that looseness at the FPC interface is easy to occur, and serious poor reliability such as abnormal display is caused; 3. the flexible FPC bridging process is complex, the purchasing cost is high, and the delivery cost of the module product is increased.
Disclosure of Invention
The embodiment of the application provides a display module and a display device, which are used for improving the installation efficiency and yield of the display module and reducing the manufacturing cost of the display module while realizing communication bridging of different printed circuit boards.
The embodiment of the application provides a display module assembly, display module assembly includes: a display panel, and a plurality of printed circuit boards;
the display panel comprises a display area and a peripheral area outside the display area;
the display panel is divided into: at least one bending area and non-bending areas positioned at two sides of the bending area;
the peripheral region on one side of the display region includes: a plurality of binding regions corresponding to the non-bending regions; each binding area is bound with at least one printed circuit board;
each printed circuit board comprises at least one first driving signal line;
the peripheral area comprises at least one connecting lead; the connecting lead extends from the bending area to the binding areas positioned at two sides of the bending area along the first direction;
in the binding regions on two sides of the bending region, the first driving signal lines in two adjacent printed circuit boards are electrically connected through the connecting lead.
In some embodiments, the display panel further comprises: a plurality of display signal lines;
the at least one printed circuit board further comprises a plurality of second driving signal lines;
the peripheral area comprises a plurality of connecting leads; one end of part of the connecting lead wire is electrically connected with part of the second driving signal wire, and the other end of part of the connecting lead wire extends to the non-bending area; in the non-bending area where the connecting lead extends, the connecting lead is electrically connected with a part of the display signal wires positioned in the non-bending area.
In some embodiments, the display module further comprises: a plurality of chip on film circuit boards; each printed circuit board is bound with the binding area through at least one chip on film circuit board;
each binding region includes: a plurality of binding terminals bound with the chip on film circuit board;
the first driving signal wire is electrically connected with the binding terminal through the chip on film circuit board;
both ends of a part of the connecting lead are electrically connected with the binding terminals.
In some embodiments, when the at least one printed circuit board further includes a plurality of second driving signal lines, a portion of the second driving signal lines are electrically connected to the bonding terminals through the chip on film circuit board;
one end electrically connected with a connecting wire electrically connected with the second driving signal wire is electrically connected with the binding terminal;
the connecting lead extends to the part of the non-bending area, and the side, facing the display area, of the binding terminal in the non-bending area.
In some embodiments, the plurality of printed circuit boards comprises: a main printed circuit board and at least one sub printed circuit board;
the main printed circuit board includes: a first power supply terminal, a timing controller;
each chip on film circuit board comprises a first driving chip;
the first drive signal line includes: a first driving power signal line, a plurality of first differential signal lines; in the main printed circuit board, a first driving power signal line is connected with a first power supply end, and a first differential signal line is electrically connected with a time schedule controller; in the sub-printed circuit board, the first driving power signal line and the first differential signal line are electrically connected with the first driving chip.
In some embodiments, only the main printed circuit board includes a plurality of second driving signal lines;
the main printed circuit board further includes: a second power supply terminal;
the plurality of second driving signal lines include: a second driving power source signal line and a third driving power source signal line electrically connected to the second power source terminal, and a plurality of gate driving circuit driving signal lines electrically connected to the timing controller;
the second driving power signal line provides a high level signal, and the third driving power signal line provides a low level signal;
and part of the second driving power signal lines, the third driving power signal lines and the gate driving circuit driving signal lines are electrically connected with the connecting leads through the chip on film circuit board and the binding terminals, and the rest of the second driving power signal lines, the third driving power signal lines and the gate driving circuit driving signal lines are electrically connected with the display signal lines through the chip on film circuit board and the binding terminals.
In some embodiments, the main printed circuit board further comprises a plurality of balancing resistors; the second driving power signal line and the third driving power signal line which are electrically connected with the display signal line through the chip on film circuit board and the binding terminal are electrically connected with the second power end through the balance resistor.
In some embodiments, the main printed circuit board further comprises: a main touch drive chip;
the sub printed circuit board further includes: a secondary touch drive chip;
the first drive signal line further includes: a second differential signal line and a fourth driving power signal line; in the main printed circuit board, a second differential signal line is electrically connected with a main touch control driving chip, and a fourth driving power signal line is electrically connected with a first power supply end; in the auxiliary printed circuit board, the second differential signal line is electrically connected with the auxiliary touch drive chip, and the fourth drive power signal line is electrically connected with the auxiliary touch drive chip.
In some embodiments, the display region includes a plurality of sub-pixels arranged in an array; the sub-pixel includes a transistor;
the display panel specifically includes: the substrate comprises a substrate base plate, a first conducting layer and a second conducting layer, wherein the first conducting layer is positioned on one side of the substrate base plate;
the first conductive layer includes: the grid of the transistor, with many pieces of grid drive circuit drive signal lines, many first differential signal lines and second differential signal line electric connection connecting lead wire separately;
the second conductive layer includes: a source and a drain of the transistor, and a plurality of connection leads electrically connected to the first driving power source signal line, the second driving power source signal line, the third driving power source signal line, and the fourth driving power source signal line, respectively.
In some embodiments, the second conductive layer includes a connection lead in an orthogonal projection on the substrate base, and the connection lead covers an orthogonal projection of a portion of the connection lead included in the first conductive layer on the substrate base.
In some embodiments, the first conductive layer comprises: the first sub-conducting layer and the second sub-conducting layer are positioned on one side, away from the substrate, of the first sub-conducting layer;
and any adjacent connecting lead is respectively positioned on the first sub-conductive layer and the second sub-conductive layer.
In some embodiments, a plurality of connection leads electrically connected to the second, third, fourth, and first driver power signal lines, respectively, are sequentially arranged in a direction in which the display area points to the bonding area.
In some embodiments, the second conductive layer comprises: the third sub-conducting layer and a fourth sub-conducting sub-layer are positioned on one side, away from the first conducting layer, of the third sub-conducting layer;
among a plurality of connection leads electrically connected to the second driving power source signal line, the third driving power source signal line, the fourth driving power source signal line, and the first driving power source signal line, any adjacent connection lead is located at the third sub-conductive layer and the fourth sub-conductive layer, respectively.
In some embodiments, the connection leads electrically connected to the gate driving circuit driving signal line, the first differential signal line, and the second differential signal line, respectively, are sequentially arranged in a direction in which the display region points to the bonding region.
In some embodiments, each binding terminal includes: a first sub binding terminal and a second sub binding terminal electrically connected;
the first conductive layer further comprises a first sub-binding terminal, and the second conductive layer further comprises a second sub-binding terminal;
the first conductive layer includes a connection lead electrically connected to the first sub-binding terminal;
the second conductive layer includes a connection lead electrically connected to the second sub-binding terminal.
The embodiment of the application provides a display device, including the display module assembly that this application embodiment provided.
The display module assembly that this application embodiment provided is display device, is provided with and extends and pass the connection lead wire of kink zone along first direction, and this connection lead wire extends to the district of binding of kink zone both sides, and first drive signal line is connected through connecting the lead wire electricity in the different printed circuit boards of kink zone both sides, realizes the communication between two printed circuit boards through connecting the lead wire promptly. Therefore, the display module that this application embodiment provided need not to set up the flexible circuit board that binds with two adjacent printed circuit boards, can reduce display module assembly process flow and the degree of difficulty, promotes display module yield and assembly efficiency, reduces the display module cost, can also avoid the display module to buckle and lead to the flexible circuit board to buckle the equipment interface that causes not hard up, avoids arousing to show badly.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a display module according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of another display module provided in the embodiment of the present application;
fig. 3 is a schematic structural diagram of another display module provided in the embodiment of the present application;
fig. 4 is a schematic structural diagram of another display module provided in the embodiment of the present application;
FIG. 5 is a cross-sectional view along AA' of FIGS. 1-3 provided by an embodiment of the present application;
FIG. 6 is a cross-sectional view along AA' of FIGS. 1-3 according to an embodiment of the present application;
FIG. 7 is a cross-sectional view along AA' of FIGS. 1-3 according to an embodiment of the present application;
FIG. 8 is a cross-sectional view along AA' of FIGS. 1-3 according to an embodiment of the present disclosure;
fig. 9 is a schematic structural diagram of another display module according to an embodiment of the present disclosure;
fig. 10 is a schematic structural diagram of another display module provided in the embodiment of the present application;
fig. 11 is a schematic structural diagram of another display module provided in the embodiment of the present application;
FIG. 12 is a cross-sectional view taken along line BB' of FIG. 11 according to an embodiment of the present application;
fig. 13 is a cross-sectional view taken along line CC of fig. 11 according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the drawings of the embodiments of the present application. It should be apparent that the described embodiments are only some of the embodiments of the present application, and not all embodiments. And the embodiments and features of the embodiments in the present application may be combined with each other without conflict. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the application without any inventive step, are within the scope of protection of the application.
Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this application belongs. As used in this application, the terms "first," "second," and the like do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect.
It should be noted that the sizes and shapes of the figures in the drawings are not to be considered true scale, but are merely intended to schematically illustrate the present disclosure. And the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout.
The embodiment of the application provides a display module assembly, as shown in fig. 1, fig. 2, display module assembly includes: a display panel 1, and a plurality of printed circuit boards 2;
the display panel 1 comprises a display area 3 and a peripheral area 4 outside the display area 3;
the display panel 1 is divided into: at least one bending area 5 and non-bending areas 6 positioned at two sides of the bending area 5;
the peripheral region 4 on the display region 3 side includes: a plurality of binding regions 8 corresponding to the non-bending regions 6; each binding region 8 is bound with at least one printed circuit board 2;
each printed circuit board 2 comprises at least one first driving signal line 9;
the peripheral region 4 comprises at least one connecting lead 10; the connecting lead 10 extends from the bending region 5 to the binding regions 8 at two sides of the bending region 5 along the first direction X;
in the bonding regions 8 on both sides of the bending region 5, the first driving signal lines 9 in two adjacent printed circuit boards 2 are electrically connected through the connecting lead 10.
The display module assembly that this application embodiment provided is provided with and extends and pass the connection lead wire of kink district along first direction, should connect the lead wire and extend to the district that binds of kink district both sides, and first drive signal line is connected through connecting the lead wire electricity in the different printed circuit boards of kink district both sides, realizes the communication between two printed circuit boards through first drive signal line and connection lead wire promptly. Therefore, the display module that this application embodiment provided need not to set up the flexible circuit board that binds with two adjacent printed circuit boards, can reduce display module assembly process flow and the degree of difficulty, promotes display module yield and assembly efficiency, reduces the display module cost, can also avoid the display module to buckle and lead to the flexible circuit board to buckle the equipment interface that causes not hard up, avoids arousing to show badly.
In fig. 1 and 2, the bending axis 7 of the bending region 5 extends along the second direction Y, and the bending axis 7 extends to the peripheral region 4 through the display region 3, and the first direction X intersects with the second direction Y. Fig. 1 and 2 illustrate an example in which the second direction Y is perpendicular to the first direction X. In fig. 1 and 2, one bending region corresponds to one binding region.
It should be noted that fig. 1 and 2 illustrate the display panel divided into a bending region and two non-bending regions. In a specific implementation, the display panel may also be divided into more bending regions and non-bending regions.
In some embodiments, the printed circuit board may be directly bonded to the bonding regions of the display panel, and each bonding region includes: and a plurality of binding terminals bound with the printed circuit board. Both ends of at least part of the connecting lead are electrically connected with the binding terminals, so that the first driving signal wire is electrically connected with the connecting lead through the binding terminals.
Or, in some embodiments, as shown in fig. 1, fig. 2, and fig. 3, the display module further includes: a plurality of chip on film circuit boards COF; each printed circuit board 2 is bound with the binding area 8 through at least one chip on film circuit board COF.
It should be noted that fig. 1, 2, and 3 illustrate each printed circuit board 2 bound to the binding region 8 by two chip on film circuit boards COF.
In some embodiments, each binding region comprises: a plurality of binding terminals bound with the chip on film circuit board;
the first driving signal wire is electrically connected with the binding terminal through the chip on film circuit board;
both ends of at least part of the connecting lead are electrically connected with the binding terminals.
That is, both ends of the connection lead electrically connected to the first driving signal lines in different printed circuit boards are electrically connected to the first binding terminals.
Note that the bonding terminals are not shown in fig. 1, and the electrical connection relationship between the first driving signal lines and the connecting leads and the signal transmission paths are illustrated by solid lines.
It should be noted that, in an implementation, the printed circuit board includes electrical components, and the chip on film circuit board may also include electrical components, and in an implementation, the first driving signal line is configured to provide signals to the electrical components in the printed circuit board and/or the chip on film circuit board. When signals need to be transmitted between electrical elements in different printed circuit boards and chip on film circuit boards, the signal transmission between the different printed circuit boards and the chip on film circuit boards can be realized through the first driving signal wire and the connecting lead electrically connected with the first driving signal wire.
In some embodiments, the display panel further comprises: a plurality of display signal lines;
as shown in fig. 2 and 3, at least one printed circuit board 2 further includes a plurality of second driving signal lines 11;
the peripheral region 4 includes a plurality of connecting leads 10; one end of a part of the connecting lead 10 is electrically connected with a part of the second driving signal line 11, and the other end of the part of the connecting lead 10 extends to the non-bending area 6; in the non-bending region 6 where the connecting lead 10 extends, the connecting lead 10 is electrically connected to a portion of the display signal line (not shown) located in the non-bending region 6.
It should be noted that, in the specific implementation, the second driving signal line does not need to provide signals to the electrical components in the printed circuit board and/or the chip on film circuit board, so that the second driving signal line led out from a part of the printed circuit board does not need to lead to other circuit boards, and can be directly electrically connected with the display signal line through the connecting lead extending to the non-bending region.
In some embodiments, the display region includes a plurality of sub-pixels arranged in an array; the sub-pixel includes a pixel circuit including, for example, a transistor, and may further include a capacitor. The plurality of display signal lines include, for example, data signal lines, power supply signal lines, and the like electrically connected to the pixel circuits. The power supply signal line includes, for example, a first power supply signal line and a second power supply signal line. The peripheral region of the display panel may further include a gate driving circuit electrically connected to the scanning signal lines of the pixel circuit array. The plurality of display signal lines may further include a control signal line of the gate driving circuit. In the specific implementation, the display signal lines electrically connected to the connection leads extend, for example, in the second direction.
In a specific implementation, the display panel may be, for example, an electroluminescent display panel. The display area further includes an electroluminescent device electrically connected to the pixel circuit. The electroluminescent device may be, for example, an organic light emitting diode or a quantum dot light emitting diode.
In some embodiments, when the at least one printed circuit board further includes a plurality of second driving signal lines, and the printed circuit board is directly bonded with the bonding region of the display panel, the second driving signal lines are electrically connected with the bonding terminals; only one end of the connection wire electrically connected to the second driving signal line is electrically connected to the binding terminal.
Or, in some embodiments, when the at least one printed circuit board further includes a plurality of second driving signal lines, the second driving signal lines are electrically connected to the bonding terminals through the chip on film circuit board;
only one end of a connecting wire electrically connected with the second driving signal wire is electrically connected with the binding terminal;
the connecting lead extends to the part of the non-bending area, and the side, facing the display area, of the binding terminal in the non-bending area.
In some embodiments, as shown in fig. 1, 2, 3, the plurality of printed circuit boards 2 comprises: a main printed circuit board 12 and at least one sub printed circuit board 13;
the main printed circuit board includes: a first power supply terminal PMIC and a time schedule controller Tcon;
each chip on film circuit board COF comprises a first drive chip SDIC;
the first drive signal line 10 includes: a first driving power supply signal line AVDD, a plurality of first differential signal lines 14; in the main printed circuit board 12, the first driving power supply signal line AVDD is electrically connected to the first power supply terminal PMIC, and the first differential signal line 14 is electrically connected to the timing controller Tcon; in the sub printed circuit board 13, the first driving power source signal line AVDD and the first differential signal line 14 are electrically connected to the first driving chip SDIC.
In some embodiments, as shown in fig. 1, the main printed circuit board 12 further includes: and a first driving power signal line AVDD electrically connected to the first driving chip SDIC in the chip on film circuit board COF bound to the main printed circuit board 12. As shown in fig. 2, the main printed circuit board 12 further includes: and a first differential signal line 14 electrically connected to the first driving chip SDIC of the chip on film circuit board COF bound to the main printed circuit board 12.
In particular implementation, the first driving chip SDIC is configured to supply a data signal to the data signal line. The data signal line is electrically connected with the first drive chip SDIC through the chip on film circuit board and the binding terminal. The first power source terminal PMIC supplies a first driving power source signal to the first driving chip SDIC through the first driving power source signal line AVDD. The timing controller Tcon supplies a differential signal to the first drive chip SDIC through the first differential signal line.
In a specific implementation, the main printed circuit board and the sub printed circuit board may be respectively provided with only one first driving power signal line AVDD electrically connected to the connection lead, so that the signal of the first power source terminal PMIC in the main printed circuit board can be transmitted to the sub printed circuit board through the driving power signal line AVDD and the connection lead.
In a specific implementation, the main printed circuit board and the auxiliary printed circuit board comprise a plurality of first differential signal lines electrically connected with the connecting leads. The number of the first differential signal lines electrically connected to the connection leads may be set according to the number of the first driver chips electrically connected to the sub printed circuit board, for example.
In some embodiments, as shown in fig. 2, 3, only the main printed circuit board 12 includes a plurality of second driving signal lines 11;
the main printed circuit board 12 further includes: a second power source terminal ELIC;
the plurality of second driving signal lines 11 include: a second driving power source signal line ELVDD and a third driving power source signal line ELVSS electrically connected to the second power source terminal ELIC, and a plurality of gate driving circuit driving signal lines GOA electrically connected to the timing controller Tcon;
the second driving power source signal line ELVDD supplies a high level signal, and the third driving power source signal line ELVSS supplies a low level signal;
some of the second driving power source signal lines ELVDD, the third driving power source signal lines ELVSS, and the gate driving circuit driving signal lines GOA are electrically connected to the connection lead 10 through the chip on film circuit board COF and the bonding terminals, and the remaining second driving power source signal lines ELVDD, the third driving power source signal lines ELVSS, and the gate driving circuit driving signal lines GOA are electrically connected to the display signal lines through the chip on film circuit board COF and the bonding terminals.
In other words, during the specific implementation, part of the second driving signal lines in the main printed circuit board are electrically connected with the display signal lines in the non-bending region corresponding to the auxiliary printed circuit board through the chip on film circuit board, the binding terminals and the connecting leads. The other second driving signal lines in the main printed circuit board are electrically connected with the display signal lines of the non-bending area corresponding to the main printed circuit board through the chip on film circuit board and the binding terminals.
In a specific implementation, the second driving power source signal line ELVDD is electrically connected to, for example, the first power source signal line in the display signal line, the second driving power source signal line ELVDD supplies a high-level signal to the first power source signal line, the third driving power source signal line ELVSS is electrically connected to, for example, the second power source signal line in the display signal line, and the third driving power source signal line ELVSS supplies a low-level signal to the second power source signal line. The gate driving circuit driving signal line GOA is electrically connected to, for example, a control signal line of the gate driving circuit in the display signal lines, and supplies a gate driving circuit control signal to the gate driving circuit. The gate drive circuit control signal includes, for example, a clock signal, a start signal, and the like.
It should be noted that, in fig. 3, only one gate driving circuit driving signal line GOA is shown to be electrically connected to the connection lead 10, and in a specific implementation, a plurality of gate driving circuit driving signal lines GOA led out from the timing controller may be electrically connected to the control signal lines of the corresponding gate driving circuits through the connection leads, respectively.
In a specific implementation, for example, only one second driving power signal line ELVDD electrically connected to the connection lead may be provided, and the supply of a high-level signal to the first power signal line may be realized. The supply of the low-level signal to the second power supply signal line may be realized by providing only one third driving power supply signal line ELVSS electrically connected to the connection lead.
In some embodiments, as shown in fig. 4, the main printed circuit board further includes a plurality of balancing resistors R; the second driving power source signal line ELVDD and the third driving power source signal line ELVSS electrically connected to the display signal line through the chip on film circuit board COF and the bonding terminal are electrically connected to the second power source terminal ELIC through the balance resistor R.
It should be noted that the connection lead electrically connected to the second driving power source signal line ELVDD and the third driving power source signal line ELVSS extends to the non-bent region, so that the connection lead is longer in length and higher in resistance. In the display module provided in the embodiment of the application, the second driving power signal line ELVDD, the third driving power signal line ELVSS, and the second power source terminal ELIC, which are not electrically connected to the connection lead, are provided with the balance resistors, so that the resistances of the second driving power signal line ELVDD and the third driving power signal line ELVSS, which are not electrically connected to the connection lead, are consistent with the resistances of the second driving power signal line ELVDD and the third driving power signal line ELVSS, which are electrically connected to the connection lead, and the luminance difference of the display area due to the signal line resistance difference can be avoided.
In some embodiments, the display area further includes a touch module. The touch module comprises a touch electrode and a touch signal line. Namely, the display panel provided by the embodiment of the application is a touch display panel.
When the display panel is a touch display panel, in some embodiments, as shown in fig. 1 to 4, the main pcb further includes: a main touch control driving chip MTIC;
the sub printed circuit board further includes: and the auxiliary touch drive chip STIC.
In some embodiments, as shown in fig. 1 and 2, the first driving signal line 9 further includes: a second differential signal line 15 and a fourth driving power source signal line VDD; in the main printed circuit board 12, the second differential signal line 15 is electrically connected to the main touch driving chip MTIC, and the fourth driving power signal line VDD is electrically connected to the first power terminal PMIC; in the sub printed circuit board 13, the second differential signal line 15 is electrically connected to the sub touch driving chip STIC, and the fourth driving power signal line VDD is electrically connected to the sub touch driving chip STIC.
In a specific implementation, only one fourth driving power signal line VDD electrically connected to the connection lead may be provided, so that the touch power signal may be provided to the sub-touch driving chip STIC. Only one second differential signal line 15 electrically connected to the connection lead may be provided, so that the differential signal may be supplied to the sub touch driving chip STIC.
In a specific implementation, as shown in fig. 1, the main printed circuit board 12 further includes a fourth driving power signal line VDD electrically connecting the first power terminal PMIC and the main touch driving chip MTIC. That is, the first power terminal PMIC provides the touch power signal to the primary touch driving chip MTIC and the secondary touch driving chip STIC through the fourth driving power signal line VDD.
In a specific implementation, as shown in fig. 2, the main printed circuit board 12 further includes a second differential signal line 15 electrically connecting the timing controller Tcon and the main touch driving chip MTIC. The real-time controller Tcon provides a differential signal to the primary touch driving chip MTIC, and then the primary touch driving chip MTIC provides a differential signal to the secondary touch driving chip STIC through a second differential signal line electrically connected to the connection lead.
It should be noted that, for convenience of illustrating the transmission path of each signal line in the printed circuit board, fig. 1, 2 and 3 respectively illustrate different electrical components and signal lines connected to the corresponding electrical components. Only the first and fourth driving power source signal lines AVDD and VDD are shown in fig. 1. Fig. 2 shows only the gate driver circuit driving signal line GOA, the first differential signal line 14, and the second differential signal line 15. Only the second and third driving power source signal lines ELVDD and ELVSS are shown in fig. 3.
In some embodiments, the display region includes a plurality of sub-pixels arranged in an array; the sub-pixel includes a transistor;
as shown in fig. 5, the display panel specifically includes: the circuit comprises a substrate base plate 16, a first conducting layer 17 positioned on one side of the substrate base plate 16 and a second conducting layer 18 positioned on one side, away from the substrate base plate, of the first conducting layer 17;
the first conductive layer 17 includes: a gate of the transistor, a connection lead 10 electrically connected to the plurality of gate driving circuit driving signal lines, the plurality of first differential signal lines, and the second differential signal lines, respectively;
the second conductive layer 18 includes: source and drain electrodes of the transistors, and a plurality of connection leads 10 electrically connected to the first driving power source signal line, the second driving power source signal line, the third driving power source signal line, and the fourth driving power source signal line, respectively.
Namely, the connecting leads electrically connected with the plurality of gate driving circuit driving signal lines, the plurality of first differential signal lines and the second differential signal lines are arranged on the same layer as the gates of the transistors. A plurality of connection leads electrically connected to the first, second, third, and fourth driving power source signal lines, respectively, are disposed at the same layer as the source and drain electrodes of the transistor.
In fig. 5, the connection lead 10 denoted by goa is a connection lead electrically connected to the gate driver circuit driving signal line, the connection lead 10 denoted by tcon1 is a connection lead electrically connected to the first differential signal line, and the connection lead 10 denoted by tcon2 is a connection lead electrically connected to the second differential signal line. The connection lead 10 denoted by elvdd is a connection lead electrically connected to the second drive power supply signal line, the connection lead 10 denoted by elvss is a connection lead electrically connected to the third drive power supply signal line, the connection lead 10 denoted by vdd is a connection lead electrically connected to the fourth drive power supply signal line, and the connection lead 10 denoted by avdd is a connection lead electrically connected to the first drive power supply signal line.
Fig. 5 may be a cross-sectional view along AA' in fig. 1 to 3, for example.
In some embodiments, as illustrated in fig. 5, the display panel further includes: a buffer layer 19 between the substrate base 16 and the first conductive layer 17, an active layer (not shown) between the buffer layer 19 and the first conductive layer 17, a first gate insulating layer 20 between the active layer and the first conductive layer 17, an interlayer insulating layer 21 between the first conductive layer 17 and the second conductive layer 18, a first passivation protection layer 22 on a side of the second conductive layer 18 facing away from the interlayer insulating layer 21, and a planarization layer 23 on a side of the passivation protection layer 22 facing away from the second conductive layer 18. The active layer includes an active layer of a transistor, that is, the transistor in the display panel provided by the embodiment of the present application is in a top gate structure. Of course, the transistor may have a bottom gate structure in specific implementations.
In a specific implementation, a plurality of connection leads electrically connected to the first, second, third, and fourth driving power signal lines, respectively, need to transmit a dc signal with a high load, and the connection leads may be set to have a high conductivity. In the manufacturing process of the display panel, the source and the drain of the transistor are usually made of a material with higher conductivity, so that the connecting leads can be arranged in the same layer as the source and the drain of the transistor. The plurality of connection leads electrically connected to the first, second, third, and fourth driver power supply signal lines, respectively, in some embodiments include: titanium/aluminum/titanium laminate.
In some embodiments, as shown in fig. 5, the second conductive layer 18 includes a connection lead 10 in an orthogonal projection on the substrate base 16, and covers a portion of the connection lead 10 included in the first conductive layer 17 in the orthogonal projection on the substrate base 16.
Therefore, the size of the peripheral area for arranging the connecting lead can be reduced, and narrow-frame display is facilitated.
In some embodiments, as shown in fig. 6, the first conductive layer 17 includes: a first sub-conductive layer 25, and a second sub-conductive layer 26 located on a side of the first sub-conductive layer 25 facing away from the substrate base 16.
Of the plurality of connection leads 10 electrically connected to the plurality of gate driver circuit driving signal lines, the plurality of first differential signal lines, and the second differential signal lines, respectively, any adjacent connection lead 10 is located in the first sub-conductive layer 25 and the second sub-conductive layer 26, respectively.
Namely, a plurality of connecting leads electrically connected with a plurality of gate driving circuit driving signal lines, a plurality of first differential signal lines and a plurality of second differential signal lines are alternately arranged on the first sub-conductive layer and the second sub-conductive layer.
As shown in fig. 6, a plurality of connection leads goa electrically connected to the gate driving circuit driving signal lines are alternately arranged in the first sub-conductive layer 25 and the second sub-conductive layer 26. A plurality of connection leads tcon1 electrically connected to the first differential signal lines are alternately arranged in the first sub-conductive layer 25 and the second sub-conductive layer 26. In fig. 6, for example, the second sub-conductive layer 26 includes a connecting lead tcon2 electrically connected to the second differential signal line, and in practical implementation, how to alternately arrange the connecting leads electrically connected to the plurality of gate driving circuit driving signal lines, the plurality of first differential signal lines, and the second differential signal lines may be selected according to actual needs.
In specific implementation, a plurality of gate driving circuit driving signal lines and a plurality of first differential signal lines need to be arranged, and a plurality of connecting leads respectively electrically connected with the signal lines need to be correspondingly arranged. The plurality of connecting leads electrically connected with the plurality of gate driving circuit driving signal lines, the plurality of first differential signal lines and the second differential signal lines are alternately arranged on the first sub-conductive layer and the second sub-conductive layer, so that signal interference among the plurality of connecting leads can be reduced.
In specific implementation, as shown in fig. 6, the display panel further includes a second gate insulating layer 24 between the first sub-conductive layer 25 and the second sub-conductive layer 26. In a specific implementation, the first sub-conductive layer includes, for example, a gate of a transistor, and may further include a first electrode of a capacitor, and the second sub-conductive layer may include a second electrode of the capacitor.
In some embodiments, as shown in fig. 6, the connection leads goa, tcon1, and tcon2, which are electrically connected to the gate driving circuit driving signal line, the first differential signal line, and the second differential signal line, respectively, are arranged in sequence in a direction in which the display region points to the bonding region (i.e., in a direction in which a points to a').
In a specific implementation, the gate driving circuit driving signal line is not electrically connected to the sub-printed circuit board, but is electrically connected to the display signal line through a connecting lead extending to the non-bending region, so that the connecting lead electrically connected to the gate driving circuit driving signal line is disposed at a side close to the display region, thereby facilitating the electrical connection between the connecting lead electrically connected to the gate driving circuit driving signal line and the display signal line.
In some embodiments, as shown in fig. 5 and 6, a plurality of connection leads elvdd, elvss, vdd, and avdd electrically connected to the second, third, fourth, and first driver power source signal lines, respectively, are sequentially arranged in a direction in which the display area points to the bonding area (i.e., in a direction in which a points to a').
In a specific implementation, the second driving power signal line and the third driving power signal line are not electrically connected to the sub-printed circuit board, but are electrically connected to the display signal line through a connection lead extending to the non-bending region, so that the connection leads electrically connected to the second driving power signal line and the third driving power signal line are disposed near the display region, and the connection leads electrically connected to the second driving power signal line and the third driving power signal line are electrically connected to the display signal line. Further, the connection lead elvss electrically connected to the third drive power source signal line and the connection lead avdd electrically connected to the first drive power source signal line are spaced apart from each other by the connection lead vdd electrically connected to the fourth drive power source signal line, so that a problem caused by a large voltage difference between the connection lead elvss electrically connected to the third drive power source signal line and the connection lead vdd electrically connected to the fourth drive power source signal line can be avoided.
In some embodiments, as shown in fig. 7 and 8, the second conductive layer 18 includes: a third sub-conductive layer 27 and a fourth sub-conductive sub-layer 28 on the side of the third sub-conductive layer 27 facing away from the first conductive layer 17.
In specific implementation, as shown in fig. 7 and 8, the first passivation layer 22 is located between the third sub-conductive layer 27 and the fourth sub-conductive layer 28, and the second passivation layer 29 is further included between the fourth sub-conductive layer 28 and the planarization layer 23.
In some embodiments, as shown in fig. 7, of the plurality of connection leads elvdd, elvss, vdd, avdd electrically connected to the second, third, first, and fourth driving power source signal lines, respectively, any adjacent connection lead is located at the third sub-conductive layer 27 and the fourth sub-conductive layer 28, respectively.
Namely, the connecting leads elvdd, elvss, vdd, and avdd are alternately arranged on the third sub-conductive layer and the fourth sub-conductive layer, so that signal interference among the connecting leads can be avoided.
In an embodiment, the connection lead elvdd is electrically connected to the first power signal line, the connection lead elvss is electrically connected to the second power signal line, and the first power signal line and the second power signal line are disposed in the same layer. The first power signal line and the second power signal line extend along the second direction, and when the connecting leads elvdd and elvss are alternately arranged on the third sub-conductive layer and the fourth sub-conductive layer, the connecting leads arranged on the fourth sub-conductive layer can be lapped with the corresponding power signal lines through via holes penetrating through the first passivation layer, so that short circuit between the signal lines which do not need to be electrically connected and are crossed in the extending direction can be avoided. The connecting leads are arranged alternately, so that the overlapping difficulty of the connecting leads and the display signal lines can be reduced. In a specific implementation, for example, the third sub-conductive layer includes connection leads elvdd, vdd, the fourth sub-conductive layer includes connection leads elvss, avdd, the first power signal line is electrically connected to the connection leads elvdd in the same layer, and as shown in fig. 9, the connection leads elvss are overlapped with the second power signal line 33 through the vias 32 penetrating through the first passivation layer 22.
Of course, in the specific implementation, when the connecting leads elvdd, elvss, vdd, and avdd are disposed in the same layer, the example of disposing the connecting leads elvdd, elvss, vdd, and avdd in the third sub-conductive layer included in the second conductive layer in fig. 6 is taken as an example, and at this time, the first power signal line, the second power signal line, the connecting leads elvdd, and elvss are disposed in the same layer, in the specific implementation, the first power signal line may be electrically connected to the connecting leads elvdd in the same layer, as shown in fig. 10, and the fourth sub-conductive layer 28 may include, for example, bonding leads 34 for electrically connecting the second power signal line 33 to the connecting leads elvss, and the bonding leads 34 may be respectively bonded to the second power signal line 33 and the connecting leads elvss through the vias 32 penetrating through the first passivation layer 22.
In some embodiments, as illustrated in fig. 8, the plurality of connection leads elvdd, elvss, vdd, avdd electrically connected to the second, third, first, and fourth driving power signal lines, respectively, each include a first sub-connection lead 30 located at the third sub-conductive layer 27 and a second sub-connection lead 31 located at the fourth sub-conductive layer 28. The first sub-connection lead 30 and the second sub-connection lead 31 are electrically connected through a via (not shown) penetrating the second passivation layer 29.
That is, each connecting lead adopts a double-layer wiring, so that the resistance of the connecting lead can be reduced.
In a specific implementation, the third sub-conductive layer further includes a source and a drain of the transistor. In some embodiments, when the side of the planarization layer facing away from the substrate base plate comprises an electroluminescent device, the electroluminescent device for example comprises an anode, a light-emitting functional layer, a cathode arranged in a stack. The fourth sub-conductive layer further includes, for example, a connection electrode electrically connecting the anode of the electroluminescent device with the source or drain of the transistor.
In some embodiments, a schematic diagram of the electrical connection of the binding terminal 35 to the connecting lead 10 is shown in fig. 11.
Fig. 11 shows only a partial peripheral region of the display panel. Only two connecting leads at different layers are shown in fig. 11.
In some embodiments, as shown in fig. 12 and 13, each binding terminal 35 includes: a first sub binding terminal 36 and a second sub binding terminal 37 electrically connected;
the first conductive layer 17 further includes a first sub-binding terminal 36, and the second conductive layer 18 further includes a second sub-binding terminal 37;
the first conductive layer 17 includes a connection lead 10 electrically connected to the first sub-binding terminal 36;
the second conductive layer 18 includes a connection lead 10 electrically connected to the second sub-binding terminal 37.
Fig. 12 is a cross-sectional view taken along BB 'in fig. 11, and fig. 13 is a cross-sectional view taken along CC' in fig. 11.
In specific implementation, for example, the first sub binding terminal 36 and the second sub binding terminal 37 are electrically connected through a via hole penetrating the interlayer insulating layer 21.
The embodiment of the application provides a display device, including the above-mentioned display module assembly that the embodiment of the application provided.
In some embodiments, the display device provided by the embodiments of the present application is a foldable display device.
The display device provided by the embodiment of the application is as follows: any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like. Other essential components of the display device are understood by those skilled in the art, and are not described herein or should not be construed as limiting the present application. The implementation of the display device can be seen in the above embodiments of the display module, and repeated descriptions are omitted.
To sum up, the display module assembly that this application embodiment provided is display device, is provided with the connection lead that extends and pass the bending zone along first direction, and this connection lead extends to the district of binding of bending zone both sides, and first drive signal line is connected through the connection lead electricity in the different printed circuit boards of bending zone both sides, realizes the communication between two printed circuit boards through the connection lead promptly. Therefore, the display module that this application embodiment provided need not to set up the flexible circuit board that binds with two adjacent printed circuit boards, can reduce display module assembly process flow and the degree of difficulty, promotes display module yield and assembly efficiency, reduces the display module cost, can also avoid the display module to buckle and lead to the flexible circuit board to buckle the equipment interface that causes not hard up, avoids arousing to show badly.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims (16)

1. The utility model provides a display module assembly, its characterized in that, display module assembly includes: a display panel, and a plurality of printed circuit boards;
the display panel comprises a display area and a peripheral area outside the display area;
the display panel is divided into: the bending device comprises at least one bending area and non-bending areas positioned on two sides of the bending area;
the peripheral region on one side of the display region includes: a plurality of binding regions corresponding to the non-bending regions; each binding area is bound with at least one printed circuit board;
each printed circuit board comprises at least one first driving signal line;
the peripheral region comprises at least one connecting lead; the connecting lead extends from the bending region to the binding regions positioned at two sides of the bending region along a first direction;
in the binding regions on two sides of the bending region, the first driving signal lines in two adjacent printed circuit boards are electrically connected through the connecting lead.
2. The display module of claim 1, wherein the display panel further comprises: a plurality of display signal lines;
at least one of the printed circuit boards further comprises a plurality of second driving signal lines;
the peripheral area comprises a plurality of connecting leads; one end of part of the connecting lead is electrically connected with part of the second driving signal wires, and the other end of part of the connecting lead extends to the non-bending area; and in the non-bending area where the connecting lead extends, the connecting lead is electrically connected with part of the display signal wires in the non-bending area.
3. The display module according to claim 1 or 2, wherein the display module further comprises: a plurality of chip on film circuit boards; each printed circuit board is bound with the binding area through at least one chip on film circuit board;
each of the binding regions includes: a plurality of bonding terminals bonded to the chip on film circuit board;
the first driving signal wire is electrically connected with the binding terminal through the chip on film circuit board;
and two ends of part of the connecting lead are electrically connected with the binding terminals.
4. The display module according to claim 3, wherein when at least one of the printed circuit boards further comprises a plurality of second driving signal lines, a portion of the second driving signal lines are electrically connected to the bonding terminals through the COF circuit board;
one end electrically connected to the connection wire electrically connected to the second driving signal line is electrically connected to the binding terminal;
the connecting lead extends to the part of the non-bending area, and the binding terminal in the non-bending area faces to one side of the display area.
5. The display module of claim 4, wherein the plurality of printed circuit boards comprises: a main printed circuit board and at least one sub printed circuit board;
the main printed circuit board includes: a first power supply terminal, a timing controller;
each chip on film circuit board comprises a first driving chip;
the first driving signal line includes: a first driving power signal line, a plurality of first differential signal lines; in the main printed circuit board, the first driving power source signal line is connected to the first power source terminal, and the first differential signal line is electrically connected to the timing controller; in the sub printed circuit board, the first driving power signal line and the first differential signal line are electrically connected to the first driver chip.
6. The display module of claim 5, wherein only the main printed circuit board comprises a plurality of second driving signal lines;
the main printed circuit board further includes: a second power supply terminal;
the plurality of second driving signal lines include: a second driving power source signal line and a third driving power source signal line electrically connected to the second power source terminal, and a plurality of gate driving circuit driving signal lines electrically connected to the timing controller;
the second driving power supply signal line provides a high level signal, and the third driving power supply signal line provides a low level signal;
some of the second driving power signal lines, the third driving power signal lines and the gate driving circuit driving signal lines are electrically connected to the connection lead through the chip on film circuit board and the bonding terminals, and the rest of the second driving power signal lines, the third driving power signal lines and the gate driving circuit driving signal lines are electrically connected to the display signal lines through the chip on film circuit board and the bonding terminals.
7. The display module of claim 6, wherein the main printed circuit board further comprises a plurality of balancing resistors; the second driving power signal line and the third driving power signal line electrically connected with the display signal line through the chip on film circuit board and the binding terminal are electrically connected with the second power end through the balance resistor.
8. The display module assembly of any one of claims 5 to 7, wherein the main printed circuit board further comprises: a main touch drive chip;
the sub printed circuit board further includes: a secondary touch drive chip;
the first driving signal line further includes: a second differential signal line and a fourth driving power signal line; in the main printed circuit board, the second differential signal line is electrically connected with the main touch driving chip, and the fourth driving power signal line is electrically connected with the first power end; in the auxiliary printed circuit board, the second differential signal line is electrically connected to the auxiliary touch driver chip, and the fourth driver power signal line is electrically connected to the auxiliary touch driver chip.
9. The display module of claim 8, wherein the display area comprises a plurality of sub-pixels arranged in an array; the sub-pixel includes a transistor;
the display panel specifically includes: the substrate comprises a substrate base plate, a first conducting layer and a second conducting layer, wherein the first conducting layer is positioned on one side of the substrate base plate, and the second conducting layer is positioned on one side, deviating from the substrate base plate, of the first conducting layer;
the first conductive layer includes: the gate of the transistor, the connection lead electrically connected to the plurality of gate driving circuit driving signal lines, the plurality of first differential signal lines, and the second differential signal line, respectively;
the second conductive layer includes: a source and a drain of the transistor, and a plurality of the connection leads electrically connected to the first driving power source signal line, the second driving power source signal line, the third driving power source signal line, and the fourth driving power source signal line, respectively.
10. The display module according to claim 9, wherein the second conductive layer includes the connecting leads in an orthogonal projection on the substrate, and covers a portion of the connecting leads included in the first conductive layer in an orthogonal projection on the substrate.
11. The display module according to claim 9 or 10, wherein the first conductive layer comprises: the first sub-conducting layer and the second sub-conducting layer are positioned on one side, away from the substrate, of the first sub-conducting layer;
and in the plurality of connecting leads electrically connected with the plurality of gate driving circuit driving signal lines, the plurality of first differential signal lines and the second differential signal lines, any adjacent connecting lead is located in the first sub-conductive layer and the second sub-conductive layer respectively.
12. The display module according to claim 9 or 10, wherein a plurality of the connection leads electrically connected to the second driver power signal line, the third driver power signal line, the fourth driver power signal line, and the first driver power signal line, respectively, are arranged in order in a direction in which the display region is directed to the bonding region.
13. The display module of claim 12, wherein the second conductive layer comprises: the third sub-conducting layer and a fourth sub-conducting sub-layer are positioned on one side, away from the first conducting layer, of the third sub-conducting layer;
and a plurality of connection leads electrically connected to the second driver power source signal line, the third driver power source signal line, the fourth driver power source signal line, and the first driver power source signal line, wherein any adjacent connection lead is located in the third sub-conductive layer and the fourth sub-conductive layer, respectively.
14. The display module according to claim 9 or 10, wherein the connecting leads electrically connected to the gate driving circuit driving signal line, the first differential signal line, and the second differential signal line are sequentially arranged in a direction in which the display region points to the bonding region.
15. The display module of claim 9, wherein each of the binding terminals comprises: a first sub binding terminal and a second sub binding terminal electrically connected;
the first conductive layer further comprises the first sub-binding terminal, and the second conductive layer further comprises the second sub-binding terminal;
the connection lead included in the first conductive layer is electrically connected to the first sub-binding terminal;
the connection lead included in the second conductive layer is electrically connected to the second sub-binding terminal.
16. A display device, comprising the display module according to any one of claims 1 to 15.
CN202110994440.3A 2021-08-27 2021-08-27 Display module and display device Active CN113724592B (en)

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