CN113707718B - Power device, preparation method thereof and electronic device - Google Patents

Abstract

The present application provides a power device, a preparation method thereof, and an electronic device. The power device includes a GaN buffer layer, a first barrier layer, a second barrier layer, a barrier layer, a first p-(Al)GaN part and a gate electrode. The GaN buffer layer and the first barrier layer are stacked. The first barrier layer is provided with a first through hole. The second barrier layer covers the side of the first barrier layer away from the GaN buffer layer. The second barrier layer is on A trench is formed at the first through hole, the barrier layer is provided on the side of the second barrier layer away from the GaN buffer layer, the barrier layer is provided with a second through hole, and the first p‑(Al)GaN portion is provided on the second through hole And in contact with the second barrier layer, the gate is located on the side of the first p-(Al)GaN part away from the barrier layer. The barrier layer can protect the second barrier layer when etching p-(Al)GaN, reduce etching damage to the second barrier layer, and prevent holes from being injected from the first p-(Al)GaN part to the second barrier layer during reverse conduction. in the second barrier layer.

Description

Power device and preparation method thereof, electronic device

Technical field

The present application relates to the technical field of semiconductor devices, and in particular to a power device, a preparation method thereof, and an electronic device.

Background technique

The third generation of wide-bandgap semiconductor materials, represented by gallium nitride (GaN) and silicon carbide (SiC), has the characteristics of high electron mobility, large bandgap width, high electron saturation drift rate, and resistance to high voltage and high temperature. Compared with traditional Si materials, it is more suitable for making power devices. Especially in heterostructures based on GaN materials (represented by AlGaN/GaN), the crystal itself can induce high-density two-dimensional electron gas (2DEG) due to its strong polarization effect ( The density is greater than 10 ¹³ cm ^-2 ), and in the electron channel without intentional doping, the electron mobility can stably reach more than 1000cm ² V ^-1 s ^-1 .

When preparing gallium nitride normally-off switching devices, a p-type GaN layer (p-GaN) is usually grown on the AlGaN/GaN surface. Currently, there are two main types of GaN enhancement-mode devices: voltage-type p-GaN gate (Schottky gate) devices and current-type p-GaN gate (ohmic gate) devices. Among them, the current-mode p-GaN gate device is not sensitive to the parasitic parameters of the driving circuit due to its special driving method, has a large design margin, and is easy to use.

However, in high-voltage switching applications of current-mode p-GaN gate devices, due to the presence of high electric fields and hot electrons, electrons will be captured by trap defects in current-mode p-GaN gate devices under the action of the electric field. This phenomenon is called It is electron trapping. When the current mode p-GaN gate device is turned back on, the on-resistance of the current mode p-GaN gate device will degrade because the trapped electrons cannot be released quickly.

In order to solve the problem that trapped electrons cannot be released quickly when turned on, a p-GaN layer can be introduced near the drain. During the dynamic switching process of the device, the p-GaN layer on the drain side can generate holes to suppress the capture of electrons and solve problems such as dynamic resistance degradation and high-temperature operating life of long-term devices. However, because the AlGaN barrier layer in the gate region is easily damaged when etching the p-GaN layer, the thickness of some AlGaN barrier layers is too thin. When the current-mode p-GaN gate device is reversely conductive, holes in the p-GaN layer are easily injected into the AlGaN barrier layer. The injected holes are stored in the AlGaN barrier layer and cannot be removed. The lack of a gate above the AlGaN barrier layer next to the drain prevents electrons in the channel from recombining with holes in the AlGaN barrier layer, resulting in poor off-state characteristics of current-mode p-GaN gate devices. In severe cases, The current mode p-GaN gate device fails due to breakdown, thus affecting the reliability of the current mode p-GaN gate device.

Contents of the invention

Embodiments of the present application provide a power device, a preparation method thereof, and an electronic device that can improve reliability.

In a first aspect, the present application provides a power device, including a GaN buffer layer, a first barrier layer, a second barrier layer, a barrier layer, a first p-(Al)GaN part and a gate electrode, the GaN buffer layer It is stacked with the first barrier layer. The first barrier layer is provided with a first through hole penetrating the first barrier layer. The second barrier layer includes a first part and a second part. The first part covers the side of the first barrier layer away from the GaN buffer layer, and the second part covers the bottom wall of the first through hole and the side wall of the first through hole; The second part is bent in the first through hole and forms a trench. The barrier layer includes a third part and a fourth part, and the third part covers the second barrier layer. On one side of the GaN buffer layer, the fourth part covers the sidewalls of the trench and part of the bottom wall of the trench, the fourth part includes a second through hole penetrating the fourth part, and the At least part of a p-(Al)GaN part is accommodated in the second through hole and contacts the second part of the second barrier layer, and the gate is disposed on the first p-(Al) The side of the GaN portion facing away from the barrier layer.

The second barrier layer is bent at the first through hole and forms a trench, wherein the second barrier layer covers the bottom wall and sidewall of the first through hole. The first p-(Al)GaN part is made of p-(Al)GaN. p-(Al)GaN is one of p-AlGaN and p-GaN.

The power device provided by this application grows a barrier layer after forming the second barrier layer. The barrier layer can protect the second barrier layer when etching p-(Al)GaN and reduce the impact of etching on the second barrier layer. Damage ensures that the second barrier layer can maintain its original thickness and prevents holes from being injected from the first p-(Al)GaN part into the second barrier layer when the power device is reversely conductive, effectively improving the reliability of the power device.

According to the first aspect, in a first possible implementation manner of the first aspect of the application, the fourth part of the barrier layer also covers an end of the bottom wall of the trench close to the side wall of the trench. Since the corners of the trench are covered with the barrier layer, the protective area of the barrier layer for the second barrier layer is increased, effectively preventing the etching gas with a larger plasma density located at the sharp corner of p-(Al)GaN from An etching trench is formed on the second barrier layer, further improving the reliability of the power device.

According to the first aspect or the first implementation of the first aspect of the application, in the second possible implementation of the first aspect of the application, the fourth part of the barrier layer includes a first connection portion of the connection arrangement. With the second connection part, the first connection part covers the side wall of the groove, the second connection part covers the bottom wall of the groove, and the second through hole is located at the On the second connection part, the first connection part and the second connection part form a receiving cavity, and the first p-(Al)GaN part fills the receiving cavity and the second through-hole. hole, one end of the first p-(Al)GaN part away from the GaN buffer layer is exposed outside the accommodation cavity. Since one end of the first p-(Al)GaN part away from the GaN buffer layer is exposed outside the accommodation cavity, it is convenient to arrange the gate electrode on the first p-(Al)GaN part, thereby reducing the difficulty of preparing the power device. .

According to the first aspect or the first to the second possible implementation manner of the first aspect of the application, in the third possible implementation manner of the first aspect of the application, the third part of the barrier layer penetrates the The third part is also provided with a third through hole and a fourth through hole. The power device also includes a source electrode and a drain electrode. The source electrode is provided in the third through hole and contacts the second barrier layer. , the drain electrode is provided in the fourth through hole and in contact with the second barrier layer.

According to the first aspect or the first to third possible implementations of the first aspect of the application, in the fourth possible implementation of the first aspect of the application, the third part of the barrier layer is further provided with There is a connection hole penetrating the third part. The power device also includes a second p-(Al)GaN part and a hole injection electrode. The second p-(Al)GaN part is provided in the connection hole and In contact with the first part of the second barrier layer, the hole injection electrode is disposed on a side of the second p-(Al)GaN part away from the second barrier layer, and the hole injection electrode is connected to the first part of the second barrier layer. The drain connection. The second p-(Al)GaN part is made of p-(Al)GaN. p-(Al)GaN is one of p-AlGaN and p-GaN.

According to the first aspect or the first to fourth possible implementation manners of the first aspect of this application, in the fifth possible implementation manner of the first aspect of this application, the first barrier layer and the third possible implementation manner The two barrier layers are made of the same material, and the first barrier layer is made of one of AlGaN and InAlN.

According to the first aspect or the first to fifth possible implementations of the first aspect of the application, in a sixth possible implementation of the first aspect of the application, the thickness of the first barrier layer is greater than The thickness of the second barrier layer.

According to the first aspect or the first to sixth possible implementations of the first aspect of the application, in a seventh possible implementation of the first aspect of the application, the barrier layer includes silicon oxide, silicon nitride , aluminum oxide, aluminum nitride, aluminum oxynitride, silicon oxynitride.

In a second aspect, the present application provides a method for preparing a power device, including the following steps: providing a preform, the preform including a stacked GaN buffer layer and a first barrier layer, the first barrier layer having a first through hole penetrating the first barrier layer; forming a second barrier layer on a side of the first barrier layer away from the GaN buffer layer, the second barrier layer including a first portion and a third barrier layer; Two parts, the first part covers the side of the first barrier layer away from the GaN buffer layer, and the second part is received in the first through hole and covers the first barrier layer on the first through hole, the second part is bent and forms a groove, and the second part covers the bottom wall of the first through hole and the side wall of the first through hole; A barrier layer is formed on a side of the second barrier layer facing away from the GaN buffer layer. The barrier layer includes a third part and a fourth part. The third part covers the side of the second barrier layer facing away from the GaN buffer layer. On one side of the GaN buffer layer, the fourth portion covers the sidewalls of the trench and part of the bottom wall of the trench; a second via penetrating the barrier layer is formed on the fourth portion of the barrier layer. hole; forming a first p-(Al)GaN portion in contact with the second portion of the second barrier layer in the second through hole; forming the first p-(Al)GaN portion away from the One side of the barrier layer forms the gate.

According to the second aspect, in a first possible implementation manner of the second aspect of the present application, the fourth part of the barrier layer covers the sidewall of the trench, and the fourth part also covers the sidewall of the trench. The bottom wall of the groove is adjacent to one end of the side wall of the groove. The fourth part of the barrier layer includes a first connection part and a second connection part that are connected and arranged. The first connection part covers the side wall of the trench, and the second connection part covers the side wall of the trench. On the bottom wall of the groove, the second through hole is located on the second connection part, the first connection part and the second connection part form a receiving cavity, and the first p The (Al)GaN part fills the receiving cavity and the second receiving hole, and one end of the first p-(Al)GaN part away from the GaN buffer layer is exposed outside the receiving cavity.

According to the second aspect or the first possible implementation of the second aspect of the application, in the second possible implementation of the second aspect of the application, the preparation method further includes: A third through hole and a fourth through hole are formed on the third part through the barrier layer, and a gate electrode is formed on the side of the first p-(Al)GaN part away from the second barrier layer, It also includes forming a source electrode in contact with the first part of the second barrier layer in the third through hole, and forming a drain electrode in contact with the first part of the second barrier layer in the fourth through hole. .

According to the second aspect or the first to second possible implementations of the second aspect of the application, in the third possible implementation of the second aspect of the application, the preparation method further includes: The barrier layer is also provided with a connection hole penetrating the third part of the barrier layer; a second p-(Al)GaN portion in contact with the second barrier layer is formed in the connection hole; in the second p - A hole injection electrode is formed on the side of the (Al)GaN part away from the second barrier layer; the hole injection electrode is connected to the drain electrode.

According to the second aspect or the first to third possible implementations of the second aspect of the application, in the fourth possible implementation of the second aspect of the application, the thickness of the first barrier layer is is greater than the thickness of the second barrier layer.

In a third aspect, this application provides an electronic device, including a power device and a circuit board provided according to the first aspect or the first to seventh possible implementation manners of the first aspect of this application.

Description of drawings

Figure 1 is a schematic diagram of an electronic device provided by an embodiment of the present application;

Figure 2 is a schematic structural diagram of a power device provided by an embodiment of the present application;

Figure 3 is a flow chart of a manufacturing method of a power device provided by an embodiment of the present application;

Figure 4 is a schematic structural diagram of the prefabricated body provided in step 201 shown in Figure 3;

Figure 5 is a schematic structural diagram of forming a second barrier layer on the first barrier layer in step 203 shown in Figure 3;

Figure 6 is a schematic structural diagram of forming a barrier layer on the second barrier layer in step 205 shown in Figure 3;

FIG. 7 is a flow chart of a manufacturing method of a power device provided by another embodiment of the present application.

Detailed ways

One method of preparing a normally-off switching device is to etch away the first AlGaN barrier layer in the gate region, and then epitaxially grow the second AlGaN barrier layer and p-GaN layer twice. The p-GaN layer in the gate area is mainly used to form the metal/p-GaN/AlGaN gate structure. The p-GaN layer introduced next to the drain is connected to the drain to provide hole injection during the switching process. Generally, the thickness of the secondary epitaxial p-GaN layer is relatively large (usually greater than 100nm). In order to ensure the etching margin during the p-GaN etching process, part of the second barrier layer will be etched away, and the p-GaN tip Due to the high density of etching gas plasma at the corners, etching trenches are often easily formed, resulting in the thickness of the second barrier layer at the sharp corners of p-GaN being too thin. When the device is reverse-conducted, holes are easily injected from p-GaN into the second barrier layer. The injected holes are stored in the second barrier layer. The lack of a gate above the second barrier layer next to the drain (access area) prevents electrons in the channel from recombining with holes in the second barrier layer, resulting in poor off-state characteristics of the device. In severe cases, Device breakdown and failure may occur, thus affecting the reliability of the device.

Based on this, this application provides a power device and related preparation methods and electronic devices. The power device includes a GaN buffer layer, a first barrier layer, a second barrier layer, a barrier layer, a first p-(Al)GaN part and a gate electrode. The GaN buffer layer and the first barrier layer are stacked. The first barrier layer is provided with a first through hole penetrating the first barrier layer. The second barrier layer includes a first part and a second part. The first part covers the side of the first barrier layer facing away from the GaN buffer layer. The second part covers the bottom wall of the first through hole and the side wall of the first through hole. The second part is bent and forms a groove in the first through hole. The barrier layer includes a third part and a fourth part. The third part covers the side of the first part facing away from the GaN buffer layer. The fourth part covers the side walls of the trench and part of the bottom wall of the trench. The fourth part includes a second through hole extending through the fourth part. The first p-(Al)GaN portion is disposed in the second through hole and contacts the second portion of the second barrier layer. The gate electrode is disposed on a side of the first p-(Al)GaN part facing away from the barrier layer.

Please refer to FIG. 1 . An embodiment of the present application provides an electronic device 100 , including a circuit board 30 and a power device 10 provided on the circuit board 30 . The power device 10 is used for power processing, including frequency conversion, voltage conversion, current conversion, power management, etc. The electronic device 100 may be a power conversion device that requires the use of the power device 10 . The power conversion device can be mounted on the power conversion equipment to complete various power functions of the equipment. For example, the power device of the present application can be applied in the field of electric vehicle power systems, that is, the electric energy conversion device can be an electric vehicle, in which the electric energy conversion device can be a motor controller, and the power device can be a power conversion unit installed in the motor controller; The power conversion device can also be an on-board charger (OBC), and the power device is the energy conversion unit; the power conversion device can also be a low-voltage control power supply, and the power device is the DC-DC conversion unit, etc. In addition, the power device of this application is not limited to the field of electric vehicles, and can also be widely used in traditional industrial control, communications, smart grid and other fields. For example, it can be applied to uninterruptible power supply (uninterruptible power supply) of data centers. UPS), inverters for photovoltaic power generation equipment, power supplies for servers, switching power supplies for refrigerators, etc. It can be understood that this application does not limit the electronic device 100 to be a power conversion device, that is, this application does not limit the power device 10 to perform power conversion. The power device 10 can also be applied in the electronic device 100 to change voltage, frequency, etc. to achieve circuit control. .

Please refer to Figure 2. An embodiment of the present application provides a power device 10, including a GaN buffer layer 12, a first barrier layer 13, a second barrier layer 14, a barrier layer 15, and a first p-(Al)GaN portion. 17 and gate 19. The GaN buffer layer 12 and the first barrier layer 13 are stacked. The first barrier layer 13 includes a first through hole 131 penetrating the first barrier layer 13 . The second barrier layer 14 includes a first part 141 and a second part 143 . The first portion 141 covers the side of the first barrier layer 13 facing away from the GaN buffer layer 12 . The second part 143 is received in the first through hole 131 . The second portion 143 of the second barrier layer 14 is bent at the first through hole 131 and forms a trench 145 . Specifically, the second portion 143 of the second barrier layer 14 covers the side walls of the first through hole 131 and the bottom wall of the first through hole 131 . The barrier layer 15 includes a third portion 150 and a fourth portion 151 . The third portion 150 covers the side of the first portion 141 of the second barrier layer 14 facing away from the GaN buffer layer 12 . The groove wall of the groove 145 includes a bottom wall 1451 and a side wall 1453 that are connected together. The fourth portion 151 covers the side wall 1453 of the trench 145 and a portion of the bottom wall 1451 of the trench 145 . The fourth portion 151 includes a second through hole 152 penetrating the fourth portion 151 of the barrier layer 15 . The first p-(Al)GaN portion 17 is received in the second through hole 152 and is in contact with the second portion 143 of the second barrier layer 14 .

In the power device 10 provided by this application, a barrier layer 15 is grown after forming the second barrier layer 14. The barrier layer 15 can protect the second barrier layer 14 when etching p-(Al)GaN and reduce the impact of etching on the third barrier layer. The damage of the second barrier layer 14 ensures that the second barrier layer 14 can maintain its original thickness, which greatly reduces the hole injection from the first p-(Al)GaN part 17 to the second barrier when the power device 10 is reversely conductive. The possibilities in layer 14 effectively improve the reliability of power device 10 . The first p-(Al)GaN portion 17 is made of p-(Al)GaN. p-(Al)GaN is one of p-AlGaN and p-GaN.

The first barrier layer 13 and the second barrier layer 14 are both AlGaN layers. In other embodiments, the first barrier layer 13 and the second barrier layer 14 can be made of other materials, such as InAlN.

The thickness of the first barrier layer 13 is greater than the thickness of the second barrier layer 14 . It can be understood that in other embodiments, the thickness of the first barrier layer 13 may be less than or equal to the thickness of the second barrier layer 14 .

More specifically, the power device 10 further includes a substrate 11 , which is disposed on a side of the GaN buffer layer 12 away from the first barrier layer 13 . The substrate 11 can be a Si substrate, a quartz substrate, a diamond substrate, etc., and the material of the substrate 11 is not limited in this application.

The bottom wall 1451 is provided on the side of the trench 145 close to the GaN buffer layer 12 . The fourth portion 151 of the barrier layer 15 covers the sidewall 1453 and extends along the stacking direction, which is the stacking direction of the substrate 11 and the GaN buffer layer 12 (longitudinal direction as shown in FIG. 2 ). Since the barrier layer 15 covers the sidewall 1453, it effectively prevents the first p-(Al)GaN portion 17 from being injected laterally (laterally as shown in FIG. 2) into the second barrier layer 14.

The material of the barrier layer 15 includes silicon oxide (SiO ₂ ), silicon nitride (SiN), aluminum oxide (Al ₂ O ₃ ), aluminum nitride (AlN), aluminum oxynitride (AlON), and silicon oxynitride (SiON). kind of.

The fourth part 151 also covers one end of the bottom wall 1451 close to the side wall 1453 , that is, the barrier layer 15 is covered at the corner of the trench 145 , thus increasing the protective area of the second barrier layer 14 by the barrier layer 15 . When growing the p-(Al)GaN layer, the barrier layer 15 effectively prevents the etching gas with a larger plasma density at the sharp corners of the p-(Al)GaN in the trench 145 from growing on the second barrier layer 14 The etching trench is formed so that the thickness of the second barrier layer 14 near the sharp corner of p-(Al)GaN in the trench 145 is not reduced, which further improves the reliability of the power device 10 .

More specifically, the fourth part 151 is bent in the groove 145 . More specifically, the fourth part 151 includes a first connection part 1511 and a second connection part 1513. The first connection part 1511 covers the side wall 1453 of the trench 145. The second connection part 1513 covers the bottom wall 1451 of the trench 145, and the second through hole 152 is located on the second connection part 1513. The first connection part 1511 and the second connection part 1513 form a receiving cavity 154 . The first p-(Al)GaN part 17 fills the receiving cavity 154 and the second through hole 152 , and one end of the first p-(Al)GaN part 17 away from the GaN buffer layer 12 is exposed outside the receiving cavity 154 . The first p-(Al)GaN part 17 covers the first connection part 1511 and the second connection part 1513, that is, the first p-(Al)GaN part 17 covers the bottom wall of the receiving cavity 154 and the side wall of the receiving cavity 154. . The first p-(Al)GaN portion 17 covers the bottom wall of the second through hole 152 and the side walls of the second through hole 152 . It can be understood that this application does not limit the first p-(Al)GaN part 17 receiving cavity 154 and the second through hole 152. The first p-(Al)GaN part 17 contacts the second part 143 through the second through hole 152. Can.

The third portion 150 of the barrier layer 15 is also provided with a third through hole 153 and a fourth through hole 155 penetrating through the barrier layer 15 . The power device 10 further includes a source electrode 21 and a drain electrode 23. The source electrode 21 is disposed in the third through hole 153 and contacts the first portion 141 of the second barrier layer 14 to form an ohmic contact. The drain electrode 23 is disposed in the fourth through hole. 157 and contacts the first portion 141 of the second barrier layer 14 to form an ohmic contact.

The barrier layer 15 is also provided with a connection hole 157 penetrating the third portion 150 of the barrier layer 15 . The power device 10 further includes a second p-(Al)GaN portion 25 and a hole injection electrode 29 . The second p-(Al)GaN portion 25 is provided in the connection hole 157 and in contact with the second barrier layer 14 . The hole injection electrode 29 is provided on the side of the second p-(Al)GaN portion 25 away from the second barrier layer 14 and is connected to the drain electrode 23 . The hole injection electrode 29 is used to inject holes in the second p-(Al)GaN part 25 into the second barrier layer 14 through voltage during the switching transient of the power device 10 . In this embodiment, the connection hole 157 is located between the second through hole 152 and the fourth through hole 155 in the direction perpendicular to the stacking direction, and is disposed close to the drain electrode 23 to facilitate the second p-(Al in the connection hole 157 ) The GaN portion 25 is connected to the drain electrode 23, thereby shortening the connection line length. The stacking direction is the stacking direction of the substrate 11 and the GaN buffer layer. It can be understood that this application does not limit the positions of the second through hole 152 , the third through hole 153 , the fourth through hole 155 and the connecting hole 157 . The second p-(Al)GaN portion 25 is made of p-(Al)GaN. p-(Al)GaN is one of p-AlGaN and p-GaN.

Referring to FIG. 3 , one embodiment of the present application also provides a method for manufacturing the power device 10 . The preparation method includes the following steps:

Step 201, please refer to FIG. 4 to provide a preform 201. The preform 201 includes a stacked GaN buffer layer 12 and a first barrier layer 13. The first barrier layer 13 is provided with a first barrier layer penetrating the first barrier layer 13. Through hole 131. In this embodiment, the preform 201 also includes a substrate 11, a GaN buffer layer 12 is grown on the substrate 11, an AlGaN layer is grown on the side of the GaN buffer layer 12 facing away from the substrate 11, and the AlGaN layer is etched. Then the first barrier layer 13 is formed. It can be understood that the first barrier layer 13 having the first through hole 131 can be formed directly on the side of the GaN buffer layer 12 facing away from the substrate 11 .

Step 203, please refer to FIG. 5. A second barrier layer 14 is formed on the side of the first barrier layer 13 away from the GaN buffer layer 12. The second barrier layer 14 is bent at the first through hole 131 and formed The trench 145 and the second barrier layer 14 cover the bottom wall of the first through hole 131 and the side walls of the first through hole 131 .

More specifically, the second barrier layer 14 includes a first part 141 and a second part 143. The first part 141 covers the side of the first barrier layer 13 away from the GaN buffer layer 12, and the second part 143 is accommodated in the first through hole. Within 131. The second part 143 is bent at the first through hole 131 and forms a groove 145 . The second part 143 covers the bottom wall of the first through hole 131 and the side walls of the first through hole 131 . The groove wall of the groove 145 includes a bottom wall 1451 and a side wall 1453 that are connected together.

In this embodiment, a secondary epitaxial growth method is used to form the second barrier layer 14 on the side of the first barrier layer 13 away from the GaN buffer layer 12 . The first barrier layer 13 and the second barrier layer 14 are both AlGaN layers. In other embodiments, the first barrier layer 13 and the second barrier layer 14 can be made of other materials, such as InAlN.

Step 205 , please refer to FIG. 6 , forming a barrier layer 15 on the side of the second barrier layer 14 away from the GaN buffer layer 12 . The barrier layer 15 includes a third portion 150 and a fourth portion 151 . The third portion 150 covers the side of the second barrier layer 14 facing away from the GaN buffer layer 12 . The fourth portion 151 covers the side wall 1453 of the trench 145 and a portion of the bottom wall 1451 of the trench 145 . The fourth part 151 includes a first connection part 1511 and a second connection part 1513. The first connection part 1511 covers the side wall 1453 of the trench 145. The second connection part 1513 covers the bottom wall 1451 of the trench 145, and the second through hole 152 is located on the second connection part 1513. The first connection part 1511 and the second connection part 1513 form a receiving cavity 154 . The fourth part 151 is bent in the groove 145 to form a receiving cavity 154 .

Step 207 , please refer to FIG. 6 , forming a second through hole 152 penetrating the fourth portion 151 of the barrier layer 15 on the barrier layer 15 . In this embodiment, after etching the barrier layer 15 , a second through hole 152 penetrating through the barrier layer 15 is formed on the second connection portion 1513 of the barrier layer 15 .

Step 209 , please refer to FIG. 2 again, forming a first p-(Al)GaN portion 17 in contact with the second barrier layer 14 in the second through hole 152 . In this embodiment, a secondary epitaxial growth method is used to form a p-(Al)GaN layer on the side of the barrier layer 15 away from the second barrier layer 14, and the p-(Al)GaN layer is etched to form the first p-(Al)GaN part 17. The first p-(Al)GaN part 17 is received in the second through hole 152 of the receiving cavity 154. One end of the first p-(Al)GaN part 17 away from the GaN buffer layer 12 is exposed outside the receiving cavity 154, that is, the first p-(Al)GaN part 17 is exposed outside the receiving cavity 154. -(Al)GaN portion 17 covers the bottom wall of the accommodation cavity 154 and the side walls of the accommodation cavity 154 . The p-(Al)GaN layer is etched using dry etching. Since the barrier layer 15 is disposed on the second barrier layer 14, when the p-(Al)GaN layer is etched by dry etching, the barrier layer 15 effectively protects the second barrier layer 14 below the barrier layer 15, that is, the barrier layer 15 can be used as a stop layer when p-(Al)GaN layer is etched, reducing the possibility that the surface of the second barrier layer 14 on the side facing away from the GaN buffer layer 12 is damaged during the p-(Al)GaN etching process. .

Step 211 , form the gate electrode 19 on the side of the first p-(Al)GaN part 17 away from the second barrier layer 14 .

In one embodiment, the preparation method further includes forming a connection hole 157 on the barrier layer 15 penetrating the third portion 150 of the barrier layer 15 ; forming a second p- in the connection hole 157 that is in contact with the second barrier layer 14 (Al)GaN part 25; a hole injection electrode 29 is formed on the side of the second p-(Al)GaN part 25 away from the second barrier layer 14; the hole injection electrode 29 is connected to the drain electrode 23.

In one embodiment, the preparation method further includes providing a third through hole 153 and a fourth through hole 155 on the barrier layer 15 that penetrate the third portion 150 of the barrier layer 15 . The source electrode 21 in contact with the second barrier layer 14 is formed in the third through hole 155 so that the source electrode 21 and the second barrier layer 14 form ohmic contact. The drain electrode 23 in contact with the second barrier layer 14 is formed in the fourth through hole 155 so that the drain electrode 23 and the second barrier layer 14 form ohmic contact.

Another embodiment of the present application provides a method for manufacturing the power device 10. Please refer to Figure 7. The preparation method includes the following steps:

Step 301, please refer to FIG. 4 to provide a preform 201. The preform 201 includes a stacked GaN buffer layer 12 and a first barrier layer 13. The first barrier layer 13 is provided with a first barrier layer penetrating the first barrier layer 13. Through hole 131. In this embodiment, the preform 201 also includes a substrate 11, a GaN buffer layer 12 is grown on the substrate 11, an AlGaN layer is grown on the side of the GaN buffer layer 12 facing away from the substrate 11, and the AlGaN layer is etched. Then the first barrier layer 13 is formed. It can be understood that the first barrier layer 13 having the first through hole 131 can be formed directly on the side of the GaN buffer layer 12 facing away from the substrate 11 .

Step 303, please refer to FIG. 5. A second barrier layer 14 is formed on the side of the first barrier layer 13 away from the GaN buffer layer 12. The second barrier layer 14 is bent at the first through hole 131 and formed Groove 145. The second barrier layer 14 covers the bottom wall of the first through hole 131 and the side walls of the first through hole 131 . In this embodiment, a secondary epitaxial growth method is used to form the second barrier layer 14 on the side of the first barrier layer 13 away from the GaN buffer layer 12 .

More specifically, the second barrier layer 14 includes a first part 141 and a second part 143. The first part 141 covers the side of the first barrier layer 13 away from the GaN buffer layer 12, and the second part 143 is accommodated in the first through hole. Within 131. The second part 143 is bent at the first through hole 131 and forms a groove 145 . The second part 143 covers the bottom wall of the first through hole 131 and the side walls of the first through hole 131 .

Step 305 , please refer to FIG. 6 , forming a barrier layer 15 on the side of the second barrier layer 14 away from the GaN buffer layer 12 . The barrier layer 15 includes a third portion 150 and a fourth portion 151 . The third portion 150 covers the side of the second barrier layer 14 facing away from the GaN buffer layer 12 . The groove wall of the groove 145 includes a bottom wall 1451 and side walls 1453. The fourth portion 151 covers the side wall 1453 and part of the bottom wall 1451 of the trench 145 . The fourth part 151 includes a first connection part 1511 and a second connection part 1513. The first connection part 1511 covers the side wall 1453 of the trench 145. The second connection part 1513 covers the bottom wall 1451 of the trench 145, and the second through hole 152 is located on the second connection part 1513. The first connection part 1511 and the second connection part 1513 form a receiving cavity 154 . The fourth part 151 is bent in the groove 145 to form a receiving cavity 154 .

Step 307: Form a second through hole 152 and a connection hole 157 on the barrier layer 15. The second through hole 152 penetrates the fourth part 151 of the barrier layer 15, and the connection hole 157 penetrates the third part 150 of the barrier layer 15. In this embodiment, after the barrier layer 15 is etched, a second connection portion 1513 and a second through hole 152 penetrating through the fourth portion 151 are formed on the fourth portion 151 of the barrier layer 15 , and a penetrating barrier is formed on the third portion 150 Connection hole 157 of layer 15.

Step 309, please refer to FIG. 2. A first p-(Al)GaN portion 17 in contact with the second barrier layer 14 is formed in the second through hole 152, and a first p-(Al)GaN portion 17 is formed in the connection hole 157 in contact with the second barrier layer 14. The second p-(Al)GaN part 25. In this embodiment, a secondary epitaxial growth method is used to form a p-(Al)GaN layer on the side of the barrier layer 15 away from the second barrier layer 14 , and the p-(Al)GaN layer is etched using a dry etching method. Then, the first p-(Al)GaN part 17 and the second p-(Al)GaN part 25 are formed. The first p-(Al)GaN part 17 is received in the receiving cavity 154 and the second through hole 152. The end of the first p-(Al)GaN part 17 away from the GaN buffer layer 12 is exposed outside the receiving cavity 154, that is, the first p- The (Al)GaN portion 17 covers the bottom wall of the receiving cavity 154 and the side walls of the receiving cavity 154 . Since the barrier layer 15 is disposed on the second barrier layer 14, when the p-(Al)GaN layer is etched by dry etching, the barrier layer 15 effectively protects the second barrier layer 14 below the barrier layer 15, that is, the barrier layer 15 can be used as a stop layer when p-(Al)GaN layer is etched, reducing the possibility that the surface of the second barrier layer 14 on the side facing away from the GaN buffer layer 12 is damaged during the p-(Al)GaN etching process. .

Step 311 , forming the third through hole 153 and the fourth through hole 155 on the barrier layer 15 . In this embodiment, after the barrier layer 15 is etched, the third through hole 153 and the fourth through hole 155 penetrating the barrier layer 15 are formed on the barrier layer 15 .

Step 313: Form the gate electrode 19 on the side of the first p-(Al)GaN part 17 away from the second barrier layer 14, form the source electrode 21 in the third through hole 153, and form a drain electrode in the fourth through hole 155. On the electrode 23 , a hole injection electrode 29 is formed on the side of the second p-(Al)GaN part 21 away from the second barrier layer 14 .

Step 315 , connect the hole injection electrode 29 to the drain electrode 23 .

It can be understood that the order of some steps in the above preparation method is not limited. For example, step 311 can be performed simultaneously with step 307.

The power device 10 and its preparation method provided in this application can effectively reduce the p-(Al)GaN etching process of the second barrier layer 14 due to the formation of the barrier layer 15 on the side of the second barrier layer 14 away from the GaN buffer layer 12. The damage suffered during the etching process ensures that the second barrier layer 14 can maintain its original thickness and prevents holes from being injected into the second barrier layer from the first p-(Al)GaN portion 17 when the power device 10 is reversely conductive. 14, the reliability of the power device 10 is effectively improved, the process manufacturing groove of the power device 10 can also be improved, and the reliability of the power device 10 in soft switching and hard switching scenarios can also be improved.

It should be understood that expressions such as "comprises" and "may include" that may be used in this application indicate the presence of disclosed functions, operations, or constituent elements and do not limit one or more additional functions, Operations and components. In this application, terms such as "comprises" and/or "having" may be construed to mean specific characteristics, numbers, operations, constituent elements, parts, or combinations thereof, but shall not be construed to mean one or more other characteristics. The existence or possibility of addition of , number, operation, constituent elements, parts or their combination is excluded.

Furthermore, as used in this application, the expression "and/or" includes any and all combinations of the associated listed words. For example, the expression "A and/or B" may include A, may include B, or may include both A and B.

In this application, expressions including ordinal numbers such as "first" and "second" may modify each element. However, such elements are not limited by the above expression. For example, the above expressions do not limit the order and/or importance of the elements. The above expressions are only used to distinguish one element from other elements. For example, a first user equipment and a second user equipment indicate different user equipments, although both the first user equipment and the second user equipment are user equipments. Similarly, a first element may be termed a second element, and similarly a second element may be termed a first element, without departing from the scope of the application.

When a component is referred to as being "connected" or "connected" to another component, it will be understood that not only is the component directly connected or connected to the other component, but also that another component may be present between the component and the other component . On the other hand, when an element is referred to as being "directly connected" or "directly connected to" another element, it is understood that there are no intervening elements present.

The above are only specific embodiments of the present application, but the protection scope of the present application is not limited thereto. Any person familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application. should be covered by the protection scope of this application. Therefore, the protection scope of this application should be subject to the protection scope of the claims.

Claims (11)

1. A power device is characterized by comprising a GaN buffer layer, a first barrier layer, a second barrier layer, a first p- (Al) GaN part and a grid electrode,

the GaN buffer layer and the first barrier layer are stacked, and the first barrier layer is provided with a first through hole penetrating through the first barrier layer;

the second barrier layer comprises a first part and a second part, the first part covers one side of the first barrier layer, which is away from the GaN buffer layer, and the second part covers the bottom wall of the first through hole and the side wall of the first through hole;

the second part is bent in the first through hole and forms a groove;

the barrier layer comprises a third part and a fourth part, the third part covers one side of the second barrier layer, which is away from the GaN buffer layer, and the fourth part comprises a second through hole penetrating through the fourth part; the fourth part is in a bent shape in the groove, the fourth part of the barrier layer comprises a first connecting part and a second connecting part which are connected, the first connecting part covers the side wall of the groove, the second connecting part covers one end of the bottom wall of the groove close to the side wall of the groove, the second through hole is positioned on the second connecting part, the first connecting part extends along a first direction of stacking the first barrier layer and the GaN buffer layer, the second connecting part extends along a second direction different from the first direction, the first connecting part and the second connecting part enclose a containing cavity, the first p- (Al) GaN part fills the containing cavity,

the first p- (Al) GaN part comprises a first section, a second section and a third section which are connected and arranged along the first direction, the length of the first section in the second direction is larger than that of the second section in the second direction so as to form a first step, the length of the second section in the second direction is larger than that of the third section in the second direction so as to form a second step, the first section is positioned outside the accommodating cavity, the first step is connected with the third part, the second section is accommodated in the accommodating cavity, the third section is accommodated in the second through hole and is in contact with the second part of the second barrier layer, and the second step is connected with the second connecting part;

the grid electrode is arranged on one side of the first p- (Al) GaN part, which is away from the barrier layer;

the power device further comprises a second p- (Al) GaN part, a connecting hole penetrating through the third part is further formed in the barrier layer, the second p- (Al) GaN part is arranged in the connecting hole, and the second p- (Al) GaN part is in contact with the second barrier layer.

2. The power device of claim 1, wherein an end of the first p- (Al) GaN portion remote from the GaN buffer layer is exposed outside the receiving cavity.

3. The power device of claim 1, wherein the power device comprises a power source,

the third portion of the barrier layer includes a third via and a fourth via through the third portion,

the power device further includes a source and a drain,

the source electrode is arranged in the third through hole and is contacted with the first part of the second barrier layer,

the drain electrode is arranged in the fourth through hole and is in contact with the first part of the second barrier layer.

4. The power device of claim 3, wherein the power device comprises a power source,

the third part of the barrier layer is also provided with a connecting hole penetrating through the third part,

the power device further includes a second p- (Al) GaN portion and a hole injection electrode,

at least part of the second p- (Al) GaN part is accommodated in the connecting hole and is in contact with the first part of the second barrier layer, the hole injection electrode is arranged on one side of the second p- (Al) GaN part, which is away from the second barrier layer, and the hole injection electrode is connected with the drain electrode.

5. The power device of any one of claims 1-4, wherein the first barrier layer and the second barrier layer are made of the same material, and the first barrier layer is made of one of AlGaN and InAlN.

6. The power device of claim 1, wherein the barrier layer comprises one of silicon oxide, silicon nitride, aluminum oxide, aluminum nitride, aluminum oxynitride, silicon oxynitride.

7. An electronic device comprising the power device and the circuit board of any one of claims 1-6.

8. A method for preparing a power device is characterized by comprising the following steps,

providing a preform, wherein the preform comprises a GaN buffer layer and a first barrier layer which are stacked along a first direction, and the first barrier layer is provided with a first through hole penetrating through the first barrier layer;

forming a second barrier layer on one side of the first barrier layer, which is away from the GaN buffer layer, wherein the second barrier layer comprises a first part and a second part, the first part covers one side of the first barrier layer, which is away from the GaN buffer layer, the second part is accommodated in the first through hole and covers the first barrier layer, the second part is bent at the first through hole and forms a groove, and the second part covers the bottom wall of the first through hole and the side wall of the first through hole;

forming a blocking layer on one side of the second barrier layer, which is far away from the GaN buffer layer, wherein the blocking layer comprises a third part and a fourth part, the third part is covered on one side of the second barrier layer, which is far away from the GaN buffer layer, the fourth part is bent in the groove, the fourth part of the blocking layer comprises a first connecting part and a second connecting part which are connected, the first connecting part is covered on the side wall of the groove, the second connecting part is covered on one end, close to the side wall of the groove, of the bottom wall of the groove, the first connecting part and the second connecting part enclose a containing cavity, the first connecting part extends along a first direction of lamination of the first barrier layer and the GaN buffer layer, and the second connecting part extends along a second direction different from the first direction.

Forming a second through hole penetrating through the barrier layer on a fourth portion of the barrier layer, the second through hole being located on the second sub-connection portion;

forming a first p- (Al) GaN part in contact with a second part of the second barrier layer in the second through hole by adopting an epitaxial process growth method, wherein the first p- (Al) GaN part comprises a first section, a second section and a third section which are connected and arranged along the first direction, the length of the first section in the second direction is larger than that of the second section in the second direction so as to form a first step, the length of the second section in the second direction is larger than that of the third section in the second direction so as to form a second step, the first section is positioned outside the accommodating cavity, the first step is connected with the third part, the second section is accommodated in the accommodating cavity, the third section is accommodated in the second through hole and is in contact with the second part of the second barrier layer, and the second step is connected with the second connecting part;

forming a gate electrode on a side of the first p- (Al) GaN portion facing away from the barrier layer;

the barrier layer is also provided with a connecting hole penetrating through the third part of the barrier layer;

and forming a second p- (Al) GaN part in contact with the second barrier layer at the connecting hole by adopting an epitaxial process growth method.

9. The method according to claim 8, wherein,

and one end of the first p- (Al) GaN part far away from the GaN buffer layer is exposed out of the accommodating cavity.

10. The method of manufacturing as claimed in claim 8, further comprising forming third and fourth through holes through the barrier layer on the third portion of the barrier layer,

the method further comprises forming a gate electrode on one side of the first p- (Al) GaN part, which is away from the second barrier layer, and forming a source electrode in contact with the first part of the second barrier layer at the third through hole, and forming a drain electrode in contact with the first part of the second barrier layer at the fourth through hole.

11. The method of manufacturing according to claim 10, further comprising,

forming a hole injection electrode on one side of the second p- (Al) GaN part away from the second barrier layer;

and connecting the hole injection electrode with the drain electrode.