CN113672075A

CN113672075A - Peripheral management component, related device and method

Info

Publication number: CN113672075A
Application number: CN202110788976.XA
Authority: CN
Inventors: 江鹏; 李一帆; 王彤; 寇博华; 蒲宇; 王洁
Original assignee: Pingtouge Shanghai Semiconductor Co Ltd
Current assignee: Hangzhou C Sky Microsystems Co Ltd
Priority date: 2021-07-13
Filing date: 2021-07-13
Publication date: 2021-11-19

Abstract

The present disclosure provides a peripheral management component, related apparatus and method. The peripheral processing component is connected to the processing unit, and includes: a wake-up source management unit for determining a current wake-up frequency for the wake-up source in response to a current wake-up signal from the wake-up source; a power controller for according to the current wake-up frequency The current wake-up working voltage of the processing unit is determined, so that the processing unit operates at the current wake-up working voltage. The present disclosure optimizes the wake-up of the processing unit, so that the wake-up process of the processing unit avoids the technical problems of waste of power consumption and untimely response.

Description

Peripheral management component, related device and method

Technical Field

The present disclosure relates to the field of chips, and in particular, to a peripheral management component, a related apparatus and method.

Background

As integrated circuit processes continue to shrink in size, reducing the power consumption of processing units has become an important goal in processing unit development. Adaptive Voltage and Frequency Scaling (AVFS) and Dynamic Voltage and Frequency Scaling (DVFS) are two common methods for reducing power consumption of a processing unit.

In the AVFS/DVFS system, when the processing unit does not operate, the processing unit enters a low power consumption state under the action of power gating, and the processing unit in the state wakes up if receiving a wake-up signal of a wake-up source. In the related art, there are two main methods for waking up a processing unit: one is that the processing unit is operated in the highest performance mode each time it wakes up, and the other is that the processor wakes up at a low voltage and low frequency, and after waking up, adjusts the voltage and frequency according to the wake-up event, and finally processes the wake-up event based on the adjusted voltage and frequency.

However, although the former wake-up method ensures the strongest performance after the processing unit wakes up, and can process various wake-up events in time, the technical problem of power consumption waste exists; although the latter wake-up method realizes power consumption saving by starting in a low-frequency low-voltage mode, if the response requirement of the wake-up event is high, the technical problem of untimely response exists.

Disclosure of Invention

In view of the above, the present disclosure is directed to optimizing wake-up of a processing unit, and avoiding the technical problems of power consumption waste and untimely response during wake-up.

According to a first aspect of the present disclosure, there is provided a peripheral management component, the peripheral management component being connected to a processing unit, the peripheral management component comprising:

a wake-up source management unit for determining a current wake-up frequency for a wake-up source in response to a current wake-up signal from the wake-up source;

and the power controller is used for determining the current awakening working voltage of the processing unit according to the current awakening frequency so as to facilitate the processing unit to work at the current awakening working voltage.

Optionally, the peripheral management component further comprises:

and the power management circuit is used for receiving a voltage control signal generated by the power controller according to the current awakening working voltage and controlling the processing unit to work based on the voltage control signal.

Optionally, the peripheral management component further comprises:

and the voltage gating unit is used for receiving a power switch request sent by the power controller in response to the current wake-up frequency and switching on the power switch of the processing unit.

Optionally, the peripheral management component further comprises:

and the clock management unit is used for receiving the frequency control signal generated by the power controller according to the current wake-up frequency and generating the clock signal of the processing unit based on the frequency control signal.

Optionally, the power controller stores a previous wake-up frequency determined by the wake-up source management unit for a previous wake-up signal and a previous wake-up operating voltage determined by the power controller for the previous wake-up frequency, and the power controller is configured to determine a current wake-up operating voltage of the processing unit according to the current wake-up frequency when the current wake-up frequency is inconsistent with the previous wake-up frequency.

Optionally, the power controller is further configured to use the previous wake-up operating voltage as the current wake-up operating voltage when the current wake-up frequency is consistent with the previous wake-up frequency.

Optionally, the power controller stores a previous wake-up frequency determined by the wake-up source management unit for a previous wake-up signal and a previous wake-up operating voltage determined by the power controller for the previous wake-up frequency when a previous wake-up operating voltage is determined, and predicts the wake-up frequency and the wake-up operating voltage according to the stored previous wake-up frequency and the previous wake-up operating voltage, respectively;

and the power controller is used for determining the current awakening working voltage of the processing unit according to the current awakening frequency when the current awakening frequency is inconsistent with the predicted awakening frequency.

Optionally, the power controller is further configured to use the predicted wake-up operating voltage as the current wake-up operating voltage when the current wake-up frequency is consistent with the predicted wake-up frequency.

Optionally, the processing units are multiple processing units, the current wake-up signal further indicates a target processing unit, the wake-up source management unit determines a current wake-up frequency of the target processing unit based on the wake-up source, and the power controller determines a current wake-up operating voltage of the target processing unit according to the current wake-up frequency, so that the target processing unit operates at the current wake-up operating voltage.

Optionally, each of the plurality of processing units is coupled with a sensor for sensing sensed data of the corresponding processing unit; the current wake-up operating voltage of the target processing unit is determined according to the sensing data of the target processing unit, besides the current wake-up frequency of the target processing unit.

According to a second aspect of the present disclosure, there is provided a system on chip comprising:

any of the peripheral management components described above;

the processing unit;

an on-chip bus for coupling the processing unit and the peripheral management component.

According to a third aspect of the present disclosure, there is provided an internet of things device, including any one of the peripheral management components described above and the processing unit.

According to a fourth aspect of the present disclosure, there is provided a processing unit wake-up method, comprising:

determining a current wake-up frequency for a wake-up source in response to a current wake-up signal from the wake-up source;

determining the current awakening working voltage of the processing unit according to the current awakening frequency;

and awakening the processing unit to work at the current awakening working voltage.

Optionally, the waking up the processing unit to operate at the current wake-up operating voltage includes:

turning on a power switch of the processing unit, thereby waking up the processing unit;

and controlling the processing unit to work at the current awakening working voltage according to a voltage control signal generated by the current awakening working voltage through a power management circuit.

Optionally, before determining a current wake-up frequency for the wake-up source in response to a current wake-up signal from the wake-up source, the processing unit wake-up method further comprises:

storing a previous wake-up frequency and a previous wake-up operating voltage determined for a previous wake-up signal received;

wherein the determining of the current wake-up operating voltage of the processing unit according to the current wake-up frequency is made if the current wake-up frequency is not consistent with the previous wake-up frequency.

storing a previous wake-up frequency and a previous wake-up operating voltage determined for a previous wake-up signal when the previous wake-up operating voltage is determined;

respectively predicting the awakening frequency and the awakening working voltage according to the stored previous awakening frequency and previous awakening working voltage;

wherein the determining a current wake-up operating voltage of the processing unit from the current wake-up frequency is made if the current wake-up frequency is not consistent with a predicted wake-up frequency.

In the embodiment of the disclosure, a wake-up source management unit determines a current wake-up frequency for a wake-up source; the power controller determines the current wake-up working voltage of the processing unit according to the current wake-up frequency, so that the current wake-up frequency and the current wake-up working voltage are pertinently matched with the wake-up source, thus under the condition that the processing unit works at the current wake-up working voltage, the response requirement of the wake-up source can be timely met without waiting for a period of time, the power consumption is not wasted when the processing unit operates at the working voltage, namely, the wake-up of the processing unit is optimized, and the technical problems of power consumption waste and untimely response in the wake-up process are effectively avoided.

Drawings

The foregoing and other objects, features, and advantages of the disclosure will be apparent from the following description of embodiments of the disclosure, which refers to the accompanying drawings in which:

fig. 1 is a system architecture diagram of the internet of things (IoT) to which one embodiment of the present disclosure is applied;

fig. 2 is another system architecture diagram of the internet of things to which an embodiment of the present disclosure is applied;

fig. 3 is a block diagram of an internet of things device of one embodiment of the present disclosure;

FIG. 4 is a block diagram of an Internet of things processor of one embodiment of the present disclosure;

FIG. 5 is a block diagram of a system-on-chip of one embodiment of the present disclosure;

FIG. 6 is an internal block diagram of a peripheral management component of one embodiment of the present disclosure;

FIG. 7 is a block diagram of a system on a chip of another embodiment of the present disclosure;

FIG. 8 is a flow chart of a processing unit wake-up method according to one embodiment of the present disclosure.

Detailed Description

The present disclosure is described below based on examples, but the present disclosure is not limited to only these examples. In the following detailed description of the present disclosure, some specific details are set forth in detail. It will be apparent to those skilled in the art that the present disclosure may be practiced without these specific details. Well-known methods, procedures, and procedures have not been described in detail so as not to obscure the present disclosure. The figures are not necessarily drawn to scale.

The following terms are used herein.

Dynamic voltage frequency regulation: the English is called Dynamic Voltage and Frequency Scaling, DVFS for short. DVFS uses an open loop system where the chip vendor will determine the operating voltage for different target applications and operating frequencies, but does not calibrate to any particular chip. Since the chip operating temperature affects its voltage requirements, the chip supplier does not know at what degrees celsius the supplied chip will operate, and therefore adjusts the computational model of the operating voltage, which also makes the power consumption of the system in actual operation about 10-20% of the actual required power consumption.

Adaptive voltage frequency adjustment: the English is called Adaptive Voltage Frequency Scaling, AVFS for short. AVFS uses a closed loop system that manages the voltage through on-chip hardware mechanisms, i.e., adjusts the operating voltage based on sensed data such as temperature and frequency measured in real time. This approach avoids wasted power consumption by removing the protective voltage range needed in DVFS.

Power gating: the English is called power gating. The most basic idea of power gating is to provide two power modes for a circuit, namely a low power consumption mode and an active mode; the purpose is to switch between the two modes in a proper way at a proper time, so that the power consumption is saved to the maximum extent, and meanwhile, the influence on the performance of other modules in the system is reduced to the maximum extent. The processing unit may be in sleep mode for a long time, which is well suited to use power gating techniques. When the processing unit does not work, the power gating enables the processing unit to be dormant and enter a low power consumption mode, so that a large amount of power consumption leakage can be avoided; when the processing unit receives a wake-up signal from a wake-up source, the power gating causes the processing unit to switch to an active mode, which processes the wake-up event.

Application environment of the present disclosure

The disclosed embodiments provide a universal peripheral management component that is adaptable to a variety of processing units. The peripheral management component is used for determining the wake-up working voltage of the processing unit, and the whole wake-up scheme executed by the processing unit is relatively universal. It may be present separately from the processing unit, i.e. it may be a separate device which, after being mounted to the device or system-on-chip, is intended to be used in conjunction with the processing unit on the device or system-on-chip. The peripheral management component may be used for various hardware devices provided with a processing unit, such as IoT (internet of things) devices, embedded devices, and the like. The peripheral management component is independent of the hardware on which the processing unit is ultimately deployed. For exemplary description, however, the following description mainly refers to the internet of things as an application scenario. Those skilled in the art will appreciate that the disclosed embodiments are also applicable to other application scenarios.

Whole framework of thing networking

Fig. 1 is a system architecture diagram of an internet of things (IoT)100 to which an embodiment of the present disclosure is applied.

The cloud 110 may represent the internet, or may be a Local Area Network (LAN), or a Wide Area Network (WAN), such as a company's private network. IoT devices may include any number of different types of devices grouped in various combinations. For example, the traffic control group 206 may include IoT devices along streets in a city. These IoT devices may include traffic lights, traffic flow monitors, cameras, weather sensors, and the like. Each IoT device in the traffic control group 206 or other subgroup may communicate with the cloud 110 over a wireless link 208, such as an LPWA link or the like. Further, the wired or wireless subnetwork 212 can allow IoT devices to communicate with each other, such as over a local area network, wireless local area network, and so forth. The IoT device may use another device, such as the gateway 210, to communicate with the cloud 110.

Other groupings of IoT devices may include remote weather stations 214, local information terminals 216, alarm systems 218, automated teller machines 220, alarm panels 222, or mobile vehicles, such as emergency vehicles 224 or other vehicles 226, and the like. Each of these IoT devices may communicate with other IoT devices, with the server 140, or both.

As can be seen from fig. 1, a large number of IoT devices may communicate through the cloud 110. This may allow different IoT devices to autonomously request or provide information to other devices. For example, the traffic control group 206 may request a current weather forecast from a group of remote weather stations 214, which may provide the forecast without human intervention. Further, the emergency vehicle 224 may be alerted by the automated teller machine 220 that a theft is occurring. As the emergency vehicle 224 proceeds toward the automated teller machine 220, it may access the traffic control group 206 to request permission to reach the location, for example, by turning a light red to block cross traffic at the intersection for sufficient time to allow the emergency vehicle 224 to enter the intersection unimpeded.

An IoT device cluster, such as the remote weather station 214 or the traffic control group 206, may be equipped to communicate with other IoT devices and with the cloud 110. This may allow IoT devices to form an ad-hoc network between devices, allowing them to act as a single device, which may be referred to as a fog device. The mist device is further discussed below with respect to fig. 2.

In fig. 2, the cluster of IoT devices enclosed by the dashed line may be referred to as a fog device 302, operating at the edge of the cloud 110. As used herein, a fog device 302 is a cluster of devices that may be grouped for performing a particular function, such as traffic control, weather control, plant control, and the like.

In this example, the fog device 302 includes a set of IoT devices at a traffic intersection. The mist device 302 may be established according to specifications published by the OpenFog consortium (OFC) or the like. These specifications allow a hierarchy of computing elements to be formed between the gateway 210 that couples the fog device 302 to the cloud 110 and to end point devices, such as the traffic light 304 and the data aggregator 306 in this example. The mist device 302 may utilize the combined processing and network resources provided by the set of IoT devices. Thus, the fog device 302 may be used for any number of applications including, for example, financial modeling, weather forecasting, traffic analysis, and the like.

For example, the flow of traffic through an intersection may be controlled by a plurality of traffic lights 304 (e.g., three traffic lights 304). Analysis of traffic flow and control schemes may be performed by the aggregator 306 communicating with the traffic lights 304 and each other through a mesh network. Data may be uploaded to the cloud 110 through the gateway 210. The gateway 210 receives commands from the cloud 110. The gateway 210 communicates with traffic lights 304 and an aggregator 306 over a mesh network.

Any number of communication links may be used in the mist device 302. For example, an IEEE 802.15.4 compatible short range link 308 may provide local communication between IoT devices near an intersection. For example, a longer range link 310 compatible with LPWA standards may provide communication between IoT devices and the gateway 210. To simplify the figure, not every communication link 308 or 310 is labeled with a reference numeral.

The mist device 302 may be considered a large-scale interconnection network, in which multiple IoT devices communicate with each other, for example, over

communication links

308 and 310. The network may be established using the Open interconnection association (OIC) standard specification 1.0 published by the Open Connectivity Foundation (OCF) on 23/12/2015. This standard allows devices to discover each other and establish interconnect communications. Other interconnection protocols may also be used, including, for example, the AllJoyn protocol from the allsen alliance, the Optimized Link State Routing (OLSR) protocol, or better methods for mobile ad hoc networking (b.a.t.m.a.n.), etc.

In some aspects, communications from one IoT device may pass along the most convenient path to reach the gateway 210, e.g., the path with the least number of intermediate hops or the highest bandwidth, etc. In these networks, the number of interconnections provides a great deal of redundancy, allowing communications to be maintained even if many IoT devices are lost.

In some aspects, the mist device 302 may comprise a temporary IoT device. In other words, not all IoT devices may be permanent members of the mist device 302. For example, in fig. 2, three transient IoT devices have joined the mist device 302 as follows: a first vehicle 312, a second vehicle 314, and a pedestrian 316. In these cases, the IoT devices may be built into the vehicles 312 and 314, or may be applications on smartphones carried by the pedestrians 316. Other IoT devices may also be present, such as those in a cycle computer, motorcycle computer, drone, and the like.

The fog device 302 formed by the IoT devices may communicate with clients through the cloud 110, for example, with the server 140 as a single device located at the edge of the cloud 110. In this example, control communication to a particular resource in the mist device 302 may occur without identifying any particular IoT device within the mist device 302. Thus, if one IoT device within the mist device 302 fails, other IoT devices in the mist device 302 may be able to discover and control resources, such as actuators or other devices attached to the IoT device. For example, the traffic lights 304 may be wired to allow any one traffic light 304 to control the lights of the other traffic lights 304. The aggregator 306 may also provide redundancy in other functions of the fog device 302 under the control of the traffic light 304.

In some examples, the IoT devices may be configured using an imperative programming style, e.g., each having a particular function and communication partner. However, the IoT devices that form the mist device 302 may be configured in a declarative programming style in order to allow the IoT devices to reconfigure their operations and communications, such as to determine required resources in response to conditions, queries, and device failures. This may be performed when a transient IoT device, such as a pedestrian 316, joins the fog device 302.

Since the pedestrian 316 may travel slower than the vehicles 312 and 314, the fog device 302 may reconfigure itself to ensure that the pedestrian 316 has sufficient time to pass through the intersection. This may be performed by forming a temporary group of vehicles 312 and 314 and pedestrians 316 to control the traffic lights 304. If one or both of the vehicles 312 or 314 are autonomous, the temporary group may direct the vehicle to slow down before the traffic light 304. Further, if all vehicles at an intersection are autonomous, the need for traffic signals may be reduced, as the collision avoidance system of the autonomous vehicles may allow for a highly intersecting traffic pattern, which may be too complex for traffic lights to manage. However, the traffic light 304 may still be important to the pedestrian 316, the rider, or the involuntary vehicle.

When the

transient devices

312, 314, and 316 leave the vicinity of the intersection of the fog device 302, the fog device 302 may reconfigure itself to eliminate those IoT devices from the network. When other transient IoT devices approach the intersection, the fog device 302 may reconfigure itself to include those devices.

The fog device 302 may include traffic lights 304 for multiple intersections, such as along streets, as well as all transient IoT devices along streets. The fog device 302 may then divide itself into functional units, such as traffic lights 304 and other IoT devices near a single intersection. This type of combination may enable larger IoT configurations to be formed in the mist device 302, e.g., groups of IoT devices that perform specific functions.

For example, if an emergency vehicle joins the fog device 302, an emergency build or virtual device may be created that includes all of the traffic lights 304 of a street, allowing control of the traffic flow pattern throughout the street. The emergency configuration may direct traffic lights 304 along the street to remain red for reverse traffic and green for emergency vehicles to accelerate passage of emergency vehicles.

As shown by the fog device 302, the organic evolution of the IoT network is central to improving or maximizing the utility, usability, and resilience of IoT implementations. Further, the examples demonstrate the usefulness of policies for improving confidence and thus security. Local identification of devices may be important in embodiments because decentralization of identities ensures that a central authority cannot be leveraged to allow impersonation of objects that may exist within an IoT network. Further, local identification reduces communication overhead and latency.

Blockchains may be used for decentralized identification as they may provide a protocol between devices regarding the name and identity currently in use. As used herein, a blockchain is a distributed database of identity records that is made up of blocks of data structures. Further, as used herein, a clause blockchain may include any one or more of the other distributed ledger systems. Other distributed ledger methods include rayleigh (Ripple), super ledger, multi-chain, keyless signing infrastructure, etc. Each data structure block is based on a transaction, where the new name of the issuing device, the compound device, or the virtual device is one example of a transaction.

Using blockchains for identification, impersonation can be detected by observing the re-issuance of names and identities without a corresponding termination. Common blockchains may be most useful because they may enable different groups of watchers to detect misnaming, malicious naming, or naming infrastructure failures.

Internet of things device

Fig. 3 is a block diagram of an internet of things device 400 according to an embodiment of the disclosure, which may be an internet of things device in the traffic control group 206 of fig. 1, an internet of things device in the remote weather station 214, the local information terminal 216, the alarm system 218, the automated teller machine 220, the alarm panel 222, the emergency vehicle 224, or the other vehicle 226, an internet of things device in the traffic light 304 and the data aggregator 306 of fig. 2, or an internet of things device related to the first vehicle 312, the second vehicle 314, and the pedestrian 316.

The internet of things device 400 may include an internet of things processor 402, which may be a microprocessor, a multi-core processor, a multi-threaded processor, an ultra-low voltage processor, an embedded processor, or other known processing element. The processor 402 may be part of a system on a chip (SoC) in which the processor 402 and other components are formed as a single integrated circuit or a single package, such as an edison (tm) or galileo (tm) SoC board from Intel. As an example, processor 402 may include an architecture core TM based processor, such as a Quark, AtomTM, i3, i5, i7, or MCU grade processor, or another such processor available from companies in Santa Clara, Calif. However, any number of other processors may be used, such as MIPS-based designs available from MIPS technologies, inc. of sunnyvale, california, an ARM-based design licensed by ARM holdings, inc. The processor may include units such as an A5-A9 processor from Inc., a Snapdagon processor from science and technology, Inc., or an OMAPTM processor from Texas instruments, Inc.

The processor 402 may communicate with a system memory 404 via a bus 406. Any number of memory devices may be used as the quantitative system memory 404. As an example, memory 404 may be a Random Access Memory (RAM) based on a Low Power Double Data Rate (LPDDR) design of Joint Electronic Device Engineering Council (JEDEC), such as the current LPDDR2 standard (published in 2009 on 4 months) according to EDEC JESD 209-2E, or a next generation LPDDR standard, such as LPDDR3 or LPDDR4 that would provide an extension of LPDDR2 to increase bandwidth. In various embodiments, the various memory devices may be any number of different package types, such as a Single Die Package (SDP), a Dual Die Package (DDP), or a quad die package (Q17P). In some embodiments, these devices may be soldered directly to the motherboard to provide a lower profile solution, while in other embodiments, these devices are configured as one or more memory modules, which in turn are coupled to the motherboard by a given connector. Any number of other memory implementations may be used, such as other types of memory modules, for example, different kinds of dual in-line memory modules (DIMMs), including but not limited to icroDIMM or MiniDIMM. For example, the memory may be between 2GB and 16GB in size and may be configured as a DR3LM package or LPDDR2 or LPDDR3 memory that is soldered to a motherboard by a Ball Grid Array (BGA).

To provide persistent storage of information such as data, applications, operating system, etc., a mass storage device 408 may also be coupled to the processor 402 via the bus 406. To achieve a thinner and lighter system design, the mass storage device 408 may be implemented by a Solid State Drive (SSD). Other devices that may be used for mass storage device 408 include flash memory cards, such as SD cards, microsD cards, xD graphics cards, and the like, as well as USB flash drives.

In a low power implementation, the mass storage device 408 may be an on-die memory or a register associated with the processor 402. However, in some examples, mass storage device 408 may be implemented using a micro Hard Disk Drive (HDD). Further, any number of new technologies may be used for the mass storage device 408 in addition to or in place of the described technologies, such as resistance change memory, phase change memory, holographic memory, or chemical memory, among others. For example, IoT device 400 may include 3D XPOINT memory from and.

The components may communicate over a bus 406. The bus 406 may include any number of technologies, including Industry Standard Architecture (ISA), extended ISA (eisa), Peripheral Component Interconnect (PCI), peripheral component interconnect extended (PCI x), PCI Express (PCIe), or any number of other technologies. Bus 406 may be a proprietary bus such as used in SoC-based systems. Other bus systems may be included, such as an I2C interface, an I3C interface, an SPI interface, a point-to-point interface, a power bus, and so forth.

The bus 406 may couple the processor 402 to a mesh transceiver 410 for communicating with other mesh/mist devices 302. Mesh transceiver 410 may use any number of frequencies and protocols, such as 2.4 gigahertz (GHz) transmission under the IEEE 802.15.4 standard, using a low power consumption (BLE) standard defined by the special interest group, or the like. Any number of radios configured for a particular wireless communication protocol may be used for the connection to the mesh/fog device 302. For example, the WLAN unit may be used to implement Wi-FiTM communications in accordance with the Institute of Electrical and Electronics Engineers (IEEE)802.11 standard. Additionally, for example, wireless wide area communication according to a cellular or other wireless wide area protocol may occur via a WWAN unit.

The mesh transceiver 410 may communicate using multiple standards or radios for different ranges of communication. For example, the internet of things device 400 may communicate with geographically nearby devices (e.g., within about 10 meters) using a BLE-based local transceiver or another low-power radio to conserve power. The further mesh/fog device 302 may be reached by ZigBee or other intermediate power radio, for example, within about 50 meters. The two communication techniques may occur at different power levels on a single radio or may occur on separate transceivers (e.g., a local transceiver using BLE and a separate mesh transceiver using ZigBee). Mesh transceiver/fog device 302 may be incorporated into the MCU as an address directly accessible by the chip.

An uplink transceiver 414 may be included to communicate with cloud 110. The uplink transceiver 414 may be an LPWA transceiver compliant with IEEE 802.15.4, IEEE 802.15.4g, IEEE 802.15.4e, IEEE 802.15.4k, or NB-IoT standards, among others. The internet of things device 400 can communicate over a wide area using LoRaWANTM (long distance wide area network) developed by Semtech and LoRa alliance. The techniques described herein are not limited to these techniques, but may be used with any number of other cloud transceivers implementing long-range, low-bandwidth communications, such as Sigfox and other techniques. Further, other communication techniques described in the IEEE 802.15.4e specification, such as time slot channel hopping, may be used.

In addition to the systems mentioned for mesh transceiver 410 and uplink transceiver 414, any number of other radio communications and protocols may be used, as described herein. For example, the

radio transceivers

410 and 414 may include LTE or other cellular transceivers that use spread spectrum (SPA/SAS) communications to implement high speed communications, such as for video transmission. Further, any number of other protocols may be used, such as a network for medium speed communications, such as still pictures, sensor readings, and the provision of network communications.

The

radio transceivers

410 and 414 may include radios compatible with any number of 3GPP (third generation partnership project) specifications, particularly Long Term Evolution (LTE), long term evolution-advanced (LTE-a), long term evolution-advanced professional (LTE-a Pro), or narrowband IoT (NB-IoT), among others. It may be noted that radios may be selected that are compatible with any number of other fixed, mobile, or satellite communication technologies and standards. These may include, for example, any cellular wide area radio communication technology, which may include, for example, a fifth generation (5G) communication system, a global system for mobile communications (GSM) radio communication technology, a General Packet Radio Service (GPRS) radio communication technology, or an enhanced data rates for GSM evolution (EDGE) radio communication technology. Other third generation partnership project (3GPP) radio communication technologies that may be used include UMTS (universal mobile telecommunications system), FOMA (free mobile multimedia access), 3GPP LTE (long term evolution), 3GPP LTE-advanced (long term evolution-advanced), 3GPP LTE-advanced professional (long term evolution-advanced), CDMA2000 (code division multiple access 2000), CDPD (cellular digital packet data), Mobitex, 3G (third generation), CSD (circuit switched data), HSCSD (high speed circuit switched data), UMTS (3G) (universal mobile telecommunications system (third generation)), W-CDMA (UMTS) (wideband code division multiple access (universal mobile telecommunications system)), HSPA (high speed packet access), HSDPA (high speed downlink packet access), HSUPA (high speed uplink packet access), HSPA + (high speed packet access Plus) ("HSUPA UMTS-TDD (Universal Mobile Telecommunications System-time division Duplex), TD-CDMA (time division-code division multiple Access), TD-SCDMA (time division-synchronous code division multiple Access), 3GPP Rel. 8(Pre-4G) (3 rd generation partnership project release 8(Pre-4 th generation)), 3GPP Rel. 9 (third generation partnership project release 9), 3GPP Rel. 10 (third generation partnership project release 10), 3GPP Rel. 11 (third generation partnership project release 11), 3GPP Rel. 12 (third generation partnership project release 12), 3GPP Rel. 13 (third generation partnership project release 13), 3GPP Rel. 14 (third generation partnership project release 14), 3GPP LTE Extra, LTE Licensed Assisted Access (LAA), UTRA (UMTS terrestrial radio access), E-UTRA (evolved UMTS terrestrial radio access), LTE advanced (4G) (long term evolution-advanced (4 th generation)), cdmaOne (2G), CDMA2000(3G) (code division multiple access 2000 (third generation)), EV-DO (evolution-data optimized or evolution-data only), AMPS (1G) (advanced mobile phone system (1 st generation)), TACS/ETACS (total access communication system/extended total access communication system), dacs (2G) (digital AMPS (2 nd generation)), PTT (push-to-talk), MTS (mobile phone system), IMTS (enhanced mobile phone system), AMTS (advanced mobile phone system), OLT (norwegian "ofviable LTE bundled mobile terminal), public land mobile phone), MTD (abbreviation of mobile phone system D in sweden, or mobile phone system D), Autotel/PALM (public automatic land mobile), ARP (acronym of "autoadopuhein", "car radio telephone"), NMT (nordic mobile phone), Hicap (high capacity version of NTT (japan telegraph telephone company), CDPD (cellular digital packet data), Mobitex, DataTAC, iDEN (integrated digital enhanced network), PDC (personal digital cellular), CSD (circuit switched data), PHS (personal handyphone system), WiDEN (broadband integrated digital enhanced network), iBurst, unlicensed mobile access (UMA, also known as 3GPP universal access network, or GAN standard), wireless gigabit (WiGig) standard, general waveve standard (wireless systems operate at 10-90GHz and above, such as gig, IEEE 802.11ad, IEEE 802.11, etc.). In addition to the standards listed above, any number of satellite uplink technologies may be used for the uplink transceiver 1014, including, for example, radios conforming to standards promulgated by the ITU (international telecommunications union) or ETSI (european telecommunications standards institute), among others. Accordingly, the examples provided herein are understood to apply to various other communication technologies that are existing and that have not yet been explicitly expressed.

A Network Interface Controller (NIC)416 may be included to provide wired communications to the cloud 110 or other devices, such as mesh device 302. The wired communication may provide an ethernet connection, or may be based on other types of networks, such as a Controller Area Network (CAN), a Local Interconnect Network (LIN), a device network (DeviceNet), a control network (ControlNet), a data highway, a process field bus (PROFIBUS) or process field network (PROFINET), and so forth. Additional NICs 416 may be included to allow connection to a second network, such as a NIC416 that provides communication to the cloud over ethernet, and a second NIC416 that provides communication to other devices over another type of network.

The bus 406 may couple the processor 402 to an interface 418 for connecting external devices. The external devices may include peripheral sensors 420 such as accelerometers, level sensors, flow sensors, temperature sensors, pressure sensors, barometric pressure sensors, and the like. The interface 418 may be used to connect the internet of things device 400 to an actuator 422, such as a power switch, valve actuator, audible sound generator, visual warning device, or the like.

The internet of things device 400 often needs to be timed and counted to generate some action when a certain time or a certain number of events are accumulated. For example, the internet of things device 400 of the remote weather station 214 needs to detect the temperature of the surrounding environment through the peripheral sensors 420 every fixed time period to perform weather data analysis according to the detected temperature. The timer/counter 501 is a unit for counting time. A Timer (Timer) provides several different time bases (TimeBase) from an externally added oscillator crystal through a frequency divider circuit. The Counter (Event Counter) is dedicated to counting external events, possibly in the form of pulses or other types, and can be used to generate the correct time delay.

Although not shown, various input/output (I/O) devices may be present within the internet of things device 400 or connected to the internet of things device 400. For example, a display may be included to show information such as sensor readings or actuator positions. An input device such as a touch screen or keypad may be included to accept input.

The battery 424 may power the internet of things device 400, but in examples where the internet of things device 400 is installed in a fixed location, it may have a power source coupled to the power grid. The battery 424 may be a lithium ion battery, a metal-air battery, such as a zinc-air battery, an aluminum-air battery, a lithium-air battery, a hybrid supercapacitor, or the like.

A battery monitor/charger 426 may be included in the internet of things device 400 to track the state of charge (SoCh) of the battery 424. The battery monitor/charger 426 may be used to monitor other parameters of the battery 424 to provide fault prediction, such as the state of health (SoH) and the functional state (SoF) of the battery 424. The battery monitor/charger 426 may include a battery monitoring integrated circuit. The battery monitor/charger 426 may communicate information about the battery 424 to the processor 402 via the bus 406. The battery monitor/charger 426 may also include an analog-to-digital (ADC) converter that allows the processor 402 to directly monitor the voltage of the battery 426 or the current from the battery 424.

The battery parameters may be used to determine actions that the internet of things device 400 may perform, such as transmission frequency, mesh network operation, sensing frequency, and the like.

A power supply block 428 or other power source coupled to the power grid may be coupled with the battery monitor/charger 426 to charge the battery 424. In some examples, the power block 428 may be replaced with a wireless power receiver to obtain power wirelessly, for example, through a loop antenna in the internet of things device 400. Wireless battery charging circuitry may be included in the battery monitor/charger 426. The particular charging circuit selected depends on the size of the battery 424 and, therefore, the current required. The charging may be performed using the Airfuel standard promulgated by the Airfuel Consortium, the Qi Wireless charging standard promulgated by the Wireless Power Consortium, or the Rezence charging standard promulgated by the Wireless Power Consortium, or the like. In some examples, the power block 428 may be augmented or replaced with a solar panel, wind generator, water generator, or other natural power system.

Fig. 4 is a block diagram of an internet of things processor 402 according to one embodiment of the disclosure. Since the internet of things processor 402 may be a microprocessor, a multi-core processor, a multi-threaded processor, an ultra low voltage processor, an embedded processor, or other known processing elements, fig. 4 illustrates a block diagram of the internet of things processor 402, with the microprocessor being merely an example.

The program storage ROM (read only memory) 504 is a read-only and non-writable memory in the internet-of-things processor 402, and is mainly used to store the programs developed by users, and its nature belongs to data that is not changed or changed. The operations of the internet of things processor 402 operate according to program instructions stored in this area. Unlike a typical CPU executing a wide variety of instructions, the microcontroller 402 typically executes only programs that are fixedly developed by the user (e.g., in the case of the internet of things device 400 of the remote weather station 214, detecting the temperature of the surrounding environment and performing weather data analysis based on the detected temperature, and receiving an acquisition request for the current weather forecast for the traffic control group 206 and transmitting the current weather forecast to the traffic control group 206 in response to the acquisition request), with little regard to other programs.

Register file 506 may include a plurality of registers, which may be of different types, for storing different types of data and/or instructions. For example, register file 506 may include: integer registers, floating point registers, status registers, instruction registers, pointer registers, and the like. The registers in the register file 506 may be implemented by general purpose registers, or may be designed specifically according to the actual requirements of the processor 402.

An Arithmetic Logic Unit (ALU)507 is used to execute a sequence of instructions (i.e., a program). The process of executing each instruction by the arithmetic logic unit 507 includes: the instruction is fetched from the program storage ROM504 storing instructions via the bus 503, decoded, executed, and the instruction execution result and the like are stored in the result accumulator 508, and this is circulated until all the instructions in the instruction sequence are executed or a halt instruction is encountered, and the execution result can be output to the input/output port 509.

Specifically, the arithmetic logic unit 507 transfers instructions from the program storage ROM504 to the instruction register in the register file 506 via the bus 503, and receives or calculates a next fetch address according to a fetch algorithm, which includes, for example: the address is incremented or decremented according to the instruction length. The arithmetic logic unit 507 then decodes the fetched instruction according to a predetermined instruction format to obtain operand fetch information required by the fetched instruction. The operand fetch information points to, for example, operands stored in a Random Access Memory (RAM) 505. The arithmetic logic unit 507 acquires operands in the RAM 505 via the bus 503, and performs arithmetic operations. The result of the execution of the operation is written in the result accumulator 508 and is output through the input/output port 509 as appropriate.

The interrupt generator 502 is a unit for generating an interrupt in the internet of things device 400, and is used to process an immediate event or an event that is prioritized, and is responsible for operations such as timeout interrupt and generation of an interrupt request based on an external event. The interrupt processing system of most microcontrollers is multi-layer, and an interrupt priority circuit is arranged in the interrupt processing system to determine the sequence. This is often the case when the internet of things processor 402 is in a low power state at all times and is awakened by an applied signal (i.e., the current low power state of the internet of things processor 402 is interrupted), where the applied signal originates either from an event that requires immediate processing (sensor, switch, alarm, power failure alarm) or from an event that requires a fixed interval duration to process (Display, Key Scan, Read-Time Clock). In the following description, an event from which an applied signal originates is referred to as a wake-up event, and the event is to be processed after the internet-of-things processor 402 is woken up; the above-mentioned applied signal is called a wake-up signal, and the transmitting device of the applied signal is called a wake-up source.

In the internet of things apparatus 400, the wake-up process of the internet of things processor 402 is often involved. The internet of things device 400 of the remote weather station 214 is illustrated, assuming the internet of things processor 402 is in a low power state: (1) if the timer/counter 412 determines that the time from the current time to the last detected ambient temperature reaches a preset time, a wake-up signal is sent to an interrupt generator 502 in the internet of things processor 402 through the bus 406 to wake up the internet of things processor 402, and the related control operation of the current detected ambient temperature can be executed after the internet of things processor 402 is woken up, wherein the timer/counter 412 is the wake-up source; (2) if the traffic control group 206 sends an acquisition request of the current weather forecast to the internet of things device 400 of the remote weather station 214 through the cloud 110, the acquisition request is transmitted to the interrupt generator 502 in the internet of things processor 402 through the uplink transceiver 414 and the bus 406 of the internet of things device 400, then the internet of things processor 402 wakes up, and the internet of things processor 402 can perform relevant operations responding to the acquisition request after waking up, including reading data of the current weather forecast from the mass storage device 408 and sending the read data to the traffic control group 206 through the bus 406 and the uplink transceiver 414, where the acquisition request is a wake-up signal and the traffic control group 206 is a wake-up source. It should be noted here that the wake-up source may be a device inside the internet of things apparatus 400, or may be a device outside the internet of things apparatus 400.

Although the program storage ROM504 only stores the program developed by the user, it is often not just the processing program of an event (as described in the above example), so that the interrupt generator 502 can determine which processing programs in the program storage ROM504 need to be executed by the arithmetic logic unit 507 by sending the wake-up source of the wake-up signal after receiving the wake-up signal, that is, the interrupt generator 502 controls the execution of the arithmetic logic unit 507 based on the wake-up source.

It should be appreciated that the internet of things processor 402, in a low power state, may switch to an active mode only upon receiving a current wake-up signal from a wake-up source, thereby handling the wake-up event. After the internet of things processor 402 wakes up from the low power consumption state, if the operating frequency of the internet of things processor 402 just meets the processing requirement of the wake-up event and the operating voltage of the internet of things processor 402 just can maintain the operating frequency of the internet of things processor 402, the internet of things processor 402 can not only consume power but also process the wake-up event in time, and therefore the internet of things device 400 shown in fig. 3 is provided with the peripheral management component 630. The peripheral management component 630 is used to determine the operating frequency (also referred to as wake-up frequency) and the operating voltage (also referred to as wake-up operating voltage) of the internet of things processor 402 after wake-up, and since the peripheral management component 630 is a part of the main improvement of the embodiment of the present disclosure, each of the specific components included therein will be described in detail below.

It should be noted that, corresponding to the above steps of executing the instruction sequence by the Arithmetic Logic Unit (ALU)507, the operation frequency of the internet-of-things processor 402 may be regarded as the frequency of executing the instruction sequence corresponding to the wake-up event and specifically relates to the frequency of instruction fetching, the frequency of instruction decoding, the frequency of instruction execution after decoding, and the frequency of instruction execution result saving, and these four frequencies often need to be the same to ensure stable and smooth execution of the instruction sequence. After the wake-up event is determined, to avoid power consumption waste and ensure timely handling of the wake-up event, the operating frequency of the internet of things processor 402 is uniquely limited by the wake-up event, that is, the four frequencies all adopt the same preset frequency corresponding to the wake-up event.

Peripheral management component

In the related art, the internet of things processor 402 adopts a fixed voltage and fixed frequency manner to wake up whether it adopts one of a microprocessor, a multi-core processor, an embedded processor, or other known processing elements (hereinafter, the processing elements adopted by the internet of things processor 402 are collectively referred to as a processing unit 620). The power consumption is wasted by the way of fixing voltage and frequency or operating in the highest performance (requiring high voltage support) mode after the processing unit 620 wakes up; or the operating frequency and/or operating voltage of the processing unit 620 is not sufficient to meet the processing requirements of the wake-up event after wake-up, so that the wake-up event cannot be responded to in time. In view of this, the internet of things device 400 provided by the embodiment of the present disclosure is provided with a peripheral management component 630.

The peripheral management component 630 is coupled to the bus 406 shown in fig. 3, and is configured to receive a wake-up signal from a wake-up source, and determine a wake-up frequency and a wake-up operating voltage of the processing unit 620 based on the wake-up source sending the wake-up signal after receiving the wake-up signal, where the wake-up signal and the wake-up source can refer to the above explanations, and the peripheral management component 630 may pre-store the wake-up frequency configured by the wake-up source according to the processing requirement of the wake-up event, so that the peripheral management component 630 can determine a wake-up frequency corresponding to the wake-up source and the wake-up operating voltage required to maintain the wake-up frequency for the processing unit 620 after receiving the wake-up signal, so that the processing unit 620 can respond to the wake-up event in time without wasting power consumption.

The peripheral management component 630 may be a separate device mounted on the internet of things device 400 for the processing unit 620 on the internet of things device 400 to determine the wake-up frequency and wake-up operating voltage; or may be integrated with the processing unit 620 in the same system-on-chip, and then installed on the internet-of-things device 400 together with the processing unit 620 in the form of the system-on-chip. Since the peripheral management component 630 is used by the processing unit 620, the peripheral management component 630 will be described in detail in the system on chip integrating the peripheral management component 630 and the processing unit 620 with reference to fig. 5.

Referring to fig. 5, the system on chip 600 includes an on-chip bus 610, the on-chip bus 610 for coupling a processing unit 620 and a peripheral management component 630. It should be understood that the system on chip may also integrate other necessary devices, and the disclosure does not limit the other necessary devices for system on chip integration.

Referring to fig. 5, the peripheral management component 630 includes a power controller 650 and a wake up source management unit 660 connected to each other, wherein the wake up source management unit 660 and the wake up source are connected to receive a wake up signal transmitted by the wake up source and determine a current wake up frequency Freq based on the wake up source transmitting the current wake up signal Awak after receiving the current wake up signal Awak from the wake up source; the power controller 650 is configured to determine a current wake-up operating voltage VCPU of the processing unit 620 according to the current wake-up frequency Freq.

Fig. 6 shows a detailed internal structure of the peripheral management component 630. Referring to fig. 6, in some embodiments, the wakeup source management unit 660 may be internally provided with a signal analyzing unit 661, an associated information storage 662 and a frequency point matching unit 663, where the associated information storage 662 stores associated information of wakeup sources and corresponding wakeup frequencies, the signal analyzing unit 661 is configured to receive a current wakeup signal Awak and analyze the current wakeup signal Awak to determine a wakeup source Aken sending the current wakeup signal Awak (for example, the wakeup signal may carry identification information of the wakeup source through a first preset bit thereof so that the signal analyzing unit 661 determines the wakeup source according to the wakeup signal), the frequency point matching unit 663 is respectively connected to the signal analyzing unit 661 and the associated information storage 662, and thus, after the signal analyzing unit 661 of the wakeup source management unit 660 receives the current wakeup signal Awak, the final frequency point matching unit 663 determines the wakeup source according to the wakeup source Aken sending the current wakeup signal Awak, which is analyzed by the signal analyzing unit 661, the associated information storage 663 stored in the associated information storage 662 The current wake-up frequency Freq is queried.

The power controller 650 is a unit for determining an operating voltage according to the operating frequency of the processing unit 620, and may be a controller using an existing AVFS/DVFS technology. If the power controller 650 is a controller using the DVFS technology, since the DVFS technology determines the chip operating voltage based on the target application and the operating frequency, the wake-up source management unit 660 transmits not only the current wake-up frequency Freq but also wake-up source information to the power controller 650, so that the power controller 650 determines the target application based on the wake-up source information and then determines the wake-up operating voltage VCPU in combination with the current wake-up frequency Freq. If the power controller 650 is a controller using AVFS technology, the peripheral management component 630 may further include a sensor component 640 as shown in fig. 5 and 6, the processing unit 620 is coupled to the sensor component 640, the sensor component 640 is used for sensing the sensing data of the corresponding processing unit 620, and the current wake-up operating voltage of the processing unit 620 is determined according to the current wake-up frequency and the sensing data of the processing unit 620. One processing unit 620 may be coupled with a plurality of sensor assemblies 640, each of the plurality of sensor assemblies 640 collecting different sensing data, for example, each collecting one of temperature, process and voltage of the processing unit 620, so that the power controller 650 can determine the current wake-up operating voltage VCPU according to the real-time temperature and process deviation of the processing unit 620 and the current wake-up frequency, and the determined current wake-up operating voltage VCPU may be compared with the operating voltage of the processing unit 620 obtained through the voltage sensor assembly to determine whether the wake-up operating voltage setting is successful, and finally ensure that the current wake-up operating voltage supports the current wake-up frequency in real time through the AVFS technology without wasting power consumption.

In some examples, the wake up source management unit 660 further sends a wake up request signal to the power controller 650 after receiving the current wake up signal Awak, the wake up request signal corresponds to an enable signal, and the power controller 650 determines the current wake up operating voltage VCPU of the processing unit 620 based on the current wake up frequency Freq and performs the other steps described above only if the wake up request signal is valid.

The system on chip 600 in fig. 5 integrates a peripheral management component 630 and a processing unit 620, but in some cases, an internet of things device 400 may have multiple processors 402 as needed, where the multiple processors 402 are, for example, multiple identically configured processor cores, and the multiple processors 402 are, for example, microprocessors, while some are Graphics Processing Units (GPUs), digital processing units (DSPs), or neural Network Processing Units (NPUs). Based on this, one system on chip 300 may also integrate one peripheral management component 630 and n processing units 620 as shown in fig. 7, and then the internet of things device 400 directly uses the system on chip, where n is an integer greater than or equal to 2.

For the case that the system on chip 600 shown in fig. 7 includes a plurality of processing units 620 (i.e., processing units 1-n), the current wake-up signal Awak further indicates the targeted target processing unit i (for example, the wake-up signal carries the identification information of the target processing unit through its second preset bit), and the current wake-up signal Awak indicating the targeted processing unit i is marked as Awak in fig. 7_iWherein i is an integer of not less than 1 and not more than n. The target processing unit i is the processing unit to wake up. Thus, the wake-up source management unit 660 receives every current wake-up signal Awak_iCan then determine the current wake-up signalAwak_iThe target processing unit i to be woken up. Accordingly, the wake-up source management unit 660 receives the current wake-up signal Awak_iThen, it is to determine the current wake-up frequency Freq of the target processing unit i_i(ii) a And the power controller 650 is based on the current wake-up frequency Freq determined by the wake-up source management unit 660_iDetermining a current wake-up operating voltage VCPU of a target processing unit i_i。

In some embodiments, the wake-up source managing unit 660 receives a plurality of current wake-up signals Awak at the same time, and the target processing units indicated by the plurality of current wake-up signals Awak are different, for example, n current wake-up signals Awak each indicate one target processing unit and the plurality of target processing units are different from each other, so that the current wake-up frequency Freq of each of the n target processing units is finally determined_i(i.e., n current wake-up frequencies Freq₁-Freq_n) And respective current wake-up operating voltage VCPU_i(i.e., n current wake-up operating voltages VCPU₁-VCPU_n)。

Further, different processing units 620 may determine the wake-up operating voltage according to different calculation rules, and thus the current wake-up frequency Freq_iThe targeted target processing unit i may also be indicated by its preset bit, so that the power controller 650 can determine the current wake-up operating voltage VCPU of the target processing unit i in conjunction with the target processing unit i_i。

In the case shown in fig. 7, if the power controller 650 is a controller using AVFS technology, the power controller 650 can provide the wake-up operating voltage VCPU that supports the current wake-up frequency Freq and effectively saves power consumption to each processing unit 620 in real time.

It should be noted that, for the same processing unit 620, since the instruction fetch, decode, execute, result save, and even the related cooperation processes all need the same frequency, the smooth processing of the wake-up event can be ensured; moreover, each step of the cooperation process or the processing instruction in the processing unit 620 may be executed only at some preset frequency points due to the limitation of clock frequency and other factors, so that the current wake-up frequency Freq determined by the wake-up source management unit 660 may only be a current wake-up frequency point, that is, a frequency point representing a specific value, which is 2.0MHz for example. Since both the AVFS technique and the DVFS technique determine the operating voltage based on one frequency point, the power controller 650 using either the AVFS technique or the DVFS technique finally determines a current wake-up operating voltage VCPU that supports the current wake-up frequency point but effectively saves power consumption according to the current wake-up frequency point determined by the wake-up source management unit 660.

Referring to fig. 5, in some embodiments of the present disclosure, the power controller 650 is further configured to generate a voltage control signal REGV according to the current wake-up operating voltage VCPU; peripheral management component 630 also includes power management circuitry 670. Power management circuitry 670 is coupled to power controller 650 to receive a voltage control signal REGV generated by power controller 650; the power management circuit 670 is also connected to the processing unit 620 to control the current wake-up operating voltage VCPU provided to the processing unit 620 based on the voltage control signal REGV.

Further, the peripheral management component 330 further includes a voltage gate unit 680, the voltage gate unit 680 is connected to the processing unit 620, and the voltage gate unit 680 controls power on and power off of the processing unit 620, wherein when the processing unit 620 is in a low power consumption state, the voltage gate unit 680 controls power off of the processing unit 620. The power controller 650 is further configured to issue a power switch request Qon after receiving the current wake-up frequency Freq; the voltage gating unit 680 is also connected to the power controller 650 to receive the power switch request Qon issued by the power controller 650 and to control the power-on of the processing unit 620 based on the power switch request Qon. Illustratively, the voltage-gating cell 680 is a transistor having a gate coupled to the power controller 650 for receiving the power switch request Qon, a source coupled to the power source, and a drain coupled to the processing unit 620, such that the power source supplies power to the processing unit 620 after the transistor is turned on by the power switch request Qon. The combination of the power controller 650 and the voltage gating unit 680 enables the processing unit 620 to handle wake-up events and save various power consumption in low power consumption state.

In some embodiments of the present disclosure, the power controller 650 is further configured to generate a frequency control signal REGF according to the current wake-up frequency Freq; peripheral management component 630 also includes clock management unit 690. The clock management unit 690 is connected to the power controller 650 to receive the frequency control signal REGF generated by the power controller 650, and then generate the clock signal FCPU of the processing unit 620 based on the frequency control signal REGF; the clock management unit 690 is further connected to the processing unit 620 to send the clock signal FCPU to the processing unit 620 (i.e. the internet of things processor 402) so that the processing unit 620 operates at the current wake-up frequency Freq based on the clock signal FCPU.

It is emphasized that in the scenario shown in fig. 7, the power controller 650 is generating the power switch request Qon for the target processing unit i_iVoltage control signal REGV_iAnd a frequency control signal REGF_iThe voltage gating unit 680 then requests Qon based on the power switch_iControls the power-on of the target processing unit i, and the power management circuit 670 controls the power supply of the target processing unit i based on the voltage control signal REGV_iControlling a current wake-up operating voltage VCPU provided to a target processing unit i_iAnd the clock management unit 690 controls the clock based on the frequency control signal REGF_iGenerating a clock signal FCPU of a target processing unit i_iSo that each processing unit 620 is independently awakened under the control of the peripheral management component 630.

It should be appreciated that in the above-described application of the IOT device 400 of the remote weather station 214 to ambient temperature collection, the processing unit 620 may go through a number of cycles in a short period of time. The processing unit 620 is in the low power state after being awakened from the low power state and then rapidly processing the awakening event in each cycle. Of course, the wake-up events in multiple cycles may be the same or different, such as the internet of things device 400 of the remote weather station 214 collecting ambient temperature and providing weather data at chronological intervals (i.e., the internet of things device is woken up from a low power consumption state to collect ambient temperature in one cycle and from a low power consumption state to provide weather data in the next cycle).

For the same application scenario of multiple periodic wake-up events, the power controller 650 may store a previous wake-up frequency determined by the wake-up source management unit 660 for the received previous wake-up signal and a previous wake-up operating voltage determined by the power controller 650 for the previous wake-up frequency; the power controller 650 determines from the current wake-up frequency Freq that the current wake-up operating voltage VCPU of the processing unit 620 is made in case the current wake-up frequency Freq does not coincide with the previous wake-up frequency. In applications where the wake-up frequency is relatively stable, there is a high probability that the current wake-up frequency Freq is consistent with the previous wake-up frequency. Once they are consistent, the power controller 650 uses the previous wake-up operating voltage as the current wake-up operating voltage VCPU, so that the power controller 650 does not need to frequently calculate the current wake-up operating voltage VCPU, and the power controller 650 can rapidly determine the current wake-up operating voltage VCPU for the wake-up event, so that the processing unit 620 can timely obtain the current wake-up operating voltage VCPU having a pertinence to the wake-up event, and then respond to the wake-up event more timely, thereby improving the wake-up efficiency, and greatly saving the power consumption caused by the repeated calculation of the current wake-up operating voltage VCPU.

For application scenarios where multiple periods of wake-up events are different but regularly cycled, power controller 650, when determining a previous wake-up operating voltage, may store a previous wake-up frequency determined by power controller 650 for a previous wake-up signal and a previous wake-up operating voltage determined by power controller 650 for the previous wake-up frequency, and predict a wake-up frequency and a wake-up operating voltage according to the stored previous wake-up frequency and previous wake-up operating voltage, respectively; the power controller 650 determines from the current wake-up frequency Freq that the current wake-up operating voltage VCPU of the processing unit 620 is made in case the current wake-up frequency Freq does not coincide with the predicted wake-up frequency. Here, the previous wake-up signal is one or more wake-up signals that are successively received by the power controller 650 before the time when the previous wake-up operating voltage is determined, and the specific number is set in advance based on the practical application so as to determine the current wake-up event according to a preset rule. The current wake-up frequency Freq is consistent with the predicted wake-up frequency with a high probability. Once the current wake-up frequency Freq is consistent with the current wake-up frequency Freq determined by the wake-up source management unit 660, the power controller 650 takes the pre-predicted wake-up working voltage as the current wake-up working voltage VCPU, so that the current wake-up working voltage VCPU does not need to be calculated in a time-consuming manner according to a predetermined calculation rule from frequency to voltage after receiving the current wake-up frequency Freq determined by the wake-up source management unit 660, that is, a wake-up event is responded in a more timely manner, and the wake-up efficiency is improved.

Power controller

Fig. 6 shows an alternative detailed structure of the power controller 650, in which the power controller 650 employs AVFS technology, the wake-up source management unit 660 sends the current wake-up frequency Freq to the power controller 650, and the power controller 650 performs the fm regulator operation according to the current wake-up frequency Freq. Specifically, the power controller 650 generates a frequency control signal REGF and a voltage control signal REGV according to the current wake-up frequency Freq, transmits the frequency control signal REGF to the clock management unit 690, and transmits the voltage control signal REGV to the power management circuit 670.

Further, as shown in fig. 6, in one embodiment, the power controller 650 includes a register set for storing the frequency point table 651, a chain controller 652, a voltage calculation unit 653, and a variable frequency control unit 654.

The frequency point table 651 includes a plurality of frequency points, which are generally verified and enable the processing unit 620 to operate normally. The frequency point table 651 can be generated according to frequency configuration instructions from the processing unit 620 or other components, and the frequency point table 651 can also be recorded in the power controller 650 at the product manufacturing stage. The chain controller 652 is coupled to the plurality of sensor assemblies 640 for collecting sensed data from the plurality of sensor assemblies 640. Sensing data such as the temperature of the processing unit 620, etc. These sensing data reflect the states of the processing unit 620 during processing, which affect the subsequent voltages that it can withstand. E.g., the temperature of the processing unit 620 is too high, then the processing unit 620 should operate at a lower voltage for a period of time. Thus, the current wake-up operating voltage VCUP to be provided to the processing unit 620 may be related not only to the current wake-up frequency Freq, but also to the sensed data. The voltage calculation unit 653 is connected to the chain controller 652 and the wake-up source management unit 660, respectively, to determine the current wake-up operating voltage VCUP to be provided to the processing unit 620 according to the sensing data and the current wake-up frequency Freq (i.e., the current wake-up frequency point) based on a predefined voltage calculation rule, and to generate the voltage control signal REGV according to the determined current wake-up operating voltage VCUP; for embodiments in which the voltage-gating cell 680 is provided within the peripheral management component 630, the voltage calculation unit 653 also generates the power switch request Qon at the same time as the voltage control signal REGV. The frequency conversion control unit 654 is connected with the wake-up source management unit 660, the voltage calculation unit 653 and the frequency conversion control unit 654 are respectively connected with the frequency point table 651, so that the voltage calculation unit 653 and the frequency conversion control unit 654 judge whether the current wake-up frequency Freq is contained in the frequency point table 651, if so, the current wake-up frequency Freq is legal, the voltage calculation unit 653 generates a voltage control signal REGV according to the calculated voltage value, and the frequency conversion control unit 654 generates a frequency control signal REGF according to the current wake-up frequency Freq; if not, it indicates that the current wake-up frequency Freq is illegal, and the frequency conversion control unit 654 and the voltage calculation unit 653 do not generate the frequency control signal REGF and the voltage control signal REGV. In some examples, the wake-up frequency corresponding to each wake-up source in the association information stored in the association information storage 662 is included in the frequency point table 651, so as to ensure that each current wake-up frequency Freq determined by the wake-up source management unit 660 can be determined by the power controller 650 to be a corresponding current wake-up operating voltage VCUP, i.e., to reduce useless power consumption of the wake-up source management unit 660.

Further, as shown in fig. 6, a plurality of sensor assemblies 640 are connected end-to-end with the chain controller 652 to form a looped, unidirectional data transmission path, which is indicated by arrows. The same or different physical connection units may be employed between the plurality of sensor assemblies 640 and the chain controller 652. The chain controller 652 sends various requests to the one or more sensor components 640 and receives feedback information from the one or more sensor components 640 in accordance with a data transmission path. For example, the chain controller 652 sends a read data request to one or more sensor assemblies 640, the read data request requesting that sensed data be read from the one or more sensor assemblies 640, and a write data request requesting that data be written onto the one or more sensor assemblies 640.

It should be noted that each sensor assembly 640 includes a sensor and a sensor controller, wherein the sensor collects detection data of an analog signal; the sensor controller includes analog-to-digital conversion circuitry for converting analog signals to digital signals. The sensor controller is also used for receiving and processing various requests. The connection mode of the sensor (whether the single processing unit 620 shown in fig. 5 or the multi-processing unit 620 shown in fig. 7) and the collection mode of the detection data can adopt the prior art, and are not described in detail herein.

Processing unit wake-up method

Fig. 8 is a flowchart of a processing unit wake-up method according to an embodiment of the disclosure. Referring to fig. 8, the method in one embodiment comprises:

step S110, responding to a current wake-up signal from a wake-up source, and determining a current wake-up frequency for the wake-up source;

step S120, determining a current wake-up operating voltage of the processing unit 620 according to the current wake-up frequency;

in step S130, the wake-up processing unit 620 operates at the current wake-up operating voltage.

The method of the embodiment of the present disclosure is performed in any one of the peripheral management components 630 described above, and the peripheral management component 630 determines the current wake-up frequency and the current wake-up operating voltage of the processing unit 620 based on the wake-up source, so that the current wake-up frequency and the current wake-up operating voltage are specifically matched with the wake-up source, so that under the condition that the processing unit 620 operates at the current wake-up operating voltage, the response requirement of the wake-up source can be satisfied and the processing unit 620 does not waste power consumption.

In an alternative embodiment, in step S130, the waking processing unit 620 operates at the current waking operating voltage, which includes: the power switch of the processing unit 620 is turned on by the voltage gating unit 680, thereby waking up the processing unit 620; the processing unit 620 is then controlled by the power management circuit 670 to operate at the current wake-up operating voltage according to the voltage control signal.

In an optional embodiment, the processing unit waking method further includes, before step S110: the previous wake-up frequency and the previous wake-up operating voltage determined for the previous wake-up signal are stored, based on which step S120 is performed if the current wake-up frequency is not identical to the previous wake-up frequency, and if the current wake-up frequency is identical to the previous wake-up frequency, the power controller 650 directly takes the previous wake-up operating voltage as the current wake-up operating voltage.

In an optional embodiment, the processing unit waking method further includes, before step S110: based on the previous wake-up frequency and the previous wake-up operating voltage determined for the previous wake-up signal being stored when the previous wake-up operating voltage is determined, and the wake-up frequency and the wake-up operating voltage being respectively predicted according to the stored previous wake-up frequency and the previous wake-up operating voltage, step S120 is performed in a case where the current wake-up frequency is not identical to the predicted wake-up frequency, and the power controller directly takes the predicted wake-up operating voltage as the current wake-up operating voltage if the current wake-up frequency is identical to the predicted wake-up frequency.

The implementation details of the above method embodiment have been described in detail in the foregoing device embodiment, and reference may be made to the foregoing device embodiment, so that details are not described herein.

Commercial value of the disclosed embodiments

Experiments prove that the power consumption of the processing unit 620 connected with the peripheral management component 630 is effectively reduced on the basis of ensuring timely response to the wake-up event by the peripheral management component 630, the power consumption requirement of a miniaturized integrated circuit process is well met, and the method has a good market prospect.

It should be understood that the embodiments in this specification are described in a progressive manner, and that the same or similar parts in the various embodiments may be referred to one another, with each embodiment being described with emphasis instead of the other embodiments. In particular, as for the method embodiments, since they are substantially similar to the methods described in the apparatus and system embodiments, the description is simple, and the relevant points can be referred to the partial description of the other embodiments.

It should be understood that the above description describes particular embodiments of the present specification. Other embodiments are within the scope of the following claims. In some cases, the actions or steps recited in the claims may be performed in a different order than in the embodiments and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing may also be possible or may be advantageous.

It should be understood that an element described herein in the singular or shown in the figures only represents that the element is limited in number to one. Furthermore, modules or elements described or illustrated herein as separate may be combined into a single module or element, and modules or elements described or illustrated herein as single may be split into multiple modules or elements.

It is also to be understood that the terms and expressions employed herein are used as terms of description and not of limitation, and that the embodiment or embodiments of the specification are not limited to those terms and expressions. The use of such terms and expressions is not intended to exclude any equivalents of the features shown and described (or portions thereof), and it is recognized that various modifications may be made within the scope of the claims. Other modifications, variations, and alternatives are also possible. Accordingly, the claims should be looked to in order to cover all such equivalents.

Claims

1. A peripheral management component connected to a processing unit, the peripheral management component comprising:

2. The peripheral management component of claim 1, further comprising:

3. The peripheral management component of claim 2, further comprising:

4. The peripheral management component of claim 1, further comprising:

5. The peripheral management component of claim 1, wherein the power controller stores a previous wake-up frequency determined by the wake-up source management unit for a previous wake-up signal and a previous wake-up operating voltage determined by the power controller for the previous wake-up frequency, and the power controller is configured to determine a current wake-up operating voltage of the processing unit according to the current wake-up frequency when the current wake-up frequency is not consistent with the previous wake-up frequency.

6. The peripheral management component of claim 5, wherein the power controller is further configured to treat the previous wake-up operating voltage as a current wake-up operating voltage when the current wake-up frequency coincides with the previous wake-up frequency.

7. The peripheral management component of claim 1,

the power controller stores a previous wake-up frequency determined by the wake-up source management unit for a previous wake-up signal and a previous wake-up working voltage determined by the power controller for the previous wake-up frequency when a previous wake-up working voltage is determined, and predicts the wake-up frequency and the wake-up working voltage according to the stored previous wake-up frequency and the previous wake-up working voltage respectively;

8. The peripheral management component of claim 7, wherein the power controller is further to treat the predicted wake-up operating voltage as the current wake-up operating voltage when the current wake-up frequency coincides with the predicted wake-up frequency.

9. A system on a chip, comprising:

a peripheral management component according to any of claims 1-8;

the processing unit;

10. An internet of things ("lot") device comprising the peripheral management component of any of claims 1-8 and the processing unit.

11. A processing unit wake-up method, comprising: