CN113660023B - System and method for user selection in multi-satellite cooperative communication based on FPGA - Google Patents

Abstract

The invention relates to a user selection system and method in FPGA-based multi-satellite cooperative communication. The system includes several memories and several computing modules. The method uses an exhaustive method to traverse each user combination until a combination with the largest channel capacity is found. The system and method for user selection in the FPGA-based multi-satellite cooperative communication of the present invention effectively avoids solving high-order complex mathematical operation formulas, and solves the problem of user selection algorithm in multi-satellite cooperative communication while taking into account real-time performance and high precision. Engineering implementation issues.

Description

A system and method for user selection in multi-satellite cooperative communication based on FPGA

technical field

The invention relates to a user selection system and method in FPGA-based multi-satellite cooperative communication, and belongs to the technical field of FPGA design.

Background technique

Geosynchronous orbit (GEO) is a scarce "natural resource" that can only contain a limited number of satellites. In order to utilize the GEO orbit more effectively under high transmission capacity, some researchers have proposed a multi-satellite cooperative communication technology. Compared with the field of terrestrial wireless communication, the channel environment of multi-satellite cooperative communication is complex, and has the characteristics of long transmission path, long absolute delay and large attenuation. In addition, a large number of user stations are set in the satellite spot beam, and the processor of the multi-satellite cooperative communication system needs to process a huge amount of data. At the same time, in order to calculate the channel state information of each subscriber station with high precision, the processor of the multi-satellite cooperative communication system needs to have a strong floating-point number processing capability.

The FPGA has sufficient logic resources inside, and can programmatically instantiate multiple interfaces and computing units, and its parallel acceleration capability can process large amounts of data in a low-cost and time-consuming operation. And in terms of reliability and energy efficiency ratio, FPGA is better than CPU and GPU. Therefore, FPGA is usually used as the core logic processing device of the multi-satellite cooperative communication system. Among them, user selection is an important link in the multi-satellite cooperative communication process, which realizes the evaluation of the combined channel capacity of different users, and uses this as an index to match user stations for communication.

In the prior art, CN101340724A uses the orthogonal coefficient calculated by the projection channel vector to correct the received signal-to-noise ratio, and uses the corrected signal-to-noise ratio to sequentially select users, so that a small amount of calculation can be used to provide a large multi-user diversity effect.

CN101499837A provides a low-complexity user selection method in a multi-user MIMO broadcast channel on the basis of greedy user selection. The method decomposes the channel response into channel modulus value and inter-channel angle, constructs an exponential utility function according to the probability distribution of the two in the channel model, and iteratively performs user selection based on the utility function maximization criterion. The correlation operation of the channel matrix is simplified, thereby reducing the computational complexity of the user selection algorithm to a certain extent.

CN102970116A proposes a user selection method that maximizes the equivalent channel gain product. Under the premise of ensuring similar performance to the full-space search method, this method uses the MPEG algorithm to select the optimal user subset. It is avoided to calculate the channel information of each user in the set, so as to achieve the purpose of increasing the rate and reducing the complexity.

However, the above user selection algorithm in the prior art is not specifically aimed at the field of satellite communication, especially multi-satellite cooperative communication. Therefore, the FPGA implementation was not optimized accordingly at the beginning of the algorithm design. The algorithm in CN101340724A involves GS orthogonalization and QR decomposition operations; the algorithm in CN101499837A uses an exponential utility function constructed according to the probability distribution of the channel model; the MPECG algorithm in CN102970116A includes Schmitt orthogonalization and LU decomposition, which are all unfavorable. Compute and implement with FPGA.

SUMMARY OF THE INVENTION

The technical problem to be solved by the present invention is to overcome the shortcomings of the above technologies, and to provide a user-selected FPGA implementation system and method in multi-satellite cooperative communication.

In order to solve the above-mentioned technical problems, the first technical solution proposed by the present invention is: an FPGA-based multi-satellite cooperative communication user selection system, comprising: a first memory, a first group of memories, a second group of memories, a _CSISO calculation system module, eighth memory, HH ^H calculation module, det (I+SNR*HH ⁾ ) calculation module, log ₂ calculation module, twelfth memory, comparator and gain calculation module; the first memory stores current channel environment information. Noise ratio, its output is connected to the C _SISO calculation module and the det (I+SNR*HH ^H ) calculation module; the first group of memories and the second group of memories store the channel response between the user and the satellite; the first The output of the group memory is connected to the _CSISO calculation module and the HH ^H calculation module; the output of the second group of memory is connected to the HH ^H calculation module; the output of the _CSISO calculation module is connected to the eighth memory; the The output of the eighth memory is connected to the gain calculation module; the output of the HH ^H calculation module is connected to the det (I+ SNR*HH ^H ) calculation module; the output of the det (I+SNR*HH ^H ) calculation module is connected the log ₂ calculation module; the log ₂ calculation module is connected to the twelfth memory; the output of the twelfth memory is connected to the comparator; the output of the comparator is connected to the gain calculation module; the The gain calculation module outputs the gain value; the comparator also outputs the optimal channel capacity value and the optimal user combination value.

A further improvement of the above solution is that: the first group of memories and the second group of memories each include two memories, which are respectively used to store the real part and the imaginary part of the channel response from the user to the satellite.

A further improvement of the above scheme is: the C _SISO calculation module is used to calculate the channel capacity, and the calculation formula is: C _SISO =log ₂ (1+SNR*| h _SISO | ² ); wherein, h _SISO represents the distance between the user and the satellite The channel response of , SNR represents the signal-to-noise ratio of the current channel environment;

Including, the thirty-first memory and the thirty-second memory that can store the first group of data, the thirty-third memory and the thirty-fourth memory that can store the second group of data; the thirty-first memory, the third memory The outputs of the twelfth memory, the thirty-third memory and the thirty-fourth memory are all connected to the square operator; the output of the square operator connected to the thirty-first memory and the thirty-second memory is connected to the thirty-sixth adder The output of the square operator connected to the thirty-third memory and the thirty-fourth memory is connected to the thirty-seventh adder; the outputs of the thirty-sixth adder and the thirty-seventh adder are connected to the third Thirty-eight adders; the output of the thirty-eighth adder is connected with the output of the first memory to the thirty-ninth adder; the output of the thirty-ninth adder is connected to an adder adder; the output of the adder adder Connect the logarithm operator.

The further improvement of the above scheme is: the HH ^H calculation module is a matrix multiplication operation module, which is used for the multiplication operation of the channel matrix H and the self-conjugate transpose H ^H , including the first cross calculation input real part and imaginary part. layer multipliers, a number of memories for storing the calculation results of the first layer multipliers, second layer adders and subtractors for cross-computing data in said memories; for calculating the second layer adder and subtractor results and The third-layer adder that inputs the result; the third-layer adder includes 4 adders and outputs 4 matrices, which are the outputs of the HH ^H calculation module.

The further improvement of the above scheme is: the det (I+SNR*HH ^H ) calculation module is used to carry out det (I+SNR* HH ^H ) operation; including 4 inputs, 4 inputs and the current channel environment signal-to-noise ratio respectively A multiplier for multiplication; the outputs of the two multipliers are respectively added by an adder and then added by the adder, and the other two multipliers are respectively squared by a square operator and then added by the adder; The results of the two adders are then subtracted by the subtractor and output.

In order to solve the above-mentioned technical problems, the second technical solution proposed by the present invention is: a user selection method for a user selection system in the above-mentioned FPGA-based multi-satellite cooperative communication, comprising the following steps:

(1) Initialize data, store the channel responses of each user in the user set to each satellite in sequence;

(2) Arbitrarily select a group of users who have not been paired for testing, that is, index data from each group of channel responses;

(3) Assemble the data indexed in step (2) into a channel matrix, that is, the user group and the cooperative satellite are regarded as a MIMO system for pairing test, and the channel matrix is substituted into the Shannon formula, and the current channel capacity is calculated and stored using the Shannon formula. ;

(4) Determine whether all possible user combinations have been completed; if so, proceed to the next step, otherwise return to step (2) until all combinations are traversed;

(5) Use the comparator to select the one with the largest channel capacity among all user combinations;

(6) Output the index value corresponding to the maximum channel capacity as the result of this round of user selection.

A further improvement of the above scheme is that: the Shannon formula in the step (3) is C _MIMO =log ₂ {det (I+ SNR*HH ^H ) }; wherein, C _MIMO is the channel capacity, H represents the channel matrix, and in the channel matrix It includes the channel response between each user in the user set to each satellite, H ^H represents the conjugate transpose of the channel matrix, SNR represents the signal-to-noise ratio under the current channel environment, and I represents the identity matrix.

The system and method for user selection in the FPGA-based multi-satellite cooperative communication provided by the present invention traverse each user combination by an exhaustive method until a combination mode with the largest channel capacity is searched. This method effectively avoids solving high-order complex mathematical formulas, and solves the engineering implementation problem of user selection algorithm in multi-satellite cooperative communication while taking into account real-time performance and high precision. Aiming at the channel capacity calculation process, a complex matrix multiplication structure based on parallel memory design is proposed, which can effectively complete the independent storage and crossover operation of the real and imaginary parts of the channel response. It adopts the hierarchical structure of step-by-step flow to calculate each element of the result of multiplying the square matrix and its own conjugate transpose at the same time. The hardware structure of the FPGA implementation system for calculating the channel capacity in the FPGA implementation system of the user selection algorithm in the multi-satellite cooperative communication is optimized by using the pipeline technology. The calculation of the C _MIMO value of each user combination is disassembled into three sub-processes. The calculation sub-process of the next user combination is performed, and the calculation sub-process of a plurality of user combinations can be performed at the same time, which further improves the real-time performance of the system operation.

Description of drawings

The present invention will be further described below in conjunction with the accompanying drawings.

FIG. 1 is a schematic structural diagram of a preferred embodiment of the present invention.

FIG. 2 is the hardware structure of the _CSISO computing module in FIG. 1 .

FIG. 3 is the hardware structure of the HH ^H calculation module in FIG. 1 .

FIG. 4 is the hardware structure of the det(I+SNR*HH ^H ) calculation module in FIG. 1 .

FIG. 5 is the input data timing sequence of FIG. 1 .

FIG. 6 is a flowchart of a user selection method according to a preferred embodiment of the present invention.

FIG. 7 shows the effect before and after optimization of the pipeline technology in a preferred embodiment of the present invention.

FIG. 8 is a simulation diagram of a calculation result output timing sequence according to a preferred embodiment of the present invention.

Detailed ways

Example

The user selection system in the FPGA-based multi-satellite cooperative communication of this embodiment, as shown in FIG. 1 , includes: a memory 201, a first group of memories, a second group of memories, a _CSISO calculation module 206, a memory 208, and a HH ^H calculation module 207, det (I +SNR*HH ^H ) calculation module 209, log ₂ calculation module 213, memory 212, comparator 211 and gain calculation module 210; memory 201 stores current channel environment signal-to-noise ratio SNR, and its output is connected to C _SISO calculation Module 206 and det (I+SNR*HH ^H ) calculation module 209; the first group of memories and the second group of memories store the channel response between the user and the satellite; the output of the first group of memories is connected to the C _SISO calculation module 206 and HH ^H The output of the second group of memory is connected to the HH ^H calculation module 207; the output of the _CSISO calculation module 206 is connected to the memory; the output of the memory 208 is connected to the gain calculation module 210; the output of the HH ^H calculation module 207 is connected to det (I+SNR *HH ^H ) calculation module 209; det (I+SNR*HH ^H ) the output of the calculation module 209 is connected to the log ₂ calculation module 213; the log ₂ calculation module 213 is connected to the memory 212; the output of the memory 212 is connected to the comparator 211; the comparator 211 The output is connected to the gain calculation module 210; the gain calculation module 210 outputs the gain value; the comparator 211 also outputs the optimal channel capacity value and the optimal user combination value.

Among them, the first group of memory includes memory 202 and memory 203; the second group of memory includes memory 204 and memory 205, memory 202 and memory 204 are used to store the real part of the channel response from the user to the satellite, and memory 203 and memory 205 are used to store The imaginary part of the user-to-satellite channel response.

This embodiment takes the dual-satellite cooperative communication as an example. It is assumed that one of the satellites in the dual-satellite cooperative communication is satellite m, and the channel response from a user to satellite m is named S_m. The other is satellite n, and the channel response from a user to satellite n is named S_n. S_m_re represents the real part of the channel responses between the N users in the set and the satellite m respectively, and S_m_im represents the imaginary part of the channel responses between the N users in the set and the satellite m respectively. S_n_re represents the real part of the channel responses between the N users in the set and the satellite n respectively, and S_n_im represents the imaginary part of the channel responses between the N users in the set and the satellite n respectively.

The C _SISO calculation module 206 is used to calculate the channel capacity, and the calculation formula is: C _SISO =log ₂ (1+SNR*| h _SISO | ² ); wherein, h _SISO represents the channel response between the user and the satellite, and SNR represents the current channel Ambient signal-to-noise ratio.

As shown in FIG. 2 , the _CSISO calculation module 206 includes a memory 301 and a memory 302 capable of storing the first group of data, a memory 303 and a memory 304 capable of storing the second group of data; the memory 301 , the memory 302 , the memory 303 and the memory 304 The output of the square operator is connected with the square operator; the output of the square operator connected to the memory 301 and the memory 302 is connected to the adder 306; the output of the square operator connected to the memory 303 and the memory 304 is connected to the adder 307; the adder 306 and the adder The output of the adder 307 is connected to the adder 308; the output of the adder 308 and the memory 201 are connected to the adder 309, that is, the adder 308 adds the SNR; the output of the adder 309 is connected to the adder 310; the adder 310 The output of is connected to the logarithm operator 311, and the logarithm operator 311 is based on 2.

The HH ^H calculation module 207 is a matrix multiplication operation module, which is used for the multiplication operation of the channel matrix H and the self-conjugate transpose H ^H.

As shown in FIG. 3 , the HH ^H calculation module 207 includes 8 first-level multipliers 401 for calculating the real part and imaginary part of the input input, 8 memories for storing the calculation results of the first-level multipliers, and a memory for interleaving calculation The second layer adder and subtractor 410 for data in the second layer; the third layer adder 411 for calculating the result of the second layer adder and subtractor 410 and inputting the result; the third layer adder 411 includes 4 adder outputs 4 matrix, which is the output of the HH ^H calculation module.

After the data of the memory 202, the memory 203, the memory 204, and the memory 205 are passed through the first-layer multiplier 401, the intermediate results obtained by the operation are stored in the memory 402, the memory 403, the memory 404, the memory 405, the memory 406, the memory 407, and the memory 408. In the memory 409 , the intermediate results are output to the second layer adder and subtractor 410 according to different index values, and the input of the third layer adder 411 comes from the second layer adder and subtractor 410 . The resulting matrix elements 412 , 413 , 414 , 415 are the outputs of the third layer adder 411 . The calculation result of this module (1,1) represents the element (1,1) in HH ^H , the calculation result (1,2)_re represents the real part of the element (1,2) in HH ^H , and the calculation result (2,1) )_re represents the real part of the element (2,1) in HH ^H , the calculation result (1,2)_im represents the imaginary part of the element (1,2) in HH ^H , and the calculation result (2,1) represents HH ^H The imaginary part of the element (2,1) in , the calculation result (2,2) represents the element (2,2) in HH ^H.

The det (I+SNR*HH ^H ) calculation module 209 is used to perform the det (I+SNR*HH ^H ) operation. As shown in FIG. 4 , the det (I+ SNR*HH ^H ) calculation module 209 includes 4 inputs and a multiplier 501 for multiplying the 4 inputs with the current channel environment signal-to-noise ratio SNR respectively; wherein the outputs of the two multipliers are respectively By adding an adder 502 and then adding by the adder 504, the other two multipliers are respectively squared by the square operator 503 and then added by the adder 505; the results of the adder 504 and the adder 505 are then passed through The subtractor 506 performs a subtraction operation and outputs the result. The four inputs of the det (I+SNR*HH ^H ) calculation module 209 are connected in one-to-one correspondence with the four outputs of the HH ^H calculation module 207 .

The log ₂ calculation module 213 performs the log ₂ operation on det (I+SNR*HH ^H ) , whose input is from the det (I+SNR*HH ^H ) calculation module 209 . The output result of the log ₂ calculation module 213 is the calculation result of C _MIMO in which each user is combined to form a channel matrix.

The memory 212 stores the calculation results of all user combinations C _MIMO from the log ₂ calculation module 213 in sequence. The input of the comparator 211 is connected to the memory 212, and its function is to select a maximum value C _MIMO-max from the memory 212 as the optimal channel capacity, and record the maximum user combination serial number in the register group. Take the above two results as the two output values of the user selection module.

The gain calculation module 210 calculates the channel capacity gain of the optimal channel capacity of the dual-satellite cooperative communication system compared with that of the single satellite. The two inputs to this module are the C _SISO value from the memory 208 and the C _MIMO-max value from the comparator 211 respectively. The gain is calculated using (C _MIMO-max - C _SISO )/C _SISO and is used as the first parameter of the user selection module. Three output values.

Taking dual-satellite cooperative communication as an example, the input data sequence of the FPGA implementation system of the user selection algorithm in the multi-satellite cooperative communication provided by the present invention is shown in FIG. 5 .

The user selection method of the user selection system in the FPGA-based multi-satellite collaborative communication of the present embodiment, as shown in FIG. 6 , includes the following steps:

(1) Initialize the data S_m and S_n, and store the channel responses of each user in the user set to satellite m and satellite n in sequence;

(2) Arbitrarily select a pair of users who have not been paired and tested, that is, index one data from S_m and one data from S_n;

(3) The two data indexed in step (2) are assembled into a channel matrix, that is, the user group and the two satellites are regarded as a 2x2MIMO system for pairing test, and the channel matrix is substituted into C _MIMO =log ₂ {det (I+SNR*HH ^H ) } using the Shannon formula to calculate the current channel capacity and store it;

(4) Determine whether all possible user combination pairing methods have been completed. If so, go to the next step, otherwise return to step (2) until all combinations are traversed;

(5) Use the comparator to select the one with the largest channel capacity among all user pairing combinations;

(6) Output the S_m index value and S_n index value corresponding to the maximum channel capacity as the result of the current round of user selection.

，流水线子模块2的运行耗时为T _det ，流水线子模块3的运行耗时为T _log 。若没有采用流水线技术优化，则上述三个子模块的计算逻辑为一个整体，同一个时间只能完成一个用户组合的C_MIMO计算过程，必须等一个用户组合的C_MIMO计算完毕后才能开始下一个用户组合的C_MIMO计算过程。Figure 7 shows the timing comparison before and after pipeline technology optimization. The running time of pipeline sub-module 1 is

, the running time of the pipeline sub-module 2 is T _det , and the running time of the pipeline sub-module 3 is T _log . If the pipeline technology is not optimized, the calculation logic of the above three sub-modules is a whole, and only the C _MIMO calculation process of one user combination can be completed at the same time, and the next user must wait for the C _MIMO calculation of one user combination to be completed. Combined C _MIMO calculation process.

The FPGA implementation system of the user selection algorithm in the multi-satellite cooperative communication provided by the invention adopts the pipeline technology to optimize the calculation process of the Shannon formula. After optimization, the three main calculation logics, HH ^H , det (I+SNR*HH ^H ) and log ₂ are independently opened, which are completed by pipeline sub-module 1, pipeline sub-module 2 and pipeline sub-module 3 respectively. Under this design structure, the calculation of the C _MIMO value of each user combination is decomposed into three sub-processes. After each sub-process is completed, the calculation sub-process of the next user combination can be performed, and the calculation of multiple user combinations can be performed simultaneously. Sub-process to achieve the purpose of shortening the hardware running time.

In order to ensure the calculation accuracy, the memory, adder, multiplier, subtractor, log ₂ logarithmic operator, comparator, gain calculation module, etc. included in this embodiment should all support data accuracy of 32-bit single-precision floating-point numbers, Compliant with IEEE-754 standard. Figure 8 is a simulation timing diagram of the calculation result output of this design example.

The present invention is not limited to the above-described embodiments. All technical solutions formed by equivalent replacements fall within the protection scope of the present invention.

Claims (3)

1. a user selection system in a multi-satellite cooperative communication based on FPGA, is characterized in that, comprising: the first memory, the first group of memory, the second group of memory, _CSISO computing module, the eighth memory, HH ^H computing module, det (I+SNR*HH ^H ) calculation module, log ₂ calculation module, twelfth memory, comparator and gain calculation module; the first memory stores the current channel environment signal-to-noise ratio, and its output is connected to the _CSISO calculation module and det (I+SNR*HH ^H ) calculation module; the first group of memories and the second group of memories store the channel response between the user and the satellite; the output of the first group of memories is connected to the _CSISO calculation module With the HH ^H calculation module; the output of the second group of memory is connected to the HH ^H calculation module; the output of the _CSISO calculation module is connected to the eighth memory; the output of the eighth memory is connected to the gain calculation module The output of the HH ^H calculation module is connected to the det (I+SNR*HH ^H ) calculation module; the output of the det (I ₊ SNR*HH ^H ) calculation module is connected to the log calculation module; the log _2. The calculation module is connected to the twelfth memory; the output of the twelfth memory is connected to the comparator; the output of the comparator is connected to the gain calculation module; the gain calculation module outputs a gain value; the comparison The device also outputs the optimal channel capacity value and the optimal user combination value; The C _SISO calculation module is used to calculate the channel capacity, and the calculation formula is: C _SISO =log ₂ (1+SNR*| h _SISO | ² ); wherein, h _SISO represents the channel response between the user and the satellite, and SNR represents the current Channel environment signal-to-noise ratio; Including, the thirty-first memory and the thirty-second memory that can store the first group of data, the thirty-third memory and the thirty-fourth memory that can store the second group of data; the thirty-first memory, the third memory The outputs of the twelfth memory, the thirty-third memory and the thirty-fourth memory are all connected to the square operator; the output of the square operator connected to the thirty-first memory and the thirty-second memory is connected to the thirty-sixth adder The output of the square operator connected to the thirty-third memory and the thirty-fourth memory is connected to the thirty-seventh adder; the outputs of the thirty-sixth adder and the thirty-seventh adder are connected to the third Thirty-eight adders; the output of the thirty-eighth adder is connected to a thirty-ninth multiplier with the output of the first memory; the output of the thirty-ninth multiplier is connected to an add-1 adder; the output of the add-1 adder Connect the logarithm operator; The HH ^H calculation module is a matrix multiplication operation module, which is used for the multiplication operation of the channel matrix H and the self-conjugate transpose H ^H , including a number of first-layer multipliers that cross-calculate the real part and the imaginary part of the input, and are used for storage. A number of memories for the results of the multiplier calculations of the first layer, the adders and subtractors of the second layer for calculating the data in the memory interleaved; the addition of the third layer for calculating the results of the adders and subtractors of the second layer and inputting the results The third layer adder includes 4 adders and outputs 4 matrices, that is, the output of the HH ^H calculation module; Described det (I+SNR*HH ^H ) calculation module is used to carry out det (I+SNR*HH ^H ) operation; Comprise the multiplier that 4 inputs, 4 inputs carry out multiplication operation with current channel environment signal-to-noise ratio respectively; The outputs of the two multipliers are respectively added by an adder and then added by the adder, and the other two multipliers are respectively squared by the square operator and then added by the adder; the results of the two adders are then added by the adder. The output after subtraction is performed by the subtractor; The log ₂ calculation module completes the log ₂ operation of the output of the det (I+SNR*HH ^H ) calculation module. 2. user selection system in the multi-satellite cooperative communication based on FPGA according to claim 1, is characterized in that: described first group memory and second group memory all comprise two memories, are respectively used for storing user to satellite The real and imaginary parts of the channel response. 3. a kind of user selection method of user selection system in the multi-satellite cooperative communication based on FPGA as claimed in claim 1, is characterized in that, comprises the steps: (1) Initialize data, store the channel responses of each user in the user set to each satellite in sequence; (2) Arbitrarily select a group of users who have not been paired for testing, that is, index data from each group of channel responses; (3) Assemble the data indexed in step (2) into a channel matrix, that is, the user group and the cooperative satellite are regarded as a MIMO system for pairing test, and the channel matrix is substituted into the Shannon formula, and the current channel capacity is calculated and stored using the Shannon formula. ; (4) Determine whether all possible user combinations have been completed; if so, proceed to the next step, otherwise return to step (2) until all combinations are traversed; (5) Use the comparator to select the one with the largest channel capacity among all user combinations; (6) Output the index value corresponding to the maximum channel capacity as the result of this round of user selection; Shannon's formula in the step (3) is C _MIMO =log ₂ {det (I+SNR*HH ^H ) }; wherein, C _MIMO is the channel capacity, H represents the channel matrix, and the channel matrix includes each user set in the user set. The channel responses between users to each satellite, H ^H represents the conjugate transpose of the channel matrix, SNR represents the signal-to-noise ratio in the current channel environment, and I represents the identity matrix.

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