CN113625678B - A kind of port impedance automatic simulation test method - Google Patents
A kind of port impedance automatic simulation test method Download PDFInfo
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Abstract
Description
技术领域technical field
本发明属于航天电源技术领域,尤其涉及一种端口阻抗自动仿真测试方法。The invention belongs to the technical field of aerospace power supplies, and in particular relates to an automatic simulation testing method for port impedance.
背景技术Background technique
在航天电源控制器功能测试中,加电前,常通过测量电路端口阻抗来判断电路中是否存在故障。使用该方法时,首先计算端口阻抗的理论值。在此基础上,将实测值与理论值进行对比,找出异常值。传统的获取端口阻抗理论值的方法为:利用电路原理知识,依次将各端口视为输入端口,手动分析从各端口看进去的等效电路,进而计算各端口的等效阻抗。该方式耗时长,在电路复杂时,还容易出现计算分析不正确的情况。In the functional test of the aerospace power supply controller, before power-on, it is often judged whether there is a fault in the circuit by measuring the impedance of the circuit port. When using this method, first calculate the theoretical value of the port impedance. On this basis, the measured values are compared with the theoretical values to find outliers. The traditional method to obtain the theoretical value of port impedance is: using the knowledge of circuit principle, consider each port as an input port in turn, manually analyze the equivalent circuit seen from each port, and then calculate the equivalent impedance of each port. This method takes a long time, and when the circuit is complex, it is easy to cause incorrect calculation and analysis.
发明内容SUMMARY OF THE INVENTION
本发明解决的技术问题是:克服现有技术的不足,提供了一种端口阻抗自动仿真测试方法,自动获取电路中各端口的阻抗值,提高了获取阻抗值的效率。同时避免了因手动分析或计算错误导致的误差,提高了所获取的端口阻抗值的准确率。The technical problem solved by the present invention is: to overcome the deficiencies of the prior art, an automatic simulation test method for port impedance is provided, which can automatically obtain the impedance value of each port in the circuit and improve the efficiency of obtaining the impedance value. At the same time, errors caused by manual analysis or calculation errors are avoided, and the accuracy of the acquired port impedance value is improved.
本发明目的通过以下技术方案予以实现:一种端口阻抗自动仿真测试方法,所述方法包括如下步骤:步骤1:将被测电路中所有有源器件置零;步骤2:依次为被测电路中的各个端子分配唯一且固定的网络标识号;步骤3:用被测电路中两个端子网络标号表示一个端口,制定端口阻抗测试序列;步骤4:添加一个专门用来测量电路端口阻抗的独立电压源Vs,并为独立电压源的正负端子分别分配网络标识号Ni、Nj,使得(Ni,Nj)=Tu,其中,u表示当前需要测试的端口序号;步骤5:实时记录独立电压源Vs的端口电压Ui,j和端口电流Ii,j,实时计算被测电路中Ni、Nj两端子组成端口的等效阻抗Zi,j;步骤6:实时判断被测电路中Ni、Nj两端子组成端口的等效阻抗Zi,j的取值是否满足收敛条件;若等效阻抗Zi,j未收敛,则返回步骤5,若等效阻抗Zi,j已收敛,则执行步骤7;步骤7:记录当前时刻算得的Zi,j,作为第u个端口的阻抗测试序号Tu对应的被测端口的等效阻抗;步骤8:判断端口阻抗测试序列是否已经执行完毕,即u是否等于n;若u=n,则表示已经执行完毕,此时结束测试。The object of the present invention is achieved through the following technical solutions: an automatic simulation test method for port impedance, the method includes the following steps: step 1: set all active devices in the circuit under test to zero; step 2: sequentially test the circuit under test Each terminal is assigned a unique and fixed network identification number; Step 3: Use the two terminal network labels in the circuit under test to represent a port, and formulate a port impedance test sequence; Step 4: Add an independent voltage specially used to measure the circuit port impedance source Vs, and assign network identification numbers Ni and Nj to the positive and negative terminals of the independent voltage source, so that (Ni, Nj)=Tu, where u represents the serial number of the current port to be tested; Step 5: Record the independent voltage source Vs in real time The port voltage Ui,j and port current Ii,j are calculated in real time, and the equivalent impedance Zi,j of the port composed of Ni and Nj terminals in the circuit under test is calculated in real time; Step 6: Real-time judgment of the port composed of Ni and Nj terminals in the circuit under test Whether the value of the equivalent impedance Zi,j satisfies the convergence condition; if the equivalent impedance Zi,j does not converge, go back to step 5, if the equivalent impedance Zi,j has converged, go to step 7; Step 7: Record the current The Zi,j calculated at the moment is used as the equivalent impedance of the tested port corresponding to the impedance test serial number Tu of the uth port; Step 8: Determine whether the port impedance test sequence has been executed, that is, whether u is equal to n; if u=n , it means that the execution has been completed, and the test is ended at this time.
上述端口阻抗自动仿真测试方法中,还包括:若u不等于n,则令u=u+1,改变独立电压源端子Ni、Nj的取值,使得(Ni,Nj)=Tu。The above-mentioned port impedance automatic simulation test method further includes: if u is not equal to n, set u=u+1, and change the values of the independent voltage source terminals Ni and Nj to make (Ni, Nj)=Tu.
上述端口阻抗自动仿真测试方法中,在步骤1中,被测电路中所有有源器件置零为所有电压源短路且所有电流源开路。In the above-mentioned port impedance automatic simulation test method, in
上述端口阻抗自动仿真测试方法中,在步骤2中,第k个端子的网络标识号记为Nk。In the above-mentioned port impedance automatic simulation test method, in
上述端口阻抗自动仿真测试方法中,在步骤3中,端口阻抗测试序列为TS={T1=(Na,Nb),T2=(Nc,Nd),…,Tn=(Np,Nq};其中,n为待测端口的总个数,T1为第1个端口的阻抗测试序号,Na为第a个端子的网络标识号,Nb为第b个端子的网络标识号,T2为第2个端口的阻抗测试序号,Nc为第c个端子的网络标识号,Nd为第d个端子的网络标识号,Tn为第n个端口的阻抗测试序号,Np为第p个端子的网络标识号,Nq为第q个端子的网络标识号。In the above-mentioned port impedance automatic simulation test method, in step 3, the port impedance test sequence is TS={T1=(Na, Nb), T2=(Nc, Nd), . . . , Tn=(Np, Nq}; wherein, n is the total number of ports to be tested, T1 is the impedance test serial number of the first port, Na is the network identification number of the a-th terminal, Nb is the network identification number of the b-th terminal, and T2 is the network identification number of the second port Impedance test serial number, Nc is the network identification number of the cth terminal, Nd is the network identification number of the dth terminal, Tn is the impedance test serial number of the nth port, Np is the network identification number of the pth terminal, and Nq is The network identification number of the qth terminal.
上述端口阻抗自动仿真测试方法中,在步骤5中,被测电路中Ni、Nj两端子组成端口的等效阻抗Zi,j通过如下公式得到:Zi,j=Ui,j/Ii,j。In the above-mentioned port impedance automatic simulation test method, in step 5, the equivalent impedance Zi,j of the port composed of Ni and Nj terminals in the circuit under test is obtained by the following formula: Zi,j=Ui,j/Ii,j.
上述端口阻抗自动仿真测试方法中,在步骤6中,收敛条件为:当Zi,j的变化率小于预设常数δ或仿真时间大于等于预设时间T0时,认为Zi,j已经收敛,否则,认为其没有收敛。In the above-mentioned port impedance automatic simulation test method, in step 6, the convergence condition is: when the rate of change of Zi,j is less than the preset constant δ or the simulation time is greater than or equal to the preset time T0, it is considered that Zi,j has converged, otherwise, It is considered that it has not converged.
本发明与现有技术相比具有如下有益效果:Compared with the prior art, the present invention has the following beneficial effects:
(1)本发明通过步骤1、步骤2、步骤4、步骤5,达到的效果为:借助电路原理中“加压求流”法,计算各端口的等效阻抗;(1) The present invention achieves the following effects through
(2)本发明通过步骤2、步骤3,达到的效果为:有效区分和定位被测电路的各个端子和端口;(2) The present invention achieves the effect of effectively distinguishing and locating each terminal and port of the circuit under test through
(3)本发明通过步骤2、步骤4,达到的效果为:在仿真软件中,使测量电路端口阻抗的独立电压源Vs与被测端口之间实现电气连接;(3) The present invention achieves the following effects through
(4)本发明通过步骤3,达到的效果为:列举所有待测端口,形成测试序列。一方面,便于后续自动切换测试端口;另一方面便于检查、核对测试项目,避免遗漏。(4) Through step 3, the present invention achieves the effect of enumerating all ports to be tested to form a test sequence. On the one hand, it is convenient for subsequent automatic switching of test ports; on the other hand, it is convenient to check and check test items to avoid omissions.
(5)本发明通过步骤3、步骤4、步骤8、步骤9,达到的效果为:完成对某一端口的阻抗测量后,自动测量下一端口的阻抗,直至完成对所有端口的测试;(5) The present invention achieves the following effects through step 3, step 4, step 8 and step 9: after completing the impedance measurement of a certain port, the impedance of the next port is automatically measured until the test of all ports is completed;
(6)本发明通过步骤5,达到的效果为:实时监测端口阻抗测量值,获取其动态变化过程;(6) The present invention achieves the following effects through step 5: real-time monitoring of the port impedance measurement value, and obtaining its dynamic change process;
(7)本发明通过步骤6、步骤7,达到的效果为:当被测电路中存在容性、感性元件时,舍弃电路动态过程中测得的阻抗值,以电路达到稳态后测得的阻抗值作为端口阻抗,有利于保证端口阻抗在多次测量中的一致性。(7) The present invention achieves the following effects through steps 6 and 7: when there are capacitive and inductive elements in the circuit under test, the impedance value measured in the dynamic process of the circuit is discarded, and the impedance value measured after the circuit reaches a steady state is used. The impedance value is used as the port impedance, which is beneficial to ensure the consistency of the port impedance in multiple measurements.
(8)本发明通过步骤6,达到的效果为:避免对于某一端口仿真测试时间过长,当时间超出可接受限度时,停止对该端口继续测试,进而保证完成测试序列的用时可控。(8) The present invention, through step 6, achieves the effect of avoiding too long a simulation test time for a certain port, and when the time exceeds an acceptable limit, the continuous testing of the port is stopped, thereby ensuring that the time used to complete the test sequence is controllable.
附图说明Description of drawings
通过阅读下文优选实施方式的详细描述,各种其他的优点和益处对于本领域普通技术人员将变得清楚明了。附图仅用于示出优选实施方式的目的,而并不认为是对本发明的限制。而且在整个附图中,用相同的参考符号表示相同的部件。在附图中:Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are for the purpose of illustrating preferred embodiments only and are not to be considered limiting of the invention. Also, the same components are denoted by the same reference numerals throughout the drawings. In the attached image:
图1是本发明实施例提供的仿真测试电路示意图;1 is a schematic diagram of a simulation test circuit provided by an embodiment of the present invention;
图2是本发明实施例提供的端口阻抗自动仿真测试方法执行步骤流程图;Fig. 2 is the flow chart of execution steps of the port impedance automatic simulation test method provided by the embodiment of the present invention;
图3是本发明实施例提供的MATLAB中绘制的仿真测试电路。FIG. 3 is a simulation test circuit drawn in MATLAB provided by an embodiment of the present invention.
具体实施方式Detailed ways
下面将参照附图更详细地描述本公开的示例性实施例。虽然附图中显示了本公开的示例性实施例,然而应当理解,可以以各种形式实现本公开而不应被这里阐述的实施例所限制。相反,提供这些实施例是为了能够更透彻地理解本公开,并且能够将本公开的范围完整的传达给本领域的技术人员。需要说明的是,在不冲突的情况下,本发明中的实施例及实施例中的特征可以相互组合。下面将参考附图并结合实施例来详细说明本发明。Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided so that the present disclosure will be more thoroughly understood, and will fully convey the scope of the present disclosure to those skilled in the art. It should be noted that the embodiments of the present invention and the features of the embodiments may be combined with each other under the condition of no conflict. The present invention will be described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.
本实施例提供了一种端口阻抗自动仿真测试方法,包括如下步骤:This embodiment provides an automatic simulation test method for port impedance, which includes the following steps:
步骤1:将被测电路中所有有源器件置零,即:将所有电压源短路、所有电流源开路;Step 1: Set all active devices in the circuit under test to zero, that is: short-circuit all voltage sources and open-circuit all current sources;
步骤2:在仿真文件中,依次为被测电路中的各个端子分配唯一且固定的网络标识号,其中,第k个端子的网络标识号记为Nk;Step 2: In the simulation file, assign a unique and fixed network identification number to each terminal in the circuit under test in turn, wherein the network identification number of the kth terminal is marked as Nk;
步骤3:用被测电路中两个端子网络标号表示一个端口,根据测试需求,制定端口测试序列TS={T1=(Na,Nb),T2=(Nc,Nd,…,Tn=(Np,Nq}。其中,n为待测端口的总个数。Step 3: Use the two terminal network labels in the circuit under test to represent a port. According to the test requirements, formulate the port test sequence TS={T1=(Na,Nb), T2=(Nc,Nd,...,Tn=(Np, Nq}, where n is the total number of ports to be tested.
步骤4:在仿真文件中,添加一个专门用来测量电路端口阻抗的独立电压源Vs,并为其正负端子分别分配网络标识号Ni、Nj,使得(Ni,Nj)=Tu,其中,u表示当前需要测试的端口序号,u=1。Step 4: In the simulation file, add an independent voltage source Vs specially used to measure the impedance of the circuit port, and assign network identification numbers Ni and Nj to its positive and negative terminals, so that (Ni, Nj)=Tu, where u Indicates the serial number of the port currently to be tested, u=1.
步骤5:仿真,实时记录独立电压源Vs的端口电压Ui,j和端口电流Ii,j,并基于电路原理中加压求流计算端口阻抗的原理,实时根据公式Zi,j=Ui,j/Ii,j计算被测电路中Ni、Nj两端子组成端口的等效阻抗;Step 5: Simulation, record the port voltage Ui,j and port current Ii,j of the independent voltage source Vs in real time, and calculate the port impedance based on the principle of pressurization and current flow in the circuit principle, according to the formula Zi,j=Ui,j/ Ii,j calculate the equivalent impedance of the port composed of Ni and Nj terminals in the circuit under test;
步骤6:实时判断Zi,j的取值是否满足收敛条件。收敛条件包括但不限于下述方式:当Zi,j的变化率小于某一常数δ或仿真时间大于等于某一时间T0时,认为Zi,j已经收敛,否则,认为其没有收敛。Step 6: Determine in real time whether the value of Zi,j satisfies the convergence condition. Convergence conditions include but are not limited to the following ways: when the rate of change of Zi,j is less than a certain constant δ or the simulation time is greater than or equal to a certain time T0, it is considered that Zi,j has converged, otherwise, it is considered that it has not converged.
若Zi,j未收敛,则返回步骤5继续仿真,若Zi,j已收敛,则执行步骤7;If Zi,j has not converged, go back to step 5 to continue the simulation, if Zi,j have converged, go to step 7;
步骤7:记录当前时刻算得的Zi,j,作为Tu对应的被测端口的等效阻抗;Step 7: Record the Zi,j calculated at the current moment as the equivalent impedance of the tested port corresponding to Tu;
步骤8:判断端口阻抗测试序列是否已经执行完毕,即u是否等于n。若u=n,则表示已经执行完毕,此时结束测试,否则,未执行完毕,则转至步骤9;Step 8: Determine whether the port impedance test sequence has been executed, that is, whether u is equal to n. If u=n, it means that the execution has been completed, and the test is ended at this time; otherwise, if the execution has not been completed, go to step 9;
步骤9:令u=u+1,改变独立源端子Ni、Nj的取值,使得(Ni,Nj)=Tu。Step 9: Let u=u+1, and change the values of the independent source terminals Ni and Nj to make (Ni, Nj)=Tu.
根据图1所示意的电路连接方式,在MATLAB/Simulink中绘制图2所示的电路图。绘图时,为测阻抗用的独立源的正负端子分配初始网络标识号,同时,为被测电路各端子分配唯一且固定的网络标识号。图2中所示的“simout”模块用于记录独立源的输出电压和电流。According to the circuit connection mode shown in Figure 1, draw the circuit diagram shown in Figure 2 in MATLAB/Simulink. When drawing, assign the initial network identification number to the positive and negative terminals of the independent source used for impedance measurement, and at the same time, assign a unique and fixed network identification number to each terminal of the circuit under test. The "simout" module shown in Figure 2 is used to record the output voltage and current from independent sources.
在此基础上,根据图3在MATLAB中编制驱动测试进程的m脚本,其中,计算端口阻抗所用的电压电流数据从“simout”模块导出的数据中获取。On this basis, the m script that drives the test process is compiled in MATLAB according to Figure 3, where the voltage and current data used to calculate the port impedance are obtained from the data derived from the "simout" module.
本发明借助电路原理中“加压求流”法,计算各端口的等效阻抗。本发明有效区分和定位被测电路的各个端子和端口。本发明使测量电路端口阻抗的独立电压源Vs与被测端口之间实现电气连接;本发明列举所有待测端口,形成测试序列,一方面,便于后续自动切换测试端口;另一方面便于检查、核对测试项目,避免遗漏。本发明完成对某一端口的阻抗测量后,自动测量下一端口的阻抗,直至完成对所有端口的测试。本发明实时监测端口阻抗测量值,获取其动态变化过程。本发明当被测电路中存在容性、感性元件时,舍弃电路动态过程中测得的阻抗值,以电路达到稳态后测得的阻抗值作为端口阻抗,有利于保证端口阻抗在多次测量中的一致性。本发明避免对于某一端口仿真测试时间过长,当时间超出可接受限度时,停止对该端口继续测试,进而保证完成测试序列的用时可控。The present invention calculates the equivalent impedance of each port by means of the method of "pressurizing current flow" in the circuit principle. The present invention effectively distinguishes and locates each terminal and port of the circuit under test. The present invention realizes electrical connection between the independent voltage source Vs for measuring circuit port impedance and the port under test; the present invention enumerates all ports to be tested to form a test sequence, on the one hand, it is convenient for subsequent automatic switching of test ports; Check the test items to avoid omissions. After completing the impedance measurement of a certain port, the present invention automatically measures the impedance of the next port until the test of all ports is completed. The invention monitors the measured value of port impedance in real time, and obtains its dynamic change process. In the present invention, when there are capacitive and inductive elements in the circuit under test, the impedance value measured in the dynamic process of the circuit is discarded, and the impedance value measured after the circuit reaches a steady state is used as the port impedance, which is beneficial to ensure that the port impedance can be measured for multiple times. consistency in. The present invention avoids that the simulation test time for a certain port is too long, and when the time exceeds an acceptable limit, the continuous testing of the port is stopped, thereby ensuring that the time used for completing the test sequence is controllable.
本发明虽然已以较佳实施例公开如上,但其并不是用来限定本发明,任何本领域技术人员在不脱离本发明的精神和范围内,都可以利用上述揭示的方法和技术内容对本发明技术方案做出可能的变动和修改,因此,凡是未脱离本发明技术方案的内容,依据本发明的技术实质对以上实施例所作的任何简单修改、等同变化及修饰,均属于本发明技术方案的保护范围。Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can use the methods and technical contents disclosed above to improve the present invention without departing from the spirit and scope of the present invention. The technical solutions are subject to possible changes and modifications. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solutions of the present invention belong to the technical solutions of the present invention. protected range.
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