Disclosure of Invention
In view of the above problems, the embodiment of the application provides a photosensitive module, a manufacturing method thereof, a fingerprint identification module and an X-ray detector.
In order to achieve the above object, the embodiments of the present application provide the following technical solutions:
the first aspect of the embodiment of the present application provides a photosensitive module, including: a substrate; the device layer is arranged on the substrate and comprises a thin film transistor, and the thin film transistor comprises a source electrode and a drain electrode; the photodiode is positioned on one side, away from the substrate, of the device layer and comprises a conducting layer, a P-type semiconductor layer, an intrinsic semiconductor layer and an N-type semiconductor layer which are sequentially stacked along the direction away from the substrate; the electrode layer is positioned on one side of the photodiode, which faces away from the substrate, and comprises positive electrodes and negative electrodes which are distributed at intervals; the N-type semiconductor layer is a transparent layer and is electrically connected with the drain electrode or the source electrode through the positive electrode, and the P-type semiconductor layer is electrically connected with the negative electrode through the conducting layer.
In one possible implementation manner, the photosensitive module further comprises a planarization layer located between the device layer and the electrode layer, the planarization layer covers the source electrode, the drain electrode and the photodiode, and the N-type semiconductor layer is exposed outside the planarization layer and is electrically connected with the positive electrode; the planarization layer is provided with a first via hole and a second via hole which are distributed at intervals, the positive electrode is electrically connected with the drain electrode or the source electrode through the first via hole, and the conducting layer is electrically connected with the negative electrode through the second via hole.
In one possible implementation, the source or drain is provided in the same layer as the conductive layer.
In one possible implementation manner, the material of the N-type semiconductor layer includes IGZO or ITZO.
In one possible implementation, the negative electrode of the planarization layer and/or the electrode layer is a transparent layer.
A second aspect of the embodiments of the present application provides a method for manufacturing a photosensitive module, including: forming a device layer on a substrate, the device layer including a thin film transistor including a source electrode and a drain electrode; forming a photodiode on one side of the device layer, which is far away from the substrate, wherein the photodiode comprises a conductive layer, a P-type semiconductor layer, an intrinsic semiconductor layer and an N-type semiconductor layer which are sequentially arranged along the direction far away from the substrate, and the N-type semiconductor layer is a transparent layer; forming a planarization layer on one side of the device layer, which is far away from the substrate, wherein the planarization layer covers the source electrode, the drain electrode and the photodiode, the N-type semiconductor layer is exposed outside the planarization layer, and the planarization layer is provided with first via holes and second via holes which are distributed at intervals; and forming an electrode layer on the planarization layer, wherein the electrode layer comprises positive electrodes and negative electrodes which are distributed at intervals, the positive electrodes are in contact with the N-type semiconductor layer, the positive electrodes are electrically connected with the drain electrodes or the source electrodes through the first through holes, and the negative electrodes are electrically connected with the conductive layer through the second through holes.
In one possible implementation, the step of forming the photodiode on a side of the device layer facing away from the substrate includes: forming a conductive layer on one side of the device layer, which is far away from the substrate; depositing a P-type semiconductor layer on the conducting layer; depositing an intrinsic semiconductor layer on the P-type semiconductor layer; sputtering IGZO or ITZO on the intrinsic semiconductor layer to form an N-type semiconductor layer; and patterning the N-type semiconductor layer, the intrinsic semiconductor layer, the P-type semiconductor layer and the conductive layer to form the photodiode.
A third aspect of the embodiments of the present application provides a fingerprint identification module, which includes the photosensitive module as described above.
A fourth aspect of the embodiments of the present application provides an X-ray detector, including the photosensitive module as described above; the insulating layer is positioned on one side, away from the substrate, of the electrode layer of the photosensitive module; and the conversion layer is positioned on one side of the insulating layer, which is far away from the substrate, and is used for converting the incident X-rays into visible light.
In one possible implementation, the conversion layer comprises a scintillator or a phosphor.
According to the sensitization module that this application embodiment provided and preparation method, fingerprint identification module and X ray detector, this sensitization module includes the thin film transistor who sets gradually along the direction that deviates from the substrate, photodiode and the electrode layer including positive electrode and negative electrode, wherein, photodiode's N type semiconductor layer is the stratum lucidum, compare with N type semiconductor layer for translucent amorphous silicon among the correlation technique, the quantity of photoinduced electron hole pair has been increased, photodiode's photoelectric conversion efficiency has been improved, and then improve the external quantum efficiency of sensitization module, promote the SNR of sensitization module. Therefore, the photosensitive module is applied to the fingerprint identification module, and the accuracy of fingerprint identification can be improved. The photosensitive module is applied to an X-ray detector, so that the X-ray dose can be reduced, and the image quality of an X-ray image can be improved.
In addition, the N-type semiconductor layer is electrically connected with the drain electrode or the source electrode of the thin film transistor through the positive electrode, the P-type semiconductor layer is electrically connected with the negative electrode, and negative voltage is applied to the negative electrode to be used as reverse bias voltage, so that the conventional driving chip can be matched, a special driving chip does not need to be developed, and the cost of a peripheral driving chip is greatly reduced.
Detailed Description
As described in the background art, increasing the photoelectric conversion efficiency of the photodiode can effectively improve the EQE of the fingerprint identification module or the X-ray detector, and improve the signal-to-noise ratio of the product. However, in the related art, the photodiode includes a P-type semiconductor layer, an intrinsic semiconductor layer, and an N-type semiconductor layer along the light incident direction, wherein the P-type semiconductor layer is amorphous silicon a-Si, and absorbs about 30% of visible light, which results in a large loss of the visible light absorbed by the intrinsic semiconductor layer, and reduces the number of photo-induced electron-hole pairs, thereby affecting the photoelectric conversion efficiency of the photodiode.
Herein, the external quantum efficiency EQE refers to the ratio of collected electrons (through the process of internal electron-hole recombination, etc.) to the number of all incident photons, which is called the external quantum efficiency EQE, when photons are incident on the surface of the photosensitive device, a part of the photons will excite the photosensitive material to generate electron-hole pairs, forming a current.
To solve the above technical problem, the embodiment of the present application provides a photosensitive module, through improving the structure of photosensitive module, the material of the N-type semiconductor layer of the photodiode is replaced by the translucent amorphous silicon into the transparent layer with wider band gap, and simultaneously, a negative voltage is applied on the electrode electrically connected with the P-type semiconductor layer as a reverse bias voltage, so that the number of photoinduced electron hole pairs is increased, the photoelectric conversion efficiency of the photodiode is improved, and further the signal-to-noise ratio of the photosensitive module is improved.
In order to make the aforementioned objects, features and advantages of the embodiments of the present application more comprehensible, embodiments of the present application are described in detail below with reference to the accompanying drawings. It is to be understood that the described embodiments are merely a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Fig. 1 is a schematic cross-sectional view of a photosensitive module according to an embodiment of the present application, and fig. 2 is a schematic partial enlarged structure of a photodiode in fig. 1.
As shown in fig. 1 and fig. 2, an embodiment of the present application provides a photosensitive module, including: substrate 1, device layer 2, photodiode 3, and electrode layer 4.
The substrate 1 may be made of any one of glass, Polyimide (PI), an amorphous silicon material, a polycrystalline silicon material, and a single crystal silicon material.
The device layer 2 is disposed on the substrate 1, the device layer 2 includes a thin film transistor 21, and the thin film transistor 21 includes a source 211, a drain 212, and a gate 213. The source 211 and the drain 212 are disposed at the same level, and the gate 213 is disposed at a different level from the source 211 and the drain 212, and is isolated by an insulating layer.
The photodiode 3 is located on a side of the device layer 2 facing away from the substrate 1, as shown in fig. 1, the photodiode 3 being located on an upper surface of the device layer 2. The photodiode 3 includes a conductive layer 34, a P-type semiconductor layer 31, an intrinsic semiconductor layer 32, and an N-type semiconductor layer 33, which are sequentially disposed in a direction away from the substrate 1.
The electrode layer 4 is located on the side of the photodiode 3 facing away from the substrate 1, and the electrode layer 4 comprises a positive electrode 41 and a negative electrode 42 which are distributed at intervals. The N-type semiconductor layer 33 is a transparent layer, the N-type semiconductor layer 33 is electrically connected to the drain electrode 212 or the source electrode 211 through the positive electrode 41, and the P-type semiconductor layer 31 is electrically connected to the negative electrode 42 through the conductive layer 34.
Alternatively, the number of the thin film transistors 21 and the photodiodes 3 is plural, and the plural thin film transistors 21 and the photodiodes 3 are arranged in an array, respectively. Optionally, an orthographic projection of the positive electrode 41 of the electrode layer 4 on the substrate 1 overlaps with an orthographic projection of the drain electrode 212 or the source electrode 211 on the substrate 1 to shorten a path for electrically connecting the positive electrode 41 with the drain electrode 212 or the source electrode 211. Optionally, the orthographic projection of the negative electrode 42 on the substrate 1 overlaps with the orthographic projection of the conductive layer 34 on the substrate 1 to shorten the path for electrically connecting the negative electrode 42 with the conductive layer 34. Thus, the positive electrodes 41 and the negative electrodes 42 of the electrode layer 4 are arranged in an array, respectively.
In this embodiment, the N-type semiconductor layer 33 is a transparent layer, and the material may include Indium Gallium Zinc Oxide (IGZO) or Indium Titanium Zinc Oxide (ITZO), and since the IGZO or ITZO band gap is wide, the transparent layer is completely transparent to visible light, and may allow more visible light to reach the intrinsic semiconductor layer 32, thereby improving the light response characteristic of the photodiode 3. Optionally, the material of the intrinsic semiconductor layer 32 and/or the P-type semiconductor layer 31 is amorphous silicon a-Si. When the N-type semiconductor layer 33 is a transparent layer, the difficulty of etching the intrinsic semiconductor layer 32 and the P-type semiconductor layer 31 can be reduced, and the problem of etching residue is not easily generated.
The external light is incident on the conductive layer 34 after passing through the N-type semiconductor layer 33, the intrinsic semiconductor layer 32, and the P-type semiconductor layer 31. The conductive layer 34 is generally made of a metal material and has a high reflectivity, so that light incident on the conductive layer 34 is reflected by the conductive layer 34 and then enters the intrinsic semiconductor layer 32 of the photodiode 3 again, thereby increasing the number of photo-induced electron-hole pairs and improving the photoelectric conversion efficiency of the photodiode 3.
The N-type semiconductor layer 33 is electrically connected to the drain electrode 212 or the source electrode 211 of the thin film transistor 21 via the positive electrode 41, and the P-type semiconductor layer 31 is electrically connected to the negative electrode 42. By applying a negative voltage as a reverse bias voltage to the negative electrode 42, the driving circuit can be matched with a conventional driving chip without developing a specific driving chip, thereby greatly reducing the cost of the peripheral driving chip.
According to the photosensitive module that this application embodiment provided, include along the thin film transistor 21 that sets gradually that deviates from substrate 1, photodiode 3 and electrode layer 4 including positive electrode 41 and negative electrode 42, through the transparent layer that the material of the N type semiconductor layer 33 with photodiode 3 is replaced by translucent amorphous silicon for the band gap broad, can increase the quantity of photoinduced electron hole pair, improve photodiode 3's photoelectric conversion efficiency, and then improve the EQE of photosensitive module, promote the SNR of photosensitive module. In addition, the N-type semiconductor layer 33 is electrically connected with the drain electrode 212/the source electrode 211 of the thin film transistor 21 through the positive electrode 41, the P-type semiconductor layer 31 is electrically connected with the negative electrode 42, and a negative voltage is applied to the negative electrode 42 as a reverse bias voltage, so that a conventional driving chip can be matched without developing a specific driving chip, and the cost of a peripheral driving chip is greatly reduced.
In some embodiments, the photodiode is a PIN photodiode. The PIN type photodiode has an undoped intrinsic semiconductor layer 32, and the intrinsic semiconductor layer 32 is depleted to become a light absorption region under a reverse bias voltage, so that the photodiode has high quantum efficiency and short response time.
In order to meet the requirement of the photosensitive module on light transmittance, optionally, the thickness of the N-type semiconductor layer 33 of the PIN photodiode is 300A to 500A, which is relatively thin, so that the light loss passing through the N-type semiconductor layer 33 can be reduced, and the light transmittance of the photosensitive module can be improved.
In some embodiments, the source 211 or the drain 212 of the thin film transistor 21 is disposed in the same layer as the conductive layer 34 of the photodiode 3. In this way, the source 211 and the drain 212 of the thin film transistor 21 and the conductive layer 34 in the photodiode 3 can be formed by the same patterning process, thereby simplifying the fabrication process of the photo module and reducing the overall thickness of the photo module.
On this basis, in the case that the source electrode 211 or the drain electrode 212 is disposed on the same layer as the conductive layer 34 of the photodiode 3, it is preferable that the source electrode 211, the drain electrode 212 and the conductive layer 34 are made of copper material with better reflectivity, and have higher reflectivity than that of the source electrode 211 and the drain electrode 212 which are conventionally made of Mo, Nd and the like, so as to improve the reflectivity of the conductive layer 34 as much as possible, so as to further increase the light absorption rate of the PIN photodiode.
In some embodiments, the photosensitive module further comprises a buffer layer 8, and the buffer layer 8 is located between the substrate 1 and the device layer 2. The buffer layer can comprise SiNx and SiOx to form an insulating film layer with good density and flatness and reduce the stress of the photosensitive module.
In some embodiments, as shown in fig. 1, the photosensitive module further includes a planarization layer 5 located between the device layer 2 and the electrode layer 4, the planarization layer 5 covers the source electrode 211, the drain electrode 212 and the photodiode 3, and the N-type semiconductor layer 33 is exposed outside the planarization layer 5 and electrically connected to the positive electrode 41. The planarization layer 5 is provided with first via holes 51 and second via holes 52 distributed at intervals, the positive electrode 41 is electrically connected with the drain electrode 212 or the source electrode 211 through the first via holes 51, and the conductive layer 34 is electrically connected with the negative electrode 42 through the second via holes 52.
Optionally, the planarization layer 5 is a transparent layer made of polyimide PI or other transparent resin, so as to improve the light transmittance of the photosensitive module, allow more visible light to enter the photodiode 3, increase the number of photo-induced electron-hole pairs, and improve the photoelectric conversion efficiency of the photodiode.
In some embodiments, the negative electrode 42 of the electrode layer 4 is a transparent layer to further improve the light transmittance of the photosensitive module, allow more visible light to enter the photodiode 3, increase the number of photo-induced electron-hole pairs, and improve the photoelectric conversion efficiency of the photodiode. The transparent material includes any one of Indium Tin Oxide (ITO), Indium Zinc Oxide (IZO), Aluminum Zinc Oxide (AZO), gallium-doped zinc oxide (GZO), Zinc Tin Oxide (ZTO), Gallium Tin Oxide (GTO), fluorine-doped tin oxide (FTO), zinc oxide (ZnOx), indium oxide (InOx), polyethylenedioxythiophene-polystyrenesulfonic acid PEDOT: PSS, graphene, and carbon nanotubes.
The material of the positive electrode 41 of the electrode layer 4 may be TiAlTi, MoNd, Cu, MoNd, MoAlNdMo, or the like. Preferably, the positive electrode 41 is made of Cu, and compared with TiAlTi, MoNd, MoAlNdMo, and the like, Cu has higher reflectivity, and can improve the reflection performance of the positive electrode 41 as much as possible, so as to further increase the light absorption rate of the PIN photodiode and improve the photocurrent of the PIN photodiode.
FIG. 3 is a block flow diagram illustrating a method for fabricating a photosensitive module according to an embodiment of the present disclosure.
As shown in fig. 3, the method for manufacturing a photosensitive module according to the embodiment of the present application includes the following steps S1-S4.
Step S1: a device layer 2 is formed on a substrate 1, the device layer 2 comprises a thin film transistor 21, the thin film transistor 21 comprises a source 211, a drain 212 and a gate 213, the source 211 and the drain 212 are arranged on the same layer, and the gate 213 is arranged on a layer different from the source 211 and the drain 212 and is isolated by an insulating layer. Alternatively, the substrate 1 may be made of any one of glass, polyimide, an amorphous silicon material, a polycrystalline silicon material, and a single crystal silicon material.
Step S2: a photodiode 3 is formed on the side of the device layer 2 facing away from the substrate 1, the photodiode 3 comprising a conductive layer 34, a P-type semiconductor layer 31, an intrinsic semiconductor layer 32 and an N-type semiconductor layer 33 arranged in that order in a direction away from the substrate 1, wherein the N-type semiconductor layer 33 is a transparent layer.
Alternatively, the material of the N-type semiconductor layer 33 may include IGZO or ITZO, which has a wide band gap and is completely transparent to visible light, so that more visible light may be allowed to reach the intrinsic semiconductor layer 32, thereby improving the light response characteristics of the photodiode 3.
Step S3: a planarization layer 5 is formed on the side of the device layer 2 facing away from the substrate 1, the planarization layer 5 covers the source electrode 211, the drain electrode 212 and the photodiode 3, the N-type semiconductor layer 33 is exposed outside the planarization layer 5, and the planarization layer 5 is provided with a first via hole 51 and a second via hole 52.
Optionally, the planarization layer 5 is a transparent layer made of polyimide PI or other transparent resin, so as to further improve the light transmittance of the photosensitive module, allow more visible light to enter the photodiode 3, increase the number of photo-induced electron-hole pairs, and improve the photoelectric conversion efficiency of the photodiode. The first via hole 51 and the second via hole 52 are formed through a patterning process when the planarization layer 5 is prepared.
Step S4: an electrode layer 4 is formed on the planarization layer 5, the electrode layer 4 includes a positive electrode 41 and a negative electrode 42, the positive electrode 41 is in contact with the N-type semiconductor layer 33, the positive electrode 41 is electrically connected to the drain electrode 212 or the source electrode 211 through a first via 51, and the negative electrode 42 is electrically connected to the conductive layer 34 through a second via 52.
Optionally, the negative electrode 42 of the electrode layer 4 is a transparent layer to further improve the light transmittance of the photosensitive module, allow more visible light to enter the photodiode 3, increase the number of photo-induced electron-hole pairs, and improve the photoelectric conversion efficiency of the photodiode. The material of the transparent layer includes any one of Indium Tin Oxide (ITO), Indium Zinc Oxide (IZO), Aluminum Zinc Oxide (AZO), gallium-doped zinc oxide (GZO), Zinc Tin Oxide (ZTO), Gallium Tin Oxide (GTO), fluorine-doped tin oxide (FTO), zinc oxide (ZnOx), indium oxide (InOx), polyethylenedioxythiophene-polystyrenesulfonic acid PEDOT: PSS, graphene, and carbon nanotubes.
The material of the positive electrode 41 of the electrode layer 4 may be TiAlTi, MoNd, Cu, MoNd, MoAlNdMo, or the like. Preferably, the positive electrode 41 is made of Cu, and compared with TiAlTi, MoNd, MoAlNdMo, and the like, Cu has higher reflectivity, and can improve the reflection performance of the positive electrode 41 as much as possible, so as to further increase the light absorption rate of the PIN photodiode and improve the photocurrent of the PIN photodiode. In one possible implementation, the step S2 of forming the photodiode 3 on the side of the device layer 2 facing away from the substrate 1 includes:
step S21: forming a conductive layer 34 on the side of the device layer 2 facing away from the substrate 1;
step S22: depositing a P-type semiconductor layer 31 on the conductive layer 34; optionally, the P-type semiconductor layer 31 is made of amorphous silicon a-Si.
Step S23: depositing an intrinsic semiconductor layer 32 on the P-type semiconductor layer 31; optionally, the material of the intrinsic semiconductor layer 32 is amorphous silicon a-Si.
Step S24: sputtering IGZO or ITZO on the intrinsic semiconductor layer 32 to form an N-type semiconductor layer;
step S25: the N-type semiconductor layer 33, the intrinsic semiconductor layer 32, the P-type semiconductor layer 31, and the conductive layer 34 are patterned to form the photodiode 3.
When the N-type semiconductor layer 33 is transparent IGZO or ITZO, the difficulty in etching the intrinsic semiconductor layer 32 and the P-type semiconductor layer 31 can be reduced, and the problem of etching residue is not easily caused.
In some embodiments, the source 211 or the drain 212 of the thin film transistor 21 is disposed in the same layer as the conductive layer 34 of the photodiode 3. In this way, the source 211 and the drain 212 of the thin film transistor 21 and the conductive layer 34 in the photodiode 3 can be formed by the same patterning process, thereby simplifying the fabrication process of the photo module and reducing the overall thickness of the photo module.
On this basis, in the case that the source electrode 211 or the drain electrode 212 is disposed on the same layer as the conductive layer 34 of the photodiode 3, it is preferable that the source electrode 211, the drain electrode 212 and the conductive layer 34 are made of copper material with better reflectivity, and have higher reflectivity than that of the source electrode 211 and the drain electrode 212 which are conventionally made of Mo, Nd and the like, so as to improve the reflectivity of the conductive layer 34 as much as possible, so as to further increase the light absorption rate of the PIN photodiode.
In the present application, the patterning process may include a photolithography process, or include a photolithography process and an etching step, and may also include other processes for forming a predetermined pattern, such as printing, inkjet printing, and the like; the photolithography process refers to processes such as a photoresist, a mask plate, an exposure machine and the like, which are used in the processes of film formation, exposure, development and the like, and a corresponding patterning process can be selected according to the structure formed in the application.
According to the preparation method of the photosensitive module, the N-type semiconductor layer 33 of the photodiode 3 is set to be the transparent layer, and compared with the semi-transparent amorphous silicon a-Si made of the N-type semiconductor layer in the related art, the quantity of photoinduced electron hole pairs is increased, the photoelectric conversion efficiency of the photodiode is improved, the EQE of the photosensitive module is further improved, and the signal-to-noise ratio of the photosensitive module is improved. In addition, the N-type semiconductor layer 33 is electrically connected with the drain electrode 212 or the source electrode 211 of the thin film transistor 21 through the positive electrode 41, the P-type semiconductor layer 31 is electrically connected with the negative electrode 42, and a negative voltage is applied to the negative electrode 42 as a reverse bias voltage, so that a conventional driving chip can be matched without developing a specific driving chip, and the cost of a peripheral driving chip is greatly reduced.
In addition, this application embodiment still provides a fingerprint identification module, includes as before the sensitization module. The light entering the photodiode 3 of the photosensitive module from the outside can be visible light or infrared light, and is used for identifying fingerprints.
In one possible implementation, the working principle of the fingerprint identification module is as follows: the finger contacts the screen of the fingerprint identification module, and when the light source irradiates to the valley line and the ridge line of the finger fingerprint, the light is projected to the photodiode 3 due to the difference of the reflection angle of the valley line and the ridge line and the reflected illumination intensity, so that the resistance value of the photodiode 3 is changed, and the current is changed. The current is transmitted to the fingerprint reading device through the thin film transistor 21 in the on state, and the valley line and the ridge line of the fingerprint are identified according to the current. The light source used at this time is generally a backlight source, so that the orthographic projection of the photodiode 3 on the substrate 1 needs to fall into the orthographic projection of the conductive layer 34 or the drain 212 of the thin film transistor 21 on the substrate 1, and the conductive layer 34 or the drain 212 of the thin film transistor 21 are made of an opaque conductive material, such as copper, so that the light directly irradiating the photodiode 3 from the backlight source can be blocked, and the current change of the photodiode 3 is prevented from being influenced.
Because the N-type semiconductor layer 33 of the photodiode 3 in the fingerprint identification module is set as the transparent layer, the number of photoinduced electron hole pairs can be increased, the photoelectric conversion efficiency of the photodiode 3 is improved, the EQE of the fingerprint identification module is further improved, the signal-to-noise ratio of the fingerprint identification module is improved, and therefore the accuracy of fingerprint identification can be effectively improved.
Fig. 4 is a schematic cross-sectional structure diagram of an X-ray detector according to an embodiment of the present application.
As shown in fig. 4, the embodiment of the present application further provides an X-ray detector, which is widely applied to the fields of medical treatment, safety, nondestructive testing, scientific research, and the like, and plays an important role in the daily life of a national civilization.
The X-ray detector includes: a photosensitive module, an insulating layer 6 and a conversion layer 7 as described above.
The photosensitive module comprises thin film transistors 21 distributed in an array and photodiodes 3 distributed in an array, and the thin film transistors 21 are used for controlling the photodiodes 3.
The insulating layer 6 is located on the side of the electrode layer 4 of the photosensitive module facing away from the substrate 1. The material of the insulating layer 6 may be SiOx.
A conversion layer 7 is situated on the side of the insulating layer 6 facing away from the substrate 1 for converting incident X-rays into visible light. The wavelength of visible light is about 550 nm. Alternatively, the conversion layer 7 comprises a scintillator, which may be cesium iodide. Alternatively, the conversion layer 7 includes a phosphor, which may be gadolinium oxysulfide.
In addition, the X-ray detector usually further includes a signal storage basic pixel unit, a signal amplifying and reading structure, and the like.
In one possible implementation, the operating principle of the X-ray detector is: the X-ray is exposed by the conversion layer 7 and then converted into visible light, the visible light is incident to the photodiode 3, the X-ray is converted into an electric signal, then the electric charge signal of each pixel is read out by the thin film transistor array and converted into a digital signal, and the digital signal is transmitted to a computer image processing system to be integrated into an X-ray image.
Because the material of the N-type semiconductor layer 33 of the photodiode 3 in the X-ray detector is the transparent layer, the number of photoinduced electron hole pairs can be increased, the photoelectric conversion efficiency of the photodiode 3 is improved, the EQE of the X-ray detector is further improved, the signal-to-noise ratio of the X-ray detector is improved, the X-ray dosage can be reduced, and the image quality of an X-ray image is improved.
It should be noted that references in the specification to "one embodiment," "an example embodiment," "some embodiments," etc., indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is within the knowledge of one skilled in the art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.
It should be readily understood that "on … …", "above … …" and "above … …" in this application should be interpreted in its broadest sense such that "on … …" means not only "directly on something", but also includes the meaning of "on something" with intervening features or layers therebetween, and "above … …" or "above … …" includes not only the meaning of "above something" or "above" but also includes the meaning of "above something" or "above" without intervening features or layers therebetween (i.e., directly on something).
The term "substrate" as used herein refers to a material on which a subsequent layer of material is added. The substrate itself may be patterned. The material added atop the substrate may be patterned or may remain unpatterned. In addition, the substrate may comprise a wide range of materials, such as silicon, germanium, gallium arsenide, indium phosphide, and the like. Alternatively, the substrate may be made of a non-conductive material (e.g., glass, plastic, or sapphire wafer, etc.).
The term "layer" as used herein may refer to a portion of material that includes a region having a thickness. A layer may extend over the entire underlying or overlying structure or may have a smaller extent than the underlying or overlying structure. Furthermore, a layer may be a region of a continuous structure, homogeneous or heterogeneous, having a thickness less than the thickness of the continuous structure. For example, a layer may be located between the top and bottom surfaces of the continuous structure or between any pair of lateral planes at the top and bottom surfaces. The layers may extend laterally, vertically, and/or along a tapered surface. The substrate may be a layer, may include one or more layers therein, and/or may have one or more layers located thereon, above and/or below. The layer may comprise a plurality of layers. For example, the interconnect layer may include one or more conductors and contact layers (within which contacts, interconnect lines, and/or vias are formed) and one or more dielectric layers.
Finally, it should be noted that: the above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.