Disclosure of Invention
The invention provides an underwater acoustic communication device and a wake-up method, which are used for solving the problems that in the prior art, the underwater acoustic communication device is woken up by receiving a specific underwater acoustic signal, but the specific underwater acoustic signal is frequently triggered by mistake, so that the underwater acoustic communication device is in a normal working mode, consumes a large amount of electric energy, and reduces the underwater working time of the underwater acoustic communication device.
In a first aspect, the present invention provides an underwater acoustic communication device, including a standby module, an acoustic communication module, and a power supply module; the standby module comprises a first output management unit, a clock unit and a switch unit; the acoustic communication module comprises a second output management unit and an underwater acoustic communication circuit; the first output management unit is connected with the clock unit and the switch unit; the clock unit is connected with the switch unit; the switch unit is connected with the second output management unit; the power supply module is respectively connected with the first output management unit and the second output management unit; the second output management unit is connected with the underwater acoustic communication circuit.
Optionally, the underwater acoustic communications circuit further comprises a processor unit; the processor unit is connected with the second output management unit, the processor unit is connected with the clock unit, and the processor unit is connected with the switch unit.
Optionally, the switch unit includes an isolation subunit and a trigger switch subunit; the isolation subunit is connected with the processor unit and the first output management unit; the trigger switch subunit is connected with the isolation subunit, and the trigger switch subunit is connected with the second output management unit.
Optionally, the isolation subunit includes a first triode, a first resistor, a second resistor, and a third resistor; the collector of the first triode is connected with the trigger switch subunit; the first end of the first resistor is connected with the processor unit, and the second end of the first resistor is connected with the base electrode of the first triode; the first end of the second resistor is connected with the base electrode of the first triode, and the second end of the second resistor is connected with the emitting electrode of the first triode; the first end of the third resistor is connected with the collector of the first triode, and the second end of the third resistor is connected with the first output management unit.
Optionally, the trigger switch subunit includes a first trigger and a fourth resistor; a first end of the fourth resistor is connected with a power input pin of the first trigger, and a second end of the fourth resistor is connected with the first output management unit; and the CLRn pin of the first trigger is connected with the collector electrode of the first triode in the isolating subunit.
Optionally, the trigger switch subunit further includes a fifth resistor and a second triode; a first end of the fifth resistor is connected with an output pin of the first trigger, and a second end of the fifth resistor is connected with a base electrode of the second triode; and the collector electrode of the second triode is connected with the second output management unit.
Optionally, the clock unit includes a clock chip and a sixth resistor; an output pin of the clock chip is connected with a first end of the sixth resistor; the second end of the sixth resistor is connected with a PREn pin of the first trigger.
Optionally, the first output management unit comprises a first DC-DC power supply module.
Optionally, the second output management unit includes a second DC-DC power module, and a turn-off pin of the second DC-DC power module of the second output management unit is connected to a collector of the second triode.
In a second aspect, the present invention provides a method for waking up an underwater acoustic communication device, where the method is applied to any one of the above-mentioned underwater acoustic communication devices, and the method includes:
if a sleep instruction is received, sending a time setting instruction to a clock unit and sending a turn-off control signal to a switch unit;
the turn-off control signal is used for triggering the switch unit to turn off the second output management unit; the time setting instruction is used for setting the time for the clock unit to send the wake-up signal to the switch unit; the wake-up signal is used for triggering the switch unit to start the second output management unit, so that the acoustic communication module is started to wake up the underwater acoustic communication equipment.
Compared with the prior art, the technical scheme provided by the embodiment of the invention has the following advantages:
in the embodiment of the invention, the time for sending the wake-up signal is configured by the clock unit, and the underwater acoustic communication equipment is awakened after the time arrives, so that the underwater acoustic communication equipment can be awakened at the set time, and in the prior art, the underwater acoustic communication equipment is awakened by receiving the specific underwater acoustic signal, and the specific underwater acoustic signal is frequently triggered by mistake to cause the underwater acoustic communication equipment to enter a working mode in a time period which does not need to be awakened, so that the electric energy consumed by the underwater acoustic communication equipment is less than that consumed by the underwater acoustic communication equipment in the prior art.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
The embodiments in the present description are all described in a progressive manner, and some of the embodiments are mainly described as different from other embodiments, and the same and similar parts among the embodiments can be referred to each other.
As shown in fig. 1, the present invention provides an underwater acoustic communication device, which includes a standby module 100, an acoustic communication module 200, and a power supply module 300; the standby module 100 includes a first output management unit 110, a clock unit 120, and a switch unit 130; the acoustic communication module 200 includes a second output management unit 210 and an underwater acoustic communication circuit 220; the first output management unit 110 is connected to the clock unit 120 and the switch unit 130; the clock unit 120 is connected to the switch unit 130; the switching unit 130 is connected to the second output management unit 210; the power supply module 300 is connected to the first output management unit 110 and the second output management unit 210 respectively; the first output management unit 110 is configured to convert the output voltage of the power supply module 120 and output the converted output voltage to the clock unit 120 and the switch unit 130, the second output management unit 210 is connected to the underwater acoustic communication circuit 220, and the second output management unit 210 is configured to convert the output voltage of the power supply module 120 and output the converted output voltage to the underwater acoustic communication circuit 220 after the switch unit 130 is turned on.
The standby module 100 is configured to, when the underwater acoustic communication device needs to enter a normal working state, drive the acoustic communication module 200 to work by the standby module 100 so that the underwater acoustic communication device works normally; the acoustic communication module 200 is started when the underwater acoustic communication device works normally, so that the underwater acoustic communication device works normally; the power supply module 300 is used for supplying power to the standby module 100 and the acoustic communication module 200; the first output management unit 110 is configured to provide the voltage drop of the power supply module 300 to 3V to the clock unit 120 and the switch unit 130; the second output management unit 210 is configured to convert the voltage of the power supply module 300 into a voltage required by the underwater acoustic communication circuit 220 when the underwater acoustic communication device is in normal operation; the underwater acoustic communication circuit 220 is a main functional module for realizing signal interaction between the underwater acoustic communication device and other underwater acoustic communication devices; the clock unit 120 is configured to configure a time for sending the wake-up signal, and send the wake-up signal to the switch unit 130 when the time arrives; the switch unit 130 is used for turning off or turning on the second output management unit 210.
It should be noted that the CLRn pin in the first flip-flop 133 is an asynchronous reset pin, and the PREn pin in the first flip-flop 133 is an asynchronous set pin.
Specifically, referring to fig. 1, in conjunction with fig. 2 to 4, after receiving the sleep command, the processor unit 400 sets a time for sending the wake-up signal to the clock unit 120 through the serial clock pin SCL and the serial data pin SDA of the clock chip 121, and sends a high level to the first resistor R1 of the isolation subunit 131 so as to turn on the first transistor Q1; the first triode Q1 is turned on to make the CLRn pin in the first flip-flop 133 in the trigger switch subunit 132 be at a low level; the CLRn pin of the first flip-flop 133 is at a low level to enable the first flip-flop 133 to trigger the state 2, and the output pin Qn of the first flip-flop 133 is at a high level, so that the second transistor Q2 is turned on; the second transistor Q2 is turned on to make the turn-off pin of the second DC-DC power supply module in the second output management unit 210 low, thereby turning off the second output management unit 210.
The clock unit 120 sends a wake-up signal to the switch unit 130 after the time comes, so that the PREn pin in the first flip-flop 133 in the switch unit 130 is at a low level; the first flip-flop 133 triggers the state 1 to make the output pin Qn of the first flip-flop 133 be low, so that the second transistor Q2 is not turned on; the second transistor Q2 is turned off, so that the off pin of the second DC-DC power module in the second output management unit 210 is pulled up to a high level, thereby turning on the second output management unit 210; the second output management unit 210 supplies power to the underwater acoustic communication circuit 220 to wake up the underwater acoustic communication device.
Since the underwater acoustic communication device only operates in the standby module 100 when the second output management unit 210 is turned off, and since the first DC-DC power module in the first output management unit 110 reduces the voltage of the power supply module 300 to 3V and supplies the reduced voltage to the standby module 100, unnecessary power consumption is reduced, and thus, the clock unit 120 is configured to transmit a wake-up signal, and the underwater acoustic communication device is woken up after the time comes, so that the underwater acoustic communication device can wake up the underwater acoustic communication device at a set time, unnecessary power consumption is reduced, and the operating time of underwater operation of the underwater acoustic communication device is prolonged.
Further, as shown in fig. 1, the underwater acoustic communication circuit 220 further includes a processor unit 400; the processor unit 400 is connected to the second output management unit 210, the processor unit 400 is connected to the clock unit 120, and the processor unit 400 is connected to the switch unit 130. The processor unit 400 sends a signal for turning off the second output management unit 210 to the switch unit 130, thereby controlling the switch unit 130 to turn off the second output management unit 210 to enable the underwater acoustic communication device to enter a sleep state; while setting the time for sending the wake-up signal to the clock unit 120.
Further, referring to fig. 2, in conjunction with fig. 3, the switching unit 130 includes an isolation subunit 131 and a trigger switching subunit 132; the isolation subunit 131 is connected to the processor unit 400, and the isolation subunit 131 is connected to the first output management unit 110; the trigger switch subunit 132 is connected to the isolation subunit 131, and the trigger switch subunit 132 is connected to the second output management unit 210. The isolation subunit 131 is configured to receive a signal sent by the processor unit 400 to turn off the second output management unit 210; and the first transistor Q1 in the isolation subunit 131 is used to isolate the IO state of the processor unit 400, because the CLRn pin of the first flip-flop 133 is to be kept in a high state after the processor unit 400 is powered off, and the first transistor Q1 can pull up the CLRn pin of the first flip-flop 133 to be in a high state.
The trigger switch subunit 132 is configured to receive a signal, which is sent by the isolation subunit 131 and used to close the second output management unit 210, and receive a wake-up signal sent by the clock unit 120.
Further, as shown in fig. 3, the isolating subunit 131 includes a first transistor Q1, a first resistor R1, a second resistor R2, and a third resistor R3; the collector of the first transistor Q1 is connected to the trigger switch subunit 132; a first end of the first resistor R1 is connected with the processor unit 400, and a second end of the first resistor R1 is connected with a base of the first triode Q1; a first end of the second resistor R2 is connected with the base electrode of the first triode Q1, and a second end of the second resistor R2 is connected with the emitter electrode of the first triode Q1; a first terminal of the third resistor R3 is connected to the collector of the first transistor Q1, and a second terminal of the third resistor R3 is connected to the first output management unit 110.
Specifically, after the isolating sub-unit 131 receives the signal sent by the processor unit 400 to turn off the second output management unit 210, the first triode Q1 is turned on, so that the CLRn pin of the first flip-flop 133 is at a low level.
Further, referring to fig. 3, in conjunction with fig. 4, the trigger switch subunit 132 includes a first trigger 133 and a fourth resistor R4; a first terminal of the fourth resistor R4 is connected to the power input pin D of the first flip-flop 133, and a second terminal of the fourth resistor R4 is connected to the first output management unit 110; the CLRn pin of the first flip-flop 133 is connected to the collector of a first transistor Q1 in the isolating subunit 131. Specifically, at the beginning of power-up, the power input pin D of the first flip-flop 133 is connected to the first output management unit 110, and the power input pin D of the first flip-flop 133 is at a high level, so that the first flip-flop 133 triggers state 3.
When the trigger switch subunit 132 receives the signal for turning off the second output management unit 210 sent by the isolation subunit 131, the CLRn pin of the first flip-flop 133 changes to a low level, and the first flip-flop 133 triggers the state 2.
Further, referring to fig. 3, in conjunction with fig. 1-2, the trigger switch subunit 132 further includes a fifth resistor R5 and a second transistor Q2; a first end of the fifth resistor R5 is connected to the output pin Qn of the first flip-flop 133, and a second end of the fifth resistor R5 is connected to the base of the second transistor Q2; the collector of the second transistor Q2 is connected to the second output management unit 210.
Specifically, when the first flip-flop 133 triggers state 3, the output pin Qn of the first flip-flop 133 is at a low level, so that the second transistor Q2 is rendered non-conductive; the second output management unit 210 normally supplies power to the underwater acoustic communication circuit 220 so that the underwater acoustic communication apparatus normally operates.
When the CLRn pin of the first flip-flop 133 changes to a low level and the first flip-flop 133 triggers the state 2, the output pin Qn of the first flip-flop 133 is at a high level, so that the second transistor Q2 is turned on; the second transistor Q2 is turned on to make the off pin of the second DC-DC power supply module low, thereby turning off the second output management unit 210; the second output management unit 210 is turned off to put the underwater acoustic communication apparatus into a sleep state.
Further, as shown in fig. 3, the clock unit 120 includes a clock chip 121 and a sixth resistor R6; an output pin INTn of the clock chip 121 is connected to a first end of the sixth resistor R6; a second end of the sixth resistor R6 is connected to the PREn pin of the first flip-flop 133. Specifically, after the sleep time of the clock unit 120 is over, the output pin INTn of the clock chip 121 and the sixth resistor R6 of the clock chip 121 are used to make the pin PREn of the first flip-flop 133 at a low level.
Further, as shown in fig. 3, the first output management unit 110 includes a first DC-DC power supply module. The first DC-DC power supply module is used to reduce the voltage of the power supply module 300 to 3V and provide the power supply module 100.
Further, as shown in fig. 2, the second output management unit 210 includes a second DC-DC power module, and a turn-off pin of the second DC-DC power module in the second output management unit 210 is connected to a collector of the second transistor Q2. A shutdown pin of the second DC-DC power module of the second output management unit 210 is configured to control the second output management unit 210 to turn on or turn off, specifically, when the shutdown pin of the second DC-DC power module of the second output management unit 210 is at a low level, the second output management unit 210 is turned off; when the turn-off pin of the second DC-DC power module of the second output management unit 210 is at a high level, the second output management unit 210 is turned on.
Referring to fig. 3, in conjunction with fig. 4, the clock unit 120 further includes a seventh resistor R7 and an eighth resistor R8; a first end of the seventh resistor R7 is connected to the first output management unit 110, and a second end of the seventh resistor R7 is connected to a second end of the sixth resistor R6; a first end of the eighth resistor R8 is connected to the first output management unit 110, and a second end of the eighth resistor R8 is connected to the power input pin EVI of the clock chip 121. Since the clock unit 120 is sending the wake-up signal time, the pre pin of the first flip-flop 133 is to be kept in a high state, and the seventh resistor R7 can pull up the pre pin of the first flip-flop 133 to be in a high state.
Further, as shown in fig. 1 to 4, the present invention provides a wake-up method for an underwater acoustic communication device, where the method is applied to any one of the above-mentioned underwater acoustic communication devices, and the method includes:
if the sleep command is received, a time setting command is sent to the clock unit 120 and a turn-off control signal is sent to the switch unit 130;
wherein, the turn-off control signal is used for triggering the switch unit 130 to turn off the second output management unit 210; the time setting instruction is used for setting the time for the clock unit 120 to send the wake-up signal to the switch unit 130; the wake-up signal is used to trigger the switch unit 130 to turn on the second output management unit 210, so that the acoustic communication module 200 is turned on to wake up the underwater acoustic communication device.
Specifically, after receiving the sleep command, the processor unit 400 sets a time for sending the wake-up signal to the clock unit 120 through the serial clock pin SCL and the serial data pin SDA of the clock chip 121, and the clock unit 120 sends the wake-up signal to the switch unit 130 after the time for sending the wake-up signal arrives, so that the pre pin in the first flip-flop 133 is at a low level; the first flip-flop 133 triggers the state 2, so that the output pin Qn of the first flip-flop 133 becomes low, and thus the second transistor Q2 is not turned on; the second transistor Q2 is turned off, so that the off pin of the second DC-DC power module in the second output management unit 210 is pulled up to a high level, thereby turning on the second output management unit 210; the second output management unit 210 supplies power to the underwater acoustic communication circuit 220 to wake up the underwater acoustic communication device. Therefore, the awakening method of the underwater acoustic communication equipment enables the underwater acoustic communication equipment to be awakened in the set time, reduces unnecessary electric energy consumption, and prolongs the working time of underwater operation of the underwater acoustic communication equipment.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; the communication may be direct, indirect via an intermediate medium, or internal to both elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art. In addition, in the description of the present invention, "a plurality" means two or more unless otherwise specified.
The foregoing are merely exemplary embodiments of the present invention, which enable those skilled in the art to understand or practice the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.