CN113594359B - Phase-change superlattice material and phase-change memory unit thereof - Google Patents

Abstract

The application discloses a phase-change superlattice material and a phase-change memory unit thereof, the phase-change superlattice material includes a semiconductor material layer and a semi-metal material layer, and the semiconductor material layer is (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1‑y , the semi-metal material layer A _x Te _1‑x , wherein A is one of scandium Sc, yttrium Y, manganese Mn, zinc Zn, cadmium Cd, mercury Hg species, x ranges from 0.4 to 0.7, and y ranges from 0 to 0.6. The phase change memory cell prepared based on the semiconductor material layer of the present application has a relatively high phase change speed, which can increase the writing operation speed; and the phase change memory cell prepared based on the semiconductor material layer and the semi-metal material layer has better logic value discrimination characteristics , effectively improving the usability of phase-change memory cells prepared based on semiconductor material layers and semi-metal material layers.

Description

Phase-change superlattice material and its phase-change memory cell

technical field

The present application relates to the technical field of semiconductor information functional materials, in particular to a phase change superlattice material and a phase change memory unit thereof.

Background technique

Memory is an important part of the current semiconductor market and the cornerstone of information technology, playing an important role in both life and the national economy. With the rapid increase of the amount of information along with social development, the research and development of memory with high data storage density has become an important task for memory researchers. Among them, phase change memory is considered by the International Semiconductor Industry Association to be the most likely to replace the current The device that will become the mainstream product of future memory and the device that will be the first to become a commercial product. In the phase-change memory, the reversible transition between amorphous and polycrystalline phase-change materials is used to realize the above-mentioned resistance change. Commonly used phase change memory material systems mainly include Ge-Sb-Te, Si-Sb-Te, Ag-In-Sb-Te, etc. However, the current phase change memory material system has the problem of slow write operation speed and large resistance fluctuation, which leads to the non-concentrated distribution range of device resistance, which is not conducive to the distinction between logical values "0" and "1". The usability of the phase change memory cells formed by the storage material system is low.

Contents of the invention

The main purpose of the present application is to provide a phase-change superlattice material and its phase-change memory unit, aiming at solving the technical problem of low availability of phase-change memory units formed based on the current phase-change memory material system.

In order to achieve the above object, the embodiment of the present application provides a phase-change superlattice material, the phase-change superlattice material comprises a semiconductor material layer and a half-metal material layer, and the semiconductor material layer is (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y , the semi-metal material layer is A _x Te _1-x , wherein A is one of scandium Sc, yttrium Y, manganese Mn, zinc Zn, cadmium Cd, mercury Hg , x is from 0.4 to 0.7, and y is from 0 to 0.6.

Optionally, the semiconductor material layer and the half-metal material layer are alternately stacked, and the stacking times are between 5 and 20 times.

Optionally, the initial state of the semiconductor material layer is a metastable cubic phase crystal structure.

Optionally, the semi-metal material layer has the same cubic phase crystal structure as the semiconductor material layer.

Optionally, the thickness of the semiconductor material layer is 0 nm to 20 nm.

In order to achieve the above object, the present application also provides a phase-change memory cell, which includes a bottom electrode, a top electrode, and the above-mentioned phase-change superlattice material, and the phase-change superlattice material is arranged on the Between the bottom electrode and the top electrode; wherein, the material of the bottom electrode comprises any one of aluminum Al, tungsten W and tin TiN, and the material of the top electrode comprises any one of Al, W and TiN .

Optionally, the phase change memory unit further includes a substrate and a dielectric coating layer, wherein the material of the dielectric coating layer includes any one of silicon dioxide SiO ₂ and silicon nitride Si ₃ N ₄ .

Optionally, the bottom electrode is disposed on the substrate, and the dielectric coating layer wraps around the bottom electrode, the phase-change superlattice material, and the top electrode.

Optionally, the phase-change memory cell is a phase-change memory cell with a restricted structure or a phase-change memory cell with a T-type structure.

Embodiments of the present application provide a phase-change superlattice material and a phase-change memory cell thereof, the phase-change superlattice material includes a semiconductor material layer and a semi-metal material layer, and the semiconductor material layer is (A _x Te _{1- x} ) _y (Sb _0.4 Te _0.6 ) _1-y , the semi-metal material layer A _x Te _1-x , wherein A is one of scandium Sc, yttrium Y, manganese Mn, zinc Zn, cadmium Cd, and mercury Hg , x is from 0.4 to 0.7, and y is from 0 to 0.6. In this application, the semiconductor material layer (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y contains A _x Te _1-x as a nucleation center and Sb _0.4 Te _0.6 material that can undergo repeated reversible phase transitions, so The semiconductor material layer can increase the nucleation speed under the action of the nucleation center, so that the semiconductor material layer itself has a higher phase change speed, so that the phase change memory unit prepared based on the semiconductor material layer has a higher phase change speed, can improve the writing operation speed; at the same time, the half-metal material layer A _x Te _1-x can also limit the semiconductor material layer (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y diffusion, ensuring that (A _x Te _{1 -x} ) _y (Sb _0.4 Te _0.6 ) _1-y can achieve phase change in the quasi-two-dimensional scale range, effectively suppressing the problem of large resistance fluctuations that are easily generated when phase change materials are phase-change in the three-dimensional scale range, making The phase-change memory cell prepared based on the semiconductor material layer and the semi-metal material layer has good logic value discrimination characteristics, and effectively improves the usability of the phase-change memory cell prepared based on the semiconductor material layer and the semi-metal material layer.

Description of drawings

FIG. 1 is a schematic structural diagram of a phase-change memory cell with a restricted structure in the present application;

FIG. 2 is a schematic structural diagram of a phase-change memory cell with a T-shaped structure in the present application;

Fig. 3 is a graph showing the electrical operation performance of a memory cell based on a compound GST phase-change material;

FIG. 4 is a graph of the electrical operation performance of the memory cell based on the phase-change superlattice material of the present application.

The realization, functional features and advantages of the present application will be further described in conjunction with the embodiments and with reference to the accompanying drawings.

Detailed ways

It should be understood that the specific embodiments described here are only used to explain the present application, and are not intended to limit the present application.

In order to better understand the above-mentioned technical solutions, exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided for more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

In order to better understand the above-mentioned technical solution, the above-mentioned technical solution will be described in detail below in conjunction with the accompanying drawings and specific implementation methods.

The application provides a phase-change superlattice material, which at least includes a semiconductor material layer with an information storage function and a semi-metallic material layer with stable structural properties, two materials with large performance differences. The implementation of this application In the example phase change superlattice material, the semiconductor material layer is (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y , and the half-metal material layer is A _x Te _1-x , where Te(tellurium) is Tellurium, A is one of Sc (Scandium, scandium), Y (Yttrium, yttrium), Mn (Manganese, manganese), Zn (zinc, zinc), Cd (Cadmium, cadmium), Hg (Hydrargyrum, mercury), For example, if A is Sc, the semiconductor material layer is (Sc _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y , and the half-metal material layer is Sc _x Te _1-x ; if A is Y, the semiconductor material layer is The layer is (Y _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y , and the semi-metal material layer is Y _x Te _1-x . x is 0.4 to 0.7, for example, x is 0.4, 0.5, 0.6, 0.7, etc., y is 0 to 0.6, for example, y is 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, etc. For example, if x is 0.5, y is 0.5, and A is Sc, then the semiconductor material layer is (Sc _0.5 Te _0.5 ) _0.6 (Sb _0.4 Te _0.6 ) _0.4 , and the half-metal material layer is Sc _0.5 Te _0.5 .

It should be noted that the phase-change superlattice material in this application is formed by stacking alternately multiple layers of semiconductor material layers and layers of semi-metallic materials, and the number of stacking times is between 5 and 20 times, for example, the layers of semiconductor materials and layers of semi-metal materials The number of alternate stacking of semi-metal material layers may be 5 times, 10 times, 15 times, 20 times, etc., and the number of stacking times in this embodiment may preferably be 10 times.

It should be further noted that the initial state of the semiconductor material layer in the phase-change superlattice material of the present application is a metastable cubic phase crystal structure, and the half-metal material layer always has the same cubic phase crystal structure as the semiconductor material layer. It can be understood that the Sb _0.4 Te _0.6 material constituting the semiconductor material in the phase-change superlattice material of the present application has two crystal states, namely a metastable cubic phase crystal structure and a stable hexagonal phase crystal structure. This application controls the initial state of Sb _0.4 Te _0.6 to be a cubic phase crystal structure, so that Sb _0.4 Te _0.6 can undergo a reversible phase transition between an amorphous structure and a cubic phase crystal structure, which is better than that between an amorphous structure and a hexagonal phase crystal The phase transitions between structures need to be faster and consume less power. At the same time, the cubic phase crystal structure A _x Te1 _-x can further ensure the reversible phase transition of Sb _0.4 Te _0.6 between the amorphous structure and the cubic phase crystal structure. There are randomly distributed A x Te 1-x inside the semiconductor material layer (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _{1-y .} On the other hand, in order to further improve the nucleation of _{A x Te 1-x} Induction effect, the A _x Te 1- _x semi-metal material layer is designed and grown at the position adjacent to (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y , which can improve the phase change superlattice material The phase transition speed can improve the write operation speed of the phase change memory cell prepared based on the semiconductor material layer.

It should be further noted that the thickness of the semiconductor material layer in this embodiment is 0nm to 20nm, for example, the thickness of the semiconductor material layer can be 3nm, 5nm, 10nm, 15nm, 20nm, etc., and it can be preferably 3nm in this embodiment; at the same time, In this embodiment, the thickness of the half-metal material layer is 6nm to 20nm. For example, the thickness of the half-metal material layer can be 6nm, 8nm, 10nm, 15nm, 18nm, 20nm, etc. In this embodiment, it can be preferably 8nm.

In the first embodiment of the present application, the (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y layer has a thickness ranging from 0 nm to 20 nm, and the A _x Te _1-x layer has a thickness ranging from 6 nm to 20 nm , (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y layer and A _x Te _1-x layer are stacked 5 to 20 times. Specifically, the semi-metal material layer is Y _0.5 Te _0.5 , and its thickness is preferably 8 nm; the semiconductor material layer is (Y _0.5 Te _0.5 ) _0.5 (Sb _0.4 Te _0.6 ) _0.5 , and its thickness is preferably 3 nm; Y _0.5 Te _0.5 and ( The stacking times between A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y is preferably 10 times. At the same time, the semiconductor material layer and the semi-metal material layer in the phase change superlattice material are guaranteed to have a cubic phase crystal structure in the initial state through a certain process, so as to obtain the phase change superlattice material.

In the second embodiment of the present application, the semiconductor material layer is (Sc _0.4 Te _0.6 ) _0.5 (Sb _0.4 Te _0.6 ) _0.5 , and its thickness is preferably 5 nm, and the semi-metal layer is Sc _0.4 Te _0.6 , and its thickness is preferably 10 nm , the number of stacking is preferably 10 times. At the same time, the semiconductor material layer and the half-metal material layer in the phase change superlattice material are guaranteed to have a cubic phase crystal structure in the initial state through a certain process, so as to obtain the phase change superlattice material.

The present application also proposes a phase-change memory unit. In the present application, the phase-change memory unit at least includes a bottom electrode, a top electrode, and the above-mentioned phase-change superlattice material, and may also include a substrate and a dielectric coating layer. Wherein, the phase change superlattice material is arranged between the bottom electrode and the top electrode. The dielectric coating layer covers the periphery of the bottom electrode, the phase change superlattice material and the top electrode.

It should be further noted that the phase-change memory cell in the present application can be a phase-change memory cell with a restricted structure or a phase-change memory cell with a T-type structure, and the material of the low electrode in the phase-change memory cell includes Al (Aluminium, aluminum), W (Tungsten, tungsten) and TiN (tin), for example, the material of the lower electrode may be Al, W, or TiN. The material of the top electrode in the phase change memory cell includes any one of Al, W and TiN, for example, the material of the top electrode may be Al, W or TiN. The material of the dielectric coating layer in the phase-change memory unit includes any one of silicon dioxide SiO ₂ and silicon nitride Si ₃ N ₄ , for example, the material of the dielectric coating layer can be silicon dioxide SiO ₂ , or it can be Silicon nitride Si ₃ N ₄ .

Understandably, referring to FIG. 1 and FIG. 2, FIG. 1 is a schematic structural diagram of a phase-change memory cell with a restricted structure in the present application, and FIG. 2 is a schematic structural diagram of a phase-change memory cell with a T-shaped structure in the present application; 1 in FIG. 1 is the first Phase-change superlattice material structure, 2 is the second phase-change superlattice material structure, 1(a) is the first (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y layer, 2(a ) is the second (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y layer, 1(b) is the first A _x Te _1-x layer, 2(b) is the second A _x Te _{1 -x} layer, 101 is a top electrode, 102 is a phase-change superlattice material, 103 is a bottom electrode, and 104 is a dielectric coating layer. In Figure 2, 1 is the first phase-change superlattice material structure, 2 is the second phase-change superlattice material structure, 1(a) is the first (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _{1 -y} layer, 2(a) is the second (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y layer, 1(b) is the first A _x Te _1-x layer, 2(b) is the second A _x Te _1-x layer, 201 is the top electrode, 202 is the phase-change superlattice material, 203 is the bottom electrode, and 204 is the dielectric cladding layer. It can be known from Figure 1 and Figure 2 that the phase change superlattice material includes the first (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y layer 1(a), located in the first (A _x Te _{1- x} ) _y (Sb _0.4 Te _0.6 ) _1-y layer 1(a) on the first A _x Te _1-x layer 1(b), on the first A _x Te _1-x layer 1(b) Two (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y layer 2(a), in the second (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y layer 2(a ) on the second A _x Te _1-x 2(b)... By analogy, this structure can be repeated periodically until the required stacking times of the phase change superlattice material are met. At the same time, the semiconductor material layer and the semi-metal material layer in the phase-change superlattice material are guaranteed to have a cubic phase crystal structure in the initial state through a certain process.

With reference to Fig. 3 and Fig. 4, Fig. 3 and Fig. 4 are respectively based on compound GST (Ge ₂ Sb ₂ Te ₅ ) electrical operation performance curve diagram of the memory cell of the phase-change material and the memory cell of the present application based on the phase-change superlattice material Electrical performance curves. In Figure 3, the abscissa is the pulse voltage, the unit is V (volt), and its coordinate axis values include 1, 2, 3, 4, 5; the ordinate is resistance, and the unit is Ω (ohm), and its coordinate axis values include 10 ⁴ , 10 ⁵ , 10 ⁶ , and the three broken lines are the broken lines corresponding to 300ns, 200ns, and 100ns respectively. In Figure 4, the abscissa is the pulse voltage, the unit is V (volt), and its coordinate axis values include 0, 1, 2; the ordinate is resistance, and its unit is Ω (ohm), and its coordinate axis values include 10 ³ , 10 ⁴ , 10 ⁵ , 10 ⁶ , and the three broken lines are the broken lines corresponding to 30ns, 10ns, and 0.8ns respectively. According to the comparison between FIG. 3 and FIG. 4 , it can be seen that the phase change memory cell of the present application can realize reversible phase change under the action of a smaller voltage pulse, the phase change speed is faster, and the fluctuation of high and low resistance values is smaller at the same time.

In summary, embodiments of the present application provide a phase-change superlattice material and a phase-change memory cell thereof, the phase-change superlattice material includes a semiconductor material layer and a semi-metal material layer, and the semiconductor material layer is ( A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y , the semi-metal material layer A _x Te _1-x , wherein A is scandium Sc, yttrium Y, manganese Mn, zinc Zn, cadmium Cd, mercury One of Hg, x is 0.4 to 0.7, y is 0 to 0.6. In this application, the semiconductor material layer (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y contains A _x Te _1-x as a nucleation center and Sb _0.4 Te _0.6 material that can undergo repeated reversible phase transitions, so The semiconductor material layer can increase the nucleation speed under the action of the nucleation center, so that the semiconductor material layer itself has a higher phase change speed, so that the phase change memory unit prepared based on the semiconductor material layer has a higher phase change speed, can improve the writing operation speed; at the same time, the half-metal material layer A _x Te _1-x can also limit the semiconductor material layer (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y diffusion, ensuring that (A _x Te _{1 -x} ) _y (Sb _0.4 Te _0.6 ) _1-y can achieve phase change in the quasi-two-dimensional scale range, effectively suppressing the problem of large resistance fluctuations that are easily generated when phase change materials are phase-change in the three-dimensional scale range, making The phase-change memory cell prepared based on the semiconductor material layer and the semi-metal material layer has good logic value discrimination characteristics, and effectively improves the usability of the phase-change memory cell prepared based on the semiconductor material layer and the semi-metal material layer.

It should be noted that, in this document, the term "comprising", "comprising" or any other variation thereof is intended to cover a non-exclusive inclusion such that a process, method, article or apparatus comprising a set of elements includes not only those elements, It also includes other elements not expressly listed, or elements inherent in the process, method, article, or device. Without further limitations, an element defined by the phrase "comprising a ..." does not preclude the presence of additional identical elements in the process, method, article, or apparatus comprising that element.

The serial numbers of the above embodiments of the present application are for description only, and do not represent the advantages and disadvantages of the embodiments.

The above are only preferred embodiments of the present application, and are not intended to limit the patent scope of the present application. All equivalent structures or equivalent process transformations made by using the description of the application and the accompanying drawings are directly or indirectly used in other related technical fields. , are all included in the patent protection scope of the present application in the same way.

Claims (8)

1. a phase-change superlattice material, is characterized in that, described phase-change superlattice material comprises semiconductor material layer and half-metal material layer, and described semiconductor material layer is (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y , the semi-metal material layer is A _x Te _1-x , wherein A is one of scandium Sc, yttrium Y, manganese Mn, zinc Zn, cadmium Cd, and mercury Hg, and x is 0.4 to 0.7, y is 0 to 0.6; The semiconductor material layer (A _x Te _1-x ) _y (Sb _0.4 Te _0.6 ) _1-y includes A _x Te _1-x as a nucleation center and Sb _0.4 Te _0.6 capable of repeated and reversible phase transitions, the semiconductor The material layer increases the nucleation speed and the phase change speed under the action of the nucleation center; The half-metal material layer is used to limit the diffusion of the semiconductor material layer and inhibit the phase transition of the semiconductor material layer in a three-dimensional scale; The initial state of the semiconductor material layer is a metastable cubic phase crystal structure; The semi-metal material layer has the same cubic phase crystal structure as the semiconductor material layer. 2 . The phase-change superlattice material according to claim 1 , wherein the semiconductor material layers and the half-metal material layers are alternately stacked, and the stacking times are between 5 and 20 times. 3. The phase-change superlattice material according to claim 1, wherein the thickness of the semiconductor material layer is 0nm to 20nm. 4. The phase-change superlattice material according to claim 1, wherein the thickness of the half-metal material layer is 6nm to 20nm. 5. A phase-change memory cell, characterized in that, the phase-change memory cell comprises a bottom electrode, a top electrode and the phase-change superlattice material according to any one of claims 1-4, the phase-change supercrystal A lattice material is arranged between the bottom electrode and the top electrode; wherein, the material of the bottom electrode includes any one of aluminum Al, tungsten W and tin TiN, and the material of the top electrode includes Al, W and Any one of TiN. 6. The phase-change memory unit according to claim 5, wherein the phase-change memory unit further comprises a substrate and a dielectric coating, wherein the material of the dielectric coating comprises silicon dioxide SiO ₂ and any one of silicon nitride Si ₃ N ₄ . 7. The phase-change memory unit according to claim 6, wherein the bottom electrode is arranged on the substrate, and the dielectric coating layer covers the bottom electrode, the phase-change superlattice material with the periphery of the top electrode. 8. The phase-change memory unit according to claim 7, wherein the phase-change memory unit is a phase-change memory unit with a restricted structure or a phase-change memory unit with a T-type structure.