CN113541707B - Filtering method, communication device, chip and module equipment thereof - Google Patents
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Abstract
The application discloses a filtering method, a communication device, a chip and module equipment thereof. The method comprises the following steps: receiving a signal from a target subchannel in a downlink channel; the downlink channel includes a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels; and filtering the signals according to the frequency domain filter coefficients corresponding to the target sub-channels to obtain a channel estimation matrix of the downlink channel. By implementing the method provided by the embodiment of the application, the receiving performance is improved.
Description
Technical Field
The present disclosure relates to the field of communications technologies, and in particular, to a filtering method, a communications device, a chip, and a module device thereof.
Background
In wireless communications, interference signals (e.g., noise) may be present in the received signal due to factors of the signal itself (e.g., reflection or refraction), environmental factors (e.g., physical obstructions, weather), etc. At this time, the received signal needs to be processed, such as filtering, to filter out the interference signal and obtain the useful signal. However, the filtering error may cause poor receiving performance, and even may cause a signal to be unable to be recovered, which affects the transmission quality of the signal. Therefore, how to reduce the error of the filtering result and obtain more accurate frequency domain channel estimation to improve the receiving performance becomes the current urgent problem to be solved.
Disclosure of Invention
The application discloses a filtering method, a communication device, a chip and module equipment thereof, which are beneficial to improving the receiving performance.
In a first aspect, the present application provides a filtering method, the method comprising: receiving a signal from a target subchannel in a downlink channel; the downlink channel includes a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels; and filtering the signals according to the frequency domain filter coefficients corresponding to the target sub-channels to obtain a channel estimation matrix of the downlink channel.
In one implementation, the signal includes one or more sub-signals, the signal includes the same number of sub-signals as the number of target sub-channels, and the number of target sub-channels is one or more; filtering the signal according to the frequency domain filtering coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel, including: for each of the one or more target sub-channels, determining an original channel matrix for the target sub-channel based on the sub-signals received from the target sub-channel; multiplying the frequency domain filter coefficient corresponding to the target sub-channel with the original channel matrix of the target sub-channel to obtain a channel estimation matrix of the target sub-channel; and obtaining the channel estimation matrix of the downlink channel according to the channel estimation matrix of each target sub-channel.
In one implementation manner, the obtaining a channel estimation matrix of a downlink channel according to the channel estimation matrix of each target sub-channel includes: and under the condition that the number of the target sub-channels is a plurality of, cascading the channel estimation matrix corresponding to each target sub-channel in the plurality of target sub-channels to obtain the channel estimation matrix of the downlink channel.
In one implementation, the bandwidth of each of the plurality of sub-channels is a preset bandwidth.
In one implementation, the frequency domain filter coefficient of the target subchannel is a filter coefficient matrix.
In a second aspect, the present application provides a communication device for implementing the means of the method of the first aspect and any one of its possible implementations.
In a third aspect, the present application provides a communications device comprising a transceiver and a processor for performing the method of the first aspect and any one of its possible implementations.
In a fourth aspect, the present application provides a communications device comprising a transceiver, a processor, and a memory for storing computer-executable instructions; the processor is configured to invoke the program code from the memory to perform the method of the first aspect and any possible implementation thereof.
In a fifth aspect, the present application provides a chip for receiving a signal from a target subchannel in a downlink channel; the downlink channel includes a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels; and filtering the signals according to the frequency domain filter coefficients corresponding to the target sub-channels to obtain a channel estimation matrix of the downlink channel.
In a sixth aspect, the present application provides a module apparatus, the module apparatus including a communication module, a power module, a storage module, and a chip module, wherein: the power supply module is used for providing electric energy for the module equipment; the storage module is used for storing data and instructions; the communication module is used for carrying out internal communication of the module equipment or carrying out communication between the module equipment and external equipment; the chip module is used for: receiving a signal from a target subchannel in a downlink channel; the downlink channel includes a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels; and filtering the signals according to the frequency domain filter coefficients corresponding to the target sub-channels to obtain a channel estimation matrix of the downlink channel.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a communication system according to an embodiment of the present application;
fig. 2 is a flowchart of a filtering method provided in an embodiment of the present application;
FIG. 3 is a flowchart of another filtering method according to an embodiment of the present application;
fig. 4 is a schematic structural diagram of a communication device according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of another communication device according to an embodiment of the present application;
fig. 6 is a schematic structural diagram of a module device according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1, fig. 1 is a schematic diagram of a communication system according to an embodiment of the present application. As shown in fig. 1, a communication system may include a receiving device 101 and a transmitting device 102. The receiving device 101 may be configured to receive signals transmitted by the transmitting device 102. The method provided by the embodiment of the application mainly relates to the receiving device 101. The receiving device 101 may be disposed inside the terminal device or the network device, or may be disposed outside the terminal device or the network device. Alternatively, the receiving device 101 may be a terminal device, which is not limited in this application.
The terminal device is an entity on the user side for receiving or transmitting signals, such as a mobile phone. The terminal device may also be referred to as a terminal (terminal), a User Equipment (UE), a Mobile Station (MS), a Mobile Terminal (MT), etc. The terminal device may be a mobile phone, a wearable device, a tablet computer (Pad), a computer with a wireless transceiver function, etc. A network device is an entity on the network side for transmitting or receiving signals. For example, the network device may be an evolved NodeB (eNB), a transmission point (transmission reception point, TRP), a next generation NodeB (gNB) in an NR system, a base station in other future mobile communication systems, or an access node in a wireless fidelity (wireless fidelity, wiFi) system, etc. The embodiment of the application does not limit the specific technology and the specific equipment form adopted by the terminal equipment and the network equipment.
It should be noted that the technical solution of the embodiment of the present application may be applied to various communication systems. For example: long term evolution (long term evolution, LTE) system, fifth generation (5th generation,5G) mobile communication system, 5G New Radio (NR) system. Optionally, the method of the embodiments of the present application is also applicable to various future communication systems, such as a 6G system or other communication networks.
Referring to fig. 2, fig. 2 is a flowchart of a filtering method according to an embodiment of the present application. The filtering method may be implemented by the above-mentioned receiving device or may be implemented by a chip in the above-mentioned receiving device. As shown in fig. 2, the filtering method includes, but is not limited to, the following steps S201 to S202.
Step S201, the receiving device receives signals from a target sub-channel in the downlink channel; the downlink channel includes a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels.
In the method provided in the embodiment of the present application, the downlink channel may be divided into a plurality of sub-channels, and the receiving device may monitor the plurality of sub-channels to determine through which sub-channel or sub-channels of the plurality of sub-channels the signal is actually transmitted. The target sub-channel is the sub-channel for actually transmitting the signal. Wherein the number of target subchannels may be one or more.
By way of example, the downlink channel may be divided into 4 sub-channels. Wherein, there may be 2 target subchannels among the 4 subchannels, and receiving signals through the 2 target subchannels. Alternatively, there may be 4 target subchannels among the 4 subchannels, and the signal may be received through the 4 target subchannels. In other words, the number of target subchannels is less than or equal to the number of subchannels included in the downlink channel.
In one implementation, the bandwidth of each of the plurality of sub-channels may be a preset bandwidth. The preset bandwidth may be, for example, 25M. It should be noted that the downlink channel may be equally divided into a plurality of sub-channels, so that the bandwidth of each sub-channel may be the same value. For example: under the condition that the bandwidth of the downlink channel is 100M, the downlink channel can be divided into 4 sub-channels, and the bandwidth of each sub-channel is 25M; in the case that the bandwidth of the downlink channel is 200M, the downlink channel may be divided into 8 sub-channels, and the bandwidth of each sub-channel is 25M.
It should be noted that, in the case that the bandwidth of the downlink channel cannot be equally divided into the preset bandwidths (e.g. 25M), the bandwidths of the sub-channels may be as close to 25M as possible, so as to meet the requirement of the preset bandwidths. For example: in the case where the bandwidth of the downlink channel is 55M, the downlink channel may be equally divided into 2 sub-channels, each having a bandwidth of 27.5M. The bandwidth of the downlink channel is only used as an example, and is not limited in the present application. The above-described method of equally dividing the downlink channel into a plurality of sub-channels is used for example, and is not limited thereto. Alternatively, the downlink channel may be divided into a plurality of sub-channels with different bandwidths.
In one implementation, the signal includes one or more sub-signals. Alternatively, the signal may include the same number of sub-signals as the number of target sub-channels, in which case different sub-signals may be transmitted on different target sub-channels. In other words, the receiving device may receive the corresponding sub-signals through different target sub-channels, respectively. For example, with 2 target subchannels, the receiving device may receive subchannel 1 through target subchannel 1 and subchannel 2 through target subchannel 2. It will be appreciated that if there are 2 target sub-channels receiving a signal, the signal may be considered to be divided into 2 sub-signals as well.
By the method provided by the embodiment, the downlink channel is divided into a plurality of sub-channels, and the signal can be received through the target sub-channel, so that the signal can be divided into one or more sub-signals, the one or more sub-signals can be processed respectively, and the filtering error is reduced.
Step S202, filtering the signals according to the frequency domain filter coefficients corresponding to the target sub-channels to obtain a channel estimation matrix of the downlink channel.
As the signal is transmitted, it may experience different frequency domain selection channels. If the same filter coefficient is used for filtering after the signal is received in the downlink channel, a large error may occur in the filtering result, and thus the receiving performance may be deteriorated. Therefore, in the method provided by the embodiment of the application, the sub-signals can be respectively filtered through the frequency domain filtering coefficients corresponding to the target sub-channels, so that errors generated by filtering are reduced.
The frequency domain filter coefficient corresponding to the target sub-channel can be obtained through a reference signal associated with a Quasi Co-located A type (QCL-TypeA). The QCL-TypeA comprises four large channel attributes: doppler shift, doppler spread, mean delay and delay spread, wherein the doppler spread and delay spread help calculate the frequency domain filter coefficients of the target subchannel. It should be noted that, before receiving a signal through a target sub-channel, the target sub-channel may receive a reference signal first, and may determine, according to a location of the target sub-channel where the reference signal is located, which frequency domain filter coefficient corresponding to the reference signal is used by the target sub-channel. For example: if the reference signal 1 is received through the target subchannel 1, the frequency domain filter coefficients of the target subchannel 1 can be obtained through the reference signal 1.
It is understood that different sub-channels may correspond to different frequency domain filter coefficients. For example: if the downlink channel is divided into 2 sub-channels, the 2 sub-channels may have 2 corresponding frequency domain filter coefficients, i.e. sub-channel 1 corresponds to frequency domain filter coefficient f1 and sub-channel 2 corresponds to frequency coefficient f2.
In one implementation manner, the filtering the signal according to the frequency domain filtering coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel includes: for each of one or more target sub-channels, determining an original channel matrix for the target sub-channel based on sub-signals received from the target sub-channel; multiplying the frequency domain filter coefficient corresponding to the target sub-channel with the original channel matrix of the target sub-channel to obtain a channel estimation matrix of the target sub-channel; and obtaining the channel estimation matrix of the downlink channel according to the channel estimation matrix of each target sub-channel. The frequency domain filter coefficient of the target sub-channel may be a filter coefficient matrix.
The channel matrix is a matrix form of transmission probability of a general discrete single symbol channel, and can reflect state information of the channel. The original channel matrix may be an original channel matrix obtained by descrambling a signal after the signal is received by the channel. It is understood that the original channel matrix may be a channel matrix that has not been subjected to filter coefficient processing.
If the downlink channel includes a subchannel i, the channel estimation matrix of the subchannel i can be obtained by equation 1:
Hsbi_flt＝fi*Hsbi ①
wherein hsbi_flt may be a channel estimation matrix of the subchannel i, fi may be a frequency domain filter coefficient of the subchannel i, and Hsbi may be an original channel matrix of the subchannel i. If the number of the subchannels included in the downlink channel is N, i is more than or equal to 0 and less than or equal to N-1 (or i is more than or equal to 1 and less than or equal to N). Wherein N and i are integers.
In one implementation manner, the obtaining a channel estimation matrix of a downlink channel according to the channel estimation matrix of each target sub-channel includes: and under the condition that the number of the target sub-channels is a plurality of, cascading the channel estimation matrix corresponding to each target sub-channel in the plurality of target sub-channels to obtain the channel estimation matrix of the downlink channel.
Alternatively, the cascade connection may be performed in a sequence from low to high according to the numbers of the sub-channels, so as to obtain the channel estimation matrix of the downlink channel. For example, i in subchannel i is the number of the subchannel. Taking the example that the downlink signal is divided into 4 sub-channels (sub-channel 0, sub-channel 1, sub-channel 2 and sub-channel 3), the channel estimation matrix of the downlink channel can be obtained by equation 2:
Hab_flt＝[Hsb0_fltHsb1_fltHsb2_fltHsb3_flt] ②
the habflt may be a channel estimation matrix of the downlink channel. From the foregoing, it can be seen that hsb0_flt, hsb1_flt, hsb2_flt, and hsb3_flt may correspond to channel estimation matrices for subchannel 0, subchannel 1, subchannel 2, and subchannel 3, respectively. It can be seen that the series connection is performed in the order of the numbers of the sub-channels from low to high in equation 2.
It will be appreciated that if the target sub-channel is sub-channel 0, sub-channel 2 and sub-channel 3, the concatenation is also performed in order from low to high, i.e.: the concatenation is performed in the order of subchannel 0, subchannel 2 and subchannel 3. Since the target subchannel may be one or more of the subchannels, the numbering of the target subchannels may be discontinuous, as this application is not limiting.
For example, assuming that the downlink channel is divided into 2 sub-channels, sub-channel 1 and sub-channel 2, if the channel estimation matrix of sub-channel 1 is:
and the channel estimation matrix for subchannel 2 is:
the channel estimation matrix of the downlink channel can be obtained by the above formula 2, that is, the following matrix:
wherein a is 0 、a 1 、a 2 B 0 、b 1 、b 2 A matrix of rows and columns is possible, which is not limited in this application. It should be noted that the column matrix may be a channel estimation matrix of the downlink channel, or may be a port (for example, port0, i.e.port 0) is included in the channel matrix.
As shown in fig. 3, fig. 3 is a flowchart of another filtering method according to an embodiment of the present application. Fig. 3 illustrates an example where there are 4 target subchannels, and does not limit the present application. As can be seen from fig. 3, the original channel matrix of the sub-channel and the frequency domain filter coefficient of the corresponding sub-channel are filtered by a filter to obtain the channel estimation matrix of each sub-channel, so that the channel estimation matrices of each sub-channel can be cascaded to obtain the channel estimation matrix of the downlink channel.
By the method provided by the embodiment, the sub-signals can respectively pass through the corresponding target sub-channels, so that the sub-signals are respectively processed by utilizing the frequency domain filter coefficient of each target sub-channel, so as to reduce the filter error of each sub-signal, and further obtain more accurate frequency domain channel estimation to provide the receiving performance.
Referring to fig. 4, fig. 4 is a schematic structural diagram of a communication device according to an embodiment of the present application. The device can be a terminal device, a device in the terminal device, or a device which can be matched with the terminal device for use. The communication device shown in fig. 4 may comprise a receiving unit 401 and a processing unit 402. The processing unit 402 is configured to perform data processing. Wherein:
the receiving unit 401 is configured to receive a signal from a target subchannel in a downlink channel; the downlink channel includes a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels;
the processing unit 402 is configured to filter the signal according to a frequency domain filter coefficient corresponding to the target subchannel, to obtain a channel estimation matrix of the downlink channel.
In one implementation, the signal includes one or more sub-signals, the signal includes the same number of sub-signals as the number of target sub-channels, and the number of target sub-channels is one or more; filtering the signal according to the frequency domain filtering coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel, including: the processing unit 402 is further configured to determine, for each of the one or more target sub-channels, an original channel matrix for the target sub-channel based on the sub-signals received from the target sub-channel; the processing unit 402 is further configured to multiply the frequency domain filter coefficient corresponding to the target subchannel with the original channel matrix of the target subchannel to obtain a channel estimation matrix of the target subchannel; the processing unit 402 is further configured to obtain a channel estimation matrix of the downlink channel according to the channel estimation matrix of each target subchannel.
In one implementation manner, the obtaining a channel estimation matrix of a downlink channel according to the channel estimation matrix of each target sub-channel includes: in the case that the number of the target subchannels is plural, the processing unit 402 is further configured to concatenate the channel estimation matrices corresponding to each of the plurality of target subchannels to obtain a channel estimation matrix of the downlink channel.
In one implementation, the bandwidth of each of the plurality of sub-channels is a preset bandwidth.
In one implementation, the frequency domain filter coefficient of the target subchannel is a filter coefficient matrix.
According to the embodiment of the present application, each unit in the communication apparatus shown in fig. 4 may be separately or completely combined into one or several additional units, or some (some) units may be further split into a plurality of units with smaller functions to form a unit, which may achieve the same operation without affecting the implementation of the technical effects of the embodiments of the present application. The above units are divided based on logic functions, and in practical applications, the functions of one unit may be implemented by a plurality of units, or the functions of a plurality of units may be implemented by one unit. In other embodiments of the present application, the communication device may also include other units, and in practical applications, these functions may also be implemented with assistance of other units, and may be implemented by cooperation of multiple units.
The communication device may be, for example: a chip, or a chip module. With respect to each apparatus and each module included in the product described in the above embodiments, it may be a software module, or may be a hardware module, or may be a software module partially, or may be a hardware module partially. For example, for each device or product applied to or integrated in a chip, each module included in the device or product may be implemented in hardware such as a circuit, or at least some modules may be implemented in software program, where the software program runs on a processor integrated in the chip, and the remaining (if any) some modules may be implemented in hardware such as a circuit; for each device and product applied to or integrated in the chip module, each module contained in the device and product can be realized in a hardware mode such as a circuit, different modules can be located in the same component (such as a chip and a circuit module) of the chip module or in different components, or at least part of the modules can be realized in a software program, the software program runs in a processor integrated in the chip module, and the rest (if any) of the modules can be realized in a hardware mode such as a circuit; for each device and product applied to or integrated in the terminal, each module included in the device and product may be implemented by hardware such as a circuit, and different modules may be located in the same component (for example, a chip, a circuit module, etc.) or different components in the terminal, or at least part of the modules may be implemented by software programs running on a processor integrated in the terminal, and the rest (if any) of the modules may be implemented by hardware such as a circuit.
The embodiments of the present application and the embodiments of the foregoing methods are based on the same concept, and the technical effects brought by the embodiments are the same, and the specific principles are described with reference to the foregoing embodiments and are not repeated herein.
Referring to fig. 5, fig. 5 is a schematic diagram of a communication device 50 according to an embodiment of the present application. As shown in fig. 5, the communication device 50 may include a transceiver 501 and a processor 502. Optionally, the communication device may further comprise a memory 503. Wherein the transceiver 501, the processor 502 and the memory 503 may be connected by a bus 504 or otherwise. The bus is shown in bold lines in fig. 5, and the manner in which other components are connected is merely illustrative and not limiting. The buses may be divided into address buses, data buses, control buses, etc. For ease of illustration, only one thick line is shown in fig. 5, but not only one bus or one type of bus.
The coupling in the embodiments of the present application is an indirect coupling or communication connection between devices, units, or modules, which may be in electrical, mechanical, or other forms for information interaction between the devices, units, or modules. The specific connection medium between the transceiver 501, the processor 502, and the memory 503 is not limited in the embodiments of the present application.
Memory 503 may include read-only memory and random access memory and provides instructions and data to processor 502. A portion of memory 503 may also include non-volatile random access memory.
The processor 502 may be a central processing unit (Central Processing Unit, CPU), and the processor 502 may also be other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), field-programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor, but in the alternative, the processor 502 may be any conventional processor or the like. Wherein:
a memory 503 for storing program instructions.
A processor 502 for invoking program instructions stored in memory 503 for:
the transceiver 501 receives signals from a target subchannel in a downlink channel; the downlink channel includes a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels;
the processor 502 is further configured to filter the signal according to a frequency domain filter coefficient corresponding to the target subchannel, to obtain a channel estimation matrix of the downlink channel.
In one implementation, the signal includes one or more sub-signals, the signal includes the same number of sub-signals as the number of target sub-channels, and the number of target sub-channels is one or more; filtering the signal according to the frequency domain filtering coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel, including: the processor 502 is further configured to determine, for each of the one or more target subchannels, an original channel matrix for the target subchannel based on the received sub-signals from the target subchannel; the processor 502 is further configured to multiply a frequency domain filter coefficient corresponding to a target subchannel with an original channel matrix of the target subchannel to obtain a channel estimation matrix of the target subchannel; the processor 502 is further configured to obtain a channel estimation matrix of the downlink channel according to the channel estimation matrix of each target subchannel.
In one implementation manner, the obtaining a channel estimation matrix of a downlink channel according to the channel estimation matrix of each target sub-channel includes: in the case that the number of the target subchannels is plural, the processor 502 is further configured to concatenate the channel estimation matrices corresponding to each of the plurality of target subchannels to obtain a channel estimation matrix of the downlink channel.
In one implementation, the bandwidth of each of the plurality of sub-channels is a preset bandwidth.
In one implementation, the frequency domain filter coefficient of the target subchannel is a filter coefficient matrix.
In the present embodiment, the method provided by the present embodiment may be implemented by running a computer program (including program code) capable of executing the steps involved in the respective method as shown in fig. 2 on a general-purpose computing device such as a computer including a Central Processing Unit (CPU), a random access storage medium (RAM), a read only storage medium (ROM), etc., and a storage element. The computer program may be recorded on, for example, a computer-readable recording medium, and loaded into and run in the above-described computing device through the computer-readable recording medium.
Based on the same inventive concept, the principle and beneficial effects of the communication device for solving the problems provided in the embodiments of the present application are similar to those of the communication device for solving the problems in the embodiments of the method of the present application, and may refer to the principle and beneficial effects of implementation of the method, which are not described herein for brevity.
The embodiment of the application also provides a chip, which can execute the relevant steps of the terminal equipment in the embodiment of the method. The chip is used for: receiving a signal from a target subchannel in a downlink channel; the downlink channel includes a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels; and filtering the signals according to the frequency domain filter coefficients corresponding to the target sub-channels to obtain a channel estimation matrix of the downlink channel.
In one implementation, the signal includes one or more sub-signals, the signal includes the same number of sub-signals as the number of target sub-channels, and the number of target sub-channels is one or more; filtering the signal according to the frequency domain filtering coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel, including: the chip is further configured to determine, for each of the one or more target sub-channels, an original channel matrix for the target sub-channel based on the sub-signals received from the target sub-channel; the chip is also used for multiplying the frequency domain filter coefficient corresponding to the target sub-channel with the original channel matrix of the target sub-channel to obtain the channel estimation matrix of the target sub-channel; the chip is also used for obtaining the channel estimation matrix of the downlink channel according to the channel estimation matrix of each target sub-channel.
In one implementation manner, the obtaining a channel estimation matrix of a downlink channel according to the channel estimation matrix of each target sub-channel includes: and under the condition that the number of the target sub-channels is a plurality of, the chip is also used for cascading the channel estimation matrix corresponding to each target sub-channel in the plurality of target sub-channels to obtain the channel estimation matrix of the downlink channel.
In one implementation, the bandwidth of each of the plurality of sub-channels is a preset bandwidth.
In one implementation, the frequency domain filter coefficient of the target subchannel is a filter coefficient matrix.
In one implementation, the chip includes at least one processor, at least one first memory, and at least one second memory; wherein the at least one first memory and the at least one processor are interconnected by a circuit, and instructions are stored in the first memory; the at least one second memory and the at least one processor are interconnected by a line, where the second memory stores data to be stored in the embodiment of the method.
For each device and product applied to or integrated in the chip, each module contained in the device and product can be realized in a hardware mode such as a circuit, or at least part of the modules can be realized in a software program, the software program runs on a processor integrated in the chip, and the rest (if any) of the modules can be realized in a hardware mode such as a circuit.
Referring to fig. 6, fig. 6 is a schematic structural diagram of a module device according to an embodiment of the present application. The module device 60 may perform the steps related to the terminal device in the foregoing method embodiment, where the module device 60 includes: a communication module 601, a power module 602, a memory module 603 and a chip module 604.
Wherein, the power module 602 is used for providing power for the module device; the storage module 603 is configured to store data and instructions; the communication module 601 is used for performing internal communication of the module equipment or performing communication between the module equipment and external equipment; the chip module 604 is configured to:
receiving a signal from a target subchannel in a downlink channel; the downlink channel includes a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels;
and filtering the signals according to the frequency domain filter coefficients corresponding to the target sub-channels to obtain a channel estimation matrix of the downlink channel.
In one implementation, the signal includes one or more sub-signals, the signal includes the same number of sub-signals as the number of target sub-channels, and the number of target sub-channels is one or more; filtering the signal according to the frequency domain filtering coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel, including: the chip module 604 is further configured to determine, for each of the one or more target sub-channels, an original channel matrix for the target sub-channel based on the sub-signals received from the target sub-channel; the chip module 604 is further configured to multiply the frequency domain filter coefficient corresponding to the target subchannel with the original channel matrix of the target subchannel to obtain a channel estimation matrix of the target subchannel; the chip module 604 is further configured to obtain a channel estimation matrix of the downlink channel according to the channel estimation matrix of each target subchannel.
In one implementation manner, the obtaining a channel estimation matrix of a downlink channel according to the channel estimation matrix of each target sub-channel includes: in the case that the number of the target subchannels is multiple, the chip module 604 is further configured to concatenate the channel estimation matrices corresponding to each of the multiple target subchannels to obtain a channel estimation matrix of the downlink channel.
In one implementation, the bandwidth of each of the plurality of sub-channels is a preset bandwidth.
In one implementation, the frequency domain filter coefficient of the target subchannel is a filter coefficient matrix.
For each device and product applied to or integrated in the chip module, each module included in the device and product may be implemented by hardware such as a circuit, and different modules may be located in the same component (e.g. a chip, a circuit module, etc.) of the chip module or different components, or at least some modules may be implemented by using a software program, where the software program runs on a processor integrated in the chip module, and the remaining (if any) modules may be implemented by hardware such as a circuit.
Embodiments of the present application also provide a computer readable storage medium having one or more instructions stored therein, the one or more instructions being adapted to be loaded by a processor and to perform the methods provided by the method embodiments described above.
The present application also provides a computer program product comprising instructions which, when run on a computer, cause the computer to perform the method provided by the method embodiments described above.
It should be noted that, for simplicity of description, the foregoing method embodiments are all expressed as a series of action combinations, but it should be understood by those skilled in the art that the present application is not limited by the described order of action, as some steps may take other order or be performed simultaneously according to the present application. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all preferred embodiments, and that the acts and modules referred to are not necessarily required in the present application.
The steps in the method of the embodiment of the application can be sequentially adjusted, combined and deleted according to actual needs.
The modules in the device of the embodiment of the application can be combined, divided and deleted according to actual needs.
Those of ordinary skill in the art will appreciate that all or part of the steps in the various methods of the above embodiments may be implemented by a program to instruct related hardware, the program may be stored in a computer readable storage medium, and the readable storage medium may include: flash disk, read-Only Memory (ROM), random-access Memory (Random Access Memory, RAM), magnetic or optical disk, and the like.
The foregoing disclosure is merely a preferred embodiment of the present invention, but is not limited thereto. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Claims (10)
1. A method of filtering, the method comprising:
receiving a signal from a target subchannel in a downlink channel; the downlink channel includes a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels; different sub-channels correspond to different frequency domain filter coefficients; the signal includes a plurality of sub-signals, the signal including the same number of sub-signals as the target sub-channels;
and filtering the signal according to the frequency domain filter coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel.
2. The method of claim 1, wherein the step of determining the position of the substrate comprises,
the filtering the signal according to the frequency domain filtering coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel, including:
for each target subchannel of the plurality of target subchannels, determining an original channel matrix for the target subchannel from the received subchannels from the target subchannel;
multiplying the frequency domain filter coefficient corresponding to the target sub-channel with the original channel matrix of the target sub-channel to obtain a channel estimation matrix of the target sub-channel;
and obtaining the channel estimation matrix of the downlink channel according to the channel estimation matrix of each target sub-channel.
3. The method of claim 2, wherein the obtaining the channel estimation matrix of the downlink channel according to the channel estimation matrix of each target sub-channel comprises:
cascading the channel estimation matrix corresponding to each target sub-channel in the target sub-channels to obtain the channel estimation matrix of the downlink channel.
4. A method according to any one of claims 1 to 3, wherein the bandwidth of each of the plurality of sub-channels is a preset bandwidth.
5. A method according to any one of claims 1 to 3, wherein the frequency domain filter coefficients of the target sub-channel are filter coefficient matrices.
6. A communication device comprising means for performing the method of any of claims 1-5.
7. A communication device comprising a processor;
the processor is configured to perform the method according to any one of claims 1-5.
8. The communication device of claim 7, wherein the communication device further comprises a memory:
the memory is used for storing a computer program;
the processor is specifically configured to invoke the computer program from the memory, and execute the method according to any of claims 1-5.
9. A chip is characterized in that,
the chip is used for receiving signals from a target sub-channel in a downlink channel; the downlink channel includes a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels; different sub-channels correspond to different frequency domain filter coefficients; the signal includes a plurality of sub-signals, the signal including the same number of sub-signals as the target sub-channels;
and filtering the signal according to the frequency domain filter coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel.
10. The utility model provides a module equipment, its characterized in that, module equipment includes communication module, power module, storage module and chip module, wherein:
the power supply module is used for providing electric energy for the module equipment;
the storage module is used for storing data and instructions;
the communication module is used for carrying out internal communication of module equipment or carrying out communication between the module equipment and external equipment;
the chip module is used for:
receiving a signal from a target subchannel in a downlink channel, the downlink channel including a plurality of subchannels, the target subchannel being included in the plurality of subchannels; different sub-channels correspond to different frequency domain filter coefficients; the signal includes a plurality of sub-signals, the signal including the same number of sub-signals as the target sub-channels;
and filtering the signal according to the frequency domain filter coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel.
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