CN113535461B - Visual verification method for interlocking lower computer data based on configuration file - Google Patents
Visual verification method for interlocking lower computer data based on configuration file Download PDFInfo
- Publication number
- CN113535461B CN113535461B CN202110643538.4A CN202110643538A CN113535461B CN 113535461 B CN113535461 B CN 113535461B CN 202110643538 A CN202110643538 A CN 202110643538A CN 113535461 B CN113535461 B CN 113535461B
- Authority
- CN
- China
- Prior art keywords
- information
- address
- file
- configuration file
- ads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000012795 verification Methods 0.000 title claims abstract description 32
- 238000000034 method Methods 0.000 title claims abstract description 29
- 230000000007 visual effect Effects 0.000 title claims description 12
- 238000013079 data visualisation Methods 0.000 claims abstract 10
- 238000004458 analytical method Methods 0.000 claims description 11
- 230000006978 adaptation Effects 0.000 claims description 3
- 238000004891 communication Methods 0.000 abstract 1
- 238000004519 manufacturing process Methods 0.000 abstract 1
- 238000013524 data verification Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000012800 visualization Methods 0.000 description 1
- 238000007794 visualization technique Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/2866—Architectures; Arrangements
- H04L67/30—Profiles
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
Abstract
The application discloses an interlocking lower computer data visualization verification method based on configuration files, which relates to the technical field of rail transit interlocking control and comprises an input information manufacturing step, a general search grammar searching step and an upper and lower computer communication code bit generating step.
Description
Technical Field
The application relates to the technical field of rail transit interlocking control, in particular to an interlocking lower computer data visual verification method based on a configuration file.
Background
The interlocking refers to a relationship of mutual restriction among the annunciators, the turnouts and the entrances, and has the main functions of ensuring correct logic among the entrances, the turnouts and the annunciators and preventing driving accidents; meanwhile, the computer interlocking can improve the working efficiency and reduce the labor intensity.
The interlocking lower computer data is application data for ensuring that the lower computer can output a correct operation result, and whether the data is correct or not influences the driving safety. The interlocking lower computer data (hereinafter abbreviated as ADS) is referred to as a binary file, and is generated by a computer-aided application software package (abbreviated as CAA), and the CAA configuration file is a configuration file read by the ADS file generating software CAA, and is an essential input for generating the lower computer data, and defines a CAA input path and an input file in the configuration file. CAA generates ADS by reading and writing the correct interlocking data packets (including interface data and interlocking relationship data). The CAA configuration file config.tab is defined in the data packet, the file name to be read by the CAA software is defined in the configuration file through the file key word, the CAA obtains an input file through analyzing the config.tab, and then ADS is generated, and the CAA generates a text file ADSVAR at the same time of generating the ADS, and code bit information and channel address information are stored in the file.
The correctness of the ADS is verified, i.e. it is known whether the information stored at the specified location in the ADS is correct. When the data is in error, the error reason needs to be checked manually, and the binary file is composed of 0 and 1, so that the verifier cannot locate the error in the binary data.
At present, the verification method of the binary data of the interlocking lower computer directly analyzes the binary data to generate a corresponding logic file or interface file through a verification tool, then the comparison tool and the CAA input file are used for comparison verification, and if the data verification is not passed, the verification personnel cannot locate errors in the binary data because the binary data consists of 0 and 1; the existing verification tool has no visual binary data checking function and can not provide an operation interface for a verifier to check a binary data structure of a lower computer, so that once data verification fails, a fault checking and positioning method is to position faults by using error data to debug source codes through a verification tool developer, meanwhile, logic for analyzing ADS by the verification tool is written in codes, and when a file content structure is changed or a new interface file is added, the corresponding tool needs to maintain and modify the codes, and the method is time-consuming and low in efficiency.
Disclosure of Invention
Aiming at the problems in the prior art, the application provides the visual lower computer data verification method which is flexible in configuration file setting, can visually check binary data of the lower computer, helps test and data verification personnel to efficiently and quickly locate errors, and can improve data verification efficiency.
The application aims at realizing the following technical scheme:
a visual verification method of interlocking lower computer data based on configuration files comprises the following steps:
step S1, an ADS binary data file in a lower computer data packet, namely an ADS file, is obtained, the lower computer data packet refers to a folder for storing output data generated by CAA software, the data packet also comprises an ADSVAR text file, the ADS binary data file refers to a file which is not read, the ADS binary data file is a file with ADS as a suffix, the name is generally 'VPICAA.ADS', the ADS binary data file is read by taking four bytes as a unit, a key value pair set A is obtained, and ADS information is visually displayed in a column mode in an 'address-value-description' column mode;
further, in the step S1, the key in the key-value pair set a is an address of ADS, and the value is a value of a quaternary length stored in the corresponding address.
More specifically, in step S1, the ADS information is visually displayed in a column manner of "address-value-description", as shown in fig. 4, where the first column of "address" is an address in the ADS binary data, the second column of "value" is a value of four bytes length stored in the corresponding address, and the third column of "description" is description information corresponding to the value, so that the specific value in the ADS is convenient to locate. The third column displays the description of the resolved position after step S6 or step S7 is performed.
S2, an ADSVAR text file in a lower computer data packet is obtained, the ADSVAR text file is analyzed to obtain code bit and variable information and a corresponding channel address, and the information is stored in a set B;
further, all code bits and variable information are stored in the ADSVAR file, and the code bits and variable information obtained in the step S2 are code bit names and variable names in the CAA input interface file and the relational logic file.
Preferably, the channel address is a value stored in the ADS, the value stored in the ADS includes flag bit information, number information of code bits, true and false value information of each code bit, channel address information, and the like, and the description refers to the channel address stored in the ADS, and the corresponding code bits and variable information are obtained by obtaining the value stored in the ADS, the code bit name used for inquiring the text form in the adsar text file, and the channel address corresponding to the code bits.
More preferably, the code bits and variable information, and the corresponding channel addresses are stored in set B in the form of a data structure.
And S3, selecting a configuration file, analyzing and reading the selected configuration file, and storing information obtained by analysis into the set C.
Specifically, the configuration files in the step S3 include parameters that can be adjusted and configured by themselves, such as the start node, the end node, < ADSTYPE >, < CONFIGFILE >, < describe >, < ADDRESS >, < CONTENT >, < CODE >, etc., and can be flexibly configured as required, the parameters are marks for program identification and reading, and the information in the configuration files is read according to the keywords, so that the desired information can be obtained in the binary ADS, and the configuration rules are as follows:
(1) The configuration file represents a node information by < XX >, and the node is ended by;
(2) The < ADSTYPE > defines the type of the lower computer, the type of the data adaptation lower computer can be obtained when an ADS binary data file in a lower computer data packet is obtained, and the type of the lower computer can be matched with the ADS binary data file;
(3) The < CONFIGFILE > defines the corresponding keyword information of the information in the CAA configuration file, if the keyword information is not defined, the module is system description information or a corresponding non-CAA input file, the CAA configuration file is a configuration file read by generating ADS file software CAA, the necessary input for generating lower computer data is generated, and the configuration file defines the input path and the input file of the CAA;
(4) < DESCRIPTION > defines the DESCRIPTION of the module, briefly describing the information represented by the module;
(5) The ADDRESS defines the initial ADDRESS of the module in the lower computer binary file ADS, and the initial ADDRESS of the module information can be inquired through the ADDRESS;
(6) < CONTENT > defines the CONTENT information in the module; wherein the information in < CONTENT > is divided by a line-feed character, one line represents a single information, each line is divided by English and number, and the first column represents descriptive information; the second column of numbers represents the number of bytes occupied by the value corresponding to the first column of descriptive information; the third column, if present, is a type key, e.g., NEXTADDRESS, which indicates that the information for the row is the real address of the next module; the fourth column, if any, represents the information that is the number of code bits;
(7) The CODE information generally indicates CODE bits and variables, and the number of CODE information is defined in the CODE information at the position of the row where COUNT is located.
Further, the configuration file is analyzed and read, node information is read, and the reading is started by < XX > and is finished by < XX >.
Step S4, if the file key < CONFIGFILE > is defined in the configuration file, continuing to execute the next step S5; if the profile has no profile key < CONFIGFILE >, then step S7 is performed;
s5, reading a CAA configuration file, and finding out the corresponding file names according to a file keyword < CONFIGFILE >, wherein the sequence of the file names is stored according to the sequence defined in the CAA configuration file;
further, there may be a plurality of file names corresponding to the file key < CONFIGFILE >, that is, there may be a plurality of interface files or logical relationship files indicating the type, and if there are a plurality of files < CONFIGFILE > with the same key, the type of file information is read out from the ADS binary file with 0 and 1, and is stored according to the order defined in the CAA configuration file.
Step S6, traversing all file names found in the step S5, taking the file names as distinction, reading the content in the configuration file according to the configuration file by rows, starting to analyze file information, displaying the description information of the analysis data in a third column in a visual interface, and continuously executing the step S8; the configuration file is a text file, and the content in the configuration file is read according to the line.
Furthermore, the comparison relation between the ADS file and the configuration file can be positioned to the file information starting ADDRESS represented by the configuration file according to the base ADDRESS in the configuration file, then the file information can be analyzed according to the sequence, and the detailed analysis rule is as follows:
(1) After obtaining the file name, finding the initial Address of the file information stored in the ADS according to the base Address defined in the configuration file, wherein the Address information is expressed by Address;
(2) Traversing the set C, reading N bytes of information from an Address according to the number N of bytes of each piece of information in the set, printing out the description information and the obtained N bytes of information, adding N to the Address, and pointing the Address position to the next piece of information;
(3) If the next Address Next Address is traversed, reading Address information with the byte length of N, and storing the Address, wherein N is added to the Address;
(4) If the number of the code bits is traversed to the number of the code bits COUNT, reading the code bit number information with the byte length of N, and storing the information, wherein N is added to the Address;
(5) If the information of the CODE is traversed, finding a corresponding value in the set A according to the Address, finding CODE bits in the set B through the value channel Address, printing out description information and CODE bit variable information, adding the number N of bytes of printing information to the Address, and printing the information of the CODE for many times according to the number N of the obtained CODE bits;
(6) If the file name traversal is finished or the next address information value is 0, the information corresponding to the configuration file is already analyzed and printed;
where N represents a byte length and N is 2 or 4.
And S7, if the file key is not defined in the configuration file, finding the initial Address of the file information stored in the ADS according to the base Address defined in the configuration file, and analyzing the corresponding information of the configuration file by starting with the Address.
Specifically, in the step S7, the set C is traversed starting from the obtained starting Address, and according to the number N of bytes of each information in the set, the N bytes of information are read from the Address, and the description information and the obtained N bytes of information are printed out. Then N is added to the Address to point the Address position to the next information.
Further, if the set C traverses to the last element, the information corresponding to the configuration file is already parsed and printed.
And S8, comparing the analyzed information with the corresponding CAA input file, and verifying whether the information stored in the ADS is correct.
Compared with the prior art, the technical scheme comprises the following innovation points and beneficial effects (advantages):
at present, the verification method of the binary data of the interlocking lower computer directly analyzes the binary data to generate a corresponding logic file or interface file through a verification tool, then the comparison and verification are carried out through a comparison tool and a CAA input file, if the data verification is not passed, because the binary data is composed of 0 and 1, the verification personnel cannot locate errors in the binary data, namely the existing verification tool does not have a visual binary data searching function and cannot provide an operation interface for the verification personnel to search the binary data structure of the lower computer, once the data verification is not passed, the error searching and locating method is that a developer of the verification tool uses error data to debug source codes to locate errors, meanwhile, the verification tool analyzes the ADS logic to be written in the codes, and when the content structure of the file is changed or a new interface file is added, the corresponding tool needs to maintain and modify the codes. Compared with the prior art, the method of the scheme has the advantages that: 1. the analysis logic of the binary file is written in the configuration file, so that the configuration can be flexible, the code logic of the tool is not required to be modified, and the maintenance modification of the verification tool caused by the change of the ADS data structure can be reduced. 2. The binary data is displayed by adopting an address-value-description column mode visualization method, the information in the binary file can be conveniently consulted through description information, and errors can be rapidly positioned when the data cannot be checked.
Drawings
The foregoing and the following detailed description of the application will become more apparent when read in conjunction with the following drawings in which:
FIG. 1 is a schematic flow chart of checking lower computer data based on configuration files according to the present application;
FIG. 2 is a schematic diagram of a preferred configuration file of the present application;
FIG. 3 is a schematic diagram of ADS versus profile comparison according to a preferred embodiment of the present application;
fig. 4 is a schematic diagram of an ADS file visualization interface according to the present application.
Detailed Description
The following embodiments are used to further illustrate the technical solution for achieving the object of the present application, and it should be noted that the technical solution claimed in the present application includes but is not limited to the following embodiments.
Example 1
As a most basic specific implementation scheme of the application, the embodiment discloses a configuration file-based visual verification method for interlocking lower computer data, which comprises the following steps:
step S1, an ADS binary data file in a lower computer data packet, namely an ADS file, is acquired, the lower computer data packet refers to a folder for storing output data generated by CAA software, the data packet also comprises an ADSVAR text file, the ADS binary data file refers to a file which is not read, the ADS binary data file is a file with ADS as a suffix, the name is generally 'VPICAA.ADS', the ADS binary data file is read in a four-byte unit, a key value pair set A is obtained, and ADS information is visually displayed in a 'address-value-description' column mode.
And S2, acquiring an ADSVAR text file in the lower computer data packet, analyzing the ADSVAR text file to obtain code bit and variable information and a corresponding channel address, and storing the information into the set B.
And S3, selecting a configuration file, analyzing and reading the selected configuration file, and storing information obtained by analysis into the set C.
Step S4, if the file key < CONFIGFILE > is defined in the configuration file, continuing to execute the next step S5; if the profile key < CONFIGFILE > is not defined in the profile, step S7 is performed.
And S5, reading the CAA configuration file, and finding out the corresponding file names according to the file key words < CONFIGFILE >, wherein the order of the file names is stored according to the sequence defined in the CAA configuration file.
Step S6, traversing all file names found in the step S5, taking the file names as distinction, reading the content in the configuration file according to the configuration file by rows, starting to analyze file information, displaying the description information of the analysis data in a third column in a visual interface, and continuously executing the step S8; the configuration file is a text file, the content in the configuration file is read according to the rows, for example, when a row starting with < CONFIGFILE > is read, the next row is continuously read and the information of the next row is stored when the key information in the CAA configuration file is read, then the next row is read, if the row starting with < CONFIGFILE > is read, the information in the CONFIGFILE node is read, after the information of one node is read, the next row is continuously read, and when the next < XX > is read, the processing mode is the same as that of < CONFIGFILE >.
And S7, if the file key is not defined in the configuration file, finding the initial Address of the file information stored in the ADS according to the base Address defined in the configuration file, and analyzing the corresponding information of the configuration file by starting with the Address.
And S8, comparing the analyzed information with the corresponding CAA input file, and verifying whether the information stored in the ADS is correct.
Example 2
As a more preferable specific embodiment of the present application, on the basis of the technical solution of the above example 1, this example further discloses:
in the step S1, the key in the key value pair set a is an address of ADS, and the value is a value of a quaternary length stored in the corresponding address. More specifically, in the step S1, the ADS information is visually displayed in a column manner of "address-value-description", as shown in fig. 4, where the first column of "address" is an address in the ADS binary data, the second column of "value" is a value of four bytes length stored in the corresponding address, the third column of "description" is description information corresponding to the value, so that the specific value in the ADS is conveniently located, and the third column displays the description of the analysis position after the step S6 or the step S7 is performed.
Further, in the step 2, all code bits and variable information are stored in the adsar file, and the code bits and variable information obtained in the step S2 are code bit names and variable names in the CAA input interface file and the relational logic file. Step S2, analyzing the ADSVAR text file to obtain code bits, variable information and corresponding channel addresses, wherein the channel addresses are values stored in the ADS, the values stored in the ADS comprise flag bit information of the variable, code bit number information, true and false value information of each code bit, channel address information and the like, the description refers to the channel addresses stored in the ADS, and the corresponding code bits and variable information are obtained by acquiring the values stored in the ADS, the code bit names used for inquiring text forms in the ADSVAR text file and the channel addresses corresponding to the code bits.
More preferably, the code bits and variable information, and the corresponding channel addresses are stored in set B in the form of a data structure.
Further, the configuration files in the step S3 include parameters that can be adjusted by themselves, such as the start and end nodes, < ADSTYPE >, < CONFIGFILE >, < describe >, < ADDRESS >, < CONTENT >, < CODE >, etc., and can be flexibly configured as required, and these parameters are used as marks for program identification and reading, and according to these keywords, the information in the configuration files is read, so that the desired information can be obtained in the binary ADS, as shown in fig. 2, and the configuration rules are as follows:
(1) The configuration file represents a node information by < XX >, and the node is ended by;
(2) The < ADSTYPE > defines the type of the lower computer, the type of the data adaptation lower computer can be obtained when an ADS binary data file in a lower computer data packet is obtained, and the type of the lower computer can be matched with the ADS binary data file;
(3) The < CONFIGFILE > defines the corresponding keyword information of the information in the CAA configuration file, if the keyword information is not defined, the module is system description information or a corresponding non-CAA input file, the CAA configuration file is a configuration file read by generating ADS file software CAA, the necessary input for generating lower computer data is generated, and the configuration file defines the input path and the input file of the CAA;
(4) < DESCRIPTION > defines the DESCRIPTION of the module, briefly describing the information represented by the module;
(5) The ADDRESS defines the initial ADDRESS of the module in the lower computer binary file ADS, and the initial ADDRESS of the module information can be inquired through the ADDRESS;
(6) < CONTENT > defines the CONTENT information in the module; wherein the information in < CONTENT > is divided by a line-feed character, one line represents a single information, each line is divided by English and number, and the first column represents descriptive information; the second column of numbers indicates the number of bytes (four bytes or two bytes) occupied by the value corresponding to the first column of description information; the third column (if present) is a type key, e.g., NEXTADDRESS, which indicates that the information for the row is the real address of the next module; the fourth column, if any, represents the number of CODE bits, the third column represents the CODE, the CODE bit node is < CODE >, and the fourth column represents the number of CODE bits, the row represents how many < CODE > node information will be below;
(7) The CODE information generally indicates CODE bits and variables, and the number of CODE information is defined in the CODE information at the position of the row where COUNT is located.
Preferably, the configuration file is read in an analysis way, node information is read by starting with < XX >, and reading is finished by finishing.
In the step S4, there may be a plurality of file names corresponding to the file key < CONFIGFILE >, that is, there may be a plurality of interface files or logical relationship files representing the type, and if there are a plurality of files < CONFIGFILE > with the same key, the type of file information is read out in the ADS binary file with 0 and 1, and is stored according to the order defined in the CAA configuration file.
Further, as shown in fig. 3, the comparison relationship between the ADS file and the configuration file may be located at the file information start ADDRESS indicated by the configuration file according to the base ADDRESS in the configuration file, and then the file information may be resolved sequentially, where detailed resolution rules are as follows:
(1) After obtaining the file name, finding the initial Address of the file information stored in the ADS according to the base Address defined in the configuration file, wherein the Address information is expressed by Address;
(2) Traversing the set C, reading N bytes of information from an Address according to the number N of bytes of each piece of information in the set, printing out the description information and the obtained N bytes of information, adding N to the Address, and pointing the Address position to the next piece of information;
(3) If the next Address Next Address is traversed, reading Address information with the byte length of N, and storing the Address, wherein N is added to the Address;
(4) If the number of the code bits is traversed to the number of the code bits COUNT, reading the code bit number information with the byte length of N, and storing the information, wherein N is added to the Address;
(5) If the information of the CODE is traversed, finding a corresponding value in the set A according to the Address, finding CODE bits in the set B through the value channel Address, printing out description information and CODE bit variable information, adding the number N of bytes of printing information to the Address, and printing the information of the CODE for many times according to the number N of the obtained CODE bits;
(6) If the file name traversal is finished or the next address information value is 0, the information corresponding to the configuration file is already analyzed and printed;
where N represents a byte length and N is 2 or 4.
In step S7, specifically, the set C is traversed starting from the obtained starting Address, and according to the number N of bytes of each information in the set, the N bytes of information are read from the Address, and the description information and the obtained N bytes of information are printed out. Then N is added to the Address to point the Address position to the next information.
Further, if the set C traverses to the last element, the information corresponding to the configuration file is already parsed and printed.
Claims (9)
1. The visual verification method for the interlocking lower computer data based on the configuration file is characterized by comprising the following steps of:
step S1, an ADS binary data file in a lower computer data packet is obtained, the ADS binary data file is read by taking four bytes as a unit, a key value pair set A is obtained, and ADS information is visually displayed in an address-value-description column mode;
s2, an ADSVAR text file in a lower computer data packet is obtained, the ADSVAR text file is analyzed to obtain code bit and variable information and a corresponding channel address, and the information is stored in a set B;
s3, selecting a configuration file, analyzing and reading the selected configuration file, and storing information obtained by analysis into a set C;
step S4, if the file key < CONFIGFILE > is defined in the configuration file, continuing to execute the next step S5; if the profile has no profile key < CONFIGFILE >, then step S7 is performed;
s5, reading a CAA configuration file, and finding out the corresponding file names according to a file keyword < CONFIGFILE >, wherein the sequence of the file names is stored according to the sequence defined in the CAA configuration file;
step S6, traversing all file names found in the step S5, taking the file names as distinction, reading the content in the configuration file according to the configuration file by rows, starting to analyze file information, displaying the description information of the analysis data in a third column in a visual interface, and continuously executing the step S8;
step S7, if the file key is not defined in the configuration file, finding the initial Address of the file information stored in the ADS according to the base Address defined in the configuration file, and analyzing the corresponding information of the configuration file from the Address;
s8, comparing the analyzed information with the corresponding CAA input file, and verifying whether the information stored in the ADS is correct;
the comparison relation between the ADS file and the configuration file can be positioned to the file information starting ADDRESS represented by the configuration file according to the base ADDRESS ADDRESS in the configuration file, then the file information can be analyzed in sequence, and the detailed analysis rule is as follows: (1) After obtaining the file name, finding the initial Address of the file information stored in the ADS according to the base Address defined in the configuration file, wherein the Address information is expressed by Address; (2) Traversing the set C, reading N bytes of information from an Address according to the number N of bytes of each piece of information in the set, printing out the description information and the obtained N bytes of information, adding N to the Address, and pointing the Address position to the next piece of information; (3) If the next Address Next Address is traversed, reading Address information with the byte length of N, and storing the Address, wherein N is added to the Address; (4) If the number of the code bits is traversed to the number of the code bits COUNT, reading the code bit number information with the byte length of N, and storing the information, wherein N is added to the Address; (5) If the information of the CODE is traversed, finding a corresponding value in the set A according to the Address, finding CODE bits in the set B through the value channel Address, printing out description information and CODE bit variable information, adding the number N of bytes of printing information to the Address, and printing the information of the CODE for many times according to the number N of the obtained CODE bits; (6) If the file name traversal is finished or the next address information value is 0, the information corresponding to the configuration file is already analyzed and printed; where N represents a byte length and N is 2 or 4.
2. The configuration file-based interlocking lower computer data visualization verification method as claimed in claim 1, wherein the method comprises the following steps: in the step S1, the key in the key value pair set a is an address of ADS, and the value is a value of a quaternary length stored in the corresponding address.
3. The configuration file-based interlocking lower computer data visualization verification method as claimed in claim 1 or 2, wherein the configuration file-based interlocking lower computer data visualization verification method is characterized by comprising the following steps of: in the step S1, the ADS information is visually displayed in a column manner of "address-value-description", the first column "address" is an address in the ADS binary data, the second column "value" is a value of four bytes length stored in the corresponding address, and the third column "description" is description information corresponding to the value, so that the specific value in the ADS is convenient to locate.
4. The configuration file-based interlocking lower computer data visualization verification method as claimed in claim 1, wherein the method comprises the following steps: and storing all code bits and variable information in the ADSVAR text file, wherein the code bits and variable information obtained in the step S2 are the code bit names and variable names in the CAA input interface file and the relation logic file.
5. The configuration file-based interlocking lower computer data visualization verification method as claimed in claim 4, wherein the method comprises the following steps: the channel address is a value stored in the ADS, the value stored in the ADS comprises flag bit information, code bit number information of a variable, true and false value information of each code bit and channel address information, and corresponding code bits and variable information are obtained by obtaining the value stored in the ADS, a code bit name used for inquiring a text form in an ADSVAR text file and a channel address corresponding to the code bits.
6. The configuration file-based interlocking lower computer data visualization verification method as claimed in claim 1 or 5, wherein the configuration file-based interlocking lower computer data visualization verification method is characterized by comprising the following steps of: the code bits and variable information, and the corresponding channel addresses are stored in set B in the form of a data structure.
7. The method of claim 1, wherein the configuration file in step S3 includes parameters that can be adjusted by itself for the start and end nodes, < ADSTYPE >, < CONFIGFILE >, < describe >, < ADDRESS >, < CONTENT >, < CODE >, and the configuration rules are as follows:
(1) The configuration file represents a node information by < XX >, and the node is ended by;
(2) The < ADSTYPE > defines the type of the lower computer, the type of the data adaptation lower computer can be obtained when an ADS binary data file in a lower computer data packet is obtained, and the type of the lower computer can be matched with the ADS binary data file;
(3) The < CONFIGFILE > module defines the corresponding keyword information in the CAA configuration file, and if the keyword information is not defined, the < CONFIGFILE > module is system description information or the corresponding non-CAA input file;
(4) The < DESCRIPTION > module defines its DESCRIPTION, briefly describing the information represented by < DESCRIPTION >;
(5) The < ADDRESS > module defines the starting ADDRESS of the < ADDRESS > module in the lower computer binary file ADS, and the starting ADDRESS of the < ADDRESS > module can be queried through the starting ADDRESS;
(6) < CONTENT > defines its own CONTENT information; wherein the information in < CONTENT > is divided by a line-feed character, one line represents a single information, each line is divided by English and number, and the first column represents descriptive information; the second column of numbers represents the number of bytes occupied by the value corresponding to the first column of descriptive information; the third column is a type key; the information represented by the fourth column is the number of code bits;
(7) The CODE information generally indicates CODE bits and variable information, and is defined in the CODE information, and the number of the CODE information is defined in the position of the row where the COUNT is located;
further, the configuration file is analyzed and read, node information is read, and the reading is started by < XX > and is finished by < XX >.
8. The configuration file-based interlocking lower computer data visualization verification method as claimed in claim 7, wherein the method comprises the following steps: if there are multiple files with the same key words < CONFIGFILE >, the file information of the type is read out from the ADS binary file in 0 and 1, and is stored according to the sequence defined in the CAA configuration file.
9. The configuration file-based interlocking lower computer data visualization verification method as claimed in claim 1, wherein the method comprises the following steps: step S7, starting with the obtained initial Address, traversing the set C, reading N bytes of information from the Address according to the number N of bytes of each information in the set, printing out the description information and the obtained N bytes of information, adding N to the Address, and pointing the Address position to the next information; if the set C traverses to the last element, the information corresponding to the configuration file is already analyzed and printed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110643538.4A CN113535461B (en) | 2021-06-09 | 2021-06-09 | Visual verification method for interlocking lower computer data based on configuration file |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110643538.4A CN113535461B (en) | 2021-06-09 | 2021-06-09 | Visual verification method for interlocking lower computer data based on configuration file |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113535461A CN113535461A (en) | 2021-10-22 |
| CN113535461B true CN113535461B (en) | 2023-10-24 |
Family
ID=78124748
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110643538.4A Active CN113535461B (en) | 2021-06-09 | 2021-06-09 | Visual verification method for interlocking lower computer data based on configuration file |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113535461B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114385649B (en) * | 2021-12-21 | 2025-05-20 | 卡斯柯信号有限公司 | Automatic updating system and method for interlock logic rule configuration file |
| CN113946660B (en) * | 2021-12-21 | 2022-03-15 | 卡斯柯信号(北京)有限公司 | Automatic Boolean variable checking method and system for offline data of train control center |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02158454A (en) * | 1988-12-09 | 1990-06-18 | Railway Technical Res Inst | Interlocking inspection method for electronic interlocking devices for railway signals |
| CN103401906A (en) * | 2013-07-23 | 2013-11-20 | 国电南瑞科技股份有限公司 | Remote configuration method of safety interlock |
| CN104461765A (en) * | 2014-12-29 | 2015-03-25 | 卡斯柯信号有限公司 | Interlocking system data accuracy detection method based on version verification |
| CN109901888A (en) * | 2019-02-01 | 2019-06-18 | 卡斯柯信号有限公司 | A Design Method of Automatic Configuration File Generation Tool |
| CN111737255A (en) * | 2020-06-02 | 2020-10-02 | 通号城市轨道交通技术有限公司 | Method and system for storing interlocking monitoring data |
| CN111845866A (en) * | 2020-06-29 | 2020-10-30 | 通号城市轨道交通技术有限公司 | Automatic generation method and device of interlocking configuration file and electronic equipment |
| CN112559482A (en) * | 2020-12-17 | 2021-03-26 | 中国电子科技集团公司第五十二研究所 | Binary data classification processing method and system based on distribution |
-
2021
- 2021-06-09 CN CN202110643538.4A patent/CN113535461B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02158454A (en) * | 1988-12-09 | 1990-06-18 | Railway Technical Res Inst | Interlocking inspection method for electronic interlocking devices for railway signals |
| CN103401906A (en) * | 2013-07-23 | 2013-11-20 | 国电南瑞科技股份有限公司 | Remote configuration method of safety interlock |
| CN104461765A (en) * | 2014-12-29 | 2015-03-25 | 卡斯柯信号有限公司 | Interlocking system data accuracy detection method based on version verification |
| CN109901888A (en) * | 2019-02-01 | 2019-06-18 | 卡斯柯信号有限公司 | A Design Method of Automatic Configuration File Generation Tool |
| CN111737255A (en) * | 2020-06-02 | 2020-10-02 | 通号城市轨道交通技术有限公司 | Method and system for storing interlocking monitoring data |
| CN111845866A (en) * | 2020-06-29 | 2020-10-30 | 通号城市轨道交通技术有限公司 | Automatic generation method and device of interlocking configuration file and electronic equipment |
| CN112559482A (en) * | 2020-12-17 | 2021-03-26 | 中国电子科技集团公司第五十二研究所 | Binary data classification processing method and system based on distribution |
Non-Patent Citations (2)
| Title |
|---|
| 二取二制式计算机联锁系统中的通信技术;张新明; 刘海祥; 赵永清;《中国铁道科学》(第5期);96-100 * |
| 铁路信号计算机联锁控制系统容错技术;王绍新;《电子技术与软件工程》(第17期);192-193 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113535461A (en) | 2021-10-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11775414B2 (en) | Automated bug fixing using deep learning | |
| CN109710508B (en) | Test method, test device, test apparatus, and computer-readable storage medium | |
| CN112307124B (en) | Database synchronous verification method, device, equipment and storage medium | |
| US8782609B2 (en) | Test failure bucketing | |
| CN113535461B (en) | Visual verification method for interlocking lower computer data based on configuration file | |
| US7478305B2 (en) | Method and apparatus for interactive generation of device response templates and analysis | |
| US20080027934A1 (en) | Method for searching for patterns in text | |
| CN113392000A (en) | Test case execution result analysis method, device, equipment and storage medium | |
| US10830818B2 (en) | Ensuring completeness of interface signal checking in functional verification | |
| CN113360388B (en) | Method for integrally managing test process of unmanned aerial vehicle ground station software | |
| CN114185797A (en) | Front-end code checking method and device, electronic equipment and readable storage medium | |
| US20120078925A1 (en) | Searching within log files | |
| US20070245327A1 (en) | Method and System for Producing Process Flow Models from Source Code | |
| CN115481396A (en) | NC code abnormality detection method, device, equipment and storage medium | |
| JP2018092361A (en) | Test script correction apparatus and test script correction program | |
| US20170091180A1 (en) | Language conversion apparatus, language conversion method, and language conversion program | |
| CN111708542B (en) | Test case generation method, system, equipment and storage medium | |
| US6694459B1 (en) | Method and apparatus for testing a data retrieval system | |
| KR101319299B1 (en) | Device for handling korean variable message format message and method thereof | |
| CN112433943A (en) | Method, device, equipment and medium for detecting environment variable based on abstract syntax tree | |
| CN117634424A (en) | Keyword highlight labeling method and device, computer equipment and storage medium | |
| CN114706589B (en) | Repeat code scanning method, device and electronic device | |
| JP6018539B2 (en) | Information processing apparatus, information processing method, and program | |
| US7152227B1 (en) | Automated assessment of programming language coverage by one or more test programs | |
| JP4782315B2 (en) | Impact analysis apparatus and method, recording medium, and program |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |