CN113514711B - Phase sequence detection device and phase sequence detection method - Google Patents

Abstract

A phase sequence detection device and a phase sequence detection method are provided. According to an embodiment of the present disclosure, the phase sequence detection device may include: a waveform detection circuit for detecting a first waveform of a first line voltage of a first phase relative to a second phase of three-phase AC power and a second waveform of a second line voltage of a second phase relative to a third phase; and a signal processor for determining a first duration of the first waveform and a second duration of the second waveform, and determining the phase sequence of the AC power or whether a phase failure occurs based on the first duration and the second duration. According to an embodiment of the present disclosure, phase sequence detection can be conveniently, effectively and reliably implemented by combining software and hardware.

Description

Phase sequence detection device and phase sequence detection method

Technical Field

The present disclosure generally relates to power electronics technology, and more particularly, to a phase sequence detection device and a phase sequence detection method.

Background Art

Many electrical devices, such as frequency converters, require phase detection when in use to prevent phase loss, determine phase sequence, etc. Currently, hardware circuits are usually used for phase detection. However, such circuits are usually complex, have a narrow application voltage range, poor grid adaptability (for example, they can only be used at 50Hz), use more components, and have low reliability.

Summary of the invention

In view of this, an object of the present disclosure is at least partially to provide a phase sequence detection device and a phase sequence detection method to at least partially suppress or solve the above-mentioned problems.

According to one aspect of the present disclosure, a phase sequence detection device is provided, comprising: a waveform detection circuit for detecting a first waveform of a first line voltage of a first phase relative to a second phase of three-phase AC power and a second waveform of a second line voltage of the second phase relative to a third phase; and a signal processor for determining a first duration of the first waveform and a second duration of the second waveform, and determining the phase sequence of the three-phase AC power or whether a phase loss fault occurs based on the first duration and the second duration.

Here, a hardware circuit, a waveform detection circuit, is used to sample the line voltages, obtain their waveforms, and use an algorithm or software through a signal processor to determine the phase sequence or phase loss based on the obtained waveform. The basic principle of judgment is that under normal circumstances, the phase difference between the three phases of the three-phase AC power is approximately fixed, and the amplitude of the three-phase AC power is also approximately fixed, so the phase and amplitude of the line voltage between two adjacent phases are also basically constant, and then, the high (or low) level duration of the two line voltages is also basically fixed, and the time difference between the high (or low) level duration of the two line voltages is also basically zero. If the amplitude of any phase voltage decreases, the high (or low) level duration of the corresponding line voltage is shortened. Therefore, by detecting the high (or low) level duration of the two line voltages, it can be determined whether a phase loss fault occurs. In addition, if the amplitude difference between any two phase voltages becomes larger, the difference between the high (or low) level duration of the two line voltages becomes larger. Therefore, by detecting the difference between the high (or low) level duration of the two line voltages, the balance of the three-phase AC power can be determined. Since the line voltage can be sampled at a preset sampling time to determine the high (or low) level duration of the line voltage without always monitoring the line voltage, and the judgment is implemented by software, the software can be simplified and the resources occupied by the software can be reduced.

According to an embodiment of the present disclosure, the waveform detection circuit may include: a waveform conversion circuit configured to convert each of the first waveform and the second waveform into a pulse waveform having the same period and phase as the waveform, wherein the signal processor is configured to make the determination based on the duration of the pulse waveform.

According to an embodiment of the present disclosure, the waveform conversion circuit may be configured to convert a portion of the waveform whose amplitude exceeds a predetermined threshold into a pulse.

According to an embodiment of the present disclosure, the signal processor can be configured to: if the first duration and the second duration are both greater than the first predetermined threshold, and the difference between the first duration and the second duration is less than the second predetermined threshold, then enter the phase sequence judgment stage; otherwise, determine that a phase loss fault has occurred.

According to an embodiment of the present disclosure, in the phase sequence determination stage, if the first duration occurs before the second duration, the phase sequence is determined to be forward, otherwise, the phase sequence is determined to be reverse.

According to an embodiment of the present disclosure, the signal processor may be configured to identify multiple first durations and multiple second durations within a predetermined detection period, and take an average of the sum of the multiple first durations as the first duration, and take an average of the sum of the multiple second durations as the second duration.

According to an embodiment of the present disclosure, if the first duration or the second duration is not detected within a predetermined detection period, the signal processor may determine that a phase loss fault occurs.

According to an embodiment of the present disclosure, the signal processor may be further configured to filter the multiple first durations and the multiple second durations, and filter out durations whose duration is less than a first filtering threshold and whose duration time interval is less than a second filtering threshold.

According to an embodiment of the present disclosure, the waveform conversion circuit may include: an optocoupler, whose input-side photodiode receives a line voltage to be detected or a voltage proportional to the line voltage to be detected, and whose output-side transistor is connected to output a low level at an output node when the input-side photodiode is turned on, and output a high level when the input-side photodiode is turned off; a logic conversion circuit, which receives the output at the output node of the optocoupler and converts the high-level output into a low level and converts the low-level output into a high level; and a filtering circuit, which filters the output of the logic conversion circuit.

According to another aspect of the present disclosure, a phase sequence detection method is provided, including: detecting a first waveform of a first line voltage of a first phase relative to a second phase of three-phase AC power and a second waveform of a second line voltage of the second phase relative to a third phase; and determining a first duration of the first waveform and a second duration of the second waveform, and determining the phase sequence of the three-phase AC power or whether a phase loss fault occurs based on the first duration and the second duration.

According to an embodiment of the present disclosure, detecting the first waveform and the second waveform may include: converting each of the first waveform and the second waveform into a pulse waveform having the same period and phase as the waveform, wherein the determination is performed based on a duration of the pulse waveform.

According to an embodiment of the present disclosure, determining the phase sequence of three-phase AC power or whether a phase loss fault occurs based on a first duration and a second duration may include: if the first duration and the second duration are both greater than a first predetermined threshold, and the difference between the first duration and the second duration is less than a second predetermined threshold, determining to enter the phase sequence judgment stage; otherwise determining that a phase loss fault occurs.

According to an embodiment of the present disclosure, the phase sequence determination stage includes: if the first duration occurs before the second duration, determining that the phase sequence is forward; otherwise, determining that the phase sequence is reverse.

According to an embodiment of the present disclosure, determining the phase sequence of three-phase AC power or whether a phase loss fault occurs based on a first duration and a second duration may include: identifying multiple first durations and multiple second durations within a predetermined detection period, and taking the average of the sum of the multiple first durations as the first duration, and taking the average of the sum of the multiple second durations as the second duration.

According to an embodiment of the present disclosure, determining the phase sequence of three-phase AC power or whether a phase loss fault occurs based on the first duration and the second duration may include: if the first duration or the second duration is not detected within a predetermined detection cycle, determining that a phase loss fault occurs.

According to an embodiment of the present disclosure, determining the phase sequence of three-phase AC power or whether a phase loss fault occurs based on the first duration and the second duration may also include: filtering the multiple first durations and the multiple second durations, and filtering out durations whose duration is less than the first filtering threshold and whose duration time interval is less than the second filtering threshold.

As described above, the solution proposed in the present disclosure is convenient, effective and reliable.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other objects, features and advantages of the present disclosure will become more apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, in which:

FIG1 is a schematic diagram showing a detection principle according to an embodiment of the present disclosure;

FIG2 is a schematic block diagram showing a phase sequence detection device according to an embodiment of the present disclosure;

FIG3 is a schematic diagram showing an example of waveform conversion according to an embodiment of the present disclosure;

4 is a circuit diagram showing an example of a waveform conversion circuit according to an embodiment of the present disclosure;

FIG5 is a schematic diagram showing the principle of a detection algorithm according to an embodiment of the present disclosure;

FIG. 6 is a flow chart showing a phase sequence detection method according to an embodiment of the present disclosure.

Throughout the drawings, the same or similar reference numerals refer to the same or similar parts.

DETAILED DESCRIPTION

Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present disclosure. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessary confusion of the concepts of the present disclosure.

The terms used herein are only for describing specific embodiments and are not intended to limit the present disclosure. The words "a", "an (kind)" and "the" used herein should also include the meanings of "multiple" and "multiple", unless the context clearly indicates otherwise. In addition, the terms "including", "comprising" and the like used herein indicate the presence of the features, steps, operations and/or components, but do not exclude the presence or addition of one or more other features, steps, operations or components.

All terms (including technical and scientific terms) used herein have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification, and should not be interpreted in an idealized or overly rigid manner.

FIG. 1 is a schematic diagram illustrating a detection principle according to an embodiment of the present disclosure.

For three-phase alternating current (AC) power, such as AC power supply from a power grid, the phase difference between the three phases is basically constant (120°) under normal circumstances, and the amplitude of the three-phase AC power is also roughly fixed. As a result, the phase and amplitude of the line voltage between two adjacent phases are also basically constant; then, the high (or low) level duration of the two line voltages is also basically fixed, and the time difference between the high (or low) level duration of the two line voltages is also basically zero. FIG1 schematically shows the waveforms of the line voltage 1-2 of the first phase relative to the second phase and the line voltage 2-3 of the second phase relative to the third phase. More specifically, in terms of time, the high (or low) level duration of the waveforms of the two line voltages is fixed after the waveform detection circuit is set, for example, the duration T1 of the level of the first phase relative to the second phase line voltage 1-2 being higher than the threshold is fixed, for example, 5ms, and the duration T2 of the level of the second phase relative to the third phase line voltage 2-3 being higher than the threshold is also fixed, for example, 5ms. If the amplitude of any phase voltage decreases, the high (or low) level duration of the corresponding line voltage waveform is shortened. Therefore, by detecting the high (or low) level duration of the two line voltage waveforms, it is possible to determine whether a phase failure occurs. In addition, if the amplitude difference between any two phase voltages increases, the difference between the high (or low) level duration of the two line voltage waveforms increases. Therefore, by detecting the difference between the high (or low) level duration of the two line voltage waveforms, the balance of the three-phase AC power can be determined.

For example, the waveform of the first line voltage of the first phase relative to the second phase is called the first waveform, the waveform of the second line voltage of the second phase relative to the third phase is called the second waveform, the duration of the first waveform being a high (or low) level is called the first duration, and the duration of the second waveform being a high (or low) level is called the second duration. Then, by detecting the first duration and the second duration, when the first duration and the second duration are less than the first predetermined threshold, or the difference between the first duration and the second duration is greater than the second predetermined threshold, it can be considered that a phase failure has occurred. If the first duration occurs before the second duration, the phase sequence of the three-phase AC power is recorded as forward, otherwise, the phase sequence of the three-phase AC power is recorded as reverse.

The detection algorithm can be designed based on the above principle. It only needs to input data representing the waveform, especially its high level/low level (for example, waveform sampling) into the algorithm. Thus, the design of the hardware part can be greatly simplified and the resource occupation of the software can be reduced.

FIG. 2 is a schematic block diagram showing a phase sequence detection device according to an embodiment of the present disclosure.

As shown in FIG. 2 , the phase sequence detection device 200 according to this embodiment may include a waveform detection circuit 201 and a signal processor 203 .

The waveform detection circuit 201 can be used to detect the waveforms of the line voltage of the first phase relative to the second phase and the line voltage of the second phase relative to the third phase of the three-phase AC power. The waveform detection circuit 201 can be implemented in many ways. For example, the waveform detection circuit 201 can simply sample the line voltage and send the sampled signal to the signal processor 203, which processes the sampled signal and calculates the high (or low) level duration of the waveform.

According to an embodiment of the present disclosure, the waveform detection circuit 201 may include a waveform conversion circuit for converting each of the first waveform and the second waveform into a pulse waveform having the same period and phase as the waveform. The pulse waveform is advantageous for detection, especially level detection, because it has abruptness. The converted pulse waveform and the waveform before the conversion may be substantially aligned in time, i.e., in phase, so the converted pulse waveform can reflect the position of the waveform before the conversion in time, and can therefore be used for detection.

FIG. 3 is a schematic diagram showing an example of waveform conversion according to an embodiment of the present disclosure.

As shown in FIG3 , in this example, the waveform of the line voltage is converted into a square wave pulse sequence. Specifically, the portion of the waveform of the line voltage whose amplitude V exceeds a predetermined threshold REF can be converted into a pulse. Thus, each pulse in the pulse sequence is substantially consistent with the peak portion of the waveform of the line voltage in time. Of course, due to the possible delay of the circuit elements, the rising edge and the falling edge of the square wave waveform may have a certain inclination. The threshold REF is adjustable.

Of course, the waveform conversion circuit may also have different designs. For example, the waveform conversion circuit may generate a pulse sequence corresponding to the trough portion of the waveform of the line voltage in time (for example, by converting the portion of the waveform of the line voltage whose amplitude V is below a negative predetermined threshold into a pulse).

Due to the similarity between line voltages 1-2 and 2-3 (ignoring noise and phase differences, they should have the same waveform in principle), no matter how the waveform conversion circuit is designed, by applying the same waveform conversion circuit to line voltages 1-2 and 2-3, the relative position relationship in time and the level (amplitude) of the converted pulse waveform can be kept consistent with the relative position relationship in time and the level (amplitude) of the waveforms of line voltages 1-2 and 2-3.

FIG. 4 is a circuit diagram showing an example of a waveform conversion circuit according to an embodiment of the present disclosure.

As shown in FIG. 4 , the waveform conversion circuit 400 according to this embodiment may include a comparison device 401 to compare the line voltage (e.g., the line voltage of the first phase AC1 relative to the second phase AC2) with the threshold voltage REF. Depending on the magnitude relationship between the line voltage and the threshold voltage REF, the comparison device 401 may have different outputs. In this example, considering the possible high voltage of AC power (e.g., 220V or 380V, etc. in the case of a power grid), an optocoupler capable of isolating is used as the comparison device 401. The optocoupler includes an input-side photodiode PD and an output-side transistor PT. When the line voltage is greater than the threshold voltage REF, the voltage applied across the input-side photodiode PD of the optocoupler 401 can turn on the photodiode PD, and thus turn on the output-side transistor PT. On the other hand, when the line voltage is less than the threshold voltage REF, the voltage applied across the input-side photodiode PD of the optocoupler 401 is insufficient to turn on the photodiode PD, and thus turns off the output-side transistor PT.

Here, the input side photodiode PD can receive the line voltage through the voltage dividing circuit 403. The voltage dividing circuit 403 includes voltage dividing resistors R1 and R2. By adjusting the resistance values of the voltage dividing resistors R1 and R2 to adjust the voltage dividing ratio of the voltage dividing circuit 403, the threshold voltage REF can be adjusted, and the duration of the pulse waveform corresponding to the waveform of the line voltage can be adjusted.

In addition, a diode D1 is connected in series on the input side to prevent a reverse current from flowing through the photodiode PD.

At the output side of the optocoupler 401, different signals, such as high and low level signals, can be output according to the on or off state of the output side transistor PT. There are many circuit designs in the art that can achieve this purpose. In one example, one end of the output side transistor PT is connected to the power supply voltage VSS1 through a pull-up resistor R3, and the other end is connected to a reference voltage such as a ground voltage GND. Thus, at the output node N1 of the transistor PT, when the transistor PT is turned on (i.e., when the line voltage is higher than the threshold voltage REF), a low level (approximately the ground voltage GND) is output, and when the transistor PT is turned off (i.e., when the line voltage is lower than the threshold voltage REF), a high level (approximately the power supply voltage VSS1) is output.

This output logic is opposite to the desired output logic (as described above, it is desired to output a high level pulse when the line voltage is higher than the threshold voltage REF), so in this example, the logic conversion circuit 405 is connected after the output node N1. In the example, the logic conversion circuit 405 can realize the inversion function. The logic conversion circuit 405 may include a transistor T1, which is connected similarly to the transistor PT. Specifically, one end of the transistor T1 is connected to the power supply voltage VSS2 through a pull-up resistor R4, and the other end is connected to the ground voltage GND. In this way, when the node N1 is at a low level, the transistor T1 is turned off, and the output node N2 of the transistor T1 outputs a high level (approximately the power supply voltage VSS2), and when the node N1 is at a high level, the transistor T1 is turned on, and the node N2 outputs a low level (approximately the ground voltage GND).

In addition, a filter circuit 407 may be provided between the node N1 and the logic conversion circuit 405. For example, the filter circuit 407 may include a resistor R5, a capacitor C1, and a diode D2. The filter circuit 407 may filter out the switching component caused by the switching of the optocoupler 401. In addition, a filter circuit 409 may also be connected after the node N2 to stabilize the output. For example, the filter circuit 409 may include a resistor R6 and a capacitor C2.

Returning to FIG. 2 , the signal processor 203 can determine whether a phase failure occurs based on the high-level duration of the waveform detected by the waveform detection circuit 201. For example, the signal processor 203 can calculate the high-level duration of the waveforms of the line voltages 1-2 and 2-3, respectively, based on the waveform detected by the waveform detection circuit 201, such as the pulse waveform converted by the waveform conversion circuit, and based on the high-level duration and the order in which the high-level durations appear, refer to the principles described above in conjunction with FIG. 1 to determine whether the phase sequence is forward or reverse, or whether a phase failure occurs. Such calculation and judgment can be achieved, for example, by the signal processor 203 running a related program or executing a related algorithm. FIG. 5 is a schematic diagram showing the principle of a detection algorithm according to an embodiment of the present disclosure.

As shown in FIG5 , in the case of three-phase AC power, there are two line voltages, namely, line voltage 1-2 of the first phase relative to the second phase and line voltage 2-3 of the second phase relative to the third phase. The waveforms of the line voltages 1-2 and 2-3 are converted into pulse waveforms, for example, by the above-mentioned waveform conversion circuit. Then, phase sequence detection can be performed based on the high (or low) level duration of these waveforms. Here, the high level duration of the waveform is taken as an example for description.

Due to the repeatability of the cycle, detection can be achieved through several pulses that are adjacent in time. If the state in which the pulse PULSE1 of the line voltage 1-2 or the pulse PULSE2 of the line voltage 2-3 cannot be identified continues for more than a certain time (for example, a duration of 30 signal cycles), that is, if the first duration or the second duration is not detected within a predetermined detection cycle, it is determined that a phase failure occurs.

When the two pulses PULSE1 and PULSE2 are detected, their high-level durations can be calculated. For example, the duration of the high-level pulse waveform PULSE1 corresponding to the line voltage 1-2 is CNTA, and the duration of the high-level pulse waveform PULSE2 corresponding to the line voltage 2-3 is CNTB. Specifically, at power-on, or at a specific time, for example, for a 50Hz power grid, the signal cycle is 20ms, and detection begins at a multiple of 20ms after power-on (shown as T0 in FIG. 5 ).

If PULSE1 is detected as high first and PULSE2 is low at the same time, the phase sequence is recorded as forward, CNTA++. If PULSE1 is detected as low first and PULSE2 is high at the same time, the phase sequence is recorded as reverse, CNTB++.

Next, if it is detected that PULSE1 is low and PULSE2 is high, then CNTB++. If PULSE1 is high and PULSE2 is low, then CNTA++.

Finally, at, for example, T1 = T0 + 20 ms, the detection is terminated.

When the phase sequence is forward, the first detected is PULSE1 is high and PULSE2 is low, and then PULSE1 is low and PULSE2 is high. When the phase sequence is reverse, the first detected is PULSE2 is high and PULSE1 is low, and then PULSE1 is high and PULSE2 is low. Therefore, the phase sequence can be recorded as forward or reverse by detecting whether PULSE1 is high or PULSE2 is high first.

The sampling period can be set according to the performance of the single chip microcomputer used for calculation. For example, it can be set so that the height of the pulse waveform is sampled every 1 ms.

At this time, the high level duration of the pulse waveforms PULSE1 and PULSE2 and the pulse width difference between the line voltage 1-2 and the line voltage 2-3 are determined, that is, the values of CNTA, CNTB and the difference between CNTA and CNTB are determined. If the high level duration of PULSE1 and PULSE2 is greater than the first predetermined threshold (for example, 4ms), and the difference between CNTA and CNTB is less than the second predetermined threshold (for example, 2ms), the phase sequence judgment stage is entered. If not, it is determined that a phase failure occurs. In the phase sequence judgment stage, it can be determined whether it is forward or reverse based on the record, that is, if PULSE1 is high before PULSE2, the phase sequence is determined to be forward, otherwise, the phase sequence is determined to be reverse.

FIG5 shows a case where, for example, the amplitudes of the first phase voltage and the second phase voltage are normal while the amplitude of the third phase voltage is reduced. As the amplitude of the third phase voltage is reduced, the amplitude of the line voltage 2-3 is reduced. At this time, the amplitude of the line voltage 1-2 remains unchanged. As shown in FIG5 , the high level duration CNTA of the pulse waveform PULSE1 remains normal, while the high level duration CNTB of the pulse waveform PULSE2 is reduced. If the amplitude reduction of the third phase voltage is within the tolerance range, CNTB is still greater than the first predetermined threshold. At this time, according to the appearance of PULSE1 before PULSE2, it is determined that the phase sequence is positive.

If the amplitude of the third phase voltage decreases beyond the tolerance range, CNTB is less than the first predetermined threshold, and it is determined that a phase failure occurs, that is, a voltage failure occurs in a certain phase.

In another example, if the amplitude of the first phase voltage increases, the amplitude of the third phase voltage decreases, and the amplitude of the second phase voltage is normal, the amplitude of the line voltage 1-2 increases and the amplitude of the line voltage 2-3 decreases. If the amplitude change of the first phase voltage and the amplitude change of the third phase voltage are both within the tolerance range, CNTA and CNTB are both greater than the first predetermined threshold. However, if the difference between CNTA and CNTB is greater than the second predetermined threshold, it is determined that a phase failure occurs, that is, the power grid is unbalanced.

The first predetermined threshold and the second predetermined threshold can be set according to different situations. As described above, by adjusting the resistance values of the voltage-dividing resistors R1 and R2 in the waveform conversion circuit shown in FIG4 to adjust the voltage-dividing ratio of the voltage-dividing circuit 403, the duration of the line voltage can be adjusted, that is, the first predetermined threshold is set. Moreover, different second predetermined thresholds can be set for different detection error margins and the balance of the power grid.

The following is a pseudo code example of a phase sequence detection algorithm that can be used. In this example, 1 ms is used as a sampling period and 20 ms is used as a detection period.

In addition, a predetermined detection period may be set, such as 600ms (e.g., 30 signal periods). The signal processor 203 continuously performs detection within the predetermined detection period, identifies multiple CNTAs and multiple CNTBs, and processes the average of the multiple CNTAs and the average of the multiple CNTBs as CNTAs and CNTBs. If no CNTA or CNTB is detected within the predetermined detection period, it is determined that a phase failure occurs.

According to an embodiment of the present disclosure, the signal processor 203 may filter multiple CNTAs and multiple CNTBs detected within a predetermined detection period, and filter out CNTAs and CNTBs whose values are less than a first filtering threshold and whose intervals are less than a second filtering threshold. For example, when a grid jitter occurs, pulses of short duration may occur, or the intervals between pulses may be very short. Filtering out these pulses is beneficial to improving detection accuracy.

The signal processor 203 may be any device or component capable of running executable code, such as a programmable device such as a field programmable gate array (FPGA), a microprocessor (μP), or a microcontroller unit (MCU), etc. The executable code may be embedded in the signal processor 203 or may be loaded into the signal processor 203 from the outside.

In addition, the phase sequence detection device 200 may further include an analog-to-digital (A/D) converter 205 for converting the analog output of the waveform detection circuit 201 into a digital form so as to facilitate processing by the signal processor 203. Of course, the waveform detection circuit 201 itself may also be designed to be digital, or the A/D converter 205 may be included in the signal processor 203.

In addition, the phase sequence detection device 200 may further include a display device such as a liquid crystal display panel to display the detection result.

The above is explained by taking the high level of the sampling waveform as an example. When the low level of the sampling waveform is used, the circuit design and detection principle are similar and will not be described here. For example, as described above, in the case of the reverse connection of the optocoupler 401 in the waveform conversion circuit 400, the low level of the waveform (i.e., the trough of the waveform) can be converted into a corresponding pulse sequence, and accordingly, the duration of the low level can be detected and the embodiments described in the present application can be implemented.

FIG. 6 is a flow chart showing a phase sequence detection method according to an embodiment of the present disclosure.

As shown in FIG6 , the method 600 according to this embodiment may include: at 601, detecting the waveforms of the first line voltage of the first phase relative to the second phase and the second line voltage of the second phase relative to the third phase of the three-phase AC power. The waveform detection may be implemented by a hardware circuit such as the above-mentioned waveform detection circuit. For example, the waveform of the line voltage may be converted into a pulse waveform with the same period, and the phase sequence detection may be performed based on the duration of the pulse waveform.

Next, at 602, the phase sequence of the three-phase AC power or whether a phase failure occurs may be determined based on the duration of the detected waveform. This determination may be performed by software or an algorithm as described above.

For example, if the first duration of the first line voltage and the second duration of the second line voltage are both greater than the first predetermined threshold, and the difference between the first duration and the second duration is less than the second predetermined threshold, it is determined to enter the phase sequence judgment stage, otherwise it is determined that a phase failure occurs. The phase sequence judgment stage includes: if the first duration occurs before the second duration, it is determined that the phase sequence is forward, otherwise, it is determined that the phase sequence is reverse.

Step 602 may also include continuously performing detection within a predetermined detection period, identifying a plurality of first durations and a plurality of second durations, and processing the average of the plurality of first durations and the average of the plurality of second durations as the first duration and the second duration. If the first duration or the second duration is not detected within the predetermined detection period, it is determined that a phase failure occurs.

Step 602 may further include filtering the plurality of first durations and the plurality of second durations, and filtering out durations whose duration is less than a first filtering threshold and whose duration time interval is less than a second filtering threshold.

According to an embodiment of the present disclosure, a hardware circuit is used to sample the line voltages, obtain their waveforms, and use an algorithm or software to determine the phase sequence or phase loss based on the obtained waveforms. The basic principle of the judgment is that the phase difference between the three phases of the three-phase AC power is approximately fixed under normal circumstances, and the amplitude of the three-phase AC power is also approximately fixed. Therefore, the phase and amplitude of the line voltage between two adjacent phases are also substantially constant, and then, the high (or low) level duration of the two line voltages is also substantially fixed, and the time difference between the high (or low) level duration of the two line voltages is also substantially zero. If the amplitude of any phase voltage decreases, the high (or low) level duration of the corresponding line voltage is shortened. Therefore, by detecting the high (or low) level duration of the two line voltages, it can be determined whether a phase loss fault occurs. In addition, if the amplitude difference between any two phase voltages becomes larger, the difference between the high (or low) level duration of the two line voltages becomes larger. Therefore, by detecting the difference between the high (or low) level duration of the two line voltages, the balance of the three-phase AC power can be determined. Since the line voltage can be sampled at a preset time to determine the high (or low) level duration of the line voltage without always monitoring the line voltage, and the judgment is implemented by software, the software can be simplified and the resources occupied by the software can be reduced.

The embodiments of the present disclosure are described above. However, these embodiments are only for illustrative purposes and are not intended to limit the scope of the present disclosure. Although the embodiments are described above separately, this does not mean that the measures in the various embodiments cannot be used in combination to advantage. The scope of the present disclosure is defined by the attached claims and their equivalents. Without departing from the scope of the present disclosure, those skilled in the art may make a variety of substitutions and modifications, which should all fall within the scope of the present disclosure.

Claims (12)

1. A phase sequence detection apparatus for use in a frequency converter for detecting a phase sequence of three-phase ac power from a power grid, the phase sequence detection apparatus comprising:

A waveform detection circuit configured to detect a first waveform of a first line voltage of a first phase of the three-phase alternating-current power with respect to a second phase and a second waveform of a second line voltage of the second phase with respect to a third phase; and

A signal processor for determining a first duration of the first waveform and a second duration of the second waveform and recording a sequence of occurrence of the first duration and the second duration as a sequence of phase sequences;

Determining that a phase loss fault occurs when the first duration or the second duration is less than a first predetermined threshold or the difference between the first duration and the second duration is greater than a second predetermined threshold;

The phase sequence is determined to be forward when the first duration occurs before the second duration.

2. The phase sequence detection apparatus according to claim 1, wherein the waveform detection circuit includes:

A waveform conversion circuit configured to convert each of the first waveform and the second waveform into a pulse waveform having the same period and phase as the waveform,

Wherein the signal processor is configured to make the determination based on the duration of the pulse waveform.

3. The phase sequence detection apparatus according to claim 2, wherein the waveform conversion circuit is configured to convert a portion of the waveform whose amplitude exceeds a predetermined threshold value into a pulse.

4. The phase sequence detection apparatus of claim 1, wherein the signal processor is configured to identify a plurality of the first durations and a plurality of the second durations within a predetermined detection period, and to take an average of a sum of the plurality of first durations as the first duration and an average of a sum of the plurality of second durations as the second duration.

5. The phase sequence detection apparatus of claim 4, wherein the signal processor determines that a phase-loss fault has occurred if the first duration or the second duration is not detected within a predetermined detection period.

6. The phase sequence detection apparatus of claim 4, wherein the signal processor is further configured to filter the plurality of first durations and the plurality of second durations for durations less than a first filtering threshold and for durations with duration intervals less than a second filtering threshold.

7. The phase sequence detection apparatus according to claim 1, wherein the waveform conversion circuit includes:

An optocoupler whose input-side photodiode receives a line voltage to be detected or a voltage proportional to the line voltage to be detected, whose output-side transistor is connected to output a low level at an output node when the input-side photodiode is turned on and to output a high level when the input-side photodiode is turned off;

The logic conversion circuit receives the output at the output node of the optocoupler, converts the high-level output into low level, and converts the low-level output into high level; and

And a filter circuit for filtering the output of the logic conversion circuit.

8. A phase sequence detection method for a frequency converter for detecting a phase sequence of three-phase ac power from a power grid, the method comprising:

Detecting a first waveform of a first line voltage of a first phase of the three-phase alternating current power with respect to a second phase and a second waveform of a second line voltage of the second phase with respect to a third phase; and

Determining a first duration of the first waveform and a second duration of the second waveform, and recording an order in which the first duration and the second duration occur as an order of phase sequences;

Determining that a phase loss fault occurs when the first duration or the second duration is less than a first predetermined threshold or the difference between the first duration and the second duration is greater than a second predetermined threshold;

The phase sequence is determined to be forward when the first duration occurs before the second duration.

9. The method of claim 8, wherein detecting the first waveform and the second waveform comprises:

converting each of the first waveform and the second waveform into a pulse waveform having the same period and phase as the waveform,

Wherein the step of determining a first duration of the first waveform and a second duration of the second waveform is performed based on the durations of the pulse waveforms.

10. The method of claim 8, wherein determining a first duration of the first waveform and a second duration of the second waveform comprises:

a plurality of the first durations and a plurality of the second durations are identified within a predetermined detection period, and an average of a sum of the plurality of first durations is taken as the first duration and an average of a sum of the plurality of second durations is taken as the second duration.

11. The method of claim 10, further comprising:

If the first duration or the second duration is not detected within a predetermined detection period, it is determined that an open-phase fault has occurred.

12. The method of claim 10, wherein determining a first duration of the first waveform and a second duration of the second waveform further comprises:

Filtering the plurality of first durations and the plurality of second durations, filtering out durations having durations less than a first filtering threshold and durations having duration intervals less than a second filtering threshold.