Drawings
Fig. 1A to 1C are schematic flow charts illustrating a method for manufacturing a microfluidic actuator according to the present invention.
Fig. 2A to 2B are schematic diagrams illustrating different aspects of a lower valve region and an upper valve region of the present microfluidic actuator.
Fig. 3A to 3C are different front views of the actuating region and the main region of the microfluidic actuator of the present invention.
Fig. 4A to 4G are schematic views illustrating a method for manufacturing a micro-fluid actuator according to a first embodiment of the present invention.
Fig. 4H is a schematic diagram of a first embodiment of the present microfluidic actuator in different aspects.
Fig. 5A to 5F are schematic views illustrating a method for manufacturing a second embodiment of the present micro-fluid actuator.
Fig. 5G and 5H are schematic diagrams of different aspects of a second embodiment of the present disclosure.
Fig. 6A to 6G are schematic views illustrating a method for manufacturing a micro-fluid actuator according to a third embodiment of the present invention.
Fig. 6H is a schematic diagram of a third embodiment of the present microfluidic actuator in different aspects.
Description of the reference numerals
101. 102, 201, 202, 203, 301, 302: microfluidic actuator
10: lower valve area
11: lower dry film layer
111A, 111B: lower dry film runner region
12: lower valve layer
121: lower valve cover
13: lower orifice layer
131: lower valve passage
20A, 20B, 20C: main zone
21: substrate
211A, 211B: substrate silicon runner
22: silicon dioxide layer
221A, 221B: silicon dioxide runner
23A, 23B: first polysilicon layer
23C: POP structure
2311: the first polysilicon vibration region
2312A, 2312B: first polysilicon runner region
2321: first polycrystalline silicon
2322: oxidation zone
2323: second polysilicon
2324: POP runner area
24A, 24B, 24C: main structure
2411: 1P6M oxide layer structure
2412: 1P6M tungsten structure
2413: 1P6M metal structure
2414: middle section of 1P6M oxide layer
2415: middle part of 1P6M metal layer
2416: OMO structure
2417: OMO flow passage area
2421: 2P4M oxide layer structure
2422: 2P4M tungsten structure
2423: 2P4M metal structure
2424: 2P4M middle segment of oxide layer
2425: 2P4M middle metal layer
25: first protective layer
251: first protective layer flow channel
26: cavity body
30: actuation area
32: lower electrode layer
33: piezoelectric actuation layer
34: upper electrode layer
40: upper valve area
41: upper dry film layer
411: upper dry film runner region
42: upper orifice layer
421: upper valve passage
43: upper valve layer
431: upper valve cover
S11-S17, S21-S26, S31-S37: method for manufacturing a microfluidic actuator
Detailed Description
Embodiments that embody the features and advantages of this disclosure will be described in detail in the description that follows. It will be understood that the present disclosure is capable of various modifications without departing from the scope of the disclosure, and that the description and drawings are to be regarded as illustrative in nature, and not as restrictive.
A method of manufacturing a microfluidic actuator, comprising the steps of: providing a substrate 21, wherein the substrate 21 is a substrate finished with 1P6M process; depositing a first passivation layer 25 on a first surface of the substrate 21; depositing an active region 30 on the first passivation layer 25, the active region 30 further comprising: sequentially depositing a lower electrode layer 32, a piezoelectric actuation layer 33 and an upper electrode layer 34; and dry etching a portion of the first protection layer 25 by photolithography to produce at least one first protection layer runner 251. Further comprises the following steps: wet etching a portion of a main structure 24A of the substrate 21 to produce a cavity 26 and to produce a first polysilicon runner area 2312A, but not etching a 1P6M oxide layer center section 2414 region of the main structure 24A; using Reactive-Ion Etching (RIE) to partially etch a second surface of the substrate 21, yielding at least one substrate silicon flow channel 211A; and dry etching a portion of the silicon dioxide layer 22 to produce at least one silicon dioxide runner 221A. Further comprises the following steps: a lower valve region 10 is assembled under the second surface of the substrate 21, and an upper valve region 40 is assembled on the first passivation layer 25.
Referring to fig. 1A, fig. 3A and fig. 4A to fig. 4G, in a first aspect of the first embodiment, a method for manufacturing the micro-fluid actuator 101 will be described. In step S11 and fig. 4A, a substrate 21 is provided, in which the substrate 21 is a substrate that completes the process of 1P6M (P represents a Ploy layer, and M represents a Metal layer), wherein the substrate 21 is formed by sequentially stacking silicon substrates, a silicon dioxide layer 22, a first polysilicon layer 23A, and a main structure 24A. A first passivation layer 25 is deposited on a first surface (i.e., the upper surface) of the substrate 21, thereby defining a main region 20A. It is noted that the material of the first protection layer 25 may be silicon dioxide or silicon nitride, but not limited thereto, and the material of the first protection layer 25 may be adjusted according to the process requirement in other embodiments. In step S12 and as shown in fig. 4B, an active region 30 is deposited on the first passivation layer 25, the active region 30 further includes: a lower electrode layer 32, a piezoelectric actuation layer 33 and an upper electrode layer 34 are deposited in sequence. It should be noted that, in the first embodiment of the present disclosure, the number of the actuating regions 30 is one group, but not limited thereto, and in other embodiments, the number and the positions of the actuating regions 30 can be adjusted according to design requirements. In step S13 and fig. 4C, a portion of the first passivation layer 25 is dry-etched by photolithography to produce at least one first passivation layer channel 251, wherein the dry Etching may be Reactive-Ion Etching (RIE) or Inductively Coupled Plasma (ICP) Etching, but not limited thereto, and in other embodiments, the dry Etching manner may be changed according to design requirements. In step S14 and as shown in fig. 4D, a cavity 26 and a first polysilicon runner area 2312A are created by wet etching a portion of a main structure 24A of the substrate 21, but not etching a 1P6M oxide layer center section 2414 region of the main structure 24A. The main structure 24A is formed by a 1P6M process, and corresponding patterned structures are formed on at least one oxide layer 2411, at least one 1P6M tungsten structure 2412, at least one 1P6M metal structure 2413, and a 1P6M oxide layer middle section 2414 in advance. It should be noted that in the first embodiment of the disclosure, the number of the stacked 1P6M tungsten structures 2412 and 1P6M metal structures 2413 is six, but not limited thereto, and in other embodiments, the number of the stacked 1P6M tungsten structures 2412 and 1P6M metal structures 2413 may be adjusted according to design requirements. It should be noted that the etchant for wet etching may be sulfuric acid, but not limited thereto, and in other embodiments, the manner of wet etching may be changed according to design requirements. In step S15 and fig. 4E, a Reactive-Ion Etching (RIE) is used to partially etch a second surface (i.e., the bottom surface) of the substrate 21 to produce at least one substrate silicon runner 211A. In step S16 and fig. 4F, a portion of the silicon dioxide layer 22 is dry etched to produce at least one silicon dioxide runner 221A, wherein the dry etching may be a hydrofluoric acid (HF) gas etching, but not limited thereto, and in other embodiments, the dry etching manner may be changed according to design requirements. In step S17 and fig. 4G, a lower valve region 10 is assembled under the second surface of the substrate 21, and an upper valve region 40 is assembled on the first passivation layer 25.
Referring to fig. 2A, a first embodiment of a lower valve region 10 and an upper valve region 40 is shown, in which the lower valve region 10 has a lower dry film layer 11, a lower valve layer 12 and a lower valve hole layer 13, which are sequentially stacked. The lower dry film layer 11 has at least a lower dry film runner region 111A. Lower valve layer 12 has at least a lower valve cap 121. The lower orifice layer 13 has at least a lower valve passage 131. The upper valve region 40 has an upper dry film layer 41, an upper valve hole layer 42, and an upper valve layer 43, and is sequentially stacked upward from the actuation region 30. The upper dry film layer 41 has at least one upper dry film runner region 411. The upper orifice layer 42 has at least one upper valve passage 421. Upper valve layer 43 has at least one upper valve cap 431. Referring to fig. 2B, a schematic diagram of the lower valve area 10 and the upper valve area 40 of the second embodiment is shown, and the difference between the lower valve area 10 and the upper valve area 40 of the present application is only that the lower dry film runner area 111A of the first embodiment and the lower dry film runner area 111B of the second embodiment are different in position, and the positions can be matched with the substrate silicon runner. It should be noted that in any embodiment or any aspect of the present disclosure, the arrangement of the lower valve area 10 and the upper valve area 40 may be increased or decreased according to the design requirement, but not limited thereto, and in other embodiments or aspects, the arrangement of the lower valve area 10 or the upper valve area 40 may also be increased or decreased according to the design requirement.
Referring to fig. 4H, a second aspect of the first embodiment of the microfluidic actuator 102 is shown, which differs from the first aspect of the first embodiment in that: the region 2414 of the 1P6M oxide layer of the main structure 24A further includes a 1P6M metal layer center 2415. The main structure 24A is formed by a 1P6M process, wherein corresponding patterned structures are formed on at least one oxide layer 2411, at least one 1P6M tungsten structure 2412, at least one 1P6M metal structure 2413, a 1P6M middle oxide layer 2414, and a 1P6M middle metal layer 2415. It should be noted that, in the first embodiment of the present disclosure, the arrangement of the middle section 2415 of the 1P6M metal layer may be increased or decreased according to design requirements, but not limited thereto, and in other embodiments or aspects, the arrangement of the middle section 2415 of the 1P6M metal layer may also be increased or decreased according to design requirements.
A method of manufacturing a microfluidic actuator, comprising the steps of: providing a substrate 21, wherein the substrate 21 is a substrate finished with 1P6M process; depositing a first passivation layer 25 on a first surface of the substrate 21; depositing an active region 30 on the first passivation layer 25, the active region 30 further comprising: sequentially depositing a lower electrode layer 32, a piezoelectric actuation layer 33 and an upper electrode layer 34; and dry etching a portion of the first protection layer 25 by photolithography to produce at least one first protection layer runner 251. Further comprises the following steps: wet etching a portion of a main structure 24B of the substrate 21 to produce a cavity 26, but not etching a 1P6M oxide layer center 2414 region of the main structure 24B; and using Reactive-Ion Etching (RIE) to partially etch a second surface of the substrate 21 to produce at least one substrate silicon runner 211B, at least one silicon dioxide runner 221B, and at least one first polysilicon runner region 2312B. Further comprises the following steps: a lower valve region 10 is assembled under the second surface of the substrate 21, and an upper valve region 40 is assembled on the first passivation layer 25.
Referring to fig. 1B, fig. 3B and fig. 5A to fig. 5F, in a first aspect of the second embodiment, a method for manufacturing the micro-fluid actuator 201 will be described. In step S21 and fig. 5A, a substrate 21 is provided, in which the substrate 21 is a substrate that completes the process of 1P6M (P represents a Ploy layer, and M represents a Metal layer), wherein the substrate 21 is formed by sequentially stacking a silicon substrate, a silicon dioxide layer 22, a first polysilicon layer 23B, and a main structure 24B. A first passivation layer 25 is deposited on a first surface (i.e., the upper surface) of the substrate 21, thereby defining a main region 20B. The first polysilicon layer 23B is formed by combining at least one first polysilicon 2321 and at least one oxidation region 2322. It is noted that the material of the first protection layer 25 may be silicon dioxide or silicon nitride, but not limited thereto, and the material of the first protection layer 25 may be adjusted according to the process requirement in other embodiments. In step S22 and as shown in fig. 5B, an active region 30 is deposited on the first passivation layer 25, the active region 30 further includes: a lower electrode layer 32, a piezoelectric actuation layer 33 and an upper electrode layer 34 are deposited in sequence. It should be noted that, in the first embodiment of the present invention, the number of the actuating regions 30 is a group, but not limited thereto, and in other embodiments, the number and the positions of the actuating regions 30 can be adjusted according to design requirements. In step S23 and fig. 5C, a portion of the first passivation layer 25 is dry-etched by photolithography to produce at least one first passivation layer channel 251, wherein the dry Etching may be Reactive-Ion Etching (RIE) or Inductively Coupled Plasma (ICP) Etching, but not limited thereto, and in other embodiments, the dry Etching manner may be changed according to design requirements. In step S24 and as shown in fig. 5D, a main structure 24B of the substrate 21 is wet etched to produce a cavity 26, but a 1P6M oxide layer center 2414 region of the main structure 24B is not etched. The main structure 24B is formed by a 1P6M process, and corresponding patterned structures are formed on at least one Oxide layer structure 2411, at least one 1P6M tungsten structure 2412, at least one 1P6M Metal structure 2413, a 1P6M Oxide layer middle section 2414, at least one pair of OMO (Oxide-Metal-Oxide) structures 2416, and an OMO channel region 2417 in advance. It should be noted that in the second embodiment of the present disclosure, the number of the stacked 1P6M tungsten structures 2412 and 1P6M metal structures 2413 is six, but not limited thereto, and in other embodiments, the number of the stacked 1P6M tungsten structures 2412 and 1P6M metal structures 2413 may be adjusted according to design requirements. It should be noted that the etchant for wet etching may be sulfuric acid, but not limited thereto, and in other embodiments, the manner of wet etching may be changed according to design requirements. In step S25 and fig. 5E, a Reactive-Ion Etching (RIE) is used to partially etch a second surface (i.e., the bottom surface) of the substrate 21 to produce at least one substrate silicon runner 211B, at least one silicon dioxide runner 221B and at least one first polysilicon runner area 2312B. In step S26 and fig. 5F, a lower valve region 10 is assembled under the second surface of the substrate 21, and an upper valve region 40 is assembled on the first passivation layer 25.
Referring to fig. 5G, a second aspect of the microfluidic actuator 202 is shown, which differs from the first aspect of the second embodiment in that: the region of the 1P6M mid-oxide layer 2414 of the main structure 24B further includes a 1P6M metal layer mid-section 2415. The main structure 24B is formed by a 1P6M process, wherein corresponding patterned structures are formed in advance on at least one Oxide layer structure 2411, at least one 1P6M tungsten structure 2412, at least one 1P6M Metal structure 2413, a 1P6M Oxide layer middle section 2414, a 1P6M Metal layer middle section 2415, at least one pair of OMO (Oxide-Metal-Oxide) structures 2416, an OMO channel region 2417, and the like. It should be noted that, in the second embodiment of the present disclosure, the arrangement of the middle section 2415 of the 1P6M metal layer may be increased or decreased according to design requirements, but not limited thereto, and in other embodiments or aspects, the arrangement of the middle section 2415 of the 1P6M metal layer may also be increased or decreased according to design requirements.
Referring to fig. 5H, a third embodiment of the microfluidic actuator 203 is shown, which differs from the first embodiment in that: in the step of wet etching a portion of the main structure 24B of the substrate 21, the oxidation region 2322 of the main structure 24B is not etched, in other words, the first polysilicon 2321 between the substrate silicon runners 211B is covered by the oxidation region 2322. The main structure 24B is formed by a 1P6M process, in advance, with corresponding patterned structures on at least one Oxide layer 2411, at least one 1P6M tungsten structure 2412, at least one 1P6M Metal structure 2413, a 1P6M Oxide layer middle section 2414, a 1P6M Metal layer middle section 2415, at least one pair of OMO (Oxide-Metal-Oxide) structures 2416, an OMO channel region 2417, and the like.
A method of manufacturing a microfluidic actuator, comprising the steps of: providing a substrate 21, wherein the substrate 21 is a substrate for completing the 2P4M process; depositing a first passivation layer 25 on a first surface of the substrate 21; depositing an active region 30 on the first passivation layer 25, the active region 30 further comprising: sequentially depositing a lower electrode layer 32, a piezoelectric actuation layer 33 and an upper electrode layer 34; and dry etching a portion of the first protection layer 25 by photolithography to produce at least one first protection layer runner 251. Further comprises the following steps: wet etching a portion of a main structure 24C of the substrate 21 to produce a cavity 26, but not etching a 2P4M oxide middle section 2424 region of the main structure 24C; using Reactive-Ion Etching (RIE) to partially etch a second surface of the substrate 21, yielding at least one substrate silicon flow channel 211A; and dry etching a portion of the silicon dioxide layer 22 to produce at least one silicon dioxide runner 221A. Further comprises the following steps: a lower valve region 10 is assembled under the second surface of the substrate 21, and an upper valve region 40 is assembled on the first passivation layer 25.
Referring to fig. 1C, fig. 3C and fig. 6A to fig. 6G, in a first aspect of the third embodiment, a method for manufacturing the micro-fluid actuator 301 will be described. In step S31 and fig. 6A, a substrate 21 is provided, in which the substrate 21 is a substrate that completes the 2P4M (P represents a Ploy layer and M represents a Metal layer) process, wherein the substrate 21 is formed by sequentially stacking silicon substrates, a silicon dioxide layer 22, a POP (Poly-Oxide-Poly) structure 23C and a main structure 24C. A first passivation layer 25 is deposited on a first surface (i.e., the upper surface) of the substrate 21, thereby defining a main region 20C. The POP structure 23C is formed by combining at least one first polysilicon 2321, at least one oxidation region 2322, at least one second polysilicon 2323, and a POP channel region 2324. It is noted that the material of the first protection layer 25 may be silicon dioxide or silicon nitride, but not limited thereto, and the material of the first protection layer 25 may be adjusted according to the process requirement in other embodiments. In step S32 and as shown in fig. 6B, an active region 30 is deposited on the first passivation layer 25, the active region 30 further includes: a lower electrode layer 32, a piezoelectric actuation layer 33 and an upper electrode layer 34 are deposited in sequence. It should be noted that, in the third embodiment of the present invention, the number of the actuating regions 30 is a group, but not limited thereto, and in other embodiments, the number and the positions of the actuating regions 30 can be adjusted according to design requirements. In step S33 and fig. 6C, a portion of the first passivation layer 25 is dry-etched by photolithography to produce at least one first passivation layer channel 251, wherein the dry Etching may be Reactive-Ion Etching (RIE) or Inductively Coupled Plasma (ICP) Etching, but not limited thereto, and in other embodiments, the dry Etching manner may be changed according to design requirements. In step S34 and fig. 6D, a main structure 24C of the substrate 21 is wet etched to produce a cavity 26 and a POP runner region 2324, but a 2P4M middle part 2424 region of the oxide layer of the main structure 24C is not etched. The main structure 24C is formed by a 2P4M process on at least one 2P4M oxide layer structure 2421, at least one 2P4M tungsten structure 2422, at least one 2P4M metal structure 2423, a 2P4M oxide middle section 2424, and the like in advance to form corresponding patterned structures. It should be noted that, in the third embodiment of the present disclosure, the number of the stacked 2P4M tungsten structures 2422 and 2P4M metal structures 2423 is four, but not limited thereto, and in other embodiments, the number of the stacked 2P4M tungsten structures 2422 and 2P4M metal structures 2423 may be adjusted according to design requirements. It should be noted that the etchant for wet etching may be sulfuric acid, but not limited thereto, and in other embodiments, the manner of wet etching may be changed according to design requirements. In step S35 and fig. 6E, a Reactive-Ion Etching (RIE) is used to partially etch a second surface (i.e., the bottom surface) of the substrate 21 to produce at least one substrate silicon runner 211A. In step S36 and fig. 6F, a portion of the silicon dioxide layer 22 is dry etched to produce at least one silicon dioxide runner 221A, wherein the dry etching may be hydrofluoric acid (HF) gas etching, but not limited thereto, and in other embodiments, the dry etching manner may be changed according to design requirements. In step S37 and fig. 6G, a lower valve region 10 is assembled under the second surface of the substrate 21, and an upper valve region 40 is assembled on the first passivation layer 25.
Referring to fig. 6H, a second aspect of the microfluidic actuator 302 is shown, which differs from the first aspect of the third embodiment in that: the 2P4M mid-section of oxide 2424 region of the main structure 24C further includes a 2P4M metal mid-section 2425. The main structure 24C is pre-patterned by a 2P4M process on at least one 2P4M oxide layer 2421, at least one 2P4M tungsten structure 2422, at least one 2P4M metal structure 2423, a 2P4M oxide middle section 2424, a 2P4M metal middle section 2425, and the like. It should be noted that, in the third embodiment of the disclosure, the arrangement of the middle part 2425 of the metal layer 2P4M can be increased or decreased according to design requirements, but not limited thereto, and in other embodiments or aspects, the arrangement of the middle part 2425 of the metal layer 2P4M can also be increased or decreased according to design requirements.
The present invention provides a method for manufacturing a micro-fluid actuator, which is mainly completed by matching a 1P6M or 2P4M process with a micro-electro-mechanical semiconductor process, and by applying driving power with different phase charges to an upper electrode layer and a lower electrode layer, an actuating region drives a first polysilicon vibration region of a first polysilicon layer to generate vertical displacement, thereby achieving fluid transmission.
Various modifications may be made by those skilled in the art without departing from the scope of the invention as defined by the appended claims.