CN113470709B - Temperature sensing circuit and sensing method thereof - Google Patents

Abstract

In one aspect of the present invention, a temperature sensing circuit and a sensing method are provided, the sensing circuit is suitable for a memory device. The temperature sensing circuit comprises an oscillator, a counting circuit, a control circuit, a sensing circuit and a selection circuit. The oscillator provides an oscillating signal. The counting circuit counts the oscillating signals to generate a first counting signal and generates a second counting signal. The control circuit performs logic operation on the second count signal to generate an enable signal and a sensing adjustment signal. The sensing circuit divides the reference voltage according to the sensing adjustment signal to generate a reference temperature voltage, and compares the reference temperature voltage with the monitoring voltage according to the enabling signal to generate a determination signal. The selection circuit dynamically selects one of the oscillation signal and the first count signal according to the determination signal, and generates a pulse of the refresh request signal according to the dynamically selected one of the oscillation signal and the first count signal.

Description

Temperature sensing circuit and sensing method thereof

Technical Field

The present invention relates to a storage device, and in particular to a temperature sensing circuit for providing a refresh request signal and a sensing method thereof.

Background technique

Dynamic random access memory (DRAM) includes multiple memory cells, which are used to store bits of data. Each bit is determined by the potential accumulated on the capacitor of the memory cell. The charge accumulated on the capacitor will gradually discharge, which will cause difficulties in judging the potential after a period of time. The time from the discharge of the charge on the capacitor to the inability to accurately judge the logical potential of the data ("0" or "1") is called the refresh time. A refresh request signal must be provided at a time shorter than the refresh time to refresh the memory cell and hold the data. The refresh interval refers to the time interval between two refresh request signals.

In DRAM, memory cells have different retention times relative to different temperatures, so different refresh intervals are applicable. For example, when a DRAM memory cell is reduced from 55°C to 20°C, its retention time increases by about 4 times, which is applicable to a 4-fold refresh interval. Therefore, the prior art uses multiple temperature thresholds to divide the operating temperature into multiple sections, each section having a different refresh interval. For example, the operating temperature is divided into three temperature sections using two temperature thresholds of 55°C and 20°C: greater than 55°C, less than 55°C and greater than 20°C, and less than 20°C, and the time interval of the temperature section less than 55°C and greater than 20°C is adjusted to 4 times that of the temperature section greater than 55°C, and the time interval of the temperature section less than 20°C is adjusted to 16 times that of the temperature section greater than 55°C, so as to provide refresh request signals with different refresh intervals according to different temperatures.

However, the current consumption of the prior art increases at a temperature slightly higher than the temperature threshold. For example, at a temperature slightly higher than 55°C but the refresh interval has not changed, and at a temperature slightly higher than 20°C but the refresh interval has not changed, since the refresh interval has not changed, the refresh frequency of the refresh request signal is 4 times higher than that at 55°C and 20°C, respectively, which will result in a larger refresh current consumption. Another approach is to use more temperature thresholds to divide the operating temperature into more temperature segments, but more counters, temperature sensing circuits, and selectors need to be added to the circuit. In addition to increasing costs, more counters will also reduce counter bits, resulting in lower refresh interval resolution.

Summary of the invention

Therefore, the present invention provides a temperature sensing circuit that can provide an average refresh interval corresponding to the temperature with high resolution without increasing the clock frequency and consuming current.

In one aspect of the present invention, a temperature sensing circuit is provided, which is suitable for a storage device. The temperature sensing circuit includes an oscillator, a counting circuit, a control circuit, a sensing circuit and a selection circuit. The oscillator is used to provide an oscillation signal. The counting circuit is coupled to the oscillator, and is used to count the oscillation signal to generate a first counting signal, and is used to generate a second counting signal. The control circuit is coupled to the counting circuit, and is used to perform a logic operation on the second counting signal to generate an enable signal and a sensing adjustment signal. The sensing circuit is coupled to the control circuit, and divides the reference voltage according to the sensing adjustment signal to generate a reference temperature voltage, and compares the reference temperature voltage with the monitoring voltage according to the enable signal to generate a decision signal. The selection circuit is coupled to the oscillator, the counting circuit and the sensing circuit, and the selection circuit dynamically selects one of the oscillation signal and the first counting signal according to the decision signal, and generates a pulse of a refresh request signal according to one of the dynamically selected oscillation signal and the first counting signal.

In another aspect of the present invention, a sensing method is provided, which is applicable to a storage device. The storage device has a temperature sensing circuit, and the temperature sensing circuit has an oscillator, a counting circuit, a control circuit, a sensing circuit and a selection circuit. The sensing method includes: providing an oscillation signal; counting the oscillation signal to generate a first counting signal, and generating a second counting signal. Performing a logical operation on the second counting signal to generate an enable signal and a sensing adjustment signal. Dividing a reference voltage according to the sensing adjustment signal to generate a reference temperature voltage, and comparing the reference temperature voltage with a monitoring voltage according to the enable signal to generate a decision signal. Dynamically selecting one of the oscillation signal and the first counting signal according to the decision signal, and generating a pulse of a refresh request signal according to one of the dynamically selected oscillation signal and the first counting signal.

Based on the above, the temperature sensing circuit of the present invention can dynamically adjust the ratio of pulses with different refresh interval times in the refresh request signal according to the temperature of the storage unit to provide a high average refresh interval and provide a high resolution of the average refresh interval relative to the temperature without increasing the clock frequency and consuming current.

To make the aforementioned features and advantages of the present invention easier to understand, the following detailed description of exemplary embodiments with accompanying drawings is described in detail. It should be understood that both the foregoing general description and the following detailed description are exemplary and are intended to provide further explanation of the invention as claimed.

However, it should be understood that the present invention may not contain all aspects and embodiments of the present invention, and therefore is not meant to be limited or restricted in any way. In addition, the present invention will include improvements and modifications that are obvious to those skilled in the art.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings are included to provide a further understanding of the present invention and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the present invention and together with the description serve to explain the principles of the present invention.

FIG1 is a block diagram of a temperature sensing circuit according to an embodiment of the present invention;

FIG2 is a circuit diagram of a temperature sensing circuit according to an embodiment of the present invention;

FIG3 is a control timing diagram of a temperature sensing circuit according to an embodiment of the present invention;

FIG. 4 is a conversion table of a counting signal CNT_N and a sensing adjustment signal ST in a control circuit according to an embodiment of the present invention;

5 is a timing diagram of generating a refresh request signal according to an embodiment of the present invention;

FIG6A is a statistical table showing an estimated average interval of refresh requests according to an embodiment of the present invention;

FIG6B is an X-Y graph showing an estimated average interval between refresh requests versus temperature according to an embodiment of the present invention;

FIG7 is a block diagram of a temperature sensing circuit according to another embodiment of the present invention;

FIG8 is a circuit diagram of a temperature sensing circuit according to another embodiment of the present invention;

FIG9 is a timing diagram of a temperature sensing circuit according to another embodiment of the present invention;

FIG. 10A is a statistical table showing an estimated average interval of refresh requests according to another embodiment of the present invention;

FIG. 10B is an X-Y graph showing an estimated average interval between refresh requests and temperature according to another embodiment of the present invention;

FIG. 11A is a statistical table of estimated average intervals of refresh requests according to another embodiment of the present invention; FIG. 11B is an X-Y graph of estimated average intervals of refresh requests versus temperature according to another embodiment of the present invention;

FIG. 12 is a flow chart of an operating method of a temperature sensing circuit according to an embodiment of the present invention.

Description of Figure Numbers

10, 20: Temperature sensing circuit

110: Oscillator

120: Counting circuit

130: Control circuit

140: Sensing circuit

150: Select Circuit

210～230: Counter

240: Voltage divider circuit

250: Switch string

251-252: Selector

260: Monitoring voltage generation circuit

270: Comparator

280: Latch

CNT_1, CNT_N, CNT_4: counting signals

COUNT: refresh pulse count

D1: diode

DET: Decision signal

EN：Enable signal

GND: Ground voltage

IC: Current Source

OSC: Oscillating signal

R1～R8: voltage divider resistor

REFREQ: refresh request signal

S1210～S1250: Steps

ST: Sense adjustment signal

SUM: refresh pulse sum

SW1～SW7：Switch

T0～T3: Time

VC: Comparison voltage

VMON: monitor voltage

VREF: reference voltage

VRT: reference temperature voltage VT20～VT80: default temperature voltage

Detailed ways

1 , a temperature sensing circuit 10 is suitable for a memory device (not shown). The temperature sensing circuit 10 includes an oscillator 110, a counting circuit 120, a control circuit 130, a sensing circuit 140, and a selection circuit 150. In this embodiment, the temperature sensing circuit 10 is used to provide a refresh request signal REFREQ to a refresh circuit (not shown) in the memory device to drive the refresh circuit to refresh the memory cells (not shown) in the memory device. In the present invention, the temperature sensing circuit 10 counts the oscillation signal OSC to generate a reference temperature voltage VRT corresponding to each temperature of the memory cell, and dynamically adjusts the average refresh interval of the refresh request signal REFREQ by comparing the monitoring voltage VMON corresponding to the current temperature of the memory cell and the reference temperature voltage VRT corresponding to each temperature, so that the refresh request signal REFREQ has a relatively high average refresh interval and provides a refresh interval with high resolution for temperature without increasing the frequency of the oscillation signal OSC.

Please refer to FIG. 1 and FIG. 2 simultaneously. The oscillator 110 is used to provide an oscillation signal OSC to the counting circuit 120 and the selecting circuit 150. In one embodiment, the oscillator 110 may be a conventional voltage-controlled oscillator (VCO), and the oscillation signal OSC may be a pulse signal with a fixed frequency, but the present invention is not limited thereto.

The counting circuit 120 is coupled to the oscillator 110. The counting circuit 120 receives the oscillation signal OSC and counts the oscillation signal OSC to generate counting signals CNT_1 and CNT_N. In one embodiment, the counting circuit 120 can count the number of pulses of the oscillation signal OSC, and the counting circuit 120 can be an existing synchronous counter or other counter, but the present invention is not limited thereto. Specifically, in one embodiment, the counting circuit 120 includes counters 210-230.

The counter 210 is coupled to the oscillator 110 to receive and count the number of pulses of the oscillation signal OSC to generate a counting signal CNT_4. In one embodiment, the counter 210 generates a pulse of the counting signal CNT_4 every time it counts four rising edges of the oscillation signal OSC, so the period of the counting signal CNT_4 is four times that of the oscillation signal OSC. And every time the counter 210 counts four pulses of the oscillation signal OSC, the count of the counter 210 is reset to 0.

The counter 220 is coupled between the counter 210 and the selection circuit 150, and is used to receive and count the number of pulses of the counting signal CNT_4 to generate the counting signal CNT_1. In one embodiment, the counter 220 generates a pulse of the counting signal CNT_1 every time it counts four rising edges of the counting signal CNT_4, so the period of the counting signal CNT_1 is four times that of the counting signal CNT_4, and the period of the counting signal CNT_1 is 16 times that of the oscillation signal OSC. And every time the counter 220 counts four counting signals CNT_4, the count of the counter 210 is reset to 0.

The counter 230 is used to receive and count the number of pulses of the oscillation signal OSC to generate the counting signal CNT_N. In one embodiment, the counter 230 generates a pulse of the counting signal CNT_N every time it counts N rising edges of the oscillation signal OSC, so the period of the counting signal CNT_N is N times that of the oscillation signal OSC. And every time the counter 230 counts N oscillation signals OSC, the count of the counter 230 is reset to 0. In one embodiment, N can be a multiple of 16, such as 16 or 64.

It should be noted that counters 210 and 220 are used to assist selection circuit 150 in adjusting the refresh interval of refresh request signal REFREQ, and counter 230 is used to generate the selected reference temperature voltage VRT through control circuit 130, which will be described in detail later. In addition, the present invention does not limit the way in which counters 210-230 count signals.

The control circuit 130 is coupled to the counting circuit 120. In one embodiment, the control circuit 130 may be a central processing unit, a microprocessor, a special application integrated circuit, a field programmable logic gate array or a similar component or a combination of the above components. The control circuit 130 is programmed to perform the functions or steps described below: The control circuit 130 receives the counting signal CNT_N, and performs a logic operation on the counting signal CNT_N to generate an enable signal EN and a sensing adjustment signal ST.

In one embodiment, when the control circuit 130 detects that the number of pulses of the oscillation signal OSC is equal to a default number according to the counting signal CNT_N, the control circuit 130 enables the enable signal EN and provides the enable signal EN to the sensing circuit 140. Specifically, in one embodiment, whenever the control circuit 130 receives a pulse of the counting signal CNT_N, that is, when the counter 230 counts 16 pulses of the oscillation signal OSC, the control circuit 130 enables the enable signal EN provided to the sensing circuit 140 to a high logic level to enable the sensing circuit 140.

Please refer to FIG. 2 and FIG. 4. In one embodiment, the control circuit 130 performs a logic conversion on the counting signal CNT_N according to a default conversion table as shown in FIG. 4 to generate a sensing adjustment signal ST, wherein the logic value of the sensing adjustment signal ST corresponds to a plurality of default temperatures of the memory. Specifically, please refer to FIG. 4. In one embodiment, the counting signal CNT_N has 4 bits, namely bit0A to bit3A, and the sensing adjustment signal ST has 3 bits, namely bit0B to bit2B. For example, when the counting signal CNT_N is 6, namely 0110, the control circuit 130 performs a logic conversion on the counting signal CNT_N according to FIG. 4, and takes the values of bit0A to bit2A of the counting signal CNT_N to generate the sensing adjustment signal ST, so at this time the sensing adjustment signal ST is 6 (i.e. 110). When the counting signal CNT_N is 7, i.e., 0111, the control circuit 130 performs a logic conversion on the counting signal CNT_N according to FIG. 4 , and takes the value of bit0A to bit2A of the counting signal CNT_N, i.e., 111, to generate the sensing adjustment signal ST. However, the logic conversion converts 111 to 000 by default, so the sensing adjustment signal ST is 0 (i.e., 000) at this time.

Please refer to the conversion table of FIG4 and the timing of the counting signal CNT_N and the sensing adjustment signal ST in FIG5 , each logic value of the counting signal CNT_N corresponds to the logic value of the sensing adjustment signal ST. In one embodiment, when the counting signal CNT_N is 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, the control circuit 130 performs a logic operation and generates a corresponding sensing adjustment signal ST of 0, 1, 2, 3, 4, 5, 6, 0, 0, 1, 2, 3, 0, 1, 0, 0. However, the present invention is not limited thereto.

2 , the sensing circuit 140 is coupled to the control circuit 130 and receives an enable signal EN, a sensing adjustment signal ST, and a reference voltage VREF. The sensing circuit 140 divides the reference voltage VREF according to the sensing adjustment signal ST to generate a reference temperature voltage VRT. The sensing circuit 140 compares the reference temperature voltage VRT with the monitoring voltage VMON according to the enable signal EN to generate a decision signal DET. In one embodiment, the sensing circuit 140 includes a voltage divider circuit 240, a switch string 250, a monitoring voltage generating circuit 260, a comparator 270, and a latch 280.

Specifically, the sensing circuit 140 can divide the reference voltage VREF through the voltage divider circuit 240, and turn on a switch in the switch string 250 according to the sensing adjustment signal ST to generate the reference temperature voltage VRT. The sensing circuit 140 can generate the monitoring voltage VMON through the monitoring voltage generating circuit 260, and enable the comparator 250 through the enable signal EN to compare the reference temperature voltage VRT with the monitoring voltage VMON, and generate the compared voltage VC according to the comparison result and provide it to the latch 280. The sensing circuit 140 latches the compared voltage VC through the latch 280 to generate the decision signal DET and provide it to the selection circuit 150.

The voltage divider circuit 240 has a plurality of voltage divider resistors R1-R8 connected in series, the voltage divider resistors R1-R8 are coupled between a reference voltage VREF and a ground voltage GND, and generate a plurality of default temperature voltages VT20-VT80 by dividing the voltage difference between the reference voltage VREF and the ground voltage GND. The voltage divided between the voltage divider resistors R1 and R2 is the default temperature voltage VT20, the voltage divided between the voltage divider resistors R2 and R3 is the default temperature voltage VT30, the voltage divided between the voltage divider resistors R3 and R4 is the default temperature voltage VT40, the voltage divided between the voltage divider resistors R4 and R5 is the default temperature voltage VT50, the voltage divided between the voltage divider resistors R5 and R6 is the default temperature voltage V60, the voltage divided between the voltage divider resistors R6 and R7 is the default temperature voltage VT70, and the voltage divided between the voltage divider resistors R7 and R8 is the default temperature voltage VT80.

The switch string 250 is coupled to the control circuit 130 and the voltage divider circuit 240, and has a plurality of switches SW1-SW7. The first end of each of the plurality of switches SW1-SW7 receives one of the plurality of default temperature voltages VT20-VT80. In one embodiment, the first end of the switch SW1 receives the default temperature voltage VT20, the first end of the switch SW2 receives the default temperature voltage VT30, the first end of the switch SW3 receives the default temperature voltage VT40, the first end of the switch SW4 receives the default temperature voltage VT50, the first end of the switch SW5 receives the default temperature voltage VT60, the first end of the switch SW6 receives the default temperature voltage VT70, and the first end of the switch SW7 receives the default temperature voltage VT80. The second ends of all the switches SW1-SW7 are coupled together. The switch string 250 turns on one of the plurality of switches SW1-SW7 according to the sensing adjustment signal ST, and provides one of the plurality of default temperature voltages VT20-VT80 corresponding to the one of the plurality of switches SW1-SW7 turned on to the second ends of the plurality of switches SW1-SW7, so as to generate the reference temperature voltage VRT. In one embodiment, when the switch SW1 is turned on, the reference temperature voltage VRT is equal to the default temperature voltage VT20, and so on. In one embodiment, the corresponding relationship between the logic value of the sensing adjustment signal ST and the reference temperature voltage VRT is VRT[10*(8-i)]=ST[i], i=0-6. For example, when i is 0, VRT[80])=ST[0]. In one embodiment, the detailed corresponding relationship between the logic value of the sensing adjustment signal ST and the reference temperature voltage VRT is shown in Table 1 below.

<Table 1>

ST 0 1 2 3 4 5 6 VRT VT 80 VT 70 VT 60 VT 50 VT 40 VT 30 VT 20

The monitoring voltage generating circuit 260 is used to provide the monitoring voltage VMON. In one embodiment, the monitoring voltage generating circuit 260 includes a constant current source IC and a diode D1. The constant current source IC is used to provide a constant current, and the diode D1 is coupled between the constant current source IC and the ground voltage GND to generate the monitoring voltage VMON according to the constant current. The present invention does not limit the type of the constant current source IC.

The comparator 270 is coupled to the switch string 250 and the monitoring voltage generating circuit 260, and is used to compare the reference temperature voltage VRT with the monitoring voltage VMON according to the enable signal EN, so as to generate a compared voltage VC. In one embodiment, the comparator 270 has a positive input terminal, a negative input terminal, an enable terminal and an output terminal. The positive input terminal of the comparator 270 is coupled to the monitoring voltage generating circuit 260 to receive the monitoring voltage VMON, and the negative input terminal of the comparator 270 is coupled to the switch string 250 to receive the reference temperature voltage VRT. The enable terminal of the comparator 270 is coupled to the control circuit 130, and is used to receive the enable signal EN to determine whether to perform a comparison operation. When the enable signal EN is disabled (for example, a low logic level), the comparator 270 does not compare the reference temperature voltage VRT with the monitoring voltage VMON. When the enable signal EN is enabled (for example, a high logic level), the comparator 270 compares the reference temperature voltage VRT with the monitoring voltage VMON, and outputs the comparison result as the compared voltage VC. When the monitoring voltage VMON is less than the reference temperature voltage VRT, the comparator 270 outputs a disabled compared voltage VC (eg, a low logic level). When the monitoring voltage VMON is greater than the reference temperature voltage VRT, the comparator 270 outputs an enabled compared voltage VC (eg, a high logic level).

The latch 280 is coupled to the comparator 270 to latch the compared voltage VC to generate a decision signal DET and provide it to the selection circuit 150. In one embodiment, when the enable signal EN is disabled, the latch 280 holds the comparison voltage VC and outputs the decision signal DET to the selection circuit 150. When the enable signal EN is enabled, the latch 280 latches the comparison voltage VC and outputs the refreshed decision signal DET to the selection circuit 150.

1 and 2, the selection circuit 150 is coupled to the oscillator 110, the counting circuit 120 and the sensing circuit 140. The selection circuit 150 dynamically selects one of the oscillation signal OSC and the counting signal CNT_1 according to the determination signal DET, and generates a pulse of the refresh request signal REFREQ according to the dynamically selected oscillation signal OSC and the counting signal CNT_1. In one embodiment, the selection circuit 150 includes selectors 251 and 252, wherein the selector 251 is coupled between the oscillator 110 and the sensing circuit 140, and the selector 252 is coupled between the counting circuit 120 and the sensing circuit 140. The selectors 251 and 252 are alternately activated according to the logic level of the determination signal DET to jointly generate the refresh request signal REFREQ, and the specific timing is described later.

In one embodiment, when the decision signal DET is enabled, the selector 251 outputs a pulse of the oscillation signal OSC and the selector 252 outputs no signal. When the decision signal DET is disabled, the selector 252 outputs a pulse of the counting signal CNT_1 and the selector 251 outputs no signal to jointly generate the refresh request signal REFREQ.

FIG. 3 is a control timing diagram of a temperature sensing circuit according to an embodiment of the present invention. Referring to FIG. 2 and FIG. 3, in one embodiment, the period of the count signal CNT_4 is 4 times that of the oscillation signal OSC, the period of the count signal CNT_1 is 4 times that of the count signal CNT_4, and the period of the count signal CNT_N is 4 times that of the count signal CNT_1. Therefore, in one embodiment, the period of the count signal CNT_N is 64 times that of the oscillation signal OSC. The control circuit 130 performs a logic conversion on the count signal CNT_N according to the conversion table of FIG. 4 to generate a sensing adjustment signal ST. The switch string 250 in the sensing circuit 140 turns on one of the multiple switches SW1 to SW7 according to the sensing adjustment signal ST to receive one of the corresponding multiple default temperature voltages VT20 to VT80 and thereby generate a reference temperature voltage VRT. Taking FIG. 3 as an example, from left to right in the timing sequence, the value of the reference temperature voltage VRT is equal to the default temperature voltages VT60, VT50, VT80 and VT70 in sequence. The monitoring voltage generating circuit 260 in the sensing circuit 140 generates the monitoring voltage VMON. In this embodiment, the monitoring voltage VMON corresponds to a default temperature voltage VT55 (not shown) between the default temperature voltages VT60 and VT50.

Between time T0 and time T1 , the enable signal EN is disabled, and the comparator 270 does not compare the reference temperature voltage VRT with the monitoring voltage VMON. At this time, the determination signal DET is disabled (eg, at a low logic level).

At time T1, the enable signal EN is enabled, and the comparator 270 compares the reference temperature voltage VRT with the monitoring voltage VMON. Since the reference temperature voltage VRT (equal to VT50 at this time) is greater than the monitoring voltage VMON, the comparator 270 generates an enabled compared voltage VC (not shown), and since the enable signal EN is enabled, the latch 280 generates an enabled decision signal DET (e.g., a high logic level).

Next, between time T1 and time T2, since the enable signal EN is disabled, the comparator 270 does not compare the reference temperature voltage VRT with the monitoring voltage VMON. At this time, the latch 280 latches the previously enabled compared voltage VC to keep the enabled logic level of the decision signal DET.

At time T2, the enable signal EN is enabled, and the comparator 270 compares the reference temperature voltage VRT with the monitoring voltage VMON. Since the reference temperature voltage VRT (equal to VT80 at this time) is less than the monitoring voltage VMON, the comparator 270 generates a disabled compared voltage VC (not shown), and since the enable signal EN is enabled, the latch 280 generates a disabled decision signal DET.

Next, between time T2 and time T3, since the enable signal EN is disabled, the comparator 270 does not compare the reference temperature voltage VRT with the monitoring voltage VMON. At this time, the latch 280 latches the previously disabled compared voltage VC, so that the latch 280 maintains the logic level of the disabled decision signal DET.

2 and 3 , the selection circuit 150 dynamically selects one of the oscillation signal OSC and the count signal CNT_1 according to the decision signal DET, and generates the refresh request signal REFREQ according to the dynamically selected one of the oscillation signal OSC and the count signal CNT_1. For example, between time T0 and time T1, the decision signal DET is disabled, so the selector 252 in the selection circuit 150 outputs a pulse of the count signal CNT_1 and the selector 251 does not output a signal. Between time T1 and time T2, the decision signal DET is enabled, so the selector 251 in the selection circuit 150 outputs a pulse of the oscillation signal OSC and the selector 252 does not output a signal. Between time T2 and time T3, the decision signal DET is disabled, so the selector 252 in the selection circuit 150 outputs a pulse of the count signal CNT_1 and the selector 251 does not output a signal.

FIG. 5 is a timing diagram of the generation of a refresh request signal according to an embodiment of the present invention. FIG. 6A is a statistical table of the average interval of refresh requests estimated according to an embodiment of the present invention. Referring to FIG. 2 , FIG. 4 , FIG. 5 and FIG. 6A , in one embodiment, the control circuit 130 performs a logic conversion on the count signal CNT_N according to the conversion table of FIG. 4 to generate a sensing adjustment signal ST, which corresponds to the count signal CNT_N and the sensing adjustment signal ST in FIG. 5 . The switch string 250 in the sensing circuit 140 turns on one of the multiple switches SW1 to SW7 according to the sensing adjustment signal ST to receive one of the multiple default temperature voltages VT20 to VT80 and thereby generates a reference temperature voltage VRT, which corresponds to the sensing adjustment signal ST and the reference temperature voltage VRT in FIG. 5 . When the monitoring voltage VMON is between the default temperature voltage VT50 and VT60 (e.g., VT55), and when the reference temperature voltage VRT is the default temperature voltage VT20-VT50, the sensing circuit 140 enables the decision signal DET (i.e., high logic level H); when the reference temperature voltage VRT is the default temperature voltage VT60-VT80, the sensing circuit 140 disables the decision signal DET (i.e., low logic level L). When the decision signal DET is disabled, the selector 252 in the selection circuit 150 outputs a pulse of the counting signal CNT_1 and the selector 251 does not output a signal; when the decision signal DET is enabled, the selector 251 in the selection circuit 150 outputs a pulse of the oscillation signal OSC and the selector 252 does not output a signal. Therefore, the selectors 251 and 252 are alternately activated according to the logic level of the decision signal DET to jointly generate the refresh request signal REFREQ, which corresponds to the decision signal DET and the refresh request signal REFREQ in FIG. 5 . In one embodiment, the refresh pulse count COUNT of the refresh request signal REFREQ in each time period is shown in FIG. 5 , and the refresh pulse sum SUM of the refresh request signal REFREQ in the entire cycle (i.e., the count signal CNT_N from logic value 0 to 15) is 91, please refer to the refresh pulse sum 91 corresponding to the temperature of 55° C. in FIG. 6A . In another scenario, when the monitoring voltage VMON is between the default temperature voltage VT60 and VT70 (e.g., VT65), the decision signal corresponding to the reference temperature voltage VRT being the default temperature voltage VT60 changes to a high logic level H. Therefore, the refresh pulse sum SUM becomes 121 accordingly, please refer to the refresh pulse sum 121 corresponding to the temperature of 65° C. in FIG. 6A .

6A , taking the memory at a temperature of 55° C. as an example, the refresh pulse count [1] (i.e., the number of refresh pulse counts COUNT of the refresh request signal REFREQ of 1 pulse in a single time period of the entire cycle) is 11, the refresh pulse count [16] (i.e., the number of refresh pulse counts COUNT of the refresh request signal REFREQ of 16 pulses in a single time period of the entire cycle) is 5, the refresh pulse sum SUM is 91, and the average number of refresh pulses is 5.69 (i.e., the refresh pulse sum SUM divided by 16), and the average refresh interval is 2.81 (i.e., 16 divided by the average number of refresh pulses). The same is true for other temperatures, which will not be described in detail. As shown in FIG. 6A , when the memory has different temperatures, the temperature sensing circuit 10 can provide a refresh request signal REFREQ with different average refresh intervals.

FIG. 6B is an X-Y graph of the estimated average interval of refresh requests versus temperature according to an embodiment of the present invention. Referring to FIGS. 6A and 6B , the temperature sensing circuit 10 provides different average refresh intervals every 10° C. in the temperature range of 20° C. to 80° C., thereby achieving high refresh interval resolution. In other words, the temperature sensing circuit 10 can dynamically adjust the proportion of the refresh pulse count [1] and the refresh pulse count [16] in the entire cycle according to the memory temperature to adjust the average refresh interval, thereby improving the resolution of the average refresh interval versus temperature. Since there is no need to add more selection circuits, counters, and temperature sensors (not shown) to perform multi-temperature step-by-step control, current consumption can be further reduced.

FIG7 is a block diagram of a temperature sensing circuit according to another embodiment of the present invention. FIG7 is substantially the same as FIG1 and will not be described in detail. The difference between FIG7 and FIG1 is that the counting circuit 120 in the temperature sensing circuit 20 in FIG7 further receives a refresh request signal REFREQ and generates a counting signal CNT_N according to the refresh request signal REFREQ.

FIG8 is a circuit diagram of a temperature sensing circuit according to another embodiment of the present invention. FIG8 is substantially the same as FIG2 and will not be described in detail. The difference between FIG8 and FIG2 is that the counter 230 in the temperature sensing circuit 20 in FIG8 is used to receive and count the number of pulses of the refresh request signal REFREQ to generate a counting signal CNT_N. In another embodiment, the counter 230 generates a pulse of the counting signal CNT_N each time it counts a rising edge of the refresh request signal REFREQ, so the period of the counting signal CNT_N is 1 times that of the refresh request signal REFREQ.

FIG. 9 is a timing diagram of a temperature sensing circuit according to another embodiment of the present invention. Referring to FIG. 9 , in another embodiment, the counter 230 in the temperature sensing circuit 20 is used to receive and count the number of pulses of the refresh request signal REFREQ to generate a counting signal CNT_N. The control circuit 130 in the temperature sensing circuit 20 performs a logic conversion on the counting signal CNT_N according to the conversion table of FIG. 4 to generate a sensing adjustment signal ST and an enable signal EN. Please refer to the counting signal CNT_N and the sensing adjustment signal ST in FIG. 9 for the corresponding. The switch string 250 in the sensing circuit 140 in the temperature sensing circuit 20 turns on one of the multiple switches SW1 to SW7 according to the sensing adjustment signal ST to receive one of the multiple default temperature voltages VT20 to VT80 and generate a reference temperature voltage VRT, which please refer to the sensing adjustment signal ST and the reference temperature voltage VRT in FIG. 9 for the corresponding. When the monitoring voltage VMON is between the default temperature voltage VT50 and VT60 (e.g., VT55), and when the reference temperature voltage VRT is the default temperature voltage VT20-VT50, the sensing circuit 140 disables the decision signal DET; when the reference temperature voltage VRT is the default temperature voltage VT60-VT80, the sensing circuit 140 enables the decision signal DET. When the decision signal DET is enabled, the selector 252 in the selection circuit 150 outputs a pulse of the counting signal CNT_1 and the selector 251 does not output a signal; when the decision signal DET is disabled, the selector 251 in the selection circuit 150 outputs a pulse of the oscillation signal OSC and the selector 252 does not output a signal. Therefore, the selectors 251 and 252 are alternately activated according to the logic level of the decision signal DET to jointly generate the refresh request signal REFREQ, which corresponds to the decision signal DET and the refresh request signal REFREQ in FIG. 9 . In another embodiment, the refresh interval of the refresh request signal REFREQ in each time period is as shown in FIG. 9 , and the total refresh interval of the refresh request signal REFREQ in the entire cycle (ie, the count signal CNT_N from logic value 0 to 15) is 61.

FIG. 10A is a statistical table showing the estimated average interval of refresh requests according to another embodiment of the present invention. Referring to FIG. 10A , taking the memory at a temperature of 55° C. as an example, the refresh pulse count [16] is 3, the refresh pulse count [1] is 13, and the average refresh interval is 3.81. The same is true for other temperatures, which will not be described in detail. Therefore, it can be seen from FIG. 10A that in another embodiment, when the memory has different temperatures, the temperature sensing circuit 20 can provide a refresh request signal REFREQ with different average refresh intervals.

FIG. 10B is an X-Y graph of the estimated average interval of refresh requests versus temperature according to another embodiment of the present invention. Referring to FIGS. 10A and 10B , the temperature sensing circuit 20 provides different average refresh intervals every 10° C. in the temperature range of 20° C. to 80° C., thereby achieving high refresh interval resolution. In other words, the temperature sensing circuit 20 can dynamically adjust the proportion of the refresh pulse count [16] and the refresh pulse count [1] in the entire cycle according to the memory temperature to adjust the average refresh interval, thereby improving the resolution of the average refresh interval versus temperature. Since there is no need to add more selection circuits, counters, and temperature sensors (not shown) to perform multi-temperature step-by-step control, current consumption can be further reduced.

FIG. 11A is a statistical table of the estimated average interval of refresh requests according to another embodiment of the present invention. FIG. 11B is an X-Y diagram of the estimated average interval of refresh requests versus temperature according to another embodiment of the present invention. Referring to FIG. 11A and FIG. 11B, the difference between FIG. 6A, FIG. 6B, FIG. 10A and FIG. 10B is that the step between the default temperatures of the temperature sensing circuit 10 or the temperature sensing circuit 20 in FIG. 11A and FIG. 11B is adjustable, rather than fixing the step to 10°C. In another embodiment, for example, a smaller step, such as 5°C, can be used at a temperature near room temperature, so that a higher resolution of the average refresh interval to temperature can be obtained near room temperature. For example, as shown in FIG. 11A and FIG. 11B, in another embodiment, the step between the temperature of 30°C to 50°C is only 5°C, while the step outside the temperature of 30°C to 50°C is greater than 5°C. Obviously, the resolution of the average refresh interval to temperature between the temperature of 30°C to 50°C has been improved. That is, the present invention can also adjust the steps between the multiple default temperature voltages VT20-VT80 of the temperature sensing circuit 10 or the temperature sensing circuit 20, so that the average refresh interval of the refresh request signal REFREQ has different resolutions at different temperatures. In other words, the resolution can be non-uniform, so that the present invention can change the resolution of a specific temperature range without changing the number of circuit components.

FIG. 12 is a flow chart of an operation method of a temperature sensing circuit according to an embodiment of the present invention. Referring to FIG. 12 , in step S1210, the oscillator 110 provides an oscillation signal OSC. In step S1220, the counting circuit 120 counts the oscillation signal OSC to generate a counting signal CNT_1, and the counting circuit 120 also generates a counting signal CNT_N. Next, in step S1230, the control circuit 130 performs a logic operation on the counting signal CNT_N to generate an enable signal EN and a sensing adjustment signal ST. In step S1240, the sensing circuit 140 divides the reference voltage VREF according to the sensing adjustment signal ST to generate a reference temperature voltage VRT, compares the reference temperature voltage VRT with the monitoring voltage VMON according to the logic level of the enable signal EN, and generates a decision signal DET according to the comparison result. In step S1250 , the selection circuit 150 dynamically selects one of the oscillation signal OSC and the counting signal CNT_1 according to the determination signal DET, and generates a pulse of the refresh request signal REFREQ according to the dynamically selected one of the oscillation signal OSC and the counting signal CNT_1 .

In summary, the temperature sensing circuit and sensing method of the present invention can dynamically adjust the average refresh interval of the refresh request signal to improve the resolution of the average refresh interval to the temperature. The present invention adjusts the proportion of refresh pulses with different refresh intervals in the entire cycle by dynamically selecting an oscillation signal and a counting signal, thereby adjusting the average refresh interval and improving the resolution of the average refresh interval to the temperature. Since there is no need to add more selection circuits, counters and temperature sensors to perform multi-temperature step-by-step control, current consumption can be further reduced without increasing the frequency of the oscillation signal. In addition, according to one embodiment of the present invention, the present invention can also make the resolution of the average refresh interval to the temperature unevenly configured, thereby improving the resolution of the target temperature area.

Those skilled in the art will appreciate that various modifications and changes may be made to the structure of the disclosed embodiments without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention encompasses modifications and changes of the present invention within the scope of the appended claims and their equivalents.

Claims (13)

1. A temperature sensing circuit suitable for use in a memory device, comprising:

an oscillator for providing an oscillation signal;

the counting circuit is coupled with the oscillator and used for counting the oscillating signal to generate a first counting signal and generating a second counting signal;

the control circuit is coupled with the counting circuit and used for carrying out logic operation on the second counting signal to generate an enabling signal and a sensing adjustment signal;

the sensing circuit is coupled with the control circuit, divides the reference voltage according to the sensing adjustment signal to generate a reference temperature voltage, and compares the reference temperature voltage with the monitoring voltage according to the enabling signal to generate a decision signal; and

a selection circuit coupled to the oscillator, the counting circuit and the sensing circuit, the selection circuit dynamically selecting one of the oscillation signal and the first counting signal according to the determination signal and generating a pulse of a refresh request signal according to the dynamically selected one of the oscillation signal and the first counting signal,

wherein the sensing circuit comprises:

the voltage dividing circuit is provided with a plurality of voltage dividing resistors connected in series, and the voltage dividing resistors connected in series are coupled with the reference voltage and generate a plurality of default temperature voltages by dividing the reference voltage;

a switch string coupled to the control circuit and the voltage dividing circuit, having a plurality of switches, wherein a first end of each of the plurality of switches receives one of a plurality of default temperature voltages, and second ends of all of the plurality of switches are coupled to each other, and the switch string turns on one of the plurality of switches according to the sensing adjustment signal to generate the reference temperature voltage;

a monitor voltage generating circuit for providing the monitor voltage;

the comparator is coupled with the switch string and the monitoring voltage generating circuit and is used for determining whether to compare the reference temperature voltage with the monitoring voltage according to the enabling signal so as to generate a compared voltage;

a latch coupled to the comparator for determining whether to latch the compared voltage according to the enable signal to generate a determination signal,

wherein the selection circuit comprises:

a first selector coupled between the oscillator and the sensing circuit; and

a second selector coupled between the counting circuit and the sensing circuit,

the first selector and the second selector are alternately activated according to the logic level of the decision signal to jointly generate the refresh request signal.

2. The temperature sensing circuit of claim 1, wherein the counting circuit comprises:

a first counter coupled to the oscillator for receiving the oscillation signal and counting the number of pulses of the oscillation signal to generate a third counting signal;

a second counter coupled between the first counter and the selection circuit for receiving the third counting signal and counting the pulse number of the third counting signal to generate the first counting signal; and

and the third counter is used for receiving the oscillation signal and counting the pulse number of the oscillation signal to generate the second counting signal.

3. The temperature sensing circuit of claim 1, wherein the control circuit enables the enable signal whenever the control circuit detects that the number of pulses of the oscillating signal is equal to a first preset number in accordance with the second count signal.

4. The temperature sensing circuit of claim 1, wherein the control circuit logically converts the second count signal according to a default conversion table to generate the sensing adjustment signal, wherein the logic value of the sensing adjustment signal corresponds to a plurality of default temperature voltages of the memory device.

5. The temperature sensing circuit of claim 1, wherein the monitor voltage generation circuit comprises:

the constant current source is used for providing constant current; and

the diode is coupled with the constant current source and used for generating the monitoring voltage according to the constant current.

6. The temperature sensing circuit of claim 1, wherein the first selector outputs a pulse of the oscillation signal and the second selector does not output a signal when the decision signal is enabled, and the second selector outputs a pulse of the first count signal and the first selector does not output a signal when the decision signal is disabled to collectively generate the refresh request signal.

7. The temperature sensing circuit of claim 4, wherein the resolution of the average refresh interval of the refresh request signal at different temperatures is varied by adjusting the step between the plurality of default temperature voltages.

8. A sensing method for a memory device having a temperature sensing circuit with an oscillator, a counting circuit, a control circuit, a sensing circuit and a selection circuit, the sensing method comprising:

providing an oscillating signal with the oscillator;

counting the oscillation signals by the counting circuit to generate a first counting signal and a second counting signal;

performing logic operation on the second counting signal by using the control circuit to generate an enabling signal and a sensing adjustment signal;

dividing a reference voltage by the sensing circuit according to the sensing adjustment signal to generate a reference temperature voltage, and comparing the reference temperature voltage with a monitoring voltage according to the enabling signal to generate a determination signal; and

dynamically selecting one of the oscillation signal and the first count signal by the selection circuit according to the decision signal, generating a pulse of a refresh request signal according to the dynamically selected one of the oscillation signal and the first count signal,

the control circuit performs logic conversion on the second count signal according to a default conversion table to generate the sensing adjustment signal, wherein the logic value of the sensing adjustment signal corresponds to a plurality of default temperatures of the storage device;

the step of generating a reference temperature voltage according to the sensing adjustment signal and comparing the reference temperature voltage with a monitor voltage according to the enable signal to generate a determination signal comprises the following steps:

turning on one of the switches in the sensing circuit according to the sensing adjustment signal, and generating the reference temperature voltage by dividing the reference voltage;

providing the monitor voltage;

determining whether to compare the reference temperature voltage with the monitor voltage according to the enable signal to generate a compared voltage; and

latching the compared voltages to generate a decision signal;

the selection circuit comprises a first selector and a second selector, and the first selector and the second selector are alternately started according to the logic level of the decision signal so as to jointly generate the refresh request signal.

9. The sensing method of claim 8, wherein the step of counting the oscillation signals to generate a first count signal and generating a second count signal comprises:

receiving the oscillation signal and counting the pulse number of the oscillation signal to generate a third counting signal;

receiving the third counting signal and counting the pulse number of the third counting signal to generate the first counting signal; and

the oscillation signal is received and the number of pulses of the oscillation signal is counted to generate the second count signal.

10. The sensing method of claim 8, wherein the control circuit enables the enable signal whenever the control circuit detects that the number of pulses of the oscillation signal is equal to a first preset number according to the second count signal.

11. The sensing method of claim 8, wherein the step of providing the monitor voltage comprises:

providing a constant current; and

and generating the monitoring voltage according to the constant current.

12. The sensing method of claim 8, wherein the first selector outputs a pulse of the oscillation signal and the second selector does not output a signal when the decision signal is enabled, and the second selector outputs a pulse of the first count signal and the first selector does not output a signal when the decision signal is disabled to collectively generate the refresh request signal.

13. The sensing method of claim 8, wherein the resolution of the average refresh interval of the refresh request signal at different temperatures is varied by adjusting the step between the plurality of default temperature voltages.