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CN113434346A - Automatic detection method and system for differential signal polarity connection - Google Patents

Automatic detection method and system for differential signal polarity connection Download PDF

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CN113434346A
CN113434346A CN202110578568.1A CN202110578568A CN113434346A CN 113434346 A CN113434346 A CN 113434346A CN 202110578568 A CN202110578568 A CN 202110578568A CN 113434346 A CN113434346 A CN 113434346A
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schematic
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differential
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CN113434346B (en
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杨俊�
唐浩
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Chengdu Spaceon Technology Co ltd
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    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested

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Abstract

The invention discloses an automatic detection method and system for differential signal polarity connection, which comprises the steps of automatically compiling a schematic diagram project and acquiring project data; and removing devices and principle drawings which do not need to be detected, screening all the principle drawings and device bit numbers which need to be detected, analyzing and judging the differential polarity of the device differential pins and the connected network names so as to judge whether the differential signal connection of the principle drawings is wrong or not, and generating an alarm report after all the detection is finished. According to the invention, by means of generating the schematic diagram engineering, the polarity connection correctness of the differential signals is automatically checked on the schematic diagram engineering data, and a report is generated for being confirmed by a hardware engineer, so that the checking workload is greatly reduced, the defects of manual omission or error detection are avoided, the product research and development time is shortened, and the research and development efficiency is improved.

Description

Automatic detection method and system for differential signal polarity connection
Technical Field
The invention relates to the field of integrated chips, in particular to an automatic detection method and system for differential signal polarity connection.
Background
With the trend toward high speed and high density of electronic systems and integrated chips, most of the ways of communication within a chip, between chips, and between devices have been converted from a conventional parallel bus to a serial bus. Currently, besides high-speed serial buses (such as SGMII, QSGMII, XAUI, SRIO, PCIE, SATA, etc.), some low-speed serial signals (such as RS422, RS485, CAN) are transmitted in the form of differential signals to improve the reliability and transmission distance of data transmission.
In high-speed and high-density digital products (such as switches, routers and some embedded data processing devices), because of a large amount of high-speed data interaction, hundreds and thousands of pairs of differential signals may exist in the principle, and once the differential signal polarity connection error occurs in the schematic diagram design, a board change may be caused, which not only increases the development cost, increases the product development cycle, but also may miss the product market window period. Therefore, how to guarantee the connection correctness of the serial bus differential signals between the chips and between the devices is very important. Because existing mainstream schematic diagram design software (such as the Altium Designer, Cadence, Pads, and the like) cannot directly detect the polarity connection relationship of the differential signals, a hardware engineer must manually check the polarity of each group of differential signals after the schematic diagram design is completed in order to ensure the connection correctness of the differential signals, and then other project members in the same group also confirm the polarity in a manual check manner.
With the increasing of data exchange capacity, the number of differential signals in the schematic diagram of each product is increasing, and if the existing manual inspection method is still adopted, not only is a larger workload and more human resources required, but also the defects of low efficiency, manual omission or error detection and the like exist.
Disclosure of Invention
The invention aims to overcome the defects of the prior art, automatically realize the check of the polarity connection correctness of differential signals by adopting a schematic diagram script mode in a high-speed and high-density digital product which uses a large number of differential signals between chips and between equipment for data transmission, and provide an automatic detection method and a system for the polarity connection of the differential signals.
The purpose of the invention is realized by the following technical scheme:
a method for automatic detection of differential signal polarity connection, comprising the steps of:
step 1: automatically compiling the whole schematic diagram engineering design file through a script program;
step 2: acquiring basic data of schematic engineering, and caching each data by adopting a linked list storage structure;
and step 3: calculating a to-be-detected principle drawing name set S and a to-be-detected device bit number set Z by adopting a set remainder-solving method;
and 4, step 4: starting to traverse the schematic diagram in the set S;
and 5: traversing the device bit number in the current principle drawing;
step 6: acquiring a network name connected with each pin of a current device;
and 7: judging whether the obtained network name is a differential signal or not according to the naming specification requirement of the schematic diagram network label, if so, entering a step 8, and if not, entering a step 1;
and 8: judging whether the current device is a resistor, a capacitor or an inductor according to the naming rule of the position number of the schematic diagram device, if not, acquiring the name of the pin of the current device, and then entering step 9; if so, acquiring a network name connected with a pin at the other end of the resistor or the capacitor;
and step 9: comparing the pin name of the device with the obtained network name according to the pin naming specification requirement of the schematic integrated circuit device, judging whether the differential polarity of the pin name is consistent with the differential polarity of the network name, if not, adopting a linked list storage structure, adding the current device bit number and the network name connected with the pin into an alarm linked list structure, and if so, entering a step l 0;
step 10: judging whether the pins of the current device are completely traversed, if so, entering a step 11, and if not, entering a step 6;
step 11: judging whether all devices are traversed in the current principle drawing, if so, entering a step 12, and if not, entering a step 5;
step 12: and (4) judging whether all the schematic drawings are traversed in the schematic drawing engineering, if so, generating an alarm report about the polarity connection correctness of the differential network in the whole schematic drawing engineering, and if not, entering the step 4.
Further, the schematic diagram engineering basic data in step 2 includes a schematic diagram engineering name, a schematic diagram engineering path, a schematic diagram name, a device bit number, a network name in the schematic diagram, and a device pin name.
Further, step 8 includes comparing the two network names obtained in step 8 and step 6, determining whether the differential polarities at the two ends of the resistor or the capacitor are consistent, if not, adding the current device bit number and the network name connected with the pin into the alarm linked list structure, and then entering step 11; otherwise, go directly to step 11.
Further, the step 3 comprises the following substeps:
step 301: assuming that all the schematic drawing names and device bit numbers of the extracted schematic drawing parameters are set A and set X respectively;
step 302: selecting a principle drawing name set B which does not need to be detected and a device bit number set Y which does not need to be detected;
step 303: the calculation is carried out by a method of solving a remainder set by a set, and the formula is as follows:
S=CAb and B can be in the middle
Z=CXY and Y can be in the middle
The middle and the middle represent empty sets, S represents a schematic drawing name set to be detected, and Z represents a device bit number set to be detected.
An automatic detection system for differential signal polarity connection comprises a schematic diagram parameter extraction module, a visual window data selection module, a data set operation and signal comparison module and an alarm report generation module, wherein the data set operation and signal comparison module is respectively connected with the schematic diagram parameter extraction module, the visual window data selection module and the alarm report generation module; the schematic diagram parameter extraction module automatically compiles the schematic diagram engineering file design, the data set operation and signal comparison module analyzes and judges the differential polarity of the device differential pins and the connected network names according to the schematic diagram engineering file data and the visual window data selection module configuration data, so as to judge whether the schematic diagram differential signal connection is wrong or not, and finally, an alarm report is generated in the alarm report generation module.
Further, the schematic diagram parameter extraction module is used for obtaining a schematic diagram engineering name, a schematic diagram engineering path, a schematic diagram name, a device bit number, a network name in the schematic diagram and a device pin name.
Furthermore, the visualization window data selection module is used for selecting devices and schematic drawings which do not need to be added into the detection range.
Furthermore, the data set operation and signal comparison module adopts a set remainder solving technology to screen the principle drawing and the device bit number to be detected, analyzes and judges the differential polarity of the device differential pin and the connected network name, thereby judging whether the principle drawing differential signal connection is wrong.
Further, the alarm report generation module is used for generating documents of all schematic drawing differential signal polarity connection errors in the whole schematic drawing engineering.
The invention has the beneficial effects that: the invention mainly solves the problem that the detection of the polarity connection correctness of the differential signals is automatically realized by adopting a schematic diagram script mode in a high-speed and high-density digital product which uses a large amount of differential signals between chips and between equipment for data transmission, so as to avoid the defects of huge workload, waste of human resources, low efficiency, manual omission or error detection and the like of the existing manual detection method.
Drawings
FIG. 1 is a flow chart of the method of the present invention.
Fig. 2 is a system architecture diagram of the present invention.
Detailed Description
In order to more clearly understand the technical features, objects, and effects of the present invention, embodiments of the present invention will now be described with reference to the accompanying drawings.
In this embodiment, as shown in fig. 1, an automatic detection method for differential signal polarity connection includes the following steps:
step 1: automatically compiling the whole schematic diagram engineering design file through a script program;
step 2: acquiring basic data of schematic engineering, and caching each data by adopting a linked list storage structure;
and step 3: calculating a to-be-detected principle drawing name set S and a to-be-detected device bit number set Z by adopting a set remainder-solving method;
and 4, step 4: starting to traverse the schematic diagram in the set S;
and 5: traversing the device bit number in the current principle drawing;
step 6: acquiring a network name connected with each pin of a current device;
and 7: judging whether the obtained network name is a differential signal or not according to the naming specification requirement of the schematic diagram network label, if so, entering a step 8, and if not, entering a step 1;
and 8: judging whether the current device is a resistor, a capacitor or an inductor according to the naming rule of the position number of the schematic diagram device, if not, acquiring the name of the pin of the current device, and then entering step 9; if so, acquiring a network name connected with a pin at the other end of the resistor or the capacitor;
and step 9: comparing the pin name of the device with the obtained network name according to the pin naming specification requirement of the schematic integrated circuit device, judging whether the differential polarity of the pin name is consistent with the differential polarity of the network name, if not, adopting a linked list storage structure, adding the current device bit number and the network name connected with the pin into an alarm linked list structure, and if so, entering a step l 0;
step 10: judging whether the pins of the current device are completely traversed, if so, entering a step 11, and if not, entering a step 6;
step 11: judging whether all devices are traversed in the current principle drawing, if so, entering a step 12, and if not, entering a step 5;
step 12: and (4) judging whether all the schematic drawings are traversed in the schematic drawing engineering, if so, generating an alarm report about the polarity connection correctness of the differential network in the whole schematic drawing engineering, and if not, entering the step 4.
Further, the schematic diagram engineering basic data in step 2 includes a schematic diagram engineering name, a schematic diagram engineering path, a schematic diagram name, a device bit number, a network name in the schematic diagram, and a device pin name.
Further, step 8 includes comparing the two network names obtained in step 8 and step 6, determining whether the differential polarities at the two ends of the resistor or the capacitor are consistent, if not, adding the current device bit number and the network name connected with the pin into the alarm linked list structure, and then entering step 11; otherwise, go directly to step 11.
Further, the step 3 comprises the following substeps:
step 301: assuming that all the schematic drawing names and device bit numbers of the extracted schematic drawing parameters are set A and set X respectively;
step 302: selecting a principle drawing name set B which does not need to be detected and a device bit number set Y which does not need to be detected;
step 303: the calculation is carried out by a method of solving a remainder set by a set, and the formula is as follows:
S=CAb and B can be in the middle
Z=CXY and Y can be in the middle
The middle and the middle represent empty sets, S represents a schematic drawing name set to be detected, and Z represents a device bit number set to be detected.
As shown in fig. 2, an automatic detection system for differential signal polarity connection includes a schematic diagram parameter extraction module, a visual window data selection module, a data set operation and signal comparison module, and an alarm report generation module, where the data set operation and signal comparison module is respectively connected to the schematic diagram parameter extraction module, the visual window data selection module, and the alarm report generation module; the schematic diagram parameter extraction module automatically compiles the schematic diagram engineering file design, the data set operation and signal comparison module analyzes and judges the differential polarity of the device differential pins and the connected network names according to the schematic diagram engineering file data and the visual window data selection module configuration data, so as to judge whether the schematic diagram differential signal connection is wrong or not, and finally, an alarm report is generated in the alarm report generation module.
Further, the schematic diagram parameter extraction module is used for obtaining a schematic diagram engineering name, a schematic diagram engineering path, a schematic diagram name, a device bit number, a network name in the schematic diagram and a device pin name.
Furthermore, the visualization window data selection module is used for selecting devices and schematic drawings which do not need to be added into the detection range.
Furthermore, the data set operation and signal comparison module adopts a set remainder solving technology to screen the principle drawing and the device bit number to be detected.
Further, the alarm report generation module is used for generating documents of all schematic drawing differential signal polarity connection errors in the whole schematic drawing engineering.
Example 1: the implementation case of the automatic detection method for the polarity connection correctness of the differential signals is as follows:
taking an AltiumDesigner schematic diagram design platform as an example, the process of checking the connection correctness of the differential signal polarity of a service data exchange card in certain exchange equipment based on the DelphiScript script language is as follows:
1. calling GetWorkspace. DM _ FocusedProject to locate the current schematic diagram project workspace, and calling project. DM _ Complele function to automatically Compile the schematic diagram project;
2. and filling a device bit number which does not need to be checked in a visual window: XS1 (if there are multiple bit numbers, the bit numbers are separated by commas, where XS1 is a connector for connecting a board card with a backplane, and since the pin names of the connector are not named according to differential signals, detection is not needed, otherwise, a large amount of alarm information exists), fills in the principle drawing which does not need to be checked: (if there are a plurality of schematic drawings, the drawings are separated by commas, and there is no differential signal inside the 06_ MISC drawing, so that detection is not needed, and the operation efficiency of the detection method is improved);
3. acquiring the whole schematic diagram information, including:
schematic engineering name: LPU _ switch
Schematic engineering path: f \ TB2005\ AltiumDesigner _ Prj \00_ LPU _ SWITCH
All schematic drawing names are set: a. the
Set of all device bit numbers: x
4. Acquiring a to-be-detected principle drawing name set S, namely a residual set of a set B (element: 06_ MISC) in a set A;
5. acquiring a bit number set Z of a device to be detected, namely a residual set of a set Y (element: XS 1) in a set X;
6. traversing to a principle drawing 01_ SWITCH in the set S;
7. obtaining the first device bit number in the 01_ SWITCH principle drawing: d1;
8. decision D1 is an element of set Z, so the device needs to be inspected;
9. first pin taken to D1: d1. A1;
10. the network name connected with the D1.A1 is acquired as: SGMII _ TX _ P0, judging that the network name is a differential signal and the polarity is positive according to the naming rule of the schematic network label (the network name is finally _Por _P + number, which is the positive pole of the differential signal, and the network name is finally _Nor _N + number, which is the negative pole of the differential signal);
11. judging that the current device D1 is an integrated circuit device, not a resistor, a capacitor or an inductor according to a device position number naming rule;
12. obtaining the name of the D1.A1 pin: SGMII _ TX _ N0, according to the schematic device pin naming convention (the pin name is finally "_ P" or "_ P + number", which is the positive pole of the differential signal, and the pin name is finally "_ N" or "_ N + number", which is the negative pole of the differential signal), determines that the differential polarity of the pin is negative, contradicts with the polarity of the differential signal acquired in step 10, and therefore, adds the device bit number D1 and the network name SGMII _ TX _ P0 to the alarm linked list structure warning.
13. Repeating the steps 9-12, and traversing all the residual pins D1;
14. repeating the step 7 to the step 13, and traversing all the residual device bit numbers under the 01_ SWITCH principle drawing;
15. repeating the steps 6-14, and traversing all the schematic drawings in the set S;
and under the F \ TB2005\ AltiumDesigner _ Prj \00_ LPU _ SWITCH path, creating an alarm report LPU _ SWITCH. schpck according to the selected file type, writing the data in the alarm linked list structure Warneng. List into the report, and automatically opening the report in AltiumDesigner software after the data is written into the report.
According to the invention, by means of generating the schematic diagram engineering, the polarity connection correctness of the differential signals is automatically checked on the schematic diagram engineering data, and a report is generated for being confirmed by a hardware engineer, so that the checking workload is greatly reduced, the defects of manual omission or error detection are avoided, the product research and development time is shortened, and the research and development efficiency is improved.
The foregoing shows and describes the general principles and broad features of the present invention and advantages thereof. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are described in the specification and illustrated only to illustrate the principle of the present invention, but that various changes and modifications may be made therein without departing from the spirit and scope of the present invention, which fall within the scope of the invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.

Claims (9)

1. An automatic detection method for differential signal polarity connection, characterized by comprising the following steps:
step 1: automatically compiling the whole schematic diagram engineering design file through a script program;
step 2: acquiring basic data of schematic engineering, and caching each data by adopting a linked list storage structure;
and step 3: calculating a to-be-detected principle drawing name set S and a to-be-detected device bit number set Z by adopting a set remainder-solving method;
and 4, step 4: starting to traverse the schematic diagram in the set S;
and 5: traversing the device bit number in the current principle drawing;
step 6: acquiring a network name connected with each pin of a current device;
and 7: judging whether the obtained network name is a differential signal or not according to the naming specification requirement of the schematic diagram network label, if so, entering a step 8, and if not, entering a step 1;
and 8: judging whether the current device is a resistor, a capacitor or an inductor according to the naming rule of the position number of the schematic diagram device, if not, acquiring the name of the pin of the current device, and then entering step 9; if so, acquiring a network name connected with a pin at the other end of the resistor or the capacitor;
and step 9: comparing the pin name of the device with the obtained network name according to the pin naming specification requirement of the schematic integrated circuit device, judging whether the differential polarity of the pin name is consistent with the differential polarity of the network name, if not, adopting a linked list storage structure, adding the current device bit number and the network name connected with the pin into an alarm linked list structure, and if so, entering a step l 0;
step 10: judging whether the pins of the current device are completely traversed, if so, entering a step 11, and if not, entering a step 6;
step 11: judging whether all devices are traversed in the current principle drawing, if so, entering a step 12, and if not, entering a step 5;
step 12: and (4) judging whether all the schematic drawings are traversed in the schematic drawing engineering, if so, generating an alarm report about the polarity connection correctness of the differential network in the whole schematic drawing engineering, and if not, entering the step 4.
2. The method according to claim 1, wherein the schematic engineering basic data in step 2 includes schematic engineering name, schematic engineering path, schematic drawing name, device bit number, network name in schematic and device pin name.
3. The method according to claim 1, wherein step 8 further comprises comparing the two network names obtained in step 8 and step 6, determining whether the differential polarities at the two ends of the resistor or the capacitor are consistent, if not, adding the current device bit number and the network name connected to the pin into an alarm linked list structure, and then entering step 11; otherwise, go directly to step 11.
4. The method for automatic detection of differential signal polarity connection according to claim 1, wherein the step 3 comprises the following sub-steps:
step 301: assuming that all the schematic drawing names and device bit numbers of the extracted schematic drawing parameters are set A and set X respectively;
step 302: selecting a principle drawing name set B which does not need to be detected and a device bit number set Y which does not need to be detected;
step 303: the calculation is carried out by a method of solving a remainder set by a set, and the formula is as follows:
S=CAb and B can be in the middle
Z=CXY and Y can be in the middle
The middle and the middle represent empty sets, S represents a schematic drawing name set to be detected, and Z represents a device bit number set to be detected.
5. The automatic detection system for differential signal polarity connection is characterized by comprising a schematic diagram parameter extraction module, a visual window data selection module, a data set operation and signal comparison module and an alarm report generation module, wherein the data set operation and signal comparison module is respectively connected with the schematic diagram parameter extraction module, the visual window data selection module and the alarm report generation module; the schematic diagram parameter extraction module automatically compiles the schematic diagram engineering file design, the data set operation and signal comparison module analyzes and judges the differential polarity of the device differential pins and the connected network names according to the schematic diagram engineering file data and the visual window data selection module configuration data, so as to judge whether the schematic diagram differential signal connection is wrong or not, and finally, an alarm report is generated in the alarm report generation module.
6. The system of claim 5, wherein the schematic parameter extraction module is configured to obtain a schematic engineering name, a schematic engineering path, a schematic drawing name, a device bit number, a network name in a schematic, and a device pin name.
7. The system of claim 5, wherein the visualization window data selection module is configured to select devices and schematic drawings that are not required to be added to the detection range.
8. The automatic detection system of differential signal polarity connection of claim 5, wherein the data set operation and signal comparison module employs a set remainder technology to screen a schematic drawing and a device bit number to be detected, and analyzes and judges the differential polarity of a device differential pin and a connected network name, thereby judging whether the schematic drawing differential signal connection is incorrect.
9. The system according to claim 5, wherein the alarm report generation module is configured to generate documents of all schematic drawing differential signal polarity connection errors in the whole schematic drawing engineering.
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