CN113433406B - Key detection circuit and terminal equipment - Google Patents
Key detection circuit and terminal equipment Download PDFInfo
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- CN113433406B CN113433406B CN202110680402.0A CN202110680402A CN113433406B CN 113433406 B CN113433406 B CN 113433406B CN 202110680402 A CN202110680402 A CN 202110680402A CN 113433406 B CN113433406 B CN 113433406B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
- G01R19/16566—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533
- G01R19/16576—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533 comparing DC or AC voltage with one threshold
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Abstract
The disclosure relates to a key detection circuit and a terminal device, wherein the key detection circuit comprises a control unit and a key unit; the control unit comprises a GPIO-1 interface, a GPIO-2 interface, an ADC-1 interface and an ADC-2 interface; the key unit comprises a plurality of resistors connected in series between the GPIO-1 interface and the GPIO-2 interface, and the adjacent resistors are grounded through a key switch; the ADC-1 interface is used for detecting a first voltage value of a first detection point; the first detection point is a GPIO-1 interface; the ADC-2 interface is used for detecting a second voltage value of a second detection point; the second detection point is positioned between the two resistors closest to the GPIO-1 interface; the control unit is used for determining the position of the pressed key switch according to the first voltage value, the second voltage value and the resistance values of the plurality of resistors. When the key is not pressed, no loop consumes electric quantity in the circuit. The power consumption of the key detection circuit is reduced, and the endurance time of the battery is prolonged.
Description
Technical Field
The disclosure relates to the technical field of keys, and in particular relates to a key detection circuit and terminal equipment.
Background
In the related art, a terminal with a key comprises a key detection circuit, and most of the key detection circuits divide voltage by connecting a plurality of resistors in series between a power supply and the ground, and when the key is pressed, the key detection circuit determines which key is pressed by measuring the voltage at a certain position between the resistors, so as to realize the key detection function. However, the key detection circuit has continuous current loss of more than tens of microamps, and even in a state that the terminal is not used, the electric quantity in the battery is lost, so that the service life of the battery is reduced.
Disclosure of Invention
In view of this, the disclosure provides a key detection circuit and a terminal device, so as to reduce power consumption of the key detection circuit and improve endurance time of a battery.
According to an aspect of the present disclosure, there is provided a key detection circuit including a control unit and a key unit; wherein the control unit comprises a first general purpose input output interface (GPIO-1), a second general purpose input output interface (GPIO-2), a first analog-to-digital converter interface (ADC-1) and a second analog-to-digital converter interface (ADC-2);
The key unit comprises a plurality of resistors connected in series between the first general input/output interface and the second general input/output interface, and the adjacent resistors are grounded through a key switch;
the first analog-to-digital converter interface is used for detecting a first voltage value of a first detection point; wherein the first detection point is the first general input/output interface;
the second analog-to-digital converter interface is used for detecting a second voltage value of a second detection point; the second detection point is positioned between two resistors closest to the first general input/output interface;
The control unit is used for determining the position of the pressed key switch according to the first voltage value, the second voltage value and the resistance values of the resistors.
In one possible implementation manner, when the key detection circuit is initialized, the first general input/output interface is set as an output interface, a first voltage is output, the second general input/output interface is set as an input interface, and a level change of the second general input/output interface triggers an interrupt;
the control unit responds to the level change of the second general input/output interface to execute an interrupt processing program corresponding to the level change.
In one possible implementation, the level change of the second general purpose input/output interface triggers an interrupt, including:
When any key switch is pressed, the second general input/output interface is changed from high level to low level, and the control unit responds to the second general input/output interface which is changed from high level to low level, and executes a first interrupt processing program;
the first interrupt handler includes a handler for waking up the control unit in a sleep state.
In one possible implementation, the first interrupt handler further includes: and the processing program is used for triggering the first analog-to-digital converter interface to detect the first voltage value of the first detection point and triggering the second analog-to-digital converter interface to detect the second voltage value of the second detection point.
In one possible implementation, the first interrupt handler further includes: and determining the position of the pressed key switch according to the first voltage value, the second voltage value and the resistance values of the resistors.
In one possible implementation, the level change of the second general purpose input/output interface triggers an interrupt, including:
when the key is released, the level at the second general input/output interface is changed from low level to high level;
The control unit responds to the second general input/output interface changing from low level to high level and executes a second interrupt processing program;
The second interrupt handler is to restore the control unit to a sleep state.
In a possible implementation, the control unit is configured to: after determining the position of the pressed key switch, judging whether the key switch is released within a first preset time period, if not, executing the following steps in a circulating way until the key switch is released:
setting the first general input/output interface as an input interface;
Judging whether the key switch is released before the first general input/output interface is set as an input interface in a second preset time period;
if not, setting the first general input/output interface as an output interface after the second preset time length is reached, and setting the first general input/output interface as a high level.
In one possible implementation, determining whether the key switch is released includes:
And if the control unit detects that the level of the second general input/output interface is changed from low level to high level, judging that the key switch is released.
According to another aspect of the present disclosure, there is provided a terminal device including the key detection circuit.
According to the key detection circuit, the output end and the input end of the key unit are respectively connected with the GPIO port of the control unit, under the condition that a key is not pressed, no loop in the key detection circuit can consume electric quantity, when the key is pressed, different loops are formed by using the pressed key, so that the change of the resistance value of the circuit is caused, the change of the voltage detected by the voltage detection point in the circuit is caused, and the pressed key is determined. Therefore, the power consumption of the key detection circuit is reduced, and the endurance time of the battery is prolonged.
Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments, features and aspects of the present disclosure and together with the description, serve to explain the principles of the disclosure.
Fig. 1 shows a key detection circuit according to the prior art.
Fig. 2 illustrates a key detection circuit according to an embodiment of the present disclosure.
Fig. 3 illustrates a leakage detection and leakage protection flowchart according to an embodiment of the present disclosure.
Detailed Description
Various exemplary embodiments, features and aspects of the disclosure will be described in detail below with reference to the drawings. In the drawings, like reference numbers indicate identical or functionally similar elements. Although various aspects of the embodiments are illustrated in the accompanying drawings, the drawings are not necessarily drawn to scale unless specifically indicated.
The word "exemplary" is used herein to mean "serving as an example, embodiment, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.
In addition, numerous specific details are set forth in the following detailed description in order to provide a better understanding of the present disclosure. It will be understood by those skilled in the art that the present disclosure may be practiced without some of these specific details. In some instances, methods, means, elements, and circuits well known to those skilled in the art have not been described in detail in order not to obscure the present disclosure.
Fig. 1 shows a key detection circuit according to the prior art. As shown in fig. 1, in the key detection circuit, a plurality of resistors (resistors R1, R2, R3) are connected in series between a power supply voltage (VCC, volt Current Condenser) and ground to divide the voltage. A micro control unit (MCU, microcontroller Unit) controls the voltages at the ADC1 (analog-digital converter) interface and the ADC2 interface scan detection points. For example, when the key K1 is pressed, an ADC1 (analog-to-digital converter) interface detects the voltage at the detection point between R1 and R2, and determines that the K1 key is pressed by calculating the voltage value detected. When the key K2 is pressed, an ADC2 (analog-to-digital converter) interface detects the voltage at the detection point between R2 and R3, and determines that the K2 key is pressed from the detected voltage value.
However, in the prior art, a plurality of resistors (resistors R1, R2, R3) are connected in series between the power supply and the ground in the key detection circuit to divide the voltage. That is, the power supply and the ground are always on, that is, a minute current continues to exist. Therefore, the key detection circuit always has electric quantity loss, and the service life of the battery is reduced.
Fig. 2 illustrates a key detection circuit according to an embodiment of the present disclosure. As shown in fig. 2, the key detection circuit includes a control unit and a key unit; the control unit may include a first general purpose input/output interface (GPIO-1 interface) and a second general purpose input/output interface (GPIO-2 interface), a first analog-to-digital converter interface (ADC-1 interface), and a second analog-to-digital converter interface (ADC-2 interface).
The key unit comprises a plurality of resistors connected in series between the GPIO-1 interface and the GPIO-2 interface, and the adjacent resistors are grounded through a key switch.
The ADC-1 interface is used for detecting a first voltage value of a first detection point; wherein the first detection point may be the GPIO-1 interface. The ADC-2 interface is used for detecting a second voltage value of a second detection point; wherein the second detection point is located between two resistors closest to the GPIO-1 interface, for example, at the connection line between R12 and R13 in fig. 2.
The control unit is used for determining the key positions according to the first voltage value, the second voltage value and the resistance values of the resistors.
In one possible implementation manner, the functions of the pins of the first General-purpose input/output interface GPIO-1 (GPIO) and the second General-purpose input/output interface GPIO-2 in the control unit may be controlled by a program, and the pins may be set as General-purpose input interface (GPI), general-purpose output interface (GPIO) or General-purpose input/output (GPIO) interfaces according to the use requirement.
In one possible implementation, as shown in fig. 2, the key unit includes a plurality of resistors, such as resistors R1-R13, connected in series between the GPIO-1 interface and the GPIO-2 interface. The adjacent resistors are grounded through a key switch. The number of resistors may be set as desired according to the number of key switches. The resistance values of the resistors can be set to a certain resistance value according to actual requirements, and the resistance values of the resistors can be equal, for example, the resistance value of each resistor can be set to 10 Kohms. As shown in fig. 2, the connection between R1 and R2 is grounded through a key switch K1, the connection between R2 and R3 is grounded through a key switch K2, the connection between R3 and R4 is grounded through a key switch K3 … …, and the connection between R12 and R13 is grounded through a key switch K12.
As shown in fig. 2, the first detection point is a detection point at the GPIO-1 interface. The second detection point is located between two resistors closest to the GPIO-1 interface, as shown in fig. 2, and is located between resistors R12 and R13.
In one possible implementation manner, the control unit is configured to determine the positions of the pressed key switches according to the first voltage value U1 and the second voltage value U2 and the resistance values of the plurality of resistors. For example, the corresponding relation between the ratio U2/U1 of the second voltage value to the first voltage value and the key position is preset in the control unit. The correspondence may be stored in the form of a table in the control unit.
For example, when the key switch K1 in fig. 2 is pressed, a loop from the GPIO-1 interface to the ground via R2 to R13 is formed, where the ratio U2/U1 of the second voltage value to the first voltage value is equal to (r2+ … r12)/(r2+ … r13), and in the case that the resistance values of R1 to R13 are equal, i.e., U2 is 11/12 of U1; when K2 is pressed down, a loop from the GPIO-1 interface to the ground through R3-R13 is formed, at the moment, the ratio U2/U1 of the second voltage value to the first voltage value is equal to (R3+ … R12)/(R3+ … R13), and when the resistance values of R1-R13 are equal, namely U2 is 10/11 of U1; similarly, when K11 is pressed, U2 is 1/2 of U1, and when K12 is pressed, the voltage of U2 is 0.
For example, table 1 shows the correspondence between the ratio U2/U1 of the second voltage value to the first voltage value and the key positions according to an embodiment of the present disclosure. Namely, when the control unit detects the second voltage value and the first voltage value, the position of the pressed key is determined by calculating the ratio U2/U1 of the second voltage value and the first voltage value and then according to the corresponding relation between U2/U1 and the key position shown in the table 1.
TABLE 1 correspondence between the ratio U2/U1 of the second voltage value to the first voltage value and the key positions
In one possible implementation manner, after the control unit calculates the ratio U2/U1 of the second voltage value to the first voltage value, the pressed key switch is determined by presetting the corresponding relation between the ratio U2/U1 of the second voltage value to the first voltage value and the key switch in the control unit.
In this way, the key detection circuit disclosed by the invention is characterized in that the output end and the input end of the key unit are respectively connected with the GPIO port of the control unit, no loop in the key detection circuit can consume electric quantity under the condition that the key is not pressed, and when the key is pressed, different loops are formed by using the pressed key, so that the change of the resistance value of the circuit is caused, and the change of the voltage detected by the voltage detection point in the circuit is caused, so that the pressed key is determined. Therefore, the power consumption of the key detection circuit is reduced, and the endurance time of the battery is prolonged.
Moreover, in the prior art, the power supply voltage is used as a reference voltage to determine the pressed key, and since the battery voltage may change after a certain period of use, the reference voltage is used to calculate which key may have an error when being pressed, for example, in the case that the key 1 is pressed, and the calculated result is the pressed key 2. In the embodiment of the disclosure, when determining the pressed key, the first voltage value (reference voltage) is detected in real time, that is, the accuracy of determining the pressed key is higher. Therefore, the technical problem that the key to be pressed is determined to be different from the key to be actually pressed caused by using the power supply voltage as the reference voltage is avoided in the technical scheme of the embodiment of the disclosure.
In one possible implementation manner, when the key detection circuit is initialized, the first general input/output interface may be set as an output interface to output a first voltage, the second general input/output interface is set as an input interface (the level of the input interface is high under the influence of the first voltage), and the level change of the second general input/output interface triggers an interrupt; the triggering interrupt may refer to that the control unit responds to the level change of the second general input/output interface, and executes an interrupt processing procedure corresponding to the level change. Wherein the interface states of the first universal input output interface and the second universal input output interface can be set in a programmed manner. The present disclosure is not limited to a specific manner of setting the state of the interface. When the setting is initialized, each key is in a non-pressed state, and the control unit can be in a dormant state. The initialization setting may be entered upon power-up of the key detection circuit or after all keys are released.
In one possible implementation manner, when the key detection circuit is initialized, the GPIO-1 interface is set as an output interface, and a first voltage is output, where the first voltage may be 1.8V or 3.3V, and the first voltage may be set according to a power supply voltage, for example, 1V less than the power supply voltage; and setting the GPIO-2 interface as an input interface, wherein the GPIO-2 interface is in a high level, and the level change of the GPIO-2 interface can trigger an interrupt. The triggering interrupt may be the control unit executing an interrupt handler corresponding to a level change in response to the level change of the GPIO-2 interface.
Therefore, when the key detection circuit is initialized, the states of the GPIO-1 interface and the GPIO-2 interface are set when no key is pressed, and the second general-purpose input/output interface is set to be in a high-resistance state, so that no sustainable current loss exists in a circuit formed by the voltage dividing resistor, namely the power consumption of the key detection circuit is reduced.
In one possible implementation manner, the level change of the second general purpose input/output interface triggers an interrupt, which may include: when any key switch is pressed, the second general input/output interface is changed from high level to low level, and the control unit responds to the second general input/output interface which is changed from high level to low level, and executes a first interrupt processing program; the first interrupt handler includes a handler for waking up the control unit in a sleep state. Wherein, the first interrupt handler may be a GPIO-2 interface level change preset in the control unit corresponding to the interrupt handler.
In one possible implementation, in the event that a key is pressed, the pressed key is directly grounded, and the GPIO-2 interface changes from a high level to a low level. The level change of the GPIO-2 interface triggers an interrupt, i.e. the control unit executes a first interrupt handler corresponding to the level change according to the level change of the GPIO-2 interface, which may include a handler for waking up the control unit in the sleep state. And under the condition that the control unit is awakened, the ADC-1 interface detects a first voltage value U1 of a first detection point, and the ADC-2 interface detects a second voltage value of a second detection point. The control unit may determine the position of the pressed key switch according to the first and second voltage values U1 and U2 and the resistance values of the plurality of resistors.
In this way, the key detection circuit triggers the perception of the key through the level change of the GPIO-2 interface, and drives the ADC-1 interface and the ADC-2 interface to detect the voltage. Compared with the related art in which the ADC continuously performs voltage detection on the voltage sampling point in the voltage dividing circuit, in the embodiment of the disclosure, the wake-up of the control unit is triggered when the key is pressed, and the voltage detection on the voltage detection point is performed after the control unit is awakened. When no key is pressed, the ADC in the control unit is not triggered to execute the processing program of key detection. In this way, the loss of power due to continuous ADC detection is largely avoided.
In one possible implementation, the first interrupt handler may further include a handler for triggering the ADC-1 interface to detect the first voltage value U1 of the first detection point and triggering the ADC-2 interface to detect the second voltage value U2 of the second detection point.
In one possible implementation, the first interrupt processing procedure may further include a processing procedure for determining a position of the pressed key switch according to the first voltage value U1 and the second voltage value U2 and the resistance values of the plurality of resistors.
By setting the processing procedure of ADC voltage detection or the processing procedure for calculating which key is pressed in the first interrupt processing procedure, the first interrupt processing procedure is triggered when the key is pressed, namely the ADC voltage detection point is processed in the first interrupt processing procedure to detect the voltage and/or calculate which key is pressed when the key is pressed. In this way, the voltage detection of the ADC and/or calculation of which key is pressed are processed in the interrupt processing program, so that when the control unit senses the triggering condition of the pressed key, the voltage detection and/or determination of the key is processed in the interrupt processing program corresponding to the triggering condition, and the efficiency of sensing the pressed key can be improved.
In one possible implementation manner, the level change of the second general purpose input/output interface triggers an interrupt, and the method may further include: when the key is released, the level at the second general input/output interface is changed from low level to high level; the control unit responds to the second general input/output interface changing from low level to high level and executes a second interrupt processing program; the second interrupt handler is to restore the control unit to a sleep state. In the sleep state, the key detection circuit can resume the initialization setting, namely, the first general input/output interface is set as an output interface, the first voltage is output, and the second general input/output interface is set as an input interface, so that the control unit is awakened when the next key is pressed.
Taking the key detection circuit in fig. 2 as an example, when the key K2 is released, the loop between the first general purpose input/output interface GPIO-1 and the ground is broken, at this time, the level of the second general purpose input/output interface GPIO-2 changes from the original low level to the high level, and the control unit executes an interrupt processing procedure corresponding to the level change in response to the change of the second general purpose input/output interface GPIO-2 from the low level to the high level, for example, the control unit resumes to the sleep state.
Therefore, after the key is released, the control unit is restored to the dormant state according to the triggering of the level change of the second general purpose input/output interface GPIO-2, so that the control unit enters the dormant state under the condition that no key is pressed down, and the power consumption of the control unit is reduced.
In one possible implementation, the control unit may be further configured to: after determining the position of the pressed key switch, judging whether the key switch is released within a first preset time period, if not, executing the following steps in a circulating way until the key switch is released:
setting the first general input/output interface as an input interface;
judging whether the key switch is released before the first general input/output interface is set as an input interface in a second preset time period;
if not, setting the first general input/output interface as an output interface after the second preset time length is reached, and setting the first general input/output interface as a high level.
Since the above steps are performed when the key switch is not released for a time longer than the first preset time period, it is avoided that the key is pressed for a long time to cause continuous current loss in the circuit. Therefore, the above steps may also be referred to as a leakage protection process.
In one possible implementation, determining whether the key switch is released includes: and if the control unit detects that the level of the second general input/output interface is changed from low level to high level, judging that the key switch is released.
Fig. 3 illustrates a leakage detection and leakage protection flowchart according to an embodiment of the present disclosure.
In one possible implementation manner, the first preset duration may be set according to actual needs, as shown in fig. 3, and the first duration may be 5 seconds. For example, after determining the position of the pressed key switch, a timer is started for 5 seconds, whether the key is released is determined according to the level change of the second general input/output interface within 5 seconds, if the control unit detects that the level of the second general input/output interface is changed from low level to high level within 5 seconds of the timer, the control unit determines that the key switch is released, closes the timer, and ends the flow.
For example, the control unit may also be configured to: when the position of the pressed key switch is determined to be K3, the process shown in fig. 3 is started, a timer for 5 seconds is started, and whether the key switch K3 is released within 5 seconds is judged. When the timer times out, i.e. after more than 5 seconds, the key switch is still not released (the first general input/output interface is grounded through the key switch K3, and there is a continuous current loss), the following steps (leakage protection process) are circularly executed until the key switch K3 is released:
Setting the first general purpose input/output interface (GPIO-1) as an input interface, and starting a timer with the duration of 1 second;
judging whether the key switch is released before the first general input/output interface is set as an input interface within 1 second after a timer is started; if yes, closing a timer, and ending the flow;
If not, the first general purpose input output interface (GPIO-1) is set as an output interface after 1 second and is set to a high level.
By setting the first general input/output interface as an input interface, the first voltage is not output because the first general input/output interface is no longer an output interface, and no current is generated in a path connected with the ground through the pressed key switch. By using the first general input/output interface as the input interface within the preset duration of 1 second of the timer, the current loss can not be continuously caused even if a certain key switch is not released, and the continuous electric leakage caused by the fact that the key is not released is avoided.
Since the first general input-output interface is set as the input interface, the level of the second general input-output interface does not become high even if the key switch is released, i.e., if the key switch is released within 1 second as described above, the control unit cannot detect the level change of the second general input-output interface.
In order to avoid the situation that the control unit cannot detect the level change of the second general input/output interface after the key switch is released, the first general input/output interface is set as an output interface and is set to a high level after the timer exceeds 1 second.
Thus, if the key switch has been released, the level of the second general input output interface changes from low level to high level at the instant when the first general input output interface is set as the output interface and is set to high level, and the control unit detects that the level of the second general input output interface changes from low level to high level. The following steps are performed again: setting the first general input/output interface as an input interface, and starting a timer with the duration of 1 second; and judging whether the key switch is released before the first general input-output interface is set as an input interface within 1 second after a timer is started. Since the control unit has detected that the key has been released before the first general input-output interface is set as the input interface, the result of the judgment is that the key is released, and the whole leakage protection flow is ended. At this time, since the key is released and the flow of the leakage protection is ended, the key detection circuit will resume the initialization setting.
If the control unit does not detect that the key is released after the first general input/output interface is set as the output interface and is set to the high level, the above-mentioned leakage protection process is continuously executed until the key is released.
Therefore, under the condition that the key is pressed for a long time or triggered by the heavy pressure of the foreign matters, the current loss formed by the key circuit can be avoided through the leakage protection flow, and the electric energy loss under the condition of leakage is reduced.
A terminal device comprising the key detection circuit. The terminal equipment has a key function. For example, the terminal device may be a remote control, a mobile phone with keys, etc.
In one possible implementation, as shown in fig. 2, a resistor R14 is connected between the GPIO-2 interface and the second detection point, so that when the key switch K12 is pressed, an abnormality that the ADC-2 interface is directly grounded is avoided.
In this way, the key detection circuit disclosed by the invention is characterized in that the output end and the input end of the key unit are respectively connected with the GPIO port of the control unit, no loop in the key detection circuit can consume electric quantity under the condition that the key is not pressed, and when the key is pressed, different loops are formed by using the pressed key, so that the change of the resistance value of the circuit is caused, the change of the voltage detected by the voltage detection point in the circuit is caused, and the pressed key is determined. Therefore, the power consumption of the key detection circuit is reduced, and the endurance time of the battery is prolonged.
The foregoing description of the embodiments of the present disclosure has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the various embodiments described. The terminology used herein was chosen in order to best explain the principles of the embodiments, the practical application, or the technical improvement of the technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
Claims (9)
1. A key detection circuit, which is characterized by comprising a control unit and a key unit; wherein the control unit comprises a first general purpose input output interface (GPIO-1), a second general purpose input output interface (GPIO-2), a first analog-to-digital converter interface (ADC-1) and a second analog-to-digital converter interface (ADC-2);
The key unit comprises a plurality of resistors connected in series between the first general input/output interface and the second general input/output interface, and the adjacent resistors are grounded through a key switch;
The first analog-to-digital converter interface is used for detecting a first voltage value of a first detection point; the first detection point is the first general input/output interface, and the first voltage value is obtained through real-time detection;
the second analog-to-digital converter interface is used for detecting a second voltage value of a second detection point; the second detection point is positioned between two resistors closest to the first general input/output interface;
The control unit is used for determining the position of the pressed key switch according to the first voltage value, the second voltage value and the resistance values of the plurality of resistors, and the corresponding relation between the ratio of the second voltage value to the first voltage value and the key switch is preset in the control unit;
Wherein determining the position of the pressed key switch according to the first voltage value, the second voltage value and the resistance values of the plurality of resistors comprises: and under the condition that the plurality of resistors have the same resistance value, calculating the current ratio of the second voltage value to the first voltage value, and determining the position of the pressed key switch according to the corresponding relation between the current ratio and the first voltage value.
2. The key detection circuit of claim 1, wherein,
When the key detection circuit is initialized, the first general input/output interface is set as an output interface to output a first voltage, the second general input/output interface is set as an input interface, and the level change of the second general input/output interface triggers interruption;
the control unit responds to the level change of the second general input/output interface to execute an interrupt processing program corresponding to the level change.
3. The key detection circuit of claim 2, wherein a change in level of the second universal input output interface triggers an interrupt, comprising:
When any key switch is pressed, the second general input/output interface is changed from high level to low level, and the control unit responds to the second general input/output interface which is changed from high level to low level, and executes a first interrupt processing program;
the first interrupt handler includes a handler for waking up the control unit in a sleep state.
4. The key detection circuit of claim 3, wherein the first interrupt handler further comprises: and the processing program is used for triggering the first analog-to-digital converter interface to detect the first voltage value of the first detection point and triggering the second analog-to-digital converter interface to detect the second voltage value of the second detection point.
5. The key detection circuit of claim 3, wherein the first interrupt handler further comprises: and determining the position of the pressed key switch according to the first voltage value, the second voltage value and the resistance values of the resistors.
6. The key detection circuit of claim 2, wherein a change in level of the second universal input output interface triggers an interrupt, comprising:
when the key is released, the level at the second general input/output interface is changed from low level to high level;
The control unit responds to the second general input/output interface changing from low level to high level and executes a second interrupt processing program;
The second interrupt handler is to restore the control unit to a sleep state.
7. The key detection circuit according to any one of claims 1 to 6, wherein the control unit is configured to:
After determining the position of the pressed key switch, judging whether the key switch is released within a first preset time period, if not, executing the following steps in a circulating way until the key switch is released:
setting the first general input/output interface as an input interface;
Judging whether the key switch is released before the first general input/output interface is set as an input interface in a second preset time period;
if not, setting the first general input/output interface as an output interface after the second preset time length is reached, and setting the first general input/output interface as a high level.
8. The key detection circuit of claim 7, wherein determining whether the key switch is released comprises:
And if the control unit detects that the level of the second general input/output interface is changed from low level to high level, judging that the key switch is released.
9. A terminal device, characterized in that the terminal device comprises a key detection circuit as claimed in any one of claims 1-8.
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Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000137567A (en) * | 1998-10-29 | 2000-05-16 | Kenwood Corp | Key switch circuit |
| CN101272149A (en) * | 2007-12-27 | 2008-09-24 | Tcl通力电子（惠州）有限公司 | Key scanning circuit |
| CN101605387A (en) * | 2009-07-13 | 2009-12-16 | 中兴通讯股份有限公司 | A kind of power supply control apparatus and method |
| CN201656956U (en) * | 2010-02-01 | 2010-11-24 | 广东欧珀电子工业有限公司 | A/D type key circuit |
| CN101943742A (en) * | 2010-07-23 | 2011-01-12 | 美的集团有限公司 | Key detection and display driving integrated circuit and control method thereof |
| CN202471792U (en) * | 2012-01-19 | 2012-10-03 | 无锡爱森思电气科技有限公司 | Multifunctional digital electric power instrument employing lowcost keyboard |
| CN103345306A (en) * | 2013-06-30 | 2013-10-09 | 惠州市德赛西威汽车电子有限公司 | Keyboard circuit and key combination identifying method |
| CN204334042U (en) * | 2014-12-28 | 2015-05-13 | 湖南森泰能源科技股份有限公司 | Device for managing and controlling electrical source |
| CN107340872A (en) * | 2016-04-29 | 2017-11-10 | 技嘉科技股份有限公司 | Key system and control method thereof |
| WO2018086368A1 (en) * | 2016-11-11 | 2018-05-17 | 中兴通讯股份有限公司 | Method for connecting key device, and mobile terminal |
| CN216649668U (en) * | 2022-01-04 | 2022-05-31 | 浙江启扬智能科技有限公司 | Multi-key control circuit based on GPIO and ADC |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100971580B1 (en) * | 2008-05-13 | 2010-07-20 | 주식회사 포인칩스 | Switching matrix key input device |
| JP2013123209A (en) * | 2011-11-10 | 2013-06-20 | Funai Electric Co Ltd | Electronic apparatus and display device |
-
2021
- 2021-06-18 CN CN202110680402.0A patent/CN113433406B/en active Active
Patent Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000137567A (en) * | 1998-10-29 | 2000-05-16 | Kenwood Corp | Key switch circuit |
| CN101272149A (en) * | 2007-12-27 | 2008-09-24 | Tcl通力电子（惠州）有限公司 | Key scanning circuit |
| CN101605387A (en) * | 2009-07-13 | 2009-12-16 | 中兴通讯股份有限公司 | A kind of power supply control apparatus and method |
| CN201656956U (en) * | 2010-02-01 | 2010-11-24 | 广东欧珀电子工业有限公司 | A/D type key circuit |
| CN101943742A (en) * | 2010-07-23 | 2011-01-12 | 美的集团有限公司 | Key detection and display driving integrated circuit and control method thereof |
| CN202471792U (en) * | 2012-01-19 | 2012-10-03 | 无锡爱森思电气科技有限公司 | Multifunctional digital electric power instrument employing lowcost keyboard |
| CN103345306A (en) * | 2013-06-30 | 2013-10-09 | 惠州市德赛西威汽车电子有限公司 | Keyboard circuit and key combination identifying method |
| CN204334042U (en) * | 2014-12-28 | 2015-05-13 | 湖南森泰能源科技股份有限公司 | Device for managing and controlling electrical source |
| CN107340872A (en) * | 2016-04-29 | 2017-11-10 | 技嘉科技股份有限公司 | Key system and control method thereof |
| WO2018086368A1 (en) * | 2016-11-11 | 2018-05-17 | 中兴通讯股份有限公司 | Method for connecting key device, and mobile terminal |
| CN216649668U (en) * | 2022-01-04 | 2022-05-31 | 浙江启扬智能科技有限公司 | Multi-key control circuit based on GPIO and ADC |
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