CN113421892B - Display panel, manufacturing method and display device thereof - Google Patents

Abstract

The embodiment of the application discloses a display panel, a manufacturing method thereof and a display device, wherein the display panel comprises: the LED display device comprises an array substrate, a plurality of LEDs, a plurality of first bridging structures and a plurality of second bridging structures, wherein the first bridging structures comprise a first bridging region and a second bridging region, the second bridging region is not overlapped with the LEDs in the direction perpendicular to the plane of the array substrate, the second bridging structures are electrically connected with the array substrate, and the second bridging structures and electrodes of the LEDs are positioned on the same side of the first bridging structures in the direction perpendicular to the plane of the array substrate; and the electrode of the LED is electrically connected with the first bridging region of the first bridging structure, and the second bridging structure is electrically connected with the second bridging region of the first bridging structure, so that the electrode of the LED is electrically connected with the array substrate through the first bridging structure and the second bridging structure in sequence, and the stability of the display panel is improved.

Description

Display panel, manufacturing method and display device thereof

Technical field

The present application relates to the field of display technology, and in particular, to a display panel and a manufacturing method thereof, as well as a display device including the display panel.

Background technique

With the development of display technology, display panels have become more and more widely used and have gradually been applied to various fields of people's work and life, bringing great convenience to people's work and life. Among them, Micro LED display panels use self-luminous micron-level LEDs as light-emitting pixel units, which are assembled on a drive panel to form a high-density LED array. In terms of display, compared with LCD and OLED, they have better brightness and resolution. It has greater advantages in terms of rate, contrast, energy consumption, service life, response speed and thermal stability. However, during the production process of existing Micro LED display panels, a massive transfer bonding process is used to transfer Micro LEDs. The massive transfer bonding process involves a pressure and heating process, which causes damage to both Micro LEDs and backplanes, resulting in Reliability issues of Micro LED display panels.

Contents of the invention

In order to solve the above technical problems, embodiments of the present application provide a display panel to improve the reliability of the display panel.

In order to solve the above problems, the embodiments of this application provide the following technical solutions:

A display panel including:

Array substrate;

A plurality of LEDs, the plurality of LEDs are located on the first side of the array substrate, the LEDs include a light-emitting layer and an electrode located on a side of the light-emitting layer close to the array substrate;

A plurality of first bridge structures. The first bridge structure includes a first bridge area and a second bridge area. In a direction perpendicular to the plane of the array substrate, the second bridge area does not overlap with the LED. ;

A plurality of second bridge structures. The second bridge structures are electrically connected to the array substrate. In a direction perpendicular to the plane of the array substrate, the second bridge structures and the electrodes of the LED are located on the third One bridges the same side of the structure;

Wherein, the electrode of the LED is electrically connected to the first bridge area of the first bridge structure, and the second bridge structure is electrically connected to the second bridge area of the first bridge structure.

A method of making a display panel, including:

A first substrate is provided, a plurality of LEDs are formed on a first side of the first substrate, the LEDs include a light-emitting layer and an electrode located on a side of the light-emitting layer facing away from the first substrate;

A plurality of first bridge structures are formed on a side of the plurality of LEDs facing away from the first substrate. The first bridge structures include a first bridge area and a second bridge area. In the direction, the second bridge area does not overlap with the LED, and the LED electrode is electrically connected to the first bridge area of the first bridge structure;

The plurality of LEDs and the plurality of first bridge structures are transferred to the array substrate, and the first substrate is removed. The electrodes of the LEDs are located on the side of the light-emitting layer close to the array substrate, and the The first bridge structure is located between the electrodes of the LED and the array substrate;

A second bridge structure is formed on a side of the first bridge structure away from the array substrate. The second bridge structure is electrically connected to the second bridge area of the first bridge structure, and the second bridge structure passes through The via hole is electrically connected to the array substrate.

A display device includes the above display panel.

Compared with the existing technology, the above technical solution has the following advantages:

In the technical solution provided by the embodiment of the present application, the electrode of the LED is electrically connected to the first bridge area of the first bridge structure, and the second bridge structure is electrically connected to the second bridge area of the first bridge structure. connection, and the second bridge structure is electrically connected to the array substrate, so that the electrodes of the LED are electrically connected to the array substrate through the first bridge structure and the second bridge structure in turn, without using The mass transfer bonding process avoids the accumulation of stress inside the display panel due to the introduction of the mass transfer bonding process, improves the stability of the display panel, and thereby improves the yield of the display panel.

Description of drawings

In order to explain the embodiments of the present application or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings in the following description are only These are some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without exerting creative efforts.

Figure 1 is a schematic structural diagram of a display panel provided by an embodiment of the present application;

Figure 2 is a schematic structural diagram of the LED in the display panel provided in Figure 1;

Figure 3 is a schematic structural diagram of a display panel provided by another embodiment of the present application;

Figure 4 is a schematic structural diagram of a display panel provided by another embodiment of the present application;

Figure 5 is a schematic diagram of the arrangement of the first bridge area and the second bridge area of the first bridge structure in the display panel provided by an embodiment of the present application;

Figure 6 is another schematic diagram of the arrangement of the first bridge area and the second bridge area of the first bridge structure in the display panel provided by an embodiment of the present application;

Figure 7 is another structural schematic diagram of the LED in the display panel provided in Figure 1;

Figure 8 is another structural schematic diagram of the LED in the display panel provided in Figure 1;

Figure 9 is a schematic structural diagram of a display panel provided by another embodiment of the present application;

Figure 10 is a schematic diagram of a display device provided by an embodiment of the present application;

Figure 11 is a flow chart of a method for manufacturing a display panel according to an embodiment of the present application;

12 to 24 are partial structural cross-sectional views after completion of each process step in the manufacturing method of a display panel provided by an embodiment of the present application.

Detailed ways

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of this application.

Many specific details are set forth in the following description to fully understand the present application. However, the present application can also be implemented in other ways different from those described here. Those skilled in the art can do so without violating the connotation of the present application. Similar generalizations are made, and therefore the present application is not limited to the specific embodiments disclosed below.

As mentioned in the background technology section, existing Micro LED display panels use a mass transfer bonding process to transfer Micro LEDs during the production process. The mass transfer bonding process involves a pressure and heating process, which affects both the Micro LED and the backplane. There is damage, causing reliability problems of Micro LED display panels.

The inventor's research found that this is due to the fact that in the process of assembling self-luminous micron-sized LEDs onto the driving panel in existing Micro LED display panels, the LEDs are usually directly fixed on the driving panel through a mass transfer bonding process. , and in the mass transfer bonding process, the contact area between the LED and the driving panel needs to be heated and pressurized, so that there is more stress accumulation in the completed Micro LED display panel, which has a negative impact on the Micro LED and display panel. The backplanes are damaged, affecting the reliability of the Micro LED display panel.

In view of this, an embodiment of the present application provides a display panel, as shown in Figure 1. The display panel includes:

Array substrate 10;

A plurality of LEDs 20 are located on the first side of the array substrate 10. As shown in FIG. 2, the LEDs include a luminescent layer 21 and an electrode 22 located on the side of the luminescent layer 21 facing the array substrate 10. ;

A plurality of first bridge structures 30. The first bridge structures 30 include a first bridge area 301 and a second bridge area 302. In a direction perpendicular to the plane of the array substrate 10, the second bridge area 302 and The LEDs 20 do not overlap;

A plurality of second bridge structures 40 are electrically connected to the array substrate 10 . In a direction perpendicular to the plane of the array substrate 10 , the second bridge structures 40 and the LED 20 are The electrode 22 is located on the same side of the first bridge structure 30;

The electrode 22 of the LED 20 is electrically connected to the first bridge area 301 of the first bridge structure 30 , and the second bridge structure 40 is electrically connected to the second bridge area 302 of the first bridge structure 30 .

Optionally, based on the above embodiment, in one embodiment of the present application, the second bridge structure is electrically connected to the array substrate through a via hole.

Specifically, in one embodiment of the application, the LED is a Micro LED or a Mini LED, but this application does not limit this, and it depends on the situation.

Optionally, as shown in FIG. 2 , the LED 20 further includes an intrinsic semiconductor layer 24 located on the side of the light-emitting layer 21 away from the electrode 22 , where the intrinsic semiconductor layer includes a buffer layer, a low-temperature semiconductor layer and a high-temperature semiconductor layer, wherein the surface of the buffer layer facing away from the light-emitting layer has protrusions to improve the light extraction efficiency of the LED, and the high-temperature semiconductor layer is used to improve the flatness of the formation plane of the light-emitting layer. , the low-temperature semiconductor layer is a transition layer between the buffer layer and the high-temperature semiconductor layer. In other embodiments of the present application, the LED may also include other structures, which is not limited by this application. It depends on the situation.

In the display panel provided by the embodiment of the present application, the electrode of the LED is electrically connected to the first bridge area of the first bridge structure, and the second bridge structure is electrically connected to the second bridge area of the first bridge structure. connection, and the second bridge structure is electrically connected to the array substrate, so that the electrodes of the LED are electrically connected to the array substrate through the first bridge structure and the second bridge structure in turn, without using The mass transfer bonding process avoids the accumulation of stress inside the display panel due to the introduction of the mass transfer bonding process, improves the stability of the display panel, and thereby improves the yield of the display panel.

Specifically, based on the above embodiments, in one embodiment of the present application, as shown in FIG. 1 , the first bridge structure 30 includes a first bridge electrode 31 and a second bridge electrode 32 . A bridge area includes a first bridge area of the first bridge electrode 31 and a first bridge area of the second bridge electrode 32. The second bridge area includes a second bridge area of the first bridge electrode 31 and The second bridging area of the second bridging electrode 32; in this embodiment, the electrodes of the LED include an N electrode and a P electrode, and the first bridging area of the first bridging electrode 31 is connected to the N electrode of the LED. Electrically connected, the first bridge area of the second bridge electrode 32 is electrically connected to the P electrode of the LED; the second bridge structure 40 includes a third bridge electrode 41 and a fourth bridge electrode 42, the third bridge electrode The electrode 41 is electrically connected to the second area of the first bridge electrode 31, and the fourth bridge electrode 42 is electrically connected to the second bridge area of the second bridge electrode 32, so that the N electrodes of the LED pass through in sequence. The first bridge area of the first bridge electrode 31, the second bridge area of the first bridge electrode 31, and the third bridge electrode 41 of the second bridge structure 40 are electrically connected to the array substrate 10, and the The P electrode of the LED passes through the first bridge area of the second bridge electrode 32 , the second bridge area of the second bridge electrode 32 , the fourth bridge electrode 42 of the second bridge structure 40 and the array substrate in sequence. 10 electrical connections.

Based on any of the above embodiments, in one embodiment of the present application, as shown in Figures 1 and 2, in the direction X perpendicular to the plane where the array substrate is located, the first bridge structure 30 At least partially overlaps with the LED electrode 22 to ensure that the first bridge structure 30 can be electrically connected to at least part of the side surface of the LED electrode 22 facing the array substrate 10, and is parallel to the In the direction Y of the plane of the array substrate, the first bridge structure 30 at least partially overlaps the LED electrode 22, so that the first bridge structure 30 can be electrically connected to at least part of the side surface of the LED electrode 22. connection, so that the first bridge structure 30 can be electrically connected to the bottom surface and the side surface of the LED electrode 22 at the same time, thereby increasing the electrical connection area of the first bridge structure 30 and the LED electrode 22, and improving the The electrical connection performance between the first bridge structure 30 and the LED electrode 22.

It should be noted that in this embodiment of the present application, the electrical connection between the first bridge structure and at least part of the side surface of the LED electrode facing the array substrate may be the electrical connection between the first bridge structure and the LED. The electrodes are in direct contact with at least part of the surface of one side of the array substrate, or the first bridge structure and at least part of the surface of the LED electrode facing the array substrate are electrically connected through a conductive layer. There is no limit to this and it depends on the circumstances.

Specifically, in one embodiment of the present application, as shown in Figures 1 and 2, the first bridge structure 30 includes a first bridge electrode 31 and a second bridge electrode 32, and the electrodes of the LED include LED The N electrode 221 and the P electrode 222 of the LED. In this embodiment, the electrical connection area between the first bridge electrode 31 and the N electrode 221 of the LED includes the surface of the N electrode 221 facing the array substrate 10 At least part of the area and at least part of the side of the N electrode 221, thereby increasing the electrical connection area between the first bridge electrode 31 and the N electrode 221 of the LED, thereby increasing the area between the first bridge electrode 31 and the N electrode 221. The electrical connection performance of the N pole 221 of the LED; similarly, the electrical connection area between the second bridge electrode 31 and the P electrode 222 of the LED includes at least part of the surface of the P electrode 222 facing the array substrate 10 area and at least part of the side of the P electrode 222, thereby increasing the electrical connection area between the second bridge electrode 32 and the P electrode 222 of the LED, thereby improving the electrical connection area between the second bridge electrode 32 and the LED. The electrical connection performance of P electrode 222. However, the present application does not limit this. In other embodiments of the present application, as shown in FIG. 3 , the electrical connection area between the first bridge electrode 31 and the N electrode 221 of the LED may only include the N electrode 221 . The electrode 221 faces at least part of the surface of one side of the array substrate 10 . The electrical connection area between the second bridge electrode 32 and the P electrode 222 of the LED may only include the P electrode 222 facing the array substrate 10 . At least part of the side surface, as the case may be.

Optionally, based on the above embodiment, in one embodiment of the present application, the first bridge electrode is in direct contact with the bottom and side surfaces of the N electrode of the LED to further enhance the first bridge electrode. The electrical connection performance between the electrode and the N electrode of the LED, and the second bridge electrode is in direct contact with the bottom and side surfaces of the P electrode of the LED to further enhance the second bridge electrode and the P electrode of the LED. electrical connection performance, but this application does not limit this. In other embodiments of the application, the first bridge electrode can also be electrically connected to the bottom and side surfaces of the N electrode of the LED through a conductive layer, so The second bridge electrode is also electrically connected to the bottom and side surfaces of the P electrode of the LED through a conductive layer, depending on the situation.

Based on any of the above embodiments, in one embodiment of the present application, the light-emitting layer of the LED includes a stacked N-type semiconductor layer, a quantum well layer and a P-type semiconductor layer, wherein the quantum well layer and The stacked structure formed by the P-type semiconductor layer exposes part of the surface of the N-type semiconductor layer, the P electrode of the LED is electrically connected to the P-type semiconductor layer, and the N electrode of the LED is electrically connected to the N-type semiconductor layer. connect.

Optionally, based on the above embodiment, in one embodiment of the present application, the surface of the P electrode facing the array substrate is flush with the surface of the N electrode facing the array substrate, so that The electrical connection between the electrode of the LED and the first bridge structure. It should be noted that, in this embodiment, since the P-type semiconductor layer is located on the side of the N-type semiconductor layer facing the array substrate, when the P electrode faces the array substrate side surface and the When the surface of the N electrode facing the array substrate is flush, the thickness of the N electrode is greater than the thickness of the P electrode. Correspondingly, the side area of the N electrode is greater than the side area of the P electrode.

It can be seen from the above that in this embodiment, the electrical connection area between the first bridge electrode and the N electrode not only includes the surface of the N electrode facing the array substrate, but also includes the side surface of the N electrode, so The thickness of the N electrode is larger, and accordingly, the side area of the N electrode is larger, and the area on the side of the N electrode that can be used to electrically connect with the first bridge electrode is larger; similarly, the second bridge electrode has a larger thickness. The electrical connection area between the bridge electrode and the P electrode not only includes the side surface of the P electrode facing the array substrate, but also includes the side surface of the P electrode. The thickness of the P electrode is small. Correspondingly, the P electrode The side surface of the electrode is smaller, and the side surface of the P electrode is smaller for electrical connection with the second bridge electrode.

Therefore, based on the above embodiments, in one embodiment of the present application, as shown in FIG. 4 , in the direction X perpendicular to the plane where the array substrate 10 is located, the first bridge structure 30 and the The overlapping area of the N electrode 221 of the LED is smaller than the overlapping area of the first bridge structure 30 and the P electrode 222 of the LED, so that the distance between the N electrode 221 and the P electrode 222 in the LED is constant. In this case, by reducing the overlapping area of the first bridge structure 30 and the N electrode 221 of the LED in the direction X perpendicular to the plane of the array substrate 10 , that is, by reducing the area perpendicular to the array. In the direction The distance between the second bridge electrode 32 electrically connected to the P electrode 222 of the LED, thereby reducing the probability of short circuit between the first bridge electrode 31 and the second bridge electrode 32, thereby reducing the N of the LED. The probability of a short circuit between the electrode 221 and the P electrode 222 of the LED.

Based on the above embodiments, in one embodiment of the present application, as shown in FIG. 4 , in the direction Y parallel to the plane where the array substrate 10 is located, the first bridge structure 30 and the LED The overlapping area of the N electrode 221 is greater than the overlapping area of the first bridge structure 30 and the P electrode 222 of the LED, that is, in the direction Y parallel to the plane of the array substrate 10, the first bridge The overlapping area of the electrode 31 and the N electrode 221 of the LED is larger than the overlapping area of the second bridge electrode 32 and the P electrode 222 of the LED, so that the first bridge electrode 31 and the N electrode 222 of the LED The electrical connection area on the side of the electrode 221 is larger than the electrical connection area on the side of the second bridge electrode 32 and the P electrode 222 of the LED, so that by reducing the area in the direction X perpendicular to the plane of the array substrate 10 , the overlapping area of the first bridge structure 30 and the N electrode 221 of the LED increases the probability of short circuit between the N electrode 221 of the LED and the P electrode 222 of the LED. The electrical connection area between the first bridge electrode 31 and the N electrode 221 of the LED improves the electrical connection performance between the first bridge electrode 31 and the N electrode 221 of the LED, but this application does not limit this. Specifically Subject to availability.

Specifically, based on any of the above embodiments, in one embodiment of the present application, in order to ensure the electrical connection performance between the first bridge electrode and the N electrode, the bottom surface of the N electrode (i.e., the N electrode The width W1 of the electrical connection area (surface of the electrode facing the array substrate) and the first bridge electrode satisfies the following relationship:

W1≥∣σ _A ∣+∣σ _B ∣+∣σ _C ∣+Dcontact1;

Wherein, σ _A represents the process error in the direction parallel to the plane of the array substrate during the production of the LED electrode; σ _B represents the process error in the direction parallel to the plane of the array substrate during the production of the first bridge structure; σ _C represents the alignment tolerance between the LED and the first bridge structure;

Dcontact1 represents the minimum width for electrical connection between the N electrode and the first bridge structure.

Similarly, in order to ensure the electrical connection performance between the second bridge electrode and the P electrode, the electrical connection between the bottom surface of the P electrode (that is, the surface of the P electrode facing the array substrate) and the second bridge electrode is The width W2 of the connection area satisfies the following relationship:

W2≥∣σ _A ∣+∣σ _B ∣+∣σ _C ∣+Dcontact2;

Wherein, σ _A represents the process error in the direction parallel to the plane of the array substrate during the production of the LED electrode; σ _B represents the process error in the direction parallel to the plane of the array substrate during the production of the first bridge structure; σ _C represents the alignment tolerance between the LED and the first bridge structure;

Dcontact2 represents the minimum width for electrical connection between the P electrode and the first bridge structure.

Based on any of the above embodiments, in one embodiment of the present application, in order to ensure the electrical insulation between the P electrode and the N electrode in the LED, the distance between the P electrode and the N electrode in the LED is The width d satisfies the following relationship:

d≥∣σ _A ∣+∣σ _B ∣+∣σ _C ∣+Dins;

Wherein, σ _A represents the process error in the direction parallel to the plane of the array substrate during the production of the LED electrode; σ _B represents the process error in the direction parallel to the plane of the array substrate during the production of the first bridge structure; σ _C represents the alignment tolerance between the LED and the first bridge structure; Dins represents the minimum width when insulating between the first bridge electrode and the P electrode in the LED, or the second bridge electrode and the N Minimum width when insulating between electrodes.

Based on any of the above embodiments, in one embodiment of the present application, as shown in FIG. 4 , the display panel further includes: a planarization layer 50 located on the plurality of LEDs 20 There are a plurality of first grooves and a plurality of second grooves in the planarization layer 50 between the array substrate 10 and the first bridge electrode 31 located in the first grooves. The two bridge electrodes 32 are located in the second groove to accommodate the first bridge structure 30 in the planarization layer 50, but this application does not limit this, and it depends on the situation.

Based on any of the above embodiments, in one embodiment of the present application, as shown in FIG. 5 , the first bridging area 301 and the second bridging area 302 of the first bridging structure 30 are arranged along the first direction C. cloth, the first direction C is parallel to the plane where the array substrate 10 is located, and the first direction C is parallel to the direction of the P electrode 222 to the N electrode 221 of the LED, so as to reduce the position of the first bridge structure 30 The size in the second direction D facilitates the display panel to provide more LEDs in the second direction D and increases the pixel points of the display panel in the second direction D. Wherein, the second direction is parallel to the plane of the array substrate and intersects with the first direction. Optionally, the second direction is perpendicular to the first direction, but this application does not limit this, and it depends on the situation.

In another embodiment of the present application, as shown in FIG. 6 , the first bridging area 301 and the second bridging area 302 of the first bridging structure 30 are arranged along the second direction D, wherein the first direction C and the second direction D are parallel to the plane of the array substrate 10 . The first direction C is parallel to the direction of the P electrode 222 to the N electrode 221 of the LED. The first direction C is parallel to the second direction D. The direction D intersects to reduce the size of the first bridge structure 30 in the first direction C, so that the display panel can be provided with more LEDs in the first direction C and increase the size of the display panel in the first direction C. pixels in the first direction C. However, this application does not limit this, and it will depend on the circumstances.

Based on any of the above embodiments, in one embodiment of the present application, the electrodes of the LED include: P electrode and N electrode, the P electrode is located on the surface of the P-type semiconductor layer in the light-emitting layer, and the The P-type semiconductor layer of the light-emitting layer is electrically connected, and the N electrode is located on the surface of the N-type semiconductor layer in the light-emitting layer and is electrically connected to the N-type semiconductor layer in the light-emitting layer; in the embodiment of the present application, as As shown in FIG. 7 , the LED further includes: a first protective layer 23 located on the side of the light-emitting layer 21 and covering the side of the light-emitting layer 21 to protect the side of the light-emitting layer 21 so as to avoid the second protective layer 23 . During the manufacturing process of a bridge structure, damage is caused to the side surfaces of the light-emitting layer 21 . Optionally, the first protective layer 23 also covers part of the surface of the P-type semiconductor layer and the N-type semiconductor layer, but this application does not limit this, and it depends on the situation.

It should be noted that in this embodiment of the present application, the first protective layer may overlap with the N electrode and the P electrode in a direction perpendicular to the plane of the array substrate, as shown in Figure 7 As shown in the figure, that is, the first protective layer 23 extends to a partial area between the N electrode 221 and the luminescent layer 21 and a partial area between the bottom surface of the P electrode 222 and the luminescent layer 21 , or there may be no intersection. Stack, as shown in FIG. 8 , that is, the first protective layer 23 only covers the side surfaces of the light-emitting layer 21 and part of the surface of the N-type semiconductor layer in the light-emitting layer 21 .

Optionally, as shown in FIGS. 7 and 8 , when the LED further includes an intrinsic semiconductor layer 24 located on the side of the light-emitting layer 21 away from the electrode 22 , the first protective layer 23 also covers The side surface of the intrinsic semiconductor layer 24 .

It should also be noted that even if the side of the light-emitting layer is protected by the first protective layer, when the formation process of the first bridge structure adopts a dry etching process, the dry etching process will also cause damage to the first protective layer. The first protective layer is etched to increase the probability of causing damage to the side of the light-emitting layer. Therefore, based on the above embodiment, in one embodiment of the present application, the formation of the first bridge structure The process uses a wet etching process, but this application does not limit this, and it depends on the situation.

It should also be noted that since the first bridge structure is located on the side of the LED electrode facing away from the light-emitting layer when making the first bridge structure, in order to avoid the production process of the first bridge structure causing The electrode of the LED fails. In one embodiment of the present application, the material of the electrode of the LED includes metal that cannot be etched away by a wet etching process. Optionally, in one embodiment of the present application, the electrodes of the LED are made of gold, for example, the P electrode is made of gold, and the N electrode is made of gold to avoid the first bridge. The fabrication process of the structure causes the electrodes of the LED to fail, affecting the electrical connection performance between the first bridge structure and the electrodes of the LED.

Optionally, in one embodiment of the present application, when the electrode of the LED is made of other metal materials in addition to gold, the gold material layer is the outer surface layer of the electrode, so as to facilitate the Other metal material layers of the LED electrodes are used for protection.

Based on any of the above embodiments, in one embodiment of the present application, the process used in manufacturing the second bridge structure is a dry etching process, and the second bridge structure and the first bridge structure The material selective etching ratio of the structure is greater than 2, that is, the etching rate of the second bridge structure is greater than 2 times the etching rate of the first bridge structure, so as to reduce the formation process of the second bridge structure. Damage caused by the first bridge structure. However, this application does not limit this, and it will depend on the circumstances.

Based on any of the above embodiments, in one embodiment of the present application, the display panel further includes: a plurality of cathodes and a common cathode connection line electrically connecting the plurality of cathodes, so that the plurality of LEDs One end electrically connected to the cathode can transmit signals through a signal line, thereby reducing the number of signal lines in the display panel.

Based on the above embodiments, in one embodiment of the present application, the second bridge structure is located on the same layer as the common cathode connection line in the display panel, thereby reducing the thickness of the display panel, which is beneficial to The development of thinner and lighter display panels is not limited in this application, and it depends on the situation.

Based on any of the above embodiments, in one embodiment of the present application, as shown in Figure 9, the display panel further includes:

The protection structure 60 is located on the side of the first bridge structure away from the array substrate 10 . The protection structure 60 corresponds to the LED 20 one-to-one, and the protection structure 60 has a first through hole. The LED 20 is located on In the first through hole, the protective structure 60 is arranged around the LED 20;

The second protective layer 70 covers the protective structure 60 and the LED 20 . The refractive index of the second protective layer 70 is smaller than the refractive index of the protective structure 60 , so that the LED 20 radiates sideways toward the protective structure 60 The light is totally reflected at the interface between the protective structure 60 and the second protective layer 70, reflected back to the upper LED 20, and finally emitted from the side of the LED 20 away from the array substrate 10, thereby improving the display panel The light extraction efficiency.

It should be noted that in the embodiment of the present application, in the direction perpendicular to the plane of the array substrate 10 , the cross-sectional view of the protective structure 60 is an inverted trapezoid. The cross-sectional view of the protective structure being an inverted trapezoid means that In a direction perpendicular to the plane of the array substrate, the cross-sectional view of the protective structure is trapezoidal, and the length of the side of the cross-sectional view of the protective structure away from the array substrate is longer than that of the cross-sectional view of the protective structure close to the array substrate. The length of one side.

It should be noted that the display panel provided by the embodiments of the present application can be a frameless display panel, a flexible display panel, or various types of display panels such as a transparent display panel. This application does not do this. Limited, subject to availability.

Correspondingly, as shown in Figure 10, the embodiment of the present application also provides a display device, including the display panel provided in any of the above embodiments. Optionally, the display device can be a mobile phone, a computer, a television, etc. This application does not limit the equipment that displays functions, and it depends on the situation.

In addition, embodiments of the present application also provide a method for manufacturing a display panel. As shown in Figure 11, the manufacturing method includes:

S1: Provide a first substrate, and form a plurality of LEDs on a first side of the first substrate. The LEDs include a light-emitting layer and an electrode located on a side of the light-emitting layer away from the first substrate.

Optionally, in one embodiment of the present application, the first substrate is a glass substrate, and forming a plurality of LEDs on the first side of the first substrate includes:

S11: As shown in FIG. 12, multiple LEDs 20 are formed on the sapphire substrate 80. The LEDs 20 include a light-emitting layer and electrodes electrically connected to the light-emitting layer.

In one embodiment of the present application, forming multiple LEDs on a sapphire substrate includes:

forming multiple light-emitting layers on a sapphire substrate;

An electrode electrically connected to the light-emitting layer is formed on a side of the light-emitting layer facing away from the sapphire substrate.

Specifically, in one embodiment of the present application, as shown in Figure 12, the light-emitting layer includes a stacked N-type semiconductor layer 211, a quantum well layer 212 and a P-type semiconductor layer 213, wherein the quantum well layer The stacked structure formed by 212 and the P-type semiconductor layer 213 exposes part of the surface of the N-type semiconductor layer 211; the electrodes of the LED include N electrodes 221 and P electrodes 222, and the N electrode 221 is located on the N-type semiconductor layer. The P electrode 222 is located on the surface of the P-type semiconductor layer 213 and is electrically connected to the P-type semiconductor layer 213 .

Optionally, in one embodiment of the present application, the N-type semiconductor layer is an N-type doped GaN layer, the P-type semiconductor layer is a P-type doped GaN layer, and the quantum well layer is InGaN. Multiple quantum well layers.

Based on the above embodiments, in one embodiment of the present application, the LED further includes: an intrinsic semiconductor layer 24 located on the side of the light-emitting layer facing away from the electrode, such as an intrinsic GaN layer. Wherein, the intrinsic semiconductor layer includes a buffer layer, a low-temperature semiconductor layer and a high-temperature semiconductor layer, wherein the surface of the buffer layer facing away from the light-emitting layer has protrusions to improve the light extraction efficiency of the LED, and the high-temperature semiconductor layer The semiconductor layer is used to improve the flatness of the formation plane of the light-emitting layer. The low-temperature semiconductor layer is a transition layer between the buffer layer and the high-temperature semiconductor layer and serves as a link between the sapphire substrate and the light-emitting layer. The lattice constant transition layer between the two LEDs improves the growth quality of the light-emitting layer. In other embodiments of the present application, the LED may also include other structures. This application does not limit this, and it depends on the situation.

Specifically, in one embodiment of the present application, taking the semiconductor layer as a GaN layer as an example, forming multiple LEDs on a sapphire substrate includes:

Patterning the surface of the sapphire substrate so that the surface of the sapphire substrate has a plurality of grooves;

Form an intrinsic GaN layer, that is, an undoped GaN layer, on the surface of the groove side of the sapphire substrate, so that the intrinsic GaN layer has a plurality of protrusions toward the side of the sapphire substrate;

Form an N-type GaN layer on the side of the intrinsic GaN layer facing away from the sapphire substrate;

Form an InGaN multiple quantum well layer on the side of the N-type GaN layer facing away from the intrinsic GaN layer;

Form a P-type GaN layer on the side of the InGaN multiple quantum well layer facing away from the N-type GaN;

Etch multiple areas of the P-type GaN layer and the InGaN multiple quantum well layer to expose part of the surface of the N-type GaN layer;

Cut the N-type GaN layer and the intrinsic GaN layer to form multiple independent light-emitting layers;

An N electrode electrically connected to the N-type GaN layer and a P electrode electrically connected to the P-type GaN layer are formed on a side of the light-emitting layer facing away from the sapphire substrate.

Based on any of the above embodiments, in one embodiment of the present application, as shown in Figure 12, the LED further includes: a first LED located on the side of the luminescent layer and covering the side of the luminescent layer. Protective layer 23 to avoid damage to the side of the light-emitting layer during subsequent processes. Specifically, in this embodiment, forming multiple LEDs on a sapphire substrate includes:

forming multiple light-emitting layers on a sapphire substrate;

Form a first protective layer on the surface and sides of the light-emitting layer;

Remove at least part of the first protective layer located on the surface of the N-type semiconductor layer in the light-emitting layer and at least part of the surface of the P-type semiconductor layer in the light-emitting layer;

An N electrode is formed in a region of the N-type semiconductor layer not covered by the first protective layer, and a P electrode is formed in a region of the P-type semiconductor layer not covered by the first protective layer.

Optionally, the first protective layer is a silicon dioxide layer, but this application does not limit this, and it depends on the situation.

Specifically, based on any of the above embodiments, in one embodiment of the present application, the LED is a Micro LED or a Mini LED.

S12: As shown in Figure 13, a second substrate 81 is provided, and an alignment layer (not shown in the figure) and an adhesive layer 82 are sequentially formed on the second substrate 81. Optionally, the second substrate is Glass substrate, wherein the alignment layer is used to position the LED when the LED is subsequently transferred, and the adhesive layer is used to fixedly connect the LED to the second substrate after the LED is subsequently transferred. .

S13: Continuing as shown in FIG. 13 , transfer the plurality of LEDs 20 on the sapphire substrate to the side of the adhesive layer 82 away from the second substrate 81 , and remove the sapphire substrate 80 .

Optionally, in one embodiment of the present application, laser lift-off technology is used to transfer multiple LEDs on the sapphire substrate to the side of the adhesive layer facing away from the second substrate, but this application does not Without limitation, in other embodiments of the present application, other technologies may also be used to transfer multiple LEDs on the sapphire substrate to the side of the adhesive layer facing away from the second substrate, depending on the situation. Depends.

S14: As shown in Figure 14, a second solidification layer 84 is formed on the first substrate 83. The second solidification layer 84 is non-solid. Optionally, in an embodiment of the present application, the second solidification layer 84 is formed on the first substrate 83. The second solid crystal layer is a transparent flexible layer, such as a polyimide layer, but this application does not limit this, and it depends on the situation.

It should be noted that in this embodiment of the present application, before forming the second solidification layer on the first substrate, an alignment layer may also be formed on the first substrate to facilitate the subsequent placement of the LEDs on the second substrate. When transferring to the first substrate, the alignment accuracy of the second substrate and the first substrate is improved. Optionally, the alignment layer on the first substrate is an annular metal layer, and the annular metal layer can be ring-shaped on a side of the second solid state layer close to the first substrate, corresponding to the second solid state layer. The edge area of the crystal layer can also be located on the same layer as the second solid crystal layer and surrounded by the second solid solid layer. This application does not limit this, and it depends on the situation.

S15: Continuing as shown in FIG. 14 , transfer the plurality of LEDs 20 on the second substrate 81 to the side of the second die-hardening layer 84 away from the first substrate 83 , and fix the second die-hardening layer 84 . The layer 84 is cured, and as shown in FIG. 15 , the second substrate 81 is removed to realize the transfer of the plurality of LEDs 20 .

It should be noted that in actual applications, the display panel may include LEDs of one color or LEDs of multiple colors. Taking the display panel including LEDs of three colors as an example, the process of forming multiple LEDs on the first side of the first substrate will be described below.

Specifically, in one embodiment of the present application, forming multiple LEDs on the first substrate includes:

forming a plurality of first color LEDs on the first sapphire substrate;

forming a plurality of second color LEDs on the second sapphire substrate;

forming a plurality of third color LEDs on a third sapphire substrate;

Form an alignment layer and an adhesive layer sequentially on the second substrate;

Transfer the plurality of first color LEDs on the first sapphire substrate to the side of the adhesive layer facing away from the second substrate, and remove the first sapphire substrate;

Transfer the plurality of second color LEDs on the second sapphire substrate to the side of the adhesive layer facing away from the second substrate, and remove the second sapphire substrate;

Transfer the plurality of third color LEDs on the third sapphire substrate to the side of the adhesive layer facing away from the second substrate, and remove the third sapphire substrate;

Forming a second solid crystal layer on the first substrate, the second solid crystal layer being non-solid;

Transfer the LEDs of multiple colors on the second substrate to the side of the second solidification layer facing away from the first substrate, solidify the second solidification layer, and remove the second substrate .

It should be noted that LEDs of different colors have different thicknesses in a direction perpendicular to the plane of the array substrate. Optionally, when LEDs of multiple colors are formed on the second substrate, LEDs with larger thicknesses are preferentially transferred. LED, and then transfer LEDs with smaller thickness, thereby reducing the process difficulty of transferring LEDs of different colors to the second substrate.

Specifically, in one embodiment of the present application, the display panel includes: red, green, and blue LEDs of three colors, then the first color is red, the second color is green, and the third color The color is blue, that is, first transfer the red LED to the second substrate, then transfer the green LED to the second substrate, and finally transfer the blue LED to the second substrate.

It should be noted that after the LEDs of different colors are transferred to the second substrate, when the LEDs on the second substrate are transferred to the first substrate, all the LEDs are transferred to the first substrate at the same time, that is, the All the LEDs on the second substrate are transferred to the first substrate in the same process to improve the transfer efficiency of the LEDs transferred to the first substrate.

S2: As shown in Figure 16, a plurality of first bridge structures 30 are formed on the side of the plurality of LEDs 20 away from the first substrate 83. The first bridge structures 30 include first bridge areas and second bridge areas. , in a direction perpendicular to the plane of the first substrate 83 , the second bridge area does not overlap with the LED 20 , and the electrodes of the LED 20 are electrically connected to the first bridge area of the first bridge structure 30 .

Optionally, in one embodiment of the present application, the formation process of the first bridge structure adopts a wet etching process to avoid etching away the first bridge structure when dry etching is used. A protective layer causes damage to the side of the light-emitting layer.

Specifically, in one embodiment of the present application, forming a plurality of first bridge structures on a side of the plurality of LEDs facing away from the first substrate includes:

Forming a first bridge metal layer on a side of the plurality of LEDs facing away from the first substrate;

The first bridge metal is wet etched to form a plurality of first bridge structures.

It should be noted that, on the basis of reducing the probability that the formation process of the first bridge structure causes damage to the light-emitting layer, in order to avoid the formation process of the first bridge structure causing damage to the electrodes of the LED, the The electrodes of LEDs are made of acid-resistant metal materials, which are metals that are not easily corroded by the wet etching process. Optionally, in one embodiment of the present application, the material of the electrode of the LED includes gold, but this application does not limit this. In other embodiments of the present application, the electrode material of the LED can also be Includes other acid-resistant metal materials as appropriate.

It can be seen from the above that the process of transferring multiple LEDs to the first substrate includes two processes: transferring the multiple LEDs from the sapphire substrate to the second substrate and transferring the multiple LEDs from the second substrate to the first substrate. Therefore , in this embodiment, the alignment tolerance σ _C between the LED and the first bridge structure includes: the alignment tolerance of the LED on the sapphire substrate transferred to the second substrate and the transfer of the LED on the second substrate to the first The alignment tolerance on the substrate is divided into two parts.

S3: As shown in Figure 17, transfer the plurality of LEDs 20 and the plurality of first bridge structures 30 to the array substrate 10, as shown in Figure 18, and remove the first substrate 83. The electrode of the LED 20 is located on the side of the light-emitting layer close to the array substrate 10 , and the first bridge structure 30 is located between the electrode of the LED 20 and the array substrate 10 .

Optionally, in one embodiment of the present application, transferring the plurality of LEDs and the plurality of first bridge structures to the first side of the array substrate includes:

Continuing as shown in Figure 18, a first solid crystal layer 85 is formed on the first side of the array substrate, and the first solid crystal layer 85 is non-solid;

Transfer the plurality of LEDs 20 and the plurality of first bridge structures 30 to the first side of the array substrate 10;

The first solidification layer 85 is solidified.

It should be noted that in the embodiment of the present application, the materials of the first solidification layer and the second solidification layer may be the same or different, depending on the situation.

S4: Form a second bridge structure on the side of the first bridge structure away from the array substrate, the second bridge structure is electrically connected to the second bridge area of the first bridge structure, and the second bridge structure The structure is electrically connected to the array substrate through via holes, so that the electrodes of the LED are electrically connected to the array substrate through the first bridge structure and the second bridge structure in turn without using massive transfer bonding. process, thereby avoiding the accumulation of stress inside the display panel due to the introduction of a massive transfer bonding process, and improving the stability of the display panel.

As can be seen from the foregoing, the formation process of the first bridge structure adopts a wet etching process. Therefore, in an optional embodiment of the present application, the formation process of the second bridge structure is a dry etching process. Reduce damage to the first bridge structure during the manufacturing process of the second bridge structure.

Specifically, in one embodiment of the present application, the second bridge structure is electrically connected to the pixel circuit in the array substrate through a via hole. In this embodiment, when the first bridge structure is away from the array A second bridge structure is formed on one side of the substrate, the second bridge structure is electrically connected to the second bridge area of the first bridge structure, and the second bridge structure is electrically connected to the array substrate through a via hole, including:

As shown in FIG. 19 , the first part of the second solidification layer 84 is removed, the second part of the second solidification layer 84 is retained, and a plurality of second through holes are formed in the second solidification layer 84 , the second through hole exposes at least the second bridge area of the first bridge structure 30 and the area between adjacent first bridge structures 30;

As shown in FIG. 20 , part of the first solidification layer 85 is removed, and a via hole 86 is formed in the first solidification layer 85 . The via hole 85 exposes the pixel circuit in the array substrate 10 for communication with the array substrate 10 . The area where the second bridge structure is electrically connected;

As shown in FIG. 21 , a second bridge structure 40 is formed on the side of the first bridge structure 30 away from the array substrate 10 . The second bridge structure 40 and the second bridge area of the first bridge structure 30 Electrically connected to the pixel circuit in the array substrate 10 through via holes.

It can be seen from the above process that the second through hole and the via hole are formed in different processes, and in a direction parallel to the plane of the array substrate, the cross-sectional area of the second through hole Much larger than the cross-sectional area of the via hole, in order to avoid that the first solidification layer is also removed during the formation of the second via hole, based on the embodiments of the present application, in an implementation of the present application In this example, the etching selectivity ratio of the second solidification layer and the first solidification layer is greater than 2, that is, under the process conditions for forming the second through hole, the etching selectivity of the second solidification layer is The etching rate is greater than twice the etching rate of the first solid crystal layer, but this application does not limit this, and it depends on the situation.

In an embodiment of the present application, if the formation process of the second bridge structure is a dry etching process, and the difference in etching selectivity between the second solidification layer and the first solidification layer is not Greater than 2, before transferring the plurality of LEDs and the plurality of first bridge structures to the first side of the array substrate, the method further includes: as shown in Figures 22 and 23, on the first bridge A planarization layer 50 is formed on a side of the structure 30 away from the LED 20 so as to protect the first solidification layer 85 during the formation of the second through hole. It should be noted that in this embodiment of the present application, the planarization layer has a plurality of first grooves and a plurality of second grooves, the first bridge electrode is located in the first groove, and the third Two bridge electrodes are located in the second groove.

Based on any of the above embodiments, in one embodiment of the present application, the second through hole is a trapezoidal through hole, and the method further includes: as shown in Figure 24, forming a layer covering the second solidification layer 84 and the second protective layer 70 of the LED 20, the refractive index of the second protective layer 70 is smaller than the refractive index of the second solid crystal layer 84, so that the side of the LED 20 radiates toward the second solid crystal layer. The light of 84 is totally reflected at the interface between the second solid crystal layer 84 and the second protective layer 70, reflected back to the LED, and finally emitted from the side of the LED away from the array substrate, thereby improving the The light extraction efficiency of the display panel.

It should be noted that in the embodiment of the present application, in the direction perpendicular to the plane of the array substrate, the second through hole is an inverted trapezoidal through hole, that is, the second through hole is a distance away from the array substrate. The side length of the second through hole is greater than the side length of the second through hole close to the array substrate.

To sum up, in the display panel and the manufacturing method thereof provided in the embodiments of the present application, the electrodes of the LED are electrically connected to the first bridge region of the first bridge structure, and the second bridge structure is electrically connected to the first bridge region. The second bridge region of the structure is electrically connected, and the second bridge structure is electrically connected to the array substrate, so that the electrodes of the LED pass through the first bridge structure and the second bridge structure and the array in sequence. The substrates are electrically connected without using a massive transfer bonding process, thereby avoiding the accumulation of internal stress in the display panel due to the introduction of a massive transfer bonding process, improving the stability of the display panel, and is conducive to large size The realization of Micro/Mini LED display panels further improves the yield rate of the display panels.

Each part in this manual is described in a parallel and progressive manner. Each part focuses on its differences from other parts. The same and similar parts between the various parts can be referred to each other.

For the above description of the disclosed embodiments, the features recorded in each embodiment in this specification can be replaced or combined with each other, so that those skilled in the art can implement or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be practiced in other embodiments without departing from the spirit or scope of the application. Thus, the present application is not to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (20)

1. A display panel, comprising:

an array substrate;

the LED comprises a light-emitting layer and an electrode, wherein the electrode is positioned on one side of the light-emitting layer close to the array substrate;

the first bridging structures comprise first bridging areas and second bridging areas, and the second bridging areas are not overlapped with the LEDs in the direction perpendicular to the plane of the array substrate;

The second bridging structures are electrically connected with the array substrate, and the second bridging structures and the electrodes of the LEDs are positioned on the same side of the first bridging structures in the direction perpendicular to the plane of the array substrate;

wherein the electrode of the LED is electrically connected with a first bridging region of the first bridging structure, and the second bridging structure is electrically connected with a second bridging region of the first bridging structure;

in the direction perpendicular to the plane of the array substrate, the first bridging structure at least partially overlaps the LED electrode; and in the direction parallel to the plane of the array substrate, the first bridging structure at least partially overlaps the LED electrode.

2. The display panel of claim 1, wherein the first bridge structure comprises a first bridge electrode and a second bridge electrode, the first bridge region comprising a first bridge region of the first bridge electrode and a first bridge region of the second bridge electrode, the second bridge region comprising a second bridge region of the first bridge electrode and a second bridge region of the second bridge electrode;

The first bridging region of the first bridging electrode is electrically connected with the N electrode of the LED, and the first bridging region of the second bridging electrode is electrically connected with the P electrode of the LED;

the second bridge structure includes a third bridge electrode electrically connected to the second bridge region of the first bridge electrode and a fourth bridge electrode electrically connected to the second bridge region of the second bridge electrode.

3. The display panel of claim 1, wherein an overlapping area of the first bridge structure and the N electrode of the LED is smaller than an overlapping area of the first bridge structure and the P electrode of the LED in a direction perpendicular to a plane of the array substrate, and an overlapping area of the first bridge structure and the N electrode of the LED is larger than an overlapping area of the first bridge structure and the P electrode of the LED in a direction parallel to the plane of the array substrate.

4. The display panel of claim 2, further comprising:

the planarization layer is positioned between the LEDs and the array substrate, a plurality of first grooves and a plurality of second grooves are formed in the planarization layer, the first bridging electrodes are positioned in the first grooves, and the second bridging electrodes are positioned in the second grooves.

5. The display panel of claim 1, wherein the first and second bridge regions of the first bridge structure are arranged along a first direction or the first and second bridge regions of the first bridge structure are arranged along a second direction;

the first direction and the second direction are parallel to the plane where the array substrate is located, the first direction is parallel to the direction from the P electrode to the N electrode of the LED, and the first direction and the second direction are intersected.

6. The display panel of claim 1, wherein the electrodes of the LEDs comprise: the P electrode is positioned on the surface of the P-type semiconductor layer in the light-emitting layer and is electrically connected with the P-type semiconductor layer of the light-emitting layer, and the N electrode is positioned on the surface of the N-type semiconductor layer in the light-emitting layer and is electrically connected with the N-type semiconductor layer of the light-emitting layer;

the LED further includes: and the first protection layer is positioned on the side surface of the light-emitting layer and covers the side surface of the light-emitting layer.

7. The display panel of claim 6, wherein the material of the P electrode comprises gold and the material of the N electrode comprises gold.

8. The display panel of claim 1, further comprising: the second bridging structure and the common cathode connecting wire in the display panel are positioned on the same layer.

9. The display panel of claim 1, further comprising:

the protection structures are located on one side, away from the array substrate, of the first bridging structure, the protection structures are in one-to-one correspondence with the LEDs, first through holes are formed in the protection structures, and the LEDs are located in the first through holes;

and a second protective layer covering the protective structure and the LED, wherein the refractive index of the second protective layer is smaller than that of the protective structure.

10. The display panel of claim 1, wherein an etch selectivity of a material of the second bridge structure and a material of the first bridge structure is greater than 2.

11. A method for manufacturing a display panel, comprising:

providing a first substrate, and forming a plurality of LEDs on a first side of the first substrate, wherein the LEDs comprise a light-emitting layer and an electrode positioned on one side of the light-emitting layer away from the first substrate;

forming a plurality of first bridging structures on one side of the LEDs, which is away from the first substrate, wherein the first bridging structures comprise first bridging areas and second bridging areas, the second bridging areas are not overlapped with the LEDs in the direction perpendicular to the plane of the first substrate, and the LED electrodes are electrically connected with the first bridging areas of the first bridging structures;

Transferring the LEDs and the first bridging structures to an array substrate, removing the first substrate, wherein the electrodes of the LEDs are positioned on one side of the light-emitting layer, which is close to the array substrate, and the first bridging structures are positioned between the electrodes of the LEDs and the array substrate;

forming a second bridging structure on one side of the first bridging structure, which is away from the array substrate, wherein the second bridging structure is electrically connected with a second bridging region of the first bridging structure, and the second bridging structure is electrically connected with the array substrate through a via hole;

in the direction perpendicular to the plane of the array substrate, the first bridging structure at least partially overlaps the LED electrode; and in the direction parallel to the plane of the array substrate, the first bridging structure at least partially overlaps the LED electrode.

12. The method of manufacturing of claim 11, wherein transferring the plurality of LEDs and the plurality of first bridging structures to the first side of the array substrate comprises:

forming a first die bonding layer on a first side of the array substrate, wherein the first die bonding layer is non-solid;

transferring the plurality of LEDs and the plurality of first bridging structures to a first side of the array substrate;

And solidifying the first crystal-fixing layer.

13. The method of manufacturing of claim 12, wherein forming a plurality of first bridge structures on a side of the plurality of LEDs facing away from the first substrate comprises:

forming a first bridging metal layer on one side of the LEDs facing away from the first substrate;

and carrying out wet etching on the first bridging metal to form a plurality of first bridging structures.

14. The method of manufacturing of claim 13, wherein forming a plurality of LEDs on the first side of the first substrate comprises:

forming a plurality of LEDs on a sapphire substrate;

providing a second substrate, and sequentially forming an alignment layer and an adhesive layer on the second substrate;

transferring a plurality of LEDs on the sapphire substrate to one side of the bonding layer away from the second substrate, and removing the sapphire substrate;

forming a second die bonding layer on the first substrate, wherein the second die bonding layer is non-solid;

and transferring the LEDs on the second substrate to one side of the second die bonding layer, which is away from the first substrate, and curing the second die bonding layer to remove the second substrate.

15. The method of manufacturing of claim 14, wherein forming a plurality of LEDs on a sapphire substrate comprises:

Forming a plurality of light emitting layers on a sapphire substrate;

forming a first protective layer on the surface and the side surface of the light-emitting layer;

removing at least part of the area of the first protective layer on the surface of the N-type layer in the light-emitting layer and at least part of the area of the surface of the P-type layer in the light-emitting layer;

and forming an N electrode in a region of the N type layer which is not covered by the first protective layer, and forming a P electrode in a region of the P type layer which is not covered by the first protective layer.

16. The method of claim 14, wherein the second bridge structure is formed by a dry etching process, and the etching selectivity of the second die attach layer to the first die attach layer is greater than 2.

17. The method of claim 14, wherein the second bridge structure forming process is a dry etching process, the second die attach layer and the first die attach layer having an etch selectivity difference of no greater than 2, the method further comprising, prior to transferring the plurality of LEDs and the plurality of first bridge structures to the first side of the array substrate:

and forming a planarization layer on one side of the first bridging structure, which is away from the LED, wherein the planarization layer is provided with a plurality of first grooves and a plurality of second grooves, the first bridging structure is positioned in the first grooves, and the second bridging structure is positioned in the second grooves.

18. The method of claim 14, wherein forming a second bridge structure on a side of the first bridge structure facing away from the array substrate comprises:

removing a first part of the second die bonding layer, reserving a second part of the second die bonding layer, and forming a plurality of second through holes in the second die bonding layer, wherein the second through holes at least expose a second bridging region of the first bridging structure and a region between adjacent first bridging structures;

forming a via hole in the first die bonding layer, wherein the via hole exposes a region of the pixel circuit in the array substrate for electrically connecting with the second bridging structure;

and forming a second bridging structure on one side of the first bridging structure, which is away from the array substrate, wherein the second bridging structure is electrically connected with a second bridging region of the first bridging structure and is electrically connected with a pixel circuit in the array substrate through a via hole.

19. The method of manufacturing of claim 18, wherein the second via is a trapezoidal via, the method further comprising:

and forming a second protection layer which covers the second die bonding layer and the LED, wherein the refractive index of the second protection layer is smaller than that of the second die bonding layer.

20. A display device comprising the display panel of any one of claims 1-10.