[go: up one dir, main page]

CN113419970B - Interface fault testing method and device - Google Patents

Interface fault testing method and device Download PDF

Info

Publication number
CN113419970B
CN113419970B CN202110971187.XA CN202110971187A CN113419970B CN 113419970 B CN113419970 B CN 113419970B CN 202110971187 A CN202110971187 A CN 202110971187A CN 113419970 B CN113419970 B CN 113419970B
Authority
CN
China
Prior art keywords
fault
interface
fault test
test cases
interfaces
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202110971187.XA
Other languages
Chinese (zh)
Other versions
CN113419970A (en
Inventor
任凤翔
冯岳
付一朋
高博
张金洋
延旭
闫伟
曹欣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casco Signal Beijing Ltd
Original Assignee
Casco Signal Beijing Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casco Signal Beijing Ltd filed Critical Casco Signal Beijing Ltd
Priority to CN202110971187.XA priority Critical patent/CN113419970B/en
Publication of CN113419970A publication Critical patent/CN113419970A/en
Application granted granted Critical
Publication of CN113419970B publication Critical patent/CN113419970B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Prevention of errors by analysis, debugging or testing of software
    • G06F11/3668Testing of software
    • G06F11/3672Test management
    • G06F11/3684Test management for test design, e.g. generating new test cases
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Prevention of errors by analysis, debugging or testing of software
    • G06F11/3668Testing of software
    • G06F11/3672Test management
    • G06F11/3688Test management for test execution, e.g. scheduling of test suites

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

The invention discloses an interface fault testing method and device, relates to the technical field of testing of train control interlocking integrated products, and mainly aims to comprehensively test the interface fault of the train control interlocking integrated product; the main technical scheme comprises: determining an interface which needs to be subjected to fault testing in a train control interlocking integrated product, wherein the train control interlocking integrated product comprises first safety equipment and second safety equipment, and the interface is used for realizing connection between the first safety equipment and the second safety equipment; carrying out fault permutation and combination on the determined interfaces to generate a plurality of fault test cases; based on the fault effect of each fault test case, sorting the plurality of fault test cases; and performing interface fault test according to the sorted fault test case.

Description

Interface fault testing method and device
Technical Field
The invention relates to the technical field of train control interlocking integrated product testing, in particular to an interface fault testing method and device.
Background
The train control interlocking integrated product is a signal safety control product which can simultaneously complete interlocking logic control and train operation control functions by using a set of computer system, integrates the related technology of Train Control Center (TCC) and the related technology of interlocking (CBI), and is a main product for train signal safety control.
The train control interlocking integrated product comprises two safety devices which are mutually standby. In order to realize the active-standby switching of the two safety devices at any time, data synchronization is required between the two safety devices, and the data synchronization is realized through the interface connection of the two safety devices. Therefore, the data synchronization between the two safety devices is directly influenced by the fault of the interfaces on the two safety devices, if the data synchronization of the two safety devices is failed, the train signal is seriously failed, and the running safety of the train is threatened.
Therefore, there is a need for an interface fault testing method to fully test the above-mentioned interfaces.
Disclosure of Invention
In view of this, the invention provides an interface fault testing method and device, and mainly aims to comprehensively test the interface fault of a train control interlocking integrated product.
In order to achieve the purpose, the invention adopts the following technical scheme:
in a first aspect, the present invention provides an interface fault testing method, including:
determining an interface which needs to be subjected to fault testing in a train control interlocking integrated product, wherein the train control interlocking integrated product comprises first safety equipment and second safety equipment, and the interface is used for realizing connection between the first safety equipment and the second safety equipment;
carrying out fault permutation and combination on the determined interfaces to generate a plurality of fault test cases;
based on the fault effect of each fault test case, sorting the plurality of fault test cases;
and performing interface fault test according to the sorted fault test case.
In a second aspect, the present invention provides an interface fault testing apparatus, including:
the system comprises a determining unit, a fault testing unit and a fault detecting unit, wherein the determining unit is used for determining an interface which needs to be subjected to fault testing in a train control interlocking integrated product, the train control interlocking integrated product comprises first safety equipment and second safety equipment, and the interface is used for realizing connection between the first safety equipment and the second safety equipment;
the generating unit is used for carrying out fault permutation and combination on the determined interfaces to generate a plurality of fault test cases;
the sorting unit is used for sorting the plurality of fault test cases based on the fault effect of each fault test case;
and the test unit is used for carrying out interface fault test according to the sorted fault test cases.
In a third aspect, the present invention provides a computer-readable storage medium, where the storage medium includes a stored program, and when the program runs, the apparatus on which the storage medium is located is controlled to execute the interface failure testing method according to the first aspect.
In a fourth aspect, the present invention provides a storage management apparatus, including: a memory for storing a program; a processor, coupled to the memory, for executing the program to perform the interface failure testing method of the first aspect.
By means of the technical scheme, the interface fault testing method and the interface fault testing device provided by the invention determine the interface which needs to be subjected to fault testing in the train control interlocking integrated product, and the determined interface can realize the interface connected between the first safety equipment and the second safety equipment in the train control interlocking integrated product. And then carrying out fault permutation and combination on the determined interfaces to generate a plurality of fault test cases, and sorting the plurality of fault test cases based on the fault effect of each fault test case. And finally, performing interface fault test according to the sorted fault test cases. Therefore, the scheme provided by the invention can carry out fault permutation and combination on the interfaces needing fault testing to obtain all fault test cases related to the interfaces, and then carry out sorting and optimization on the fault test cases to obtain the simplest fault test case, so that the scheme can carry out comprehensive testing on the interface faults of the train control interlocking integrated product by using the most comprehensive and simplified fault test case.
The foregoing description is only an overview of the technical solutions of the present invention, and the embodiments of the present invention are described below in order to make the technical means of the present invention more clearly understood and to make the above and other objects, features, and advantages of the present invention more clearly understandable.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a flow chart illustrating a method for testing interface faults according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a train control interlocking integrated product according to an embodiment of the invention;
FIG. 3 is a schematic diagram illustrating a fault permutation combination provided by an embodiment of the invention;
FIG. 4 is a schematic diagram illustrating a fault permutation combination according to another embodiment of the present invention;
FIG. 5 is a schematic diagram illustrating a fault permutation combination according to yet another embodiment of the present invention;
FIG. 6 is a schematic diagram illustrating a fault permutation combination according to yet another embodiment of the present invention;
fig. 7 is a schematic structural diagram illustrating an interface fault testing apparatus according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram illustrating an interface fault testing apparatus according to another embodiment of the present invention.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
As shown in fig. 1, an embodiment of the present invention provides an interface fault testing method, which mainly includes:
101. determining an interface which needs to be subjected to fault testing in a train control interlocking integrated product, wherein the train control interlocking integrated product comprises first safety equipment and second safety equipment, and the interface is used for realizing connection between the first safety equipment and the second safety equipment.
The train control interlocking integrated product is a signal safety control product which can simultaneously complete interlocking logic control and train operation control functions by using a set of computer system, integrates the related technology of Train Control Center (TCC) and the related technology of interlocking (CBI), and is a main product for train signal safety control.
The train control interlocking integrated product comprises a first safety device and a second safety device, and the first safety device and the second safety device are mutually standby. In order to implement the active-standby switching of the first security device and the second security device at any time, the first security device and the second security device need to perform data synchronization, and the data synchronization is implemented through the connection between the interface on the first security device and the interface on the second security device. Because the interfaces capable of realizing data synchronization directly influence the train signal safety, the interfaces required to be subjected to fault testing in the train control interlocking integration production are the interfaces capable of realizing data synchronization between the first safety equipment and the second safety equipment, and the interfaces can be a network protocol data interaction interface, a serial port protocol data interaction interface and a synchronous bus interface.
The first safety device and the second safety device have the same structure and comprise the following components: logic processing unit, communication module and power module. Interfaces are arranged in the logic processing unit and the communication module, so that the interfaces are used for realizing the connection of the first safety equipment and the second safety equipment, and the data synchronization between the first safety equipment and the second safety equipment is realized. In addition, the number of the logic processing unit, the communication unit, and the power module may be determined based on the service requirement, and this embodiment is not particularly limited.
Illustratively, as shown in fig. 2, a first safety device a and a second safety device B are included in the train control interlocking integrated product. The first security device a includes: a logic processing unit CPU1, a logic processing unit CPU2, a communication module 1, a communication module 2, a main communication module, a power supply module 1 and a power supply module 2. Likewise, the second security device B includes: a logic processing unit CPU1, a logic processing unit CPU2, a communication module 1, a communication module 2, a main communication module, a power supply module 1 and a power supply module 2. The logic processing unit CPU1, the logic processing unit CPU2, the communication module 1, and the communication module 2 are respectively provided with four network protocol data interaction interfaces N1, N2, N3, and N4, the main communication module is respectively provided with 2 serial port protocol data interaction interfaces N1, N2, and 2 network protocol data interaction interfaces C1 and C2, and the first security device a and the second security device B are respectively provided with a synchronous bus 1 interface B1 and a synchronous bus 2 interface B2. In order to implement data synchronization, the interface on the first secure device a is correspondingly connected to the interface on the second secure device B, for example, the interface N3 on the logic processing unit CPU1 in the first secure device a is connected to the interface N3 on the logic processing unit CPU1 in the second secure device B, and the interface N4 on the logic processing unit CPU1 in the first secure device a is connected to the interface N4 on the logic processing unit CPU1 in the second secure device B.
The first logical processing unit CPU1, the logical processing unit CPU2, the communication module 1, the communication module 2 in the first security device a and the second security device B shown in fig. 2 set interfaces N1, N2, N3, N4, respectively, the master communication module sets interfaces N1, N2, C1, C2, respectively, and a synchronous bus 1 interface B1 and a synchronous bus 2 interface B2. In determining the interface to be tested for faults, the interface may be selected based on specific service requirements. For example, if the failure test is required for all the interfaces for implementing data synchronization between the first safety device a and the second safety device B, all the interfaces are determined as the interfaces requiring the failure test. For example, if the current test requirement is only for a partial interface, it may be determined that the partial interface is an interface that needs to be tested for a fault, for example, the interface on the CPU and the bus interface need to be tested, and the first logical processing unit CPU1 in the first safety device a and the second safety device B, the interfaces N1, N2, N3, and N4 on the logical processing unit CPU2, and the synchronous bus 1 interface B1 and the synchronous bus 2 interface B2 are selected as the interfaces that need to be tested for a fault.
102. And carrying out fault permutation and combination on the determined interfaces to generate a plurality of fault test cases.
The process of performing fault permutation and combination on the determined interfaces is a process of listing all fault conditions that can occur to the interfaces. The process of performing fault permutation and combination on the determined interfaces may include the following three methods:
firstly, determining all master and slave role allocation conditions of a first safety device and a second safety device, respectively performing fault permutation and combination on the determined interfaces to obtain an interface open circuit under different master and slave role allocation conditions, and generating a plurality of fault test cases, wherein the interface open circuit is the interface open circuit condition.
Since the interface failure of the first security device and the second security device may generate different failure effects under different primary and secondary role allocation requests, in order to list all possible interface failures, all primary and secondary role allocation conditions of the first security device and the second security device need to be determined.
The master and standby role allocation conditions of the first safety device and the second safety device comprise the following steps: first, the first safety equipment is the main equipment, the second safety equipment is the standby equipment; in the second type, the first safety device is a standby device, and the second safety device is an active device.
After determining all the master and slave role allocation conditions of the first safety device and the second safety device, performing fault permutation and combination on the interface which is determined to be subjected to the fault test under the condition of different master and slave role allocation conditions. The fault permutation combination is a tree-structured fault permutation combination. The basis of the permutation and combination is the case of disconnection of the interface, which is the case of disconnection of the interface between the two safety devices that needs to be connected together. Illustratively, interface N3 of CPU1 of the first secure device a is connected to interface N3 of CPU1 of the second secure device B, and the disconnection is performed by disconnecting interface N3 of CPU1 of the first secure device a and disconnecting interface N3 of CPU1 of the second secure device B.
Illustratively, as shown in fig. 3, a fault is an example of a fault permutation combination of an interface open circuit, and the specific conditions of the example are as follows: the master and standby role allocation condition is as follows: the first safety device a is a main device, and the second safety device B is a standby device. The interfaces that need to be tested for faults are: interfaces N3, N4 on the first logical processing unit CPU1 and interface N3 on the logical processing unit CPU2 in the first security device a and the second security device B. As can be seen from fig. 3, it covers all cases where interface disconnection may occur, each branch forms a corresponding fault test case, and as can be seen, each fault test case includes a case where an interface is disconnected under the current active/standby allocation condition.
Illustratively, as shown in fig. 4, an example of the interface failure permutation combination is shown, and the specific case of this example is: the first safety device with the master and standby role allocation condition is as follows: the first safety device a is a standby device, and the second safety device B is an active device. The interfaces that need to be tested for faults are: interfaces N3, N4 on the first logical processing unit CPU1 and interface N3 on the logical processing unit CPU2 in the first security device a and the second security device B. As can be seen from fig. 3, it covers all cases where interface disconnection may occur, each branch forms a corresponding fault test case, and as can be seen, each fault test case includes a case where an interface is disconnected under the current active/standby allocation condition.
Secondly, determining all the master and standby role allocation conditions of the first safety equipment and the second safety equipment; and under the condition of different main and standby role distribution, respectively carrying out fault permutation and combination on the determined interfaces, wherein the fault is interface exchange, and a plurality of fault test cases are generated, wherein the interface exchange is the condition that the interface is connected to a wrong interface.
After determining all the master and slave role allocation conditions of the first safety device and the second safety device, performing fault permutation and combination on the interface which is determined to be subjected to the fault test under the condition of different master and slave role allocation conditions. The fault permutation combination is a tree-structured fault permutation combination. The basis of the permutation and combination is the interface exchange case, which is the case of exchanging the interfaces required to be connected between the two security devices. For example, a first interface on the first security device needs to be connected to a first interface on the second security device, a second interface on the first security device needs to be connected to a second interface on the second security device, after the interfaces are exchanged, the first interface on the first security device needs to be connected to the second interface on the second security device, and the second interface on the first security device needs to be connected to the first interface on the second security device. Illustratively, interface N3 on logical processing unit CPU1 in first security device a is connected to interface N3 on logical processing unit CPU1 in second security device B, interface N4 on logical processing unit CPU1 in first security device a is connected to interface N4 on logical processing unit CPU1 in second security device B, interface swapping is such that interface N3 on logical processing unit CPU1 in first security device a is connected to interface N4 on logical processing unit CPU1 in second security device B, and interface N4 on logical processing unit CPU1 in first security device a is connected to interface N3 on logical processing unit CPU1 in second security device B.
Illustratively, as shown in fig. 5, to perform an example of fault permutation and combination in which a fault is an interface exchange, the specific case of this example is: the master and standby role allocation condition is as follows: the first safety device a is a main device, and the second safety device B is a standby device. The interfaces that need to be tested for faults are: interfaces N3, N4 on the first logical processing unit CPU1 in the first secure device a and the second secure device B. As can be seen from fig. 5, it covers all the situations where interface exchange may occur, each branch forms a corresponding fault test case, and as can be seen, each fault test case includes the situation of interface exchange under the current master-slave allocation situation.
Thirdly, the two methods are used for carrying out fault permutation and combination on the interface to be tested.
103. And sorting the plurality of fault test cases based on the fault effect of each fault test case.
Because the fault effects generated by some fault test cases are the same, in order to reduce redundant fault test cases, a plurality of fault test cases need to be sorted based on the fault effects of each fault test case, and the sorting method comprises the following steps from one step to the second step:
step one, combining fault test cases with the same fault effect.
The fault test cases with the same fault effect cause waste of test cost and test time, so in order to simplify the fault test cases, the fault test cases with the same fault effect need to be merged. When the fault test cases with the same fault effect are combined, one fault test case is selected from the fault test cases with the same fault effect, the selected fault test case is reserved, and the unselected fault test cases are removed.
The following explains what is a fault test case with the same fault effect, and if the following two conditions exist, the fault test case is considered as the fault test case with the same fault effect:
first, for any two of the failure test cases: and if the interfaces required to be connected by each interface in one fault test case exist in the other fault test case and other interfaces do not exist in the other fault test case, determining that the fault effects of the two fault test cases are the same.
Illustratively, as shown in fig. 3, there are a-CPU1-N3 and a-CPU1-N4 in one fault test case, and B-CPU1-N3 and B-CPU1-N4 in another fault test case, and since a-CPU1-N3 and B-CPU1-N3 are interfaces that need to be connected correspondingly and a-CPU1-N4 and B-CPU1-N4 are interfaces that need to be connected correspondingly, it is determined that the two fault test cases are fault test cases with the same effect.
For example, as shown in fig. 5, an a-CPU1-N3 is connected to a B-CPU1-N4 in one fault test case, and an a-CPU1-N4 is connected to a B-CPU1-N3 in another fault test case, and since an a-CPU1-N3 and a B-CPU1-N3 are interfaces that need to be connected correspondingly and an a-CPU1-N4 and a B-CPU1-N4 are interfaces that need to be connected correspondingly, it is determined that the two fault test cases are fault test cases with the same effect.
Second, for any two of the failure test cases: and if each interface in one fault test case exists in the other fault test case and other interfaces do not exist in the other fault test case, determining that the fault effects of the two fault test cases are the same.
Illustratively, an A-CPU1-N3 and an A-CPU1-N4 exist in one fault test case, and an A-CPU1-N3 and an A-CPU1-N4 exist in another fault test case, and since interfaces included in the two fault test cases are the same, the two fault test cases are determined to be the fault test cases with the same effect.
And step two, reserving the fault test case with the unique fault effect.
The fault test case with the unique fault effect is a fault test case without the same fault effect in all fault test cases, so that the fault test cases are directly reserved.
Exemplarily, after the processing of the first step to the second step, the fault test case in fig. 3 is sorted, so as to obtain the fault test case shown in fig. 6.
104. And performing interface fault test according to the sorted fault test case.
The sorted fault test cases are simplified fault test cases, and the number of the fault test cases can be minimized. The sorted fault test case is the final fault test case for performing the interface fault test.
When interface fault testing is carried out, a using sequence is distributed for fault test cases, an output result of each fault test case is determined, then the first safety equipment and the second safety equipment are started according to the master-slave distribution condition of the fault test cases, and the fault test cases are sequentially executed according to the using sequence.
For example, when the fault test case corresponding to the first branch shown in fig. 6 is executed, the first safety device a is set as an active device, the second safety device B is set as a standby device, then the N3 interface on the CPU1 of the first safety device a is disconnected, that is, the channel between the interface N3 of the CPU1 of the first safety device and the interface N3 of the CPU1 of the second safety device is disconnected, and then the interface test is performed, so as to obtain the test result for the fault test case.
According to the interface fault testing method provided by the embodiment of the invention, the interface which needs to be subjected to fault testing in the train control interlocking integrated product is determined, and the determined interface can realize the interface connected between the first safety equipment and the second safety equipment in the train control interlocking integrated product. And then carrying out fault permutation and combination on the determined interfaces to generate a plurality of fault test cases, and sorting the plurality of fault test cases based on the fault effect of each fault test case. And finally, performing interface fault test according to the sorted fault test cases. Therefore, the scheme provided by the embodiment of the invention can carry out fault permutation and combination on the interfaces needing fault testing to obtain all fault test cases related to the interfaces, and then carry out sorting optimization on the fault test cases to obtain the simplest fault test case, so that the scheme can carry out comprehensive testing on the interface faults of the train control interlocking integrated product by using the most comprehensive and simplified fault test case.
Further, according to the above method embodiment, another embodiment of the present invention further provides an interface fault testing apparatus, as shown in fig. 7, the apparatus includes:
the determining unit 21 is configured to determine an interface that needs to be subjected to a fault test in a train control interlocking integrated product, where the train control interlocking integrated product includes a first safety device and a second safety device, and the interface is an interface that realizes connection between the first safety device and the second safety device;
a generating unit 22, configured to perform fault permutation and combination on the determined interfaces to generate multiple fault test cases;
a sorting unit 23, configured to sort the multiple fault test cases based on the fault effect of each fault test case;
and the test unit 24 is used for performing interface fault test according to the sorted fault test cases.
The interface fault testing device provided by the embodiment of the invention determines the interface which needs to be subjected to fault testing in the train control interlocking integrated product, and the determined interface can realize the interface connected between the first safety equipment and the second safety equipment in the train control interlocking integrated product. And then carrying out fault permutation and combination on the determined interfaces to generate a plurality of fault test cases, and sorting the plurality of fault test cases based on the fault effect of each fault test case. And finally, performing interface fault test according to the sorted fault test cases. Therefore, the scheme provided by the embodiment of the invention can carry out fault permutation and combination on the interfaces needing fault testing to obtain all fault test cases related to the interfaces, and then carry out sorting optimization on the fault test cases to obtain the simplest fault test case, so that the scheme can carry out comprehensive testing on the interface faults of the train control interlocking integrated product by using the most comprehensive and simplified fault test case.
Optionally, as shown in fig. 8, the sorting unit 23 includes:
a merging unit 231, configured to merge fault test cases with the same fault effect;
and the reserving unit 232 is used for reserving the fault test case with the unique fault effect.
Optionally, as shown in fig. 8, the merging unit 231 is specifically configured to select one fault test case from the fault test cases with the same fault effect; and reserving the selected fault test cases and removing the unselected fault test cases.
Optionally, as shown in fig. 8, the merging unit 231, for any two of the fault test cases: and if the interfaces required to be connected by each interface in one fault test case exist in the other fault test case and other interfaces do not exist in the other fault test case, determining that the fault effects of the two fault test cases are the same. And/or, for any two of the fault test cases: and if each interface in one fault test case exists in the other fault test case and other interfaces do not exist in the other fault test case, determining that the fault effects of the two fault test cases are the same.
Optionally, as shown in fig. 8, the generating unit 22 includes:
a first generating module 221, configured to determine allocation conditions of all active and standby roles of the first security device and the second security device; and under the condition of different main and standby role distribution, respectively carrying out fault permutation and combination on the determined interfaces, wherein the fault is interface open circuit, and generating a plurality of fault test cases, wherein the interface open circuit is the condition of interface open circuit.
Optionally, as shown in fig. 8, the generating unit 22 includes:
a second generating module 222, configured to determine allocation conditions of all active and standby roles of the first security device and the second security device; and under the condition of different main and standby role distribution, respectively carrying out fault permutation and combination on the determined interfaces, wherein the fault permutation and combination is interface exchange, and generating a plurality of fault test cases, wherein the interface exchange is the condition that the interface is connected to a wrong interface.
Alternatively, as shown in fig. 8, the fault permutation and combination related to the generating unit 22 is a fault permutation and combination with a tree structure.
In the interface fault testing apparatus provided in the embodiment of the present invention, for a detailed description of a method used in an operation process of each functional module, reference may be made to a detailed description of a corresponding method in the method embodiment of fig. 1, which is not described herein again.
Further, according to the above embodiment, another embodiment of the present invention further provides a computer-readable storage medium, where the storage medium includes a stored program, and when the program runs, the apparatus on which the storage medium is located is controlled to execute the interface fault testing method described in fig. 1.
Further, according to the above embodiment, another embodiment of the present invention provides a storage management apparatus, including: a memory for storing a program; a processor, coupled to the memory, for executing the program to perform the interface failure testing method of fig. 1.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
It will be appreciated that the relevant features of the method and apparatus described above are referred to one another. In addition, "first", "second", and the like in the above embodiments are for distinguishing the embodiments, and do not represent merits of the embodiments.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
The algorithms and displays presented herein are not inherently related to any particular computer, virtual machine, or other apparatus. Various general purpose systems may also be used with the teachings herein. The required structure for constructing such a system will be apparent from the description above. Moreover, the present invention is not directed to any particular programming language. It is appreciated that a variety of programming languages may be used to implement the teachings of the present invention as described herein, and any descriptions of specific languages are provided above to disclose the best mode of the invention.
In the description provided herein, numerous specific details are set forth. It is understood, however, that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
Similarly, it should be appreciated that in the foregoing description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various inventive aspects. However, the disclosed method should not be interpreted as reflecting an intention that: that the invention as claimed requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this invention.
Those skilled in the art will appreciate that the modules in the device in an embodiment may be adaptively changed and disposed in one or more devices different from the embodiment. The modules or units or components of the embodiments may be combined into one module or unit or component, and furthermore they may be divided into a plurality of sub-modules or sub-units or sub-components. All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and all of the processes or elements of any method or apparatus so disclosed, may be combined in any combination, except combinations where at least some of such features and/or processes or elements are mutually exclusive. Each feature disclosed in this specification (including any accompanying claims, abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise.
Furthermore, those skilled in the art will appreciate that while some embodiments described herein include some features included in other embodiments, rather than other features, combinations of features of different embodiments are meant to be within the scope of the invention and form different embodiments. For example, in the following claims, any of the claimed embodiments may be used in any combination.
The various component embodiments of the invention may be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. Those skilled in the art will appreciate that a microprocessor or Digital Signal Processor (DSP) may be used in practice to implement some or all of the functions of some or all of the components of the method, apparatus and framework for operation of a deep neural network model in accordance with embodiments of the present invention. The present invention may also be embodied as apparatus or device programs (e.g., computer programs and computer program products) for performing a portion or all of the methods described herein. Such programs implementing the present invention may be stored on computer-readable media or may be in the form of one or more signals. Such a signal may be downloaded from an internet website or provided on a carrier signal or in any other form.
It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The usage of the words first, second and third, etcetera do not indicate any ordering. These words may be interpreted as names.

Claims (8)

1. An interface fault testing method, characterized in that the method comprises:
determining an interface which needs to be subjected to fault testing in a train control interlocking integrated product, wherein the train control interlocking integrated product comprises first safety equipment and second safety equipment, the interface is an interface for realizing connection between the first safety equipment and the second safety equipment, the first equipment and the second equipment realize data synchronization through the connection between the interfaces, and the data synchronization is used for realizing the master-slave switching of the first equipment and the second equipment;
performing fault permutation and combination on the determined interfaces to generate a plurality of fault test cases, wherein the fault permutation and combination comprises: the fault is a fault permutation combination of interface disconnection and/or a fault permutation combination of interface exchange, the interface disconnection is the condition of interface disconnection, and the interface exchange is the condition of interface connection to a wrong interface;
based on the fault effect of each fault test case, sorting the plurality of fault test cases;
performing interface fault test according to the sorted fault test case;
based on the fault effect of each fault test case, sorting the fault test cases, including:
merging fault test cases with the same fault effect;
reserving a fault test case with a unique fault effect;
for any two of the failure test cases: the interfaces, which need to be connected, of each interface in one fault test case exist in the other fault test case, and the other interfaces do not exist in the other fault test case, so that the two fault test cases are determined to have the same fault effect;
and/or the presence of a gas in the gas,
for any two of the failure test cases: and if each interface in one fault test case exists in the other fault test case and other interfaces do not exist in the other fault test case, determining that the fault effects of the two fault test cases are the same.
2. The method of claim 1, wherein merging fault test cases with the same fault effect comprises:
selecting one fault test case from the fault test cases with the same fault effect;
and reserving the selected fault test cases and removing the unselected fault test cases.
3. The method of claim 1, wherein performing fault permutation and combination on the determined interfaces to generate a plurality of fault test cases comprises:
determining all master and standby role allocation conditions of the first safety equipment and the second safety equipment;
and under the condition of different main and standby role distribution, respectively carrying out fault permutation and combination on the determined interfaces, wherein the fault is interface open circuit, and generating a plurality of fault test cases, wherein the interface open circuit is the condition of interface open circuit.
4. The method according to claim 1 or 3, wherein performing fault permutation and combination on the determined interfaces to generate a plurality of fault test cases comprises:
determining all master and standby role allocation conditions of the first safety equipment and the second safety equipment;
and under the condition of different main and standby role distribution, respectively carrying out fault permutation and combination on the determined interfaces, wherein the fault permutation and combination is interface exchange, and generating a plurality of fault test cases, wherein the interface exchange is the condition that the interface is connected to a wrong interface.
5. The method of claim 1, wherein the fault permutation combination is a tree structured fault permutation combination.
6. An interface fault testing apparatus, the apparatus comprising:
the system comprises a determining unit and a controlling unit, wherein the determining unit is used for determining an interface which needs to be subjected to fault testing in a train control interlocking integrated product, the train control interlocking integrated product comprises first safety equipment and second safety equipment, the interface is used for realizing connection between the first safety equipment and the second safety equipment, the first equipment and the second equipment realize data synchronization through the connection between the interfaces, and the data synchronization is used for realizing the master-slave switching of the first equipment and the second equipment;
a generating unit, configured to perform fault permutation and combination on the determined interfaces, and generate a plurality of fault test cases, where the fault permutation and combination includes: the fault is a fault permutation combination of interface disconnection and/or a fault permutation combination of interface exchange, the interface disconnection is the condition of interface disconnection, and the interface exchange is the condition of interface connection to a wrong interface;
the sorting unit is used for sorting the plurality of fault test cases based on the fault effect of each fault test case;
the test unit is used for carrying out interface fault test according to the sorted fault test cases;
the sorting unit includes:
the merging unit is used for merging fault test cases with the same fault effect;
the retention unit is used for retaining the fault test case with the unique fault effect;
the merging unit is used for any two fault test cases: if the interfaces of one of the fault test cases, which need to be connected with each interface, exist in the other fault test case, and the other interfaces do not exist in the other fault test case, it is determined that the fault effects of the two fault test cases are the same, and/or, for any two fault test cases: and if each interface in one fault test case exists in the other fault test case and other interfaces do not exist in the other fault test case, determining that the fault effects of the two fault test cases are the same.
7. A computer-readable storage medium, characterized in that the storage medium includes a stored program, wherein when the program runs, the apparatus where the storage medium is located is controlled to execute the interface fault testing method according to any one of claims 1 to 5.
8. A storage management apparatus, characterized in that the storage management apparatus comprises:
a memory for storing a program;
a processor, coupled to the memory, for executing the program to perform the interface failure testing method of any one of claims 1 to 5.
CN202110971187.XA 2021-08-24 2021-08-24 Interface fault testing method and device Active CN113419970B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110971187.XA CN113419970B (en) 2021-08-24 2021-08-24 Interface fault testing method and device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110971187.XA CN113419970B (en) 2021-08-24 2021-08-24 Interface fault testing method and device

Publications (2)

Publication Number Publication Date
CN113419970A CN113419970A (en) 2021-09-21
CN113419970B true CN113419970B (en) 2021-12-24

Family

ID=77719516

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110971187.XA Active CN113419970B (en) 2021-08-24 2021-08-24 Interface fault testing method and device

Country Status (1)

Country Link
CN (1) CN113419970B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115617663A (en) * 2022-10-13 2023-01-17 交控科技股份有限公司 Test method, device and electronic equipment for pulse voting function

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9026394B2 (en) * 2007-10-08 2015-05-05 Wurldtech Security Technologies Testing and mitigation framework for networked devices
CN104375943A (en) * 2014-12-11 2015-02-25 吴翔虎 Embedded software black-box test case generation method based on static models
CN107894952A (en) * 2017-11-08 2018-04-10 中国平安人寿保险股份有限公司 Generation method, device, equipment and the readable storage medium storing program for executing of interface testing use-case
CN108153670B (en) * 2017-11-30 2021-07-30 北京奇艺世纪科技有限公司 Interface testing method and device and electronic equipment
CN110865941A (en) * 2019-11-11 2020-03-06 中信百信银行股份有限公司 Interface test case generation method, device and system
CN111258299B (en) * 2020-01-22 2021-05-28 卡斯柯信号(北京)有限公司 Test method and system for interval occupation logic check function of train control center
CN111414310A (en) * 2020-04-01 2020-07-14 国网新疆电力有限公司电力科学研究院 Test method and system for power grid security and stability control device with automatic generation of test cases
CN113267702A (en) * 2021-06-24 2021-08-17 广东电网有限责任公司 Method and device for generating test case of power distribution network fault self-healing system

Also Published As

Publication number Publication date
CN113419970A (en) 2021-09-21

Similar Documents

Publication Publication Date Title
CN110376876B (en) Double-system synchronous safety computer platform
CN108200124B (en) High-availability application program architecture and construction method
CN102882704B (en) Link protection method in the soft reboot escalation process of a kind of ISSU and equipment
CN114355760A (en) Main control station and hot standby redundancy control method thereof
CN112948063B (en) Cloud platform creation method and device, cloud platform and cloud platform implementation system
CN110008005B (en) Cloud platform-based power grid communication resource virtual machine migration system and method
CN107957692B (en) Controller redundancy method, device and system
CN102724093A (en) Advanced telecommunications computing architecture (ATCA) machine frame and intelligent platform management bus (IPMB) connection method thereof
CN113419970B (en) Interface fault testing method and device
CN103631688A (en) Method and system for testing interface signal
CN102636987B (en) Dual control device
CN104394016A (en) ISSU upgrade method and device
CN110247809B (en) Communication control method of double-ring network control system
CN108984105B (en) Method and device for distributing replication tasks in network storage device
CN106338938B (en) A kind of backplane bus communication addressing system and method
CN113986618B (en) Cluster split-brain automatic repair method, system, device and storage medium
CN110497941A (en) Hot backup redundancy system equipment
CN112699648B (en) Data processing method and device
CN108388228A (en) A kind of synchronous debugging method and apparatus for multichannel embedded control system
WO2024187819A1 (en) Traveling control system, and traveling control method and apparatus
CN106896792A (en) Method of data synchronization and device
CN110035007A (en) Data transmission method and system, storage medium, electronic device
CN116881133A (en) Method and system for generating full-scene test case set based on message log
CN106814643A (en) The control method and system of a kind of two-node cluster hot backup
CN113987757A (en) Simulation fault test reconstruction method for complex avionic system

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant