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CN113410176B - OLED devices and manufacturing methods - Google Patents

OLED devices and manufacturing methods Download PDF

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Publication number
CN113410176B
CN113410176B CN202010183590.1A CN202010183590A CN113410176B CN 113410176 B CN113410176 B CN 113410176B CN 202010183590 A CN202010183590 A CN 202010183590A CN 113410176 B CN113410176 B CN 113410176B
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layer
forming
contact hole
circuit substrate
chip circuit
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CN113410176A (en
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李晓飞
许宗能
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Nexchip Semiconductor Corp
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/131Interconnections, e.g. wiring lines or terminals
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/123Connection of the pixel electrodes to the thin film transistors [TFT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/1201Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/122Pixel-defining structures or layers, e.g. banks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

The invention provides an OLED device and a manufacturing method thereof, which can enable the original chip circuit substrate to be directly externally connected with the material of the display part of the OLED device by adding three processes of a conductive contact plug, an anode and a pixel definition layer on the basis of the original structure of the chip circuit substrate for completing the BEOL manufacturing process, so that the finally manufactured device can have an OLED display function, and an OLED display device is obtained. In addition, the structure such as the conductive contact plug, the anode and the pixel defining layer can be directly manufactured on the basis of the original structure of the chip circuit substrate for completing the BEOL manufacturing process, so that the problem that extra space is occupied by bonding wires and a sealing area when the OLED display panel and the chip circuit substrate are electrically connected together by means of a packaging process and the like can be avoided, the size of the finally manufactured OLED device is further reduced, and the OLED micro-display device is particularly suitable for manufacturing OLED micro-displays such as glasses.

Description

OLED器件及其制造方法OLED devices and manufacturing methods

技术领域Technical field

本发明涉及OLED器件的制造技术领域,特别涉及一种OLED器件及其制造方法。The present invention relates to the technical field of manufacturing OLED devices, and in particular to an OLED device and a manufacturing method thereof.

背景技术Background technique

有机发光二极管(Organic Light Emitting Diode,OLED)微型显示器属于一种硅基显示器。由于硅基器件优良的电学特性和极细微的器件尺寸,可以实现显示IC基片的高度集成化。一般的OLED微型显示器的制造方法一般是:先直接在一硅基板上制备OLED发光单元等显示部分,以形成OLED显示面板,在另一基板上通过前段制程(Front End of Line,FEOL)和后段制程(Back End of Line,BEOL)制备用于控制和驱动显示部分工作的芯片电路等,以形成芯片电路基板,如图1所示,该芯片电路基板100具有顶层金属互连线101、钝化层102和铝焊盘103,钝化层102覆盖在顶层金属互连线101上,铝焊盘103的底部镶嵌在钝化层102中且与部分顶层金属互连线101的顶部接触;之后再经过薄膜封装、盖片封装等方法,将OLED显示面板与驱动控制芯片基板电连接,以最终制得OLED微型显示器。Organic Light Emitting Diode (OLED) microdisplay is a silicon-based display. Due to the excellent electrical properties and extremely small device size of silicon-based devices, a high degree of integration of display IC substrates can be achieved. The manufacturing method of a general OLED microdisplay is generally: first directly prepare the OLED light-emitting unit and other display parts on a silicon substrate to form an OLED display panel, and then pass the front end of line (FEOL) and back-end processes on another substrate. The back end of line (BEOL) process prepares chip circuits for controlling and driving the display part to form a chip circuit substrate. As shown in Figure 1, the chip circuit substrate 100 has a top metal interconnection line 101, a blunt Passivation layer 102 and aluminum pad 103, passivation layer 102 covers the top metal interconnection line 101, the bottom of the aluminum pad 103 is embedded in the passivation layer 102 and contacts the top of part of the top metal interconnection line 101; then Then, the OLED display panel is electrically connected to the drive control chip substrate through film encapsulation, cover sheet encapsulation and other methods to finally produce an OLED microdisplay.

上述的方法中,一方面,芯片电路基板上无法直接外接OLED显示部分的材料,另一方面,在借助封装工艺等将OLED显示面板与芯片电路基板电连接在一起时,焊线和封胶区域会占用额外的空间,不利于显示器尺寸的进一步缩小。In the above method, on the one hand, the materials of the OLED display part cannot be directly connected to the chip circuit substrate. On the other hand, when the OLED display panel and the chip circuit substrate are electrically connected together by means of packaging processes, the bonding wires and sealing areas It will take up extra space and is not conducive to further reduction of the display size.

发明内容Contents of the invention

本发明的目的在于提供一种OLED显示器件及其制造方法,能在驱动控制芯片基板的结构制作完成后直接在驱动控制芯片基板上外接OLED显示部分的材料,使得最终形成的显示器件面积更小。The object of the present invention is to provide an OLED display device and its manufacturing method, which can directly connect the OLED display part material to the drive control chip substrate after the structure of the drive control chip substrate is completed, so that the area of the final formed display device is smaller. .

为解决上述技术问题,本发明提供一种OLED器件的制造方法,包括:In order to solve the above technical problems, the present invention provides a manufacturing method of an OLED device, including:

提供一完成后段制程的芯片电路基板,所述芯片电路基板具有多条顶层金属互连线;Provide a chip circuit substrate that has completed the back-end process, and the chip circuit substrate has a plurality of top metal interconnect lines;

形成绝缘覆盖层覆盖于所述芯片电路基板上,并刻蚀所述绝缘覆盖层至暴露出相应的所述顶层金属互连线的表面,以形成接触孔;Form an insulating covering layer to cover the chip circuit substrate, and etch the insulating covering layer to expose the corresponding surface of the top metal interconnect line to form a contact hole;

形成导电接触插塞于所述接触孔中;Forming conductive contact plugs in the contact holes;

形成多个相互分立的阳极于所述绝缘覆盖层的部分表面上,且各个所述阳极的底部与相应的导电接触插塞的顶部电接触;Forming a plurality of mutually independent anodes on a portion of the surface of the insulating covering layer, and the bottom of each of the anodes is in electrical contact with the top of the corresponding conductive contact plug;

形成图案化的像素界定层于各个所述阳极及其周围的绝缘覆盖层的表面上,所述像素界定层在每个所述阳极的上表面上具有像素开口;Forming a patterned pixel defining layer on the surface of each of the anodes and the surrounding insulating covering layer, the pixel defining layer having a pixel opening on the upper surface of each of the anodes;

形成有机发光层填充于各个所述像素开口中,并形成阴极至少覆盖于所述有机发光层上,以形成OLED发光元件于所述芯片电路基板上。An organic light-emitting layer is formed to fill each of the pixel openings, and a cathode is formed to at least cover the organic light-emitting layer to form an OLED light-emitting element on the chip circuit substrate.

可选地,所述芯片电路基板还具有钝化层,所述钝化层覆盖各条所述顶层金属互连线的上表面并具有至少一个开口,各个所述开口暴露出相应的所述顶层金属互连线的部分区域,且各个所述开口中形成有焊盘。Optionally, the chip circuit substrate further has a passivation layer, the passivation layer covers the upper surface of each of the top metal interconnect lines and has at least one opening, and each of the openings exposes the corresponding top layer. A partial area of the metal interconnection line, and a pad is formed in each of the openings.

可选地,在形成图案化的所述像素界定层之后且在形成所述有机发光层之前,还包括:通过光刻和刻蚀工艺打开所述焊盘上方的绝缘覆盖层,以暴露出所述焊盘的上表面。Optionally, after forming the patterned pixel defining layer and before forming the organic light-emitting layer, the method further includes: opening the insulating covering layer above the bonding pad through a photolithography and etching process to expose the the upper surface of the pad.

可选地,形成具有所述接触孔的所述绝缘覆盖层于所述芯片电路基板上的步骤包括:Optionally, the step of forming the insulating covering layer with the contact hole on the chip circuit substrate includes:

在所述钝化层和所述焊盘的表面上形成介质覆盖层,并将所述焊盘掩埋在内;Form a dielectric covering layer on the surface of the passivation layer and the bonding pad, and bury the bonding pad;

对所述介质覆盖层进行顶部平坦化,以使得所述介质覆盖层具备平坦的上表面;Perform top planarization on the dielectric covering layer so that the dielectric covering layer has a flat upper surface;

在所述介质覆盖层的表面上依次形成硬掩膜覆盖层和具有接触孔图案的光刻胶层,所述接触孔图案所定义的接触孔与相应的所述顶层金属互连线的部分区域对准;A hard mask covering layer and a photoresist layer having a contact hole pattern are sequentially formed on the surface of the dielectric covering layer. The contact holes defined by the contact hole pattern correspond to partial areas of the top metal interconnection lines. alignment;

以所述光刻胶层为掩膜,刻蚀所述绝缘覆盖层至暴露出相应的所述顶层金属互连线的表面,以形成所述接触孔。Using the photoresist layer as a mask, the insulating covering layer is etched to expose the corresponding surface of the top metal interconnection line to form the contact hole.

可选地,形成所述导电接触插塞于所述接触孔中的步骤包括:Optionally, the step of forming the conductive contact plug in the contact hole includes:

沉积导电材料于所述绝缘覆盖层和所述接触孔的表面上,沉积的所述导电材料至少能填满所述接触孔;Depositing conductive material on the surface of the insulating covering layer and the contact hole, the deposited conductive material can at least fill the contact hole;

对沉积的所述导电材料进行化学机械抛光,直至暴露出所述绝缘覆盖层的上表面,以形成填充于所述接触孔中的所述导电接触插塞。The deposited conductive material is chemically and mechanically polished until an upper surface of the insulating covering layer is exposed to form the conductive contact plug filled in the contact hole.

可选地,形成多个所述阳极于所述绝缘覆盖层的表面上的步骤包括:Optionally, the step of forming a plurality of anodes on the surface of the insulating covering layer includes:

形成阳极材料层覆盖于所述绝缘覆盖层和所述导电接触插塞的表面上;Forming an anode material layer covering the surface of the insulating covering layer and the conductive contact plug;

形成具有阳极图案的光刻胶层于所述阳极材料层上;Forming a photoresist layer with an anode pattern on the anode material layer;

以所述光刻胶层为掩膜,刻蚀所述阳极材料层,以形成位于各个导电接触插塞上方并相互分立的多个所述阳极。Using the photoresist layer as a mask, the anode material layer is etched to form a plurality of anodes located above each conductive contact plug and separated from each other.

可选地,形成所述图案化的像素界定层的步骤包括:Optionally, the step of forming the patterned pixel defining layer includes:

形成像素界定层覆盖于所述绝缘覆盖层和各个所述阳极的表面上;Forming a pixel defining layer covering the surface of the insulating covering layer and each of the anodes;

形成具有像素界定图案的光刻胶层于所述像素界定层上;Forming a photoresist layer having a pixel defining pattern on the pixel defining layer;

以所述光刻胶层为掩膜,刻蚀所述像素界定层,以去除多余的所述像素界定层,并在每个所述阳极的上表面上形成相应的像素开口。Using the photoresist layer as a mask, the pixel defining layer is etched to remove excess of the pixel defining layer and form corresponding pixel openings on the upper surface of each anode.

可选地,所述接触孔为环形接触孔,所述导电接触插塞为环形插塞,所述导电接触插塞所围的区域为透光且不导电的材料。Optionally, the contact hole is an annular contact hole, the conductive contact plug is an annular plug, and the area surrounded by the conductive contact plug is made of light-transmitting and non-conductive material.

基于同一发明构思,本发明还提供一种OLED器件,包括:Based on the same inventive concept, the present invention also provides an OLED device, including:

一完成后段制程的芯片电路基板,所述芯片电路基板具有多条顶层金属互连线;A chip circuit substrate that has completed the back-end process, and the chip circuit substrate has a plurality of top metal interconnect lines;

绝缘覆盖层,所述绝缘覆盖层覆盖于所述芯片电路基板上,并具有暴露出相应的所述顶层金属互连线的部分上表面的接触孔;An insulating covering layer covering the chip circuit substrate and having contact holes exposing part of the upper surface of the corresponding top metal interconnect line;

导电接触插塞,填充于所述接触孔中;Conductive contact plugs filled in the contact holes;

多个相互分立的阳极,形成于所述绝缘覆盖层的部分表面上,且各个所述阳极的底部与相应的导电接触插塞的顶部接触;A plurality of mutually independent anodes are formed on part of the surface of the insulating covering layer, and the bottom of each of the anodes is in contact with the top of the corresponding conductive contact plug;

图案化的像素界定层,形成于各个所述阳极及其周围的绝缘覆盖层的表面上,所述像素界定层在每个所述阳极的上表面上具有像素开口;A patterned pixel defining layer formed on the surface of each of the anodes and the surrounding insulating covering layer, the pixel defining layer having a pixel opening on the upper surface of each of the anodes;

有机发光层,填充于各个所述像素开口中;以及,An organic light-emitting layer filled in each of the pixel openings; and,

阴极,至少覆盖于所述有机发光层上。The cathode at least covers the organic light-emitting layer.

可选地,所述的OLED器件中,所述芯片电路基板还具有钝化层,所述钝化层覆盖各条所述顶层金属互连线的上表面并具有至少一个开口,各个所述开口暴露出相应的所述顶层金属互连线的部分区域,且各个所述开口中形成有焊盘;所述绝缘覆盖层还具有暴露出所述焊盘的上表面的开口。Optionally, in the OLED device, the chip circuit substrate also has a passivation layer, the passivation layer covers the upper surface of each of the top metal interconnect lines and has at least one opening, each of the openings Partial areas of the corresponding top metal interconnect lines are exposed, and pads are formed in each of the openings; the insulating covering layer also has openings that expose the upper surfaces of the pads.

可选地,所述的OLED器件中,所述绝缘覆盖层包括依次堆叠在所述钝化层上的介质覆盖层和硬掩膜覆盖层,且所述介质覆盖层覆盖在所述钝化层和所述焊盘的表面上并具有平坦的上表面。Optionally, in the OLED device, the insulating covering layer includes a dielectric covering layer and a hard mask covering layer sequentially stacked on the passivation layer, and the dielectric covering layer covers the passivation layer. and on the surface of the pad and has a flat upper surface.

可选地,所述的OLED器件中,所述接触孔为环形接触孔,所述导电接触插塞为环形插塞,所述导电接触插塞所围的区域为透光且不导电的材料。Optionally, in the OLED device, the contact hole is an annular contact hole, the conductive contact plug is an annular plug, and the area surrounded by the conductive contact plug is made of light-transmitting and non-conductive material.

与现有技术相比,本发明的技术方案,具有以下有益效果:Compared with the existing technology, the technical solution of the present invention has the following beneficial effects:

1、能够在完成BEOL制程的芯片电路基板的原有结构基础上,通过增加导电接触插塞、阳极以及像素界定层三道工艺,来使得原有的芯片电路基板能够直接外接OLED器件的显示部分的材料,从而使得最终制得的器件能够具有OLED显示功能,即获得了OLED显示器件。1. On the basis of the original structure of the chip circuit substrate that has completed the BEOL process, by adding three processes of conductive contact plugs, anodes and pixel definition layers, the original chip circuit substrate can be directly connected to the display part of the OLED device materials, so that the final device can have OLED display function, that is, an OLED display device is obtained.

2、由于能够直接在完成BEOL制程的芯片电路基板的原有结构基础上制作出导电接触插塞、阳极以及像素界定层等结构,从而可以避免在借助封装工艺等将OLED显示面板与芯片电路基板电连接在一起时焊线和封胶区域会占用额外的空间的问题,有利于最终制得的OLED器件的尺寸的进一步缩小,特别适用于眼镜等OLED微型显示器的制作要求。2. Because structures such as conductive contact plugs, anodes, and pixel definition layers can be produced directly based on the original structure of the chip circuit substrate that has completed the BEOL process, it is possible to avoid the need to use packaging processes to separate the OLED display panel from the chip circuit substrate. The problem that the bonding wires and sealant areas will take up extra space when electrically connected together is conducive to further reducing the size of the final OLED device, which is especially suitable for the production requirements of OLED micro-displays such as glasses.

3、由于相应的阳极和顶层金属互连线之间是通过填充于接触孔中的导电接触插塞来直接电连接,因此有利于最终制得的OLED器件的厚度的进一步缩小,特别适用于超薄OLED微型显示器的制作要求。3. Since the corresponding anode and the top metal interconnection line are directly electrically connected through the conductive contact plug filled in the contact hole, it is conducive to further reducing the thickness of the final OLED device, which is especially suitable for ultra-high-end devices. Fabrication requirements for thin OLED microdisplays.

4、所述导电接触插塞为环形插塞,所述导电接触插塞所围的区域为透光且不导电的材料,由此能够使得形成的OLED器件所发出的光能够更多的通过穿过所述导电接触插塞所围的区域,以提高形成的OLED器件的出光效率。4. The conductive contact plug is an annular plug, and the area surrounded by the conductive contact plug is made of light-transmitting and non-conductive material, so that more light emitted by the formed OLED device can pass through the through the area surrounded by the conductive contact plugs to improve the light extraction efficiency of the formed OLED device.

附图说明Description of the drawings

图1是一种现有的已完成BEOL制程的芯片电路基板的剖面结构示意图;Figure 1 is a schematic cross-sectional structural diagram of an existing chip circuit substrate that has completed the BEOL process;

图2是本发明具体实施例的OLED器件的制造方法流程图;Figure 2 is a flow chart of a manufacturing method of an OLED device according to a specific embodiment of the present invention;

图3A至图3I是本发明具体实施例的OLED器件的制造方法中的器件剖面结构示意图。3A to 3I are schematic cross-sectional structural diagrams of the device in the manufacturing method of the OLED device according to specific embodiments of the present invention.

具体实施方式Detailed ways

以下结合附图和具体实施例对本发明提出的技术方案作进一步详细说明。根据下面说明,本发明的优点和特征将更清楚。需说明的是,附图均采用非常简化的形式且均使用非精准的比例,仅用以方便、明晰地辅助说明本发明实施例的目的。The technical solution proposed by the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer from the following description. It should be noted that the drawings are in a very simplified form and use imprecise proportions, and are only used to conveniently and clearly assist in explaining the embodiments of the present invention.

请参考图2,本发明一实施例提供一种OLED器件的制造方法,包括:Please refer to Figure 2. One embodiment of the present invention provides a manufacturing method for an OLED device, including:

S1,提供一完成后段制程的芯片电路基板,所述芯片电路基板具有多条顶层金属互连线;S1: Provide a chip circuit substrate that has completed the back-end process, and the chip circuit substrate has a plurality of top metal interconnect lines;

S2,形成绝缘覆盖层覆盖于所述芯片电路基板上,并刻蚀所述绝缘覆盖层至暴露出相应的所述顶层金属互连线的表面,以形成接触孔;S2, form an insulating covering layer to cover the chip circuit substrate, and etch the insulating covering layer to expose the corresponding surface of the top metal interconnection line to form contact holes;

S3,形成导电接触插塞于所述接触孔中;S3, forming a conductive contact plug in the contact hole;

S4,形成多个相互分立的阳极于所述绝缘覆盖层的部分表面上,且各个所述阳极的底部与相应的导电接触插塞的顶部电接触;S4, form a plurality of mutually separated anodes on part of the surface of the insulating covering layer, and the bottom of each anode is in electrical contact with the top of the corresponding conductive contact plug;

S5,形成图案化的像素界定层于各个所述阳极及其周围的绝缘覆盖层的表面上,所述像素界定层在每个所述阳极的上表面上具有像素开口;S5, forming a patterned pixel defining layer on the surface of each of the anodes and the surrounding insulating covering layer, the pixel defining layer having a pixel opening on the upper surface of each of the anodes;

S6,通过光刻和刻蚀工艺打开所述焊盘上方的绝缘覆盖层,以暴露出所述焊盘的上表面;S6, open the insulating covering layer above the bonding pad through photolithography and etching processes to expose the upper surface of the bonding pad;

S7,形成有机发光层填充于各个所述像素开口中,并形成阴极至少覆盖于所述有机发光层上。S7: Form an organic light-emitting layer to fill each of the pixel openings, and form a cathode to at least cover the organic light-emitting layer.

请参考图3A,在步骤S1中,提供一完成前段制程(FEOL)和后段制程(BEOL)的芯片电路基板,其中,前段制程主要是在一半导体衬底(未图示,例如是硅晶圆)上制作出晶体管、二极管、电阻器、电容器、电感器等电子元件(未图示),其形成晶体管的具体过程包括:首先,通过浅沟槽隔离工艺在半导体衬底上划分制备体管的器件区域(active area),然后,通过离子注入工艺将相应的器件区域转换为N型区域和P型区域,之后通过先栅极工艺或者后栅极工艺在相应的器件区域上制作栅极,随后再通过离子注入工艺形成每一个晶体管的源极(source)和漏极(drain)等。后段制程主要是用来布线,以使得不同的电子元件之间实现相应的电连接,并引出焊盘,其具体过程包括:通过层间介质层沉积、钨插塞成型、大马士革铜互连镶嵌(单镶嵌或双镶嵌)等工艺形成若干层金属互连线,不同层金属互连线之间由填充在通孔中的导电插塞相连;在形成顶层金属互连线301a、301b之后,在顶层金属互连线301a、301b和层间介质层300上形成一钝化层302,以对顶层金属互连线301a、301b等器件结构进行保护,其中,顶层金属互连线301a用于在后续与形成的OLED发光元件的阳极电连接,顶层金属互连线301b在后续用于引出焊盘303;然后刻蚀钝化层302,形成至少一个暴露出相应的顶层金属互连线301b的部分上表面的开口(未图示);之后,通过铝等金属的沉积、刻蚀等工艺或者植球等工艺来各个开口中形成焊盘303。Please refer to FIG. 3A. In step S1, a chip circuit substrate that has completed the front-end process (FEOL) and the back-end process (BEOL) is provided. The front-end process mainly involves a semiconductor substrate (not shown, such as silicon wafer). Electronic components (not shown) such as transistors, diodes, resistors, capacitors, and inductors are made on the circle). The specific process of forming transistors includes: first, dividing and preparing transistors on the semiconductor substrate through a shallow trench isolation process device area (active area), and then convert the corresponding device area into an N-type area and a P-type area through an ion implantation process, and then make a gate on the corresponding device area through a gate-first process or a gate-last process. The source and drain of each transistor are then formed through an ion implantation process. The back-end process is mainly used for wiring to achieve corresponding electrical connections between different electronic components and lead out the pads. The specific process includes: interlayer dielectric layer deposition, tungsten plug molding, and Damascus copper interconnect inlay (single damascene or dual damascene) and other processes to form several layers of metal interconnection lines, and different layers of metal interconnection lines are connected by conductive plugs filled in the through holes; after forming the top metal interconnection lines 301a and 301b, A passivation layer 302 is formed on the top metal interconnection lines 301a, 301b and the interlayer dielectric layer 300 to protect the top metal interconnection lines 301a, 301b and other device structures, wherein the top metal interconnection line 301a is used for subsequent Electrically connected to the anode of the formed OLED light-emitting element, the top metal interconnection line 301b is subsequently used to lead out the pad 303; the passivation layer 302 is then etched to form at least one portion that exposes the corresponding top metal interconnection line 301b. openings (not shown) on the surface; after that, bonding pads 303 are formed in each opening through processes such as deposition of metals such as aluminum, etching, or ball planting.

请参考图3A和图3B,在步骤S2,首先,可以采用沉积工艺(诸如各种CVD、各种PVD或ALD等),在钝化层302和焊盘303的表面上覆盖介质覆盖层304,介质覆盖层304的材料包括例如氧化硅、氮化硅、氮氧化硅、硅酸乙酯(TEOS)形成的氧化物、磷硅玻璃(PSG)、硼磷硅玻璃(BPSG)、介电常数K低于3.9的低K介电材料、有机绝缘材料(例如,丙烯酸树脂、环氧树脂、酚醛树脂、聚酰胺树脂、聚酰亚胺树脂等)、其它合适的介电材料或它们的组合。示例性地,低K介电材料包括氟硅玻璃(FSG)、碳掺杂的氧化硅、聚酰亚胺等及它们的组合。介质覆盖层304的厚度足够厚,以将焊盘303完全掩埋在内,且能在后续提供不暴露出焊盘303的上表面的平坦的顶部表面。然后,通过化学机械抛光(CMP)工艺对介质覆盖层304进行顶部平坦化,直至介质覆盖层304的厚度以及顶面平整度符合要求,从而使得所述介质覆盖层304具备平坦的上表面,且将所述焊盘303掩埋在内,并为后续工艺提供平坦的工艺平台。接着,采用沉积工艺(诸如各种化学气相沉积CVD工艺、各种物理气相沉积PVD工艺或原子层气相沉积ALD工艺等)在所述介质覆盖层304上覆盖硬掩膜覆盖层305,并进一步通过旋涂等工艺在硬掩膜覆盖层305上覆盖光刻胶层306,硬掩膜覆盖层305的材料包括例如氧化硅、氮化硅、氮氧化硅中的至少一种。然后,通过曝光、显影等一系列光刻工艺,使得光刻胶层306图案化,以在光刻胶层306中形成接触孔图案,所述接触孔图案所定义的接触孔与相应的所述顶层金属互连线301a的部分区域对准。之后,以具有接触孔图案的光刻胶层306为掩膜,依次刻蚀硬掩膜覆盖层305、介质覆盖层304以及钝化层302,直至暴露出相应的所述顶层金属互连线301a的部分上表面,以形成接触孔307。最后去除光刻胶层306。Please refer to Figure 3A and Figure 3B. In step S2, first, a deposition process (such as various CVD, various PVD or ALD, etc.) can be used to cover the surface of the passivation layer 302 and the pad 303 with the dielectric coating layer 304, The material of the dielectric covering layer 304 includes, for example, silicon oxide, silicon nitride, silicon oxynitride, oxide formed of ethyl ethyl silicate (TEOS), phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), dielectric constant K Low-K dielectric materials below 3.9, organic insulating materials (eg, acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.), other suitable dielectric materials, or combinations thereof. Exemplarily, low-K dielectric materials include fluorosilicate glass (FSG), carbon-doped silicon oxide, polyimide, and the like, and combinations thereof. The thickness of the dielectric cap layer 304 is thick enough to completely bury the pad 303 and subsequently provide a flat top surface without exposing the upper surface of the pad 303 . Then, the top of the dielectric covering layer 304 is planarized through a chemical mechanical polishing (CMP) process until the thickness and top surface flatness of the dielectric covering layer 304 meet the requirements, so that the dielectric covering layer 304 has a flat upper surface, and The pad 303 is buried inside and provides a flat process platform for subsequent processes. Next, a deposition process (such as various chemical vapor deposition CVD processes, various physical vapor deposition PVD processes or atomic layer vapor deposition ALD processes, etc.) is used to cover the hard mask cover layer 305 on the dielectric cover layer 304, and further pass through Processes such as spin coating cover the photoresist layer 306 on the hard mask covering layer 305. The material of the hard mask covering layer 305 includes, for example, at least one of silicon oxide, silicon nitride, and silicon oxynitride. Then, through a series of photolithography processes such as exposure and development, the photoresist layer 306 is patterned to form a contact hole pattern in the photoresist layer 306. The contact holes defined by the contact hole pattern are consistent with the corresponding contact holes. Partial areas of the top metal interconnect lines 301a are aligned. After that, using the photoresist layer 306 with the contact hole pattern as a mask, the hard mask covering layer 305, the dielectric covering layer 304 and the passivation layer 302 are sequentially etched until the corresponding top metal interconnection line 301a is exposed. part of the upper surface to form a contact hole 307. Finally, the photoresist layer 306 is removed.

需要说明的是,本实施例中,芯片电路基板的各个层和各个结构的选材需要满足OLED器件的性能要求,尤其是反射率要与OLED器件的出光性能相匹配。It should be noted that in this embodiment, the material selection of each layer and each structure of the chip circuit substrate needs to meet the performance requirements of the OLED device, especially the reflectivity must match the light extraction performance of the OLED device.

顶层金属互连线301a按照OLED器件的像素阵列适应性设置,该顶层金属互连线301a一方面可以作为将后续形成的OLED发光元件(即发光二极管)与芯片电路基板中相应的晶体管等电子元件电连接的线路,另一方面还可作为反射层,以将传递到此处的OLED发光元件发出的光进行反射,以提高OLED器件的出光效率。另外,光刻胶层306中的接触孔图案为环形,因此与后续每个阳极对应的顶层金属互连线301a的区域上均会形成一个环形接触孔(即一实心柱周围环绕一沟槽),由此使得后续形成的导电接触插塞为环形插塞,由此一方面能够保证后续形成的OLED发光元件(即发光二极管)的阳极与相应的顶层金属互连线301a之间的电连接可靠性,另一方面能够降低导电接触插塞对OLED器件所发出的光的遮挡,使得相应的光能够从所述导电接触插塞所围的内部区域中穿过,进而最终提高形成的OLED器件的出光效率。在本发明的其他实施例中,为了降低刻蚀接触孔307的难度,并避免光刻胶层306在刻蚀介质覆盖层304以及钝化层302中过程中产生聚合物残留而影响形成的接触孔307的形貌,提高接触孔图案向下层转移的可靠性,可以先将光刻胶层306中的接触孔图案转移到硬掩膜覆盖层305中,然后去除光刻胶层306,再继续以硬掩膜覆盖层305为掩膜,刻蚀介质覆盖层304以及钝化层302,直至暴露出相应的所述顶层金属互连线301a的部分上表面,以形成接触孔307。The top metal interconnection line 301a is set according to the adaptability of the pixel array of the OLED device. On the one hand, the top metal interconnection line 301a can be used to connect the subsequently formed OLED light-emitting elements (ie, light-emitting diodes) with the corresponding transistors and other electronic components in the chip circuit substrate. On the other hand, the electrically connected lines can also serve as a reflective layer to reflect the light emitted by the OLED light-emitting element transmitted thereto, thereby improving the light extraction efficiency of the OLED device. In addition, the contact hole pattern in the photoresist layer 306 is annular, so an annular contact hole (i.e., a solid pillar surrounded by a trench) will be formed in the area of the top metal interconnect line 301a corresponding to each subsequent anode. , so that the subsequently formed conductive contact plug is a ring plug, which on the one hand can ensure reliable electrical connection between the anode of the subsequently formed OLED light-emitting element (ie, light-emitting diode) and the corresponding top-level metal interconnection line 301a On the other hand, it can reduce the blocking of the light emitted by the OLED device by the conductive contact plug, so that the corresponding light can pass through the internal area surrounded by the conductive contact plug, thereby ultimately improving the performance of the formed OLED device. Light extraction efficiency. In other embodiments of the present invention, in order to reduce the difficulty of etching the contact hole 307 and avoid the photoresist layer 306 from generating polymer residues during the etching of the dielectric cover layer 304 and the passivation layer 302 to affect the formed contact. The shape of the hole 307 improves the reliability of transferring the contact hole pattern to the lower layer. You can first transfer the contact hole pattern in the photoresist layer 306 to the hard mask covering layer 305, and then remove the photoresist layer 306 before continuing. Using the hard mask covering layer 305 as a mask, the dielectric covering layer 304 and the passivation layer 302 are etched until part of the upper surface of the corresponding top metal interconnection line 301a is exposed to form a contact hole 307.

请参考图3C,在步骤S3中,首先,可以使用ALD、CVD、PVD、电镀、化学镀、任何其它合适的工艺或组合,向接触孔307中填充导电材料,直至填满各个接触孔307,且当使用ALD、CVD、PVD等沉积工艺来向接触孔307中填充导电材料时,沉积的导电材料还覆盖在硬掩膜覆盖层305的表面,且沉积的导电材料至少能填满所述接触孔307,此外,用于填充接触孔307的导电材料可以包括但不限于钨、钴、铜、铝、多晶硅、掺杂硅、硅化物或其任意组合。然后,可以对沉积的所述导电材料进行化学机械抛光,直至暴露出所述硬掩膜覆盖层305的上表面,以形成填充于所述接触孔307中的所述导电接触插塞308。每个导电接触插塞308的底部与相应的顶层金属互连线301a的顶部电接触。Please refer to FIG. 3C. In step S3, first, ALD, CVD, PVD, electroplating, chemical plating, or any other suitable process or combination can be used to fill the contact holes 307 with conductive material until each contact hole 307 is filled. And when a deposition process such as ALD, CVD, PVD, etc. is used to fill the contact hole 307 with conductive material, the deposited conductive material also covers the surface of the hard mask covering layer 305, and the deposited conductive material can at least fill the contact. Hole 307, furthermore, the conductive material used to fill contact hole 307 may include, but is not limited to, tungsten, cobalt, copper, aluminum, polysilicon, doped silicon, silicide, or any combination thereof. Then, the deposited conductive material may be chemically mechanically polished until the upper surface of the hard mask covering layer 305 is exposed to form the conductive contact plug 308 filled in the contact hole 307 . The bottom of each conductive contact plug 308 is in electrical contact with the top of the corresponding top metal interconnect line 301a.

请参考图3D和图3E,在步骤S4中,首先,可以使用ALD、CVD、PVD或其他任何合适的工艺,在所述硬掩膜覆盖层305和所述导电接触插塞308的表面上覆盖阳极材料层309,并进一步在阳极材料层309的表面上涂覆光刻胶层310,其中阳极材料层309的材料可以是铝、铜、银等金属材料,也可以是铟锡氧化物(Indium Tin Oxide,ITO)、氧化铟锌(Indium ZincOxide,IZO)等透明导电材料,但是不限于这些材料,阳极材料层309可以是单层膜的结构,也可以是多层膜堆叠的结构。然后,借助OLED发光元件(发光二极管)的阳极光罩,对光刻胶层310进行曝光、显影等光刻工艺处理,以在光刻胶层310中形成阳极图案,每个阳极图案对准相应的导电接触插塞308。接着,以所述光刻胶层310为掩膜,刻蚀所述阳极材料层309至暴露出硬掩膜覆盖层305的表面,以形成位于各个导电接触插塞308上方并相互分立的多个阳极309a。之后,可以采用常规的干法去胶或者湿法去胶工艺,去除光刻胶层310。由此可见,导电接触插塞308和顶层金属互连线301a的排布需要基于OLED发光元件(发光二极管)的阳极排布来设计,或者说,导电接触插塞308和顶层金属互连线301a的排布需要基于OLED的像素阵列的排布来设计。需要说明的是,在本发明的其他实施例中,为了简化工艺,还可以采用剥离(lift-off)工艺来制作阳极309a,具体过程是:在硬掩膜覆盖层305上经过光刻胶涂覆、曝光、显影后,以具有一定图形的光刻胶膜为掩模,带胶蒸发所需的阳极材料,然后在去除光刻胶膜的同时,把光刻胶膜上的多余阳极材料一起剥离干净,在硬掩膜覆盖层305上只剩下阳极309a。显然,无论从何种工艺形成阳极309a,阳极309a的底部高于焊盘303的顶部,使得芯片电路基板可以直接外接OLED材料。另外,由于阳极309a直接通过垂直的导电接触插塞308与顶层金属互连线301a连接,距离较短,因此可以有利于超薄OLED器件的制作。Please refer to FIG. 3D and FIG. 3E. In step S4, first, ALD, CVD, PVD or any other suitable process may be used to cover the surface of the hard mask covering layer 305 and the conductive contact plug 308. The anode material layer 309 is further coated with a photoresist layer 310 on the surface of the anode material layer 309. The material of the anode material layer 309 can be metal materials such as aluminum, copper, silver, or indium tin oxide (Indium tin oxide). Tin Oxide (ITO), indium zinc oxide (Indium Zinc Oxide, IZO) and other transparent conductive materials, but are not limited to these materials. The anode material layer 309 can be a single-layer film structure or a multi-layer film stack structure. Then, with the anode mask of the OLED light-emitting element (light-emitting diode), the photoresist layer 310 is exposed, developed and other photolithography processes to form an anode pattern in the photoresist layer 310, with each anode pattern aligned accordingly. conductive contact plug 308. Next, using the photoresist layer 310 as a mask, the anode material layer 309 is etched until the surface of the hard mask covering layer 305 is exposed, so as to form a plurality of separate conductive contact plugs 308 located above each other. Anode 309a. Afterwards, the photoresist layer 310 can be removed using a conventional dry or wet glue removal process. It can be seen that the arrangement of the conductive contact plug 308 and the top metal interconnection line 301a needs to be designed based on the anode arrangement of the OLED light emitting element (light emitting diode), or in other words, the conductive contact plug 308 and the top metal interconnection line 301a The arrangement needs to be designed based on the arrangement of the OLED pixel array. It should be noted that in other embodiments of the present invention, in order to simplify the process, a lift-off process can also be used to make the anode 309a. The specific process is: coating the hard mask covering layer 305 with photoresist. After coating, exposure, and development, use a photoresist film with a certain pattern as a mask to evaporate the anode material required for glue evaporation. Then, while removing the photoresist film, remove the excess anode material on the photoresist film. After peeling off, only the anode 309a remains on the hard mask overlay 305. Obviously, no matter what process is used to form the anode 309a, the bottom of the anode 309a is higher than the top of the pad 303, so that the chip circuit substrate can be directly connected to the OLED material. In addition, since the anode 309a is directly connected to the top metal interconnection line 301a through the vertical conductive contact plug 308, the distance is short, which is beneficial to the production of ultra-thin OLED devices.

请参考图3F和3G,在步骤S5中,首先,可以使用ALD、CVD、PVD或其他任何合适的工艺,在所述硬掩膜覆盖层305和各个所述阳极309a的表面上覆盖像素界定层(Pixeldefining layer,PDL)311,并进一步在像素界定层311的表面上涂覆光刻胶层312,其中像素界定层311的材料可以是氧化硅、氮化硅或氮氧化硅等,但是不限于这些材料。然后,借助OLED器件的像素界定层光罩,对光刻胶层312进行曝光、显影等光刻工艺处理,以在光刻胶层312中形成像素界定图案,该像素界定图案可以用于限定各子像素位置。接着,以具有所述像素界定图案的所述光刻胶层312为掩膜,刻蚀所述像素界定层至暴露出硬掩膜覆盖层305的表面,以去除多余的所述像素界定层,并在每个所述阳极309a的上表面上形成相应的像素开口311b。每个像素开口311b用于在后续界定出一个相应的各子像素的位置,剩余的像素界定层311a将每个阳极309a的侧壁、每个阳极309a的除像素开口311b以外的顶部区域以及相邻阳极309a之间的区域覆盖起来,用于保证后续形成的像素之间的间距和绝缘隔离性能,且剩余的像素界定层311a还暴露出焊盘303所在区域上的硬掩膜层305的表面。之后,去除光刻胶层312。Please refer to Figures 3F and 3G. In step S5, first, ALD, CVD, PVD or any other suitable process may be used to cover the pixel definition layer on the surface of the hard mask covering layer 305 and each of the anodes 309a. (Pixeldefining layer, PDL) 311, and further coat a photoresist layer 312 on the surface of the pixel defining layer 311, where the material of the pixel defining layer 311 may be silicon oxide, silicon nitride, silicon oxynitride, etc., but is not limited to these materials. Then, with the help of the pixel defining layer mask of the OLED device, the photoresist layer 312 is subjected to photolithography processes such as exposure and development to form a pixel defining pattern in the photoresist layer 312. The pixel defining pattern can be used to define each element. subpixel position. Next, using the photoresist layer 312 with the pixel defining pattern as a mask, the pixel defining layer is etched to expose the surface of the hard mask covering layer 305 to remove excess of the pixel defining layer. And a corresponding pixel opening 311b is formed on the upper surface of each anode 309a. Each pixel opening 311b is used to subsequently define the position of a corresponding sub-pixel. The remaining pixel definition layer 311a divides the sidewalls of each anode 309a, the top area of each anode 309a except the pixel opening 311b and the corresponding The area between adjacent anodes 309a is covered to ensure the spacing and insulation isolation performance between subsequently formed pixels, and the remaining pixel definition layer 311a also exposes the surface of the hard mask layer 305 in the area where the pad 303 is located. . Afterwards, the photoresist layer 312 is removed.

请参考图3H和图3I,在步骤S6中,首先,在硬掩膜覆盖层305、像素界定层311a以及阳极309a的表面上涂覆光刻胶层313,并对该光刻胶层313进行曝光、显影等光刻工艺处理,以掩蔽像素界定层311a以及阳极309a,并暴露出焊盘303所在的区域。然后,以光刻胶层313为掩膜,刻蚀焊盘303上方的硬掩膜覆盖层304和介质覆盖层305,并对焊盘303进行一定程度的刻蚀,以形成暴露出焊盘303的部分上表面的开口314,此时焊盘303呈凹槽状,由此增大焊盘303与后续形成在开口314中的相应的电结构(例如OLED发光元件的阴极或者焊接引线等)的接触面积,增强焊盘303的向外连接的可靠性。之后去除所述光刻胶层313,以重新暴露出像素界定层311a、像素开口311b以及阳极309a。Please refer to FIG. 3H and FIG. 3I. In step S6, first, a photoresist layer 313 is coated on the surface of the hard mask covering layer 305, the pixel definition layer 311a and the anode 309a, and the photoresist layer 313 is Exposure, development and other photolithography processes are performed to mask the pixel definition layer 311a and the anode 309a, and expose the area where the bonding pad 303 is located. Then, using the photoresist layer 313 as a mask, the hard mask covering layer 304 and the dielectric covering layer 305 above the bonding pad 303 are etched, and the bonding pad 303 is etched to a certain extent to form an exposed bonding pad 303 At this time, the bonding pad 303 is in the shape of a groove, thereby increasing the connection between the bonding pad 303 and the corresponding electrical structure subsequently formed in the opening 314 (such as the cathode of an OLED light-emitting element or a welding lead, etc.) The contact area enhances the reliability of the outward connection of the pad 303. The photoresist layer 313 is then removed to re-expose the pixel defining layer 311a, the pixel opening 311b and the anode 309a.

请继续参考图3I,在步骤S7中,首先,采用蒸镀或者喷墨打印等合适的工艺技术,在相应的像素开口311b中形成有机发光层(未图示),有机发光层还可以被设置在像素界定层311a的上表面上,但有机发光层不会覆盖焊盘303上方的开口314。有机发光层可以包括空穴注入层、空穴传输层、发光层、电子传输层和电子注入层。有机发光层的结构可以被改变为本领域技术人员通常熟知的各种形状。接着,通过可以使用ALD、CVD、PVD、电镀等任何合适的工艺,在所述硬掩膜覆盖层305、有机发光层和像素界定层311a的表面上覆盖阴极材料层(未图示),并进一步在阴极材料层的表面上涂覆光刻胶层(未图示),其中阴极材料层的材料可以是铝、铜、银等金属材料,也可以是铟锡氧化物(Indium Tin Oxide,ITO)、氧化铟锌(Indium Zinc Oxide,IZO)等透明导电材料,但是不限于这些材料,阴极材料层可以是单层膜的结构,也可以是多层膜堆叠的结构。然后,借助OLED发光元件(发光二极管)的阴极光罩,对光刻胶层进行曝光、显影等光刻工艺处理,以在光刻胶层中形成阴极图案,每个阴极图案对准相应的阳极309a。接着,以所述光刻胶层为掩膜,刻蚀所述阴极材料层,以去除多余阴极材料层,并在有机发光层的表面上形成与各个阳极309a相对应的阴极(未图示)。之后,可以采用常规的干法去胶或者湿法去胶工艺,去除该具有阴极图案的光刻胶层。此时,每个阳极309a至上方的阴极之间的叠层结构构成了相应的OLED发光元件。本步骤中,可以使得剩余的阴极材料层的一部分填充在开口314中,由此使得形成的阴极的底部与焊盘303的顶部相接触,此时,芯片电路基板中相应的电子元件能够通过顶层金属互连线301b和焊盘303与阴极连接,也就是说,此时,芯片电路基板中不仅有一部分电路能用于驱动和控制OLED发光元件的阳极,还有另一部分电路能用于驱动和控制OLED发光元件的阴极,由此芯片电路基板能最终控制和驱动OLED发光元件发光。此外,由于焊盘303呈凹槽状,增大了阴极和焊盘303的接触面积,从而提高了芯片电路基板和OLED发光元件的电连接可靠性。Please continue to refer to Figure 3I. In step S7, first, use appropriate process technology such as evaporation or inkjet printing to form an organic light-emitting layer (not shown) in the corresponding pixel opening 311b. The organic light-emitting layer can also be provided On the upper surface of the pixel definition layer 311a, but the organic light emitting layer does not cover the opening 314 above the pad 303. The organic light-emitting layer may include a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer. The structure of the organic light-emitting layer can be changed into various shapes generally known to those skilled in the art. Next, any suitable process such as ALD, CVD, PVD, electroplating, etc. may be used to cover the surfaces of the hard mask covering layer 305, the organic light emitting layer and the pixel defining layer 311a with a cathode material layer (not shown), and A photoresist layer (not shown) is further coated on the surface of the cathode material layer. The material of the cathode material layer can be metal materials such as aluminum, copper, silver, or indium tin oxide (ITO). ), indium zinc oxide (Indium Zinc Oxide, IZO) and other transparent conductive materials, but are not limited to these materials. The cathode material layer can be a single-layer film structure or a multi-layer film stack structure. Then, with the help of the cathode mask of the OLED light-emitting element (light-emitting diode), the photoresist layer is exposed, developed and other photolithography processes to form a cathode pattern in the photoresist layer, and each cathode pattern is aligned with the corresponding anode. 309a. Next, using the photoresist layer as a mask, the cathode material layer is etched to remove excess cathode material layer, and a cathode (not shown) corresponding to each anode 309a is formed on the surface of the organic light-emitting layer. . Afterwards, the photoresist layer with the cathode pattern can be removed using a conventional dry or wet glue removal process. At this time, the stacked structure between each anode 309a and the upper cathode constitutes a corresponding OLED light-emitting element. In this step, a part of the remaining cathode material layer can be filled in the opening 314, so that the bottom of the formed cathode is in contact with the top of the pad 303. At this time, the corresponding electronic components in the chip circuit substrate can pass through the top layer The metal interconnection line 301b and the pad 303 are connected to the cathode. That is to say, at this time, not only a part of the circuit in the chip circuit substrate can be used to drive and control the anode of the OLED light-emitting element, but also another part of the circuit can be used to drive and control the anode of the OLED light-emitting element. By controlling the cathode of the OLED light-emitting element, the chip circuit substrate can ultimately control and drive the OLED light-emitting element to emit light. In addition, since the bonding pad 303 is in a groove shape, the contact area between the cathode and the bonding pad 303 is increased, thereby improving the reliability of the electrical connection between the chip circuit substrate and the OLED light-emitting element.

基于同一发明构思,请参考图3A至3I,本实施还提供一种利用上述的OLED器件的制造方法制造的OLED器件,包括:一完成后段制程的芯片电路基板、绝缘覆盖层、导电接触插塞308、多个相互分立的阳极309a、图案化的像素界定层311a、有机发光层(未图示)和阴极。Based on the same inventive concept, please refer to Figures 3A to 3I. This embodiment also provides an OLED device manufactured using the above-mentioned OLED device manufacturing method, including: a chip circuit substrate that has completed the back-end process, an insulating covering layer, and a conductive contact plug. plug 308, a plurality of mutually separated anodes 309a, a patterned pixel defining layer 311a, an organic light emitting layer (not shown) and a cathode.

其中,该芯片电路基板已完成前段制程(FEOL)和后段制程(BEOL),其具有晶体管、二极管、电阻器、电容器、电感器等电子元件,还具有层间介质层300以及形成在层间介质层300中的若干层金属互连线,其中顶层金属互连线至少具有顶层金属互连线301a和顶层金属互连线301b两种类型,顶层金属互连线301a用于与相应的阳极连接,顶层金属互连线301b用于引出焊盘303。所述芯片电路基板还具有钝化层302,所述钝化层302覆盖各条所述顶层金属互连线301a、301b的上表面并具有用于形成焊盘303的开口,各个所述开口暴露出相应的所述顶层金属互连线301b的部分区域,且各个所述开口中形成有焊盘303。Among them, the chip circuit substrate has completed the front-end process (FEOL) and the back-end process (BEOL). It has electronic components such as transistors, diodes, resistors, capacitors, inductors, and also has an interlayer dielectric layer 300 and an interlayer dielectric layer formed between the layers. Several layers of metal interconnection lines in the dielectric layer 300, of which the top metal interconnection line has at least two types: the top metal interconnection line 301a and the top metal interconnection line 301b. The top metal interconnection line 301a is used to connect to the corresponding anode. , the top metal interconnection line 301b is used to lead out the pad 303. The chip circuit substrate also has a passivation layer 302, which covers the upper surface of each of the top metal interconnect lines 301a, 301b and has openings for forming pads 303, and each of the openings is exposed A partial area of the corresponding top metal interconnection line 301b is exposed, and a pad 303 is formed in each of the openings.

绝缘覆盖层包括依次堆叠在所述钝化层302上的介质覆盖层304和硬掩膜覆盖层305,且所述介质覆盖层304覆盖在所述钝化层302和所述焊盘303的表面上并具有平坦的上表面,所述绝缘覆盖层具有贯穿介质覆盖层304和硬掩膜覆盖层305并暴露出相应的所述顶层金属互连线301a的部分上表面的接触孔307以及贯穿介质覆盖层304和硬掩膜覆盖层305并暴露出所述焊盘303的上表面的开口314。The insulating covering layer includes a dielectric covering layer 304 and a hard mask covering layer 305 that are stacked on the passivation layer 302 in sequence, and the dielectric covering layer 304 covers the surfaces of the passivation layer 302 and the pad 303 and has a flat upper surface, the insulating covering layer has contact holes 307 penetrating the dielectric covering layer 304 and the hard mask covering layer 305 and exposing part of the upper surface of the corresponding top metal interconnect line 301a and penetrating the dielectric The covering layer 304 and the hard mask cover the layer 305 and expose the opening 314 on the upper surface of the pad 303 .

导电接触插塞308填充于所述接触孔307中,导电接触插塞308为环形插塞,其环形所围的区域为不导电的介质覆盖层304和硬掩膜覆盖层305。The conductive contact plug 308 is filled in the contact hole 307. The conductive contact plug 308 is an annular plug, and the area surrounded by the annular shape is the non-conductive dielectric covering layer 304 and the hard mask covering layer 305.

多个阳极309a形成于所述硬掩膜覆盖层305的部分表面上并相互分立,且各个所述阳极309a的底部与相应的导电接触插塞308的顶部接触。A plurality of anodes 309a are formed on a portion of the surface of the hard mask covering layer 305 and are separated from each other, and the bottom of each anode 309a is in contact with the top of the corresponding conductive contact plug 308.

图案化的像素界定层311a形成于各个所述阳极309a及其周围的硬掩膜覆盖层305的表面上,所述像素界定层311a在每个所述阳极309a的上表面上具有像素开口311b。所述像素界定层311a还暴露出焊盘303所在区域。A patterned pixel defining layer 311a is formed on the surface of each of the anodes 309a and the surrounding hard mask cover layer 305, the pixel defining layer 311a having a pixel opening 311b on the upper surface of each of the anodes 309a. The pixel definition layer 311a also exposes the area where the pad 303 is located.

有机发光层填充于各个所述像素开口311b中,阴极至少覆盖于所述有机发光层上。每个阳极309a至上方的阴极之间的叠层结构构成了相应的OLED发光元件。The organic light-emitting layer is filled in each of the pixel openings 311b, and the cathode at least covers the organic light-emitting layer. The stacked structure between each anode 309a and the upper cathode constitutes a corresponding OLED light-emitting element.

可选地,阴极还填充于焊盘303上方的绝缘覆盖层的开口314中,此时,芯片电路基板中不仅有一部分电路能用于驱动和控制OLED发光元件的阳极,还有另一部分电路能用于驱动和控制OLED发光元件的阴极,由此芯片电路基板能最终控制和驱动OLED发光元件发光。此外,由于焊盘303呈凹槽状,增大了阴极和焊盘303的接触面积,从而提高了芯片电路基板和OLED发光元件的电连接可靠性。Optionally, the cathode is also filled in the opening 314 of the insulating covering layer above the pad 303. At this time, not only a part of the circuit in the chip circuit substrate can be used to drive and control the anode of the OLED light-emitting element, but also another part of the circuit can The cathode is used to drive and control the OLED light-emitting element, so that the chip circuit substrate can ultimately control and drive the OLED light-emitting element to emit light. In addition, since the bonding pad 303 is in a groove shape, the contact area between the cathode and the bonding pad 303 is increased, thereby improving the reliability of the electrical connection between the chip circuit substrate and the OLED light-emitting element.

本实施例中,各个结构的选材可以参考上述OLED器件的制造方法中的描述,在此不再赘述。In this embodiment, the selection of materials for each structure may refer to the description in the above-mentioned manufacturing method of the OLED device, and will not be described again here.

综上所述,本发明的OLED器件及其制造方法,能够在完成BEOL制程的芯片电路基板的原有结构基础上,通过增加导电接触插塞、阳极以及像素界定层三道工艺,来使得原有的芯片电路基板能够直接外接OLED器件的显示部分的材料,从而使得最终制得的器件能够具有OLED显示功能,即获得了OLED显示器件。此外,由于能够直接在完成BEOL制程的芯片电路基板的原有结构基础上制作出导电接触插塞、阳极以及像素界定层等结构,从而可以避免在借助封装工艺等将OLED显示面板与芯片电路基板电连接在一起时焊线和封胶区域会占用额外的空间的问题,有利于最终制得的OLED器件的尺寸的进一步缩小,特别适用于眼镜等OLED微型显示器的制作。In summary, the OLED device and its manufacturing method of the present invention can be based on the original structure of the chip circuit substrate that completes the BEOL process by adding three processes of conductive contact plugs, anodes and pixel definition layers to make the original structure Some chip circuit substrates can be directly connected to the display part of the OLED device, so that the final device can have an OLED display function, that is, an OLED display device is obtained. In addition, because structures such as conductive contact plugs, anodes, and pixel definition layers can be produced directly based on the original structure of the chip circuit substrate that has completed the BEOL process, it is possible to avoid the need to use packaging processes to separate the OLED display panel from the chip circuit substrate. The problem that the bonding wires and the sealing area will take up extra space when electrically connected together is conducive to further reducing the size of the final OLED device, which is especially suitable for the production of OLED micro-displays such as glasses.

上述描述仅是对本发明较佳实施例的描述,并非对本发明范围的任何限定,本发明领域的普通技术人员根据上述揭示内容做的任何变更、修饰,均属于权利要求书的保护范围。The above description is only a description of the preferred embodiments of the present invention, and does not limit the scope of the present invention in any way. Any changes or modifications made by those of ordinary skill in the field of the present invention based on the above disclosure shall fall within the scope of the claims.

Claims (12)

1. A method of manufacturing an OLED device, comprising:
providing a chip circuit substrate for finishing a back-end process, wherein the chip circuit substrate is provided with a plurality of top-layer metal interconnection lines;
forming an insulating cover layer to cover the chip circuit substrate, and etching the insulating cover layer to expose the surface of the corresponding top metal interconnection line so as to form a contact hole;
forming a conductive contact plug in the contact hole;
forming a plurality of mutually separated anodes on part of the surface of the insulating cover layer, wherein the bottom of each anode is in electrical contact with the top of the corresponding conductive contact plug;
forming a patterned pixel defining layer on the surface of each of the anodes and the surrounding insulating cover layer, the pixel defining layer having a pixel opening on the upper surface of each of the anodes;
and forming an organic light-emitting layer filled in each pixel opening, and forming a cathode corresponding to each anode on the surface of the organic light-emitting layer to form an OLED light-emitting element on the chip circuit substrate.
2. The method of manufacturing an OLED device as claimed in claim 1, wherein the chip circuit substrate further has a passivation layer covering an upper surface of each of the top metal interconnection lines and having at least one opening, each of the openings exposing a partial region of the corresponding top metal interconnection line, and a pad is formed in each of the openings.
3. The method of manufacturing an OLED device of claim 2, further comprising, after forming the patterned pixel defining layer and before forming the organic light emitting layer: and opening the insulating cover layer above the bonding pad through photoetching and etching processes to expose the upper surface of the bonding pad.
4. The method of manufacturing an OLED device of claim 2, wherein the step of forming the insulating cover layer having the contact holes on the chip circuit substrate includes:
forming a dielectric cover layer on the passivation layer and the surface of the bonding pad, and burying the bonding pad;
top planarizing the dielectric cap layer such that the dielectric cap layer has a planar upper surface;
sequentially forming a hard mask covering layer and a photoresist layer with a contact hole pattern on the surface of the dielectric covering layer, wherein the contact hole defined by the contact hole pattern is aligned with a partial region of the corresponding top-layer metal interconnection line;
and etching the insulating cover layer by taking the photoresist layer as a mask until the surface of the corresponding top-layer metal interconnection line is exposed, so as to form the contact hole.
5. The method of manufacturing an OLED device of claim 1, wherein the step of forming the conductive contact plug in the contact hole includes:
depositing a conductive material on the surfaces of the insulating cover layer and the contact hole, wherein the deposited conductive material at least can fill the contact hole;
and carrying out chemical mechanical polishing on the deposited conductive material until the upper surface of the insulating cover layer is exposed so as to form the conductive contact plug filled in the contact hole.
6. The method of manufacturing an OLED device of claim 1, wherein the step of forming a plurality of said anodes on the surface of said insulating cover layer includes:
forming an anode material layer to cover the surfaces of the insulating cover layer and the conductive contact plug;
forming a photoresist layer with an anode pattern on the anode material layer;
and etching the anode material layer by taking the photoresist layer as a mask to form a plurality of anodes which are positioned above each conductive contact plug and are separated from each other.
7. The method of manufacturing an OLED device of claim 1, wherein the step of forming the patterned pixel defining layer includes:
forming a pixel defining layer to cover the insulating cover layer and the surface of each anode;
forming a photoresist layer with a pixel defining pattern on the pixel defining layer;
and etching the pixel defining layer by taking the photoresist layer as a mask to remove redundant pixel defining layers and forming corresponding pixel openings on the upper surface of each anode.
8. The method of manufacturing an OLED device as claimed in any one of claims 1-7, wherein the contact hole is an annular contact hole, the conductive contact plug is an annular plug, and an area surrounded by the conductive contact plug is a light-transmitting and non-conductive material.
9. An OLED device, comprising:
the chip circuit substrate is provided with a plurality of top metal interconnection lines;
the insulating cover layer covers the chip circuit substrate and is provided with a contact hole exposing part of the upper surface of the corresponding top metal interconnection line;
a conductive contact plug filled in the contact hole;
a plurality of mutually separated anodes formed on a part of the surface of the insulating cover layer, and the bottom of each anode is in contact with the top of a corresponding conductive contact plug;
a patterned pixel defining layer formed on a surface of each of the anodes and an insulating cover layer therearound, the pixel defining layer having a pixel opening on an upper surface of each of the anodes;
an organic light emitting layer filled in each of the pixel openings; the method comprises the steps of,
and cathodes formed on the surface of the organic light emitting layer and corresponding to the respective anodes.
10. The OLED device of claim 9, wherein said chip circuit substrate further has a passivation layer covering an upper surface of each of said top metal interconnect lines and having at least one opening, each of said openings exposing a portion of a corresponding region of said top metal interconnect line, and each of said openings having a bond pad formed therein; the insulating cover layer also has an opening exposing an upper surface of the pad.
11. The OLED device of claim 10, wherein the insulating capping layer includes a dielectric capping layer and a hard mask capping layer stacked in sequence on the passivation layer, and the dielectric capping layer overlies surfaces of the passivation layer and the pad and has a planar upper surface.
12. The OLED device claimed in any one of claims 9-11, wherein the contact hole is an annular contact hole, the conductive contact plug is an annular plug, and the area surrounded by the conductive contact plug is a light transmissive and non-conductive material.
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