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CN113360959A - Host system and electronic lock unlocking method thereof - Google Patents

Host system and electronic lock unlocking method thereof Download PDF

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Publication number
CN113360959A
CN113360959A CN202010138216.XA CN202010138216A CN113360959A CN 113360959 A CN113360959 A CN 113360959A CN 202010138216 A CN202010138216 A CN 202010138216A CN 113360959 A CN113360959 A CN 113360959A
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CN
China
Prior art keywords
electronic lock
control chip
circuit board
trigger voltage
volatile memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202010138216.XA
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Chinese (zh)
Inventor
叶世豪
卢嘉謦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nuvoton Technology Corp
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Nuvoton Technology Corp
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Publication date
Application filed by Nuvoton Technology Corp filed Critical Nuvoton Technology Corp
Priority to CN202010138216.XA priority Critical patent/CN113360959A/en
Publication of CN113360959A publication Critical patent/CN113360959A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/86Secure or tamper-resistant housings
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/30Authentication, i.e. establishing the identity or authorisation of security principals
    • G06F21/45Structures or tools for the administration of authentication
    • G06F21/46Structures or tools for the administration of authentication by designing passwords or checking the strength of passwords
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/86Secure or tamper-resistant housings
    • G06F21/87Secure or tamper-resistant housings by means of encapsulation, e.g. for integrated circuits
    • GPHYSICS
    • G07CHECKING-DEVICES
    • G07CTIME OR ATTENDANCE REGISTERS; REGISTERING OR INDICATING THE WORKING OF MACHINES; GENERATING RANDOM NUMBERS; VOTING OR LOTTERY APPARATUS; ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDED FOR ELSEWHERE
    • G07C9/00Individual registration on entry or exit
    • G07C9/00174Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys
    • G07C9/00896Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys specially adapted for particular uses
    • GPHYSICS
    • G07CHECKING-DEVICES
    • G07CTIME OR ATTENDANCE REGISTERS; REGISTERING OR INDICATING THE WORKING OF MACHINES; GENERATING RANDOM NUMBERS; VOTING OR LOTTERY APPARATUS; ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDED FOR ELSEWHERE
    • G07C9/00Individual registration on entry or exit
    • G07C9/00174Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys
    • G07C9/00944Details of construction or manufacture

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Storage Device Security (AREA)

Abstract

The invention provides a host system and an electronic lock unlocking method thereof. In the host system, the enclosure has a side door. The electronic lock is used for locking the side door on the case. The system circuit board is configured in the case and coupled with the electronic lock, and the system circuit board is provided with a plurality of universal serial bus ports and a plurality of non-volatile memory circuits. Each USB port is electrically connected with a corresponding non-volatile memory circuit, and each non-volatile memory circuit is written with data by a trigger voltage from the corresponding USB port. When the system circuit board receives the trigger voltage, the system circuit board reads a plurality of data stored in the non-volatile memory circuits, and when the plurality of data is equal to a default password, an unlocking signal is output to the electronic lock to unlock the electronic lock.

Description

Host system and electronic lock unlocking method thereof
Technical Field
The present invention relates to a host system, and more particularly, to a host system using a non-volatile memory to input a password and an unlocking method of an electronic lock thereof.
Background
At present, in computer cases using electronic locks, most users can only input the electronic lock password through a Basic Input Output System (BIOS) when the computer is powered on, so as to set the electronic lock of the case to be opened or closed. If the computer is in a shutdown state or the host computer is in an abnormal condition, the user cannot enter the security system, that is, the user cannot open the security authentication mechanism, so that the electronic lock of the chassis cannot be opened.
Disclosure of Invention
The invention provides a host system and an electronic lock unlocking method thereof, which can enter a security authentication mechanism to unlock an electronic lock under the condition that the host system is not unlocked.
According to an embodiment, the present invention provides a host system, which includes a chassis, an electronic lock, and a system circuit board. The case has a side door. The electronic lock is arranged on the side door and used for locking the side door on the case. The system circuit board is configured in the case and coupled with the electronic lock, and the system circuit board is provided with a plurality of universal serial bus ports and a plurality of non-volatile memory circuits. Each USB port is electrically connected with the corresponding non-volatile memory circuit, and each non-volatile memory circuit is written with data by a trigger voltage from the corresponding USB port. When the system circuit board is not started and receives the trigger voltage, the system circuit board reads a plurality of data stored in the non-volatile memory circuits, and when the plurality of data is equal to a default password, an unlocking signal is output to the electronic lock to unlock the electronic lock.
Preferably, a power supply unit of the usb device provides the trigger voltage when the usb device is plugged into one of the usb ports.
Preferably, the system circuit board includes a control chip coupled to the usb port and the electronic lock, and the control chip uses the trigger voltage as an operating power to read a plurality of data stored in the plurality of non-volatile memory circuits, and compares the plurality of data with the default password, and when the plurality of data is equal to the default password, the control chip outputs an unlocking signal to the electronic lock to unlock the electronic lock.
Preferably, each of the nonvolatile memory circuits includes a write circuit and a nonvolatile memory, and the write circuit writes data into the volatile memory when the write circuit and the nonvolatile memory receive the trigger voltage.
Preferably, the nonvolatile memory is a resistive memory, and the write circuit changes the resistance of the resistive memory to write data.
Preferably, the control chip includes a reading unit and a comparing unit, the default password is a default input sequence, when the control chip receives the trigger voltage, the reading unit reads a plurality of data stored in the non-volatile memory to record an input sequence of the usb device inserted into the usb ports, the comparing unit compares the input sequence with the default input sequence, and when the input sequence is equal to the default input sequence, the control chip outputs the unlocking signal to the electronic lock to unlock the electronic lock.
Preferably, when the trigger voltage received by the control chip exceeds a default time or the trigger voltage is stable, the control chip is started, so that the reading unit reads a plurality of data stored in the non-volatile memory, the comparing unit compares the plurality of data with the default password, and when the input sequence is equal to the default password, the control chip outputs an unlocking signal to the electronic lock to unlock the electronic lock.
Preferably, the system circuit board further includes a dual power circuit coupled to the usb ports and the control chip for receiving an external power voltage of a usb device plugged into the usb ports and a standby power voltage of the system circuit board, and the dual power circuit provides the external power voltage to the control chip when the external power voltage is received and the standby power voltage is not received, and the dual power circuit provides the standby power voltage to the control chip when the standby power voltage is received regardless of whether the external power voltage is received.
According to an embodiment, the present invention provides a method for unlocking an electronic lock of a host system, comprising the following steps. When a system circuit board of a host system is not started, judging whether the system circuit board receives a trigger voltage; when the system circuit board is not started and receives trigger voltage, detecting an input sequence in which a plurality of universal serial bus ports are inserted through a control chip of the system circuit board; comparing the input sequence with a default input sequence through the control chip; when the input sequence is equal to the default input sequence, an unlocking signal is output to the electronic lock through the control chip so as to unlock the electronic lock.
According to an embodiment, the present invention provides an electronic lock system, which includes an electronic lock and a system circuit board. The system circuit board is coupled to the electronic lock and has a plurality of piezoelectric keys and a plurality of non-volatile memory circuits, wherein each of the plurality of piezoelectric keys is electrically connected to the corresponding non-volatile memory circuit. Each piezoelectric key generates a trigger voltage when being pressed, and each nonvolatile memory circuit writes data by the trigger voltage from the corresponding piezoelectric key. When the system circuit board is not started and receives the trigger voltage, the system circuit board reads a plurality of data stored in the non-volatile memory circuits, and when the plurality of data is equal to a default password, an unlocking signal is output to the electronic lock to unlock the electronic lock.
Preferably, the at least one plurality of piezoelectric keys comprises a component made of piezoelectric material, each of the nonvolatile memory circuits comprises a write circuit and a resistive memory, and when the write circuit and the resistive memory receive a trigger voltage, the write circuit changes the impedance of the resistive memory to write data.
Drawings
Fig. 1 is a schematic structural diagram of a host system according to an embodiment of the present invention.
Fig. 2 is a schematic diagram of a system circuit board according to an embodiment of the invention.
FIG. 3 is a diagram of a non-volatile memory circuit of a system circuit board according to an embodiment of the invention.
Fig. 4 is a flowchart of an electronic lock unlocking method according to an embodiment of the invention.
Fig. 5 is a flowchart of an electronic lock unlocking method according to another embodiment of the invention.
Fig. 6 is a schematic diagram of a system circuit board according to another embodiment of the invention.
Fig. 7 is a schematic diagram of a system circuit board according to another embodiment of the invention.
Reference numerals:
10: universal serial bus device
101: power supply unit
100: host system
110: cabinet
111: side door
120: electronic lock
130. 130a, 130b, 130 c: system circuit board
131: universal serial bus port
133: dual power supply circuit
135: control chip
1351: reading unit
1352: comparison unit
1353: default password
1354: reset unit
137: chip group
139: basic input/output system
14: non-volatile memory circuit
141: non-volatile memory
142: write circuit
71: piezoelectric key
72: memory circuit
73: control chip
CMD _ L: lock commands
CMD _ U: unlock command
SLK: locking signal
SUL: unlock signal
VBUS: voltage of external power supply
VSTB: standby power supply voltage
VPE: pressing voltage
S41-S47: step (ii) of
Detailed Description
The following detailed description of the embodiments of the present invention will be provided in conjunction with the drawings and examples, so that how to implement the technical means for solving the technical problems and achieving the technical effects of the present invention can be fully understood and implemented.
Fig. 1 is a schematic structural diagram of a host system according to an embodiment of the present invention. Referring to fig. 1, in the present embodiment, a host system 100 includes a chassis 110, an electronic lock 120, and a system circuit board 130. The cabinet 110 has a side door 111 that can be rotated to expose the inside of the cabinet 110. The electronic lock 120 is disposed on the side door 111 for locking the side door 111 on the chassis; that is, when the electronic lock 120 is in the unlocked state, the side door 111 can rotate freely, and when the electronic lock 120 is in the locked state, the side door 111 cannot rotate.
The system circuit board 130 is disposed in the chassis 110 and coupled to the electronic lock 120, and the system circuit board 130 has a plurality of usb ports 131. When the system circuit board 130 is not activated and receives a trigger voltage, the system circuit board 130 detects the input status of the usb ports 131. For example, when a power key (hereinafter, referred to as a usb device) is plugged into the usb port 131, the external power voltage provided by the power key can be regarded as a trigger voltage.
The system board 130 compares the input state with the default password. When the input state is equal to the default password, the system circuit board 130 outputs an unlocking signal SUL to the electronic lock 120 to unlock the electronic lock 120; when the input status is not equal to the default password, the system circuit board 130 does not output a signal to the electronic lock 120.
Please refer to fig. 2, which is a schematic diagram of a system circuit board according to an embodiment of the invention. As shown in fig. 1 and fig. 2, in the embodiment, the system circuit board 130a is a motherboard, but the embodiment of the invention is not limited thereto, and the same or similar components are denoted by the same or similar reference numerals. In addition to the USB port 131, the system circuit board 130a further includes a control chip 135, a chipset 137, a BIOS 139, and a plurality of nonvolatile memory circuits 14. For example, the control chip 135 may be a Super input/output (Super I/O) chip or an Embedded Controller (EC). The nonvolatile memory circuits 14 are electrically connected to the usb ports 131 one by one. The control chip 135 is electrically coupled between the usb ports 131, the chipset 137 and the electronic lock 120. The chipset 137 is coupled between the control chip 135 and the bios 139.
In an embodiment of the invention, when the system circuit board 130a is powered off, for example, the motherboard is in the state of G3, the system circuit board 130a will not provide any voltage to the control chip 135. The chipset 137 and the bios 139 are in an inactive state, i.e., in an inoperable state.
When the usb device 10 is plugged into a usb port 131, the usb device 10 may provide a trigger voltage to change the state of the corresponding non-volatile Memory circuit 14, for example, the non-volatile Memory circuit 14 may include Resistive Random Access Memory (RRAM), and the trigger voltage provided by the usb device 10 may change the impedance state of the RRAM, for example, from a low impedance state to a high impedance state; similarly, if the non-volatile memory circuit 14 comprises a Phase-change memory (PCM), the trigger voltage provided by the usb device 10 may change the Phase state of the PCM, thereby storing data.
The control chip 135 can read the data of all the non-volatile memory circuits 14 after being started, compare the data of all the non-volatile memory circuits 14 with a default password, and when the data are equal to the default password, the control chip 135 outputs an unlocking signal to the electronic lock 120 to unlock the electronic lock 120. In one embodiment, the control chip 135 may use the trigger voltage as an operation power source, and a power supply unit of the usb device provides the trigger voltage. The usb device may be a mobile power supply and/or transformer with usb plug, and the power supply unit is, for example, a battery or a mains voltage circuit.
Please refer to fig. 2 to 5, which are schematic diagrams of a system circuit board according to an embodiment of the present invention, a non-volatile memory circuit of the system circuit board according to an embodiment of the present invention, a flowchart of an electronic lock unlocking method according to an embodiment of the present invention, and a flowchart of an electronic lock unlocking method according to another embodiment of the present invention. As shown in fig. 3, each of the nonvolatile memory circuits 140 includes a nonvolatile memory 141 and a write circuit 142. The control chip 135 includes a reading unit 1351, a comparing unit 1352, a default password 1353, and a resetting unit 1354. Preferably, the nonvolatile memory 141 can be resistive memory, phase change memory, or other similar nonvolatile memory. The reset unit 1354 is electrically connected to all the nonvolatile memory circuits 14.
When the nonvolatile memory 141 is a resistive memory, the write circuit 142 may change the impedance of the resistive memory, for example, from low impedance to high impedance, when receiving the trigger voltage, thereby storing at least one bit of data; when the nonvolatile memory 141 is a phase change memory, the write circuit 142 may change the phase state of the resistive memory when receiving the trigger voltage, thereby storing at least one bit of data.
In the present invention, the non-volatile memory 141 is used to record whether the USB device 10 is plugged into the USB port 131. When the usb device 10 is plugged into the usb port 131, the external power voltage of a power supply unit 101 of the usb device 10 can be used as a trigger voltage to the non-volatile memory 141, the write circuit 142 and the control chip 135; therefore, after the controller 135 is activated, the reading unit 1351 can read the impedance of each nonvolatile memory 141, and if the nonvolatile memory 141 is in a high impedance state, it indicates that the usb device 10 has the usb port 131 corresponding to the nonvolatile memory 141 inserted therein. The manner in which the read unit 1351 reads the nonvolatile memory 141 can be implemented by various data reading manners, and two different data reading manners will be described below with reference to fig. 4 and 5.
The unlocking method of the electronic lock shown in fig. 4 includes steps S41 to S47, and is applicable to the system circuit board and the nonvolatile memory circuit shown in fig. 2 and 3. In step S41, one of the usb ports 131 is inserted using a usb device 10. For example, assume that there are 6 USB ports 131 (illustrated as A-F) on the system circuit board 130, which are electrically connected to a nonvolatile memory circuit 14. The usb device 10 is inserted into the usb port a, which is correspondingly connected to the non-volatile memory circuit 14A, and the non-volatile memory circuit 14A includes a write circuit 142A and a non-volatile memory 141A, and so on.
In step S42, the power supply unit 101 of the usb device 10 transmits a trigger voltage to the nonvolatile memory circuit 14A through the usb port a, so that the write circuit 142A of the nonvolatile memory circuit 14A can be activated by using the trigger voltage to change the impedance state of the nonvolatile memory 141A, for example, the nonvolatile memory 141A is initially in a low impedance state (which may represent that the data stored in the nonvolatile memory 141A is 0), and the write circuit 142A converts the nonvolatile memory 141A into a high impedance state (which may represent that the data stored in the nonvolatile memory 141A is 1).
In step S43, the trigger voltage is also transmitted to the control chip 135, so that the control chip 135 can be started using this trigger voltage. Next, in step S44, after the control chip 135 is activated, the reading unit 1351 reads the data in the nonvolatile memories 141A to 141F.
In step S45, the comparing unit 1352 compares the data in the non-volatile memories 141A to 141F with the default password 1353, and if the data in the non-volatile memories 141A to 141F matches the default password 1353, go to step S46; otherwise, returning to step S41, the usb device 10 is waited for to be inserted into one of the usb ports 131 again.
In this embodiment, since the control chip 135 is activated to read the data of the non-volatile memories 141A-141F each time the USB device 10 is plugged into the USB ports 131, the control chip 135 can record the sequence of the USB devices 10 plugged into the USB ports 131, so the default password 1353 can be a default input sequence; for example, the default input order may be "a", "C", and "E", i.e. the usb port 131 is inserted in the order of "a", "C", and "E"; alternatively, the default order may be "a", "F", "E", "D", "a"; alternatively, the default order may be "A", "FC", "D", "A", where "FC" represents two USB ports 131 being plugged simultaneously.
On the other hand, taking the default input order "a", "C", "E" as an example, when the usb ports 131 are inserted in the order of "a", "D", "E", they are regarded as different from the default order; when the usb ports 131 are inserted in the order of "C", "a", and "E", they are regarded as different from the default order; when the usb ports 131 are inserted in the order of "E", "D", "a", "C", "E", they are still considered to be different from the default order. That is, the system circuit board 130 only takes the most recently inserted portion of the number corresponding to the default order regardless of the older portion.
In one embodiment, the default password 1353 may be a default input combination, and the comparing unit 1352 determines whether the data combination of the nonvolatile memories 141A-141F is equal to the default input combination regardless of the input order. That is, taking the default input orders "a", "C", and "E" as an example, when the usb port 131 is inserted in the order of "C", "a", and "E", the comparing unit 1352 determines that the data in the non-volatile memories 141A-141F is equal to the default input combination; however, when the usb ports 131 are inserted in the order of "E", "D", "a", "C", and "E", they are still considered to be different from the default order.
In step S46, the control chip 135 outputs an unlocking signal SUL to the electronic lock 120 to unlock the electronic lock 120. In step 47, the reset unit 1354 resets the nonvolatile memory circuits 14A-141F, for example, the reset unit 1354 may reset all of the nonvolatile memories 141A-141F to a low impedance state.
In this embodiment, the user plugs the USB device 10 into and out of the USB ports A-F sequentially, and the control chip 135 is awakened each time the USB device 10 is plugged, so that the control chip 135 unlocks the electronic lock 120 if the input sequence or the input combination is equal to the default password 1353 after the user plugs the USB device 10 into and out of the last USB port.
The unlocking method of the electronic lock shown in fig. 5 includes steps S51 to S57, and is applicable to the system circuit board and the nonvolatile memory circuit shown in fig. 2 and 3.
In step S51, one of the usb ports 131 is inserted using a usb device 10. For example, assume that there are 6 USB ports 131 (illustrated as A-F) on the system circuit board 130, which are electrically connected to a nonvolatile memory circuit 14. The usb device 10 is inserted into the usb port a, which is correspondingly connected to the nonvolatile memory circuit 14A, and the nonvolatile memory circuit 14A includes a write circuit 142A and a nonvolatile memory 141A, and so on.
In step S52, the power supply unit 101 of the usb device 10 transmits a trigger voltage to the storage circuit 14A through the usb port a, so that the write circuit 142A of the storage circuit 14A can be activated by using the trigger voltage to change the impedance state of the nonvolatile memory 141A, for example, the nonvolatile memory 141A is initially in a low impedance state (which may represent that the data stored in the nonvolatile memory 141A is 0), and the write circuit 142A converts the nonvolatile memory 141A into a high impedance state (which may represent that the data stored in the nonvolatile memory 141A is 1).
In step S53, the control chip 135 determines whether the trigger voltage exceeds a predetermined time or whether the trigger voltage is stable, if yes, go to step S54; otherwise, return to step S51.
In step S54, the control chip 135 starts the operation by using the trigger voltage, and the read unit 1351 reads the data in the non-volatile memories 141A-141F. Through steps S53 and S54, after the user inserts the usb device 10 into the last usb port, the usb device 10 must be left in the usb port, and the control chip 135 will start up after receiving the stable trigger voltage; therefore, the operation of the control chip 135 of this embodiment is more stable than that of the previous embodiment, but the control chip 135 of this embodiment cannot record the sequence of inserting the USB device 10 into the USB ports 141A-141F, and the default password 1353 is preferably a default input combination, and the comparing unit 1352 determines whether the data combination of the non-volatile memories 141A-141F is equal to the default input combination regardless of the input sequence.
In step S55, the comparing unit 1352 compares the data in the non-volatile memories 141A to 141F with the default password 1353, and if the data in the non-volatile memories 141A to 141F matches the default password 1353, go to step S56; otherwise, step S57 is performed.
In step S56, the control chip 135 outputs an unlocking signal SUL to the electronic lock 120 to unlock the electronic lock 120; next, step 57 is performed. In step 57, the reset unit 1354 resets the nonvolatile memory circuits 14A-141F, for example, the reset unit 1354 may reset all of the nonvolatile memories 141A-141F to a low impedance state.
In this embodiment, the user plugs the usb device 10 into a plurality of usb ports a-F in sequence, and the start-up of the control chip 135 is not awakened each time the usb device 10 is plugged, so the user needs to leave the usb device 10 in the usb port after inserting the usb device 10 into the last usb port to start the control chip 135 for data reading and password determination. If the read data is equal to the default password 1353, the control chip 135 unlocks the electronic lock 120.
Please refer to fig. 6, which is a schematic diagram of a system circuit board according to another embodiment of the present invention. The difference between this embodiment and the previous embodiment is that the system circuit board 130b shown in fig. 6 further includes a dual power circuit 133 coupled between the usb ports 131 and the control chip 135 for receiving an external power voltage VBUS (i.e., trigger voltage) of a usb device 10 plugged into the usb ports 131 and a standby power voltage VSTB of the system circuit board 130. When receiving the external power voltage VBUS and not receiving the standby power voltage VSTB, the dual power supply circuit 133 provides the external power voltage VBUS to the control chip 135. When receiving the standby power voltage VSTB, the dual power supply circuit 133 supplies the standby power voltage VSTB to the control chip 135 regardless of whether the external power voltage VBUS is received.
In an embodiment of the present invention, when the system circuit board 130b is turned on, i.e. the host system is in a power-on state, the chipset 137 and the bios 139 are in a power-on state, i.e. in an operable state. If the user locks the electronic lock 120 through the man-machine interface provided by the bios 139, the chipset 137 is controlled by the bios 139 to provide a lock command to the control chip 135 to command the control chip 135 to provide the lock signal SLK to the electronic lock. On the contrary, if the user unlocks the electronic lock 120 through the man-machine interface provided by the bios 139, the chipset 137 is controlled by the bios 139 to provide an unlocking command to the control chip 135, so as to command the control chip 135 to provide the unlocking signal SUL to the electronic lock.
In this embodiment, if the system board 130 is in a standby state (e.g., S3/S5 state of the motherboard), the system board 130a provides the standby power voltage VSTB to the dual power supply circuit 133, and the control chip 135 can receive the standby power voltage VSTB through the dual power supply circuit 133 for operation, so that the control chip 135 can record the insertion sequence of the USB device 10 into the USB port, and the default password can include a default input sequence or a default input combination.
For example, when a power key having an external power supply voltage VBUS (the usb device 10 having the external power supply voltage VBUS is taken as an example herein) is inserted into one of the usb ports 131, the external power supply voltage VBUS is first transmitted to the dual power supply circuit 133 and the control chip 135, and the dual power supply circuit 133 receives the external power supply voltage VBUS and transmits the external power supply voltage VBUS as an operation power to the control chip 135. Also, the control chip 135 is triggered by the external power supply voltage VBUS directly received by the usb port 131 to execute a detection mechanism to detect the input sequence inserted into the usb port 131. The usb device 10 having the external power supply voltage VBUS is, for example, a mobile power supply and/or a transformer having a usb plug. The comparison operation of the control chip 135 in this embodiment is the same as that in the previous embodiment, and therefore, is not described herein again.
In an embodiment of the present invention, when the system circuit board 130a is turned on, i.e. the host system 100 is in a power-on state, the chipset 137 and the bios 139 are in a power-on state, i.e. in an operable state. If the user locks the electronic lock 120 through the man-machine interface provided by the bios 139, the chipset 137 may be controlled by the bios 139 to provide a lock command CMD _ L to the control chip 135 to command the control chip 135 to provide the lock signal SLK to the electronic lock. On the contrary, if the user unlocks the electronic lock 120 through the man-machine interface provided by the bios 139, the chipset 137 is controlled by the bios 139 to provide an unlocking command CMD _ U to the control chip 135, so as to command the control chip 135 to provide an unlocking signal SUL to the electronic lock.
In an embodiment of the present invention, the control chip 135 may have a mechanism for recording multiple consecutive errors of the unlocking procedure, and if the control chip 135 detects n consecutive insertions and the input sequence in the n insertions is not equal to the default sequence (n may be greater than or equal to 2, for example, but not limited thereto), the control chip 135 may lengthen the time interval between the locking and the unlocking (i.e. the time interval between the unlocking and the unlocking is entered), or the locking is no longer accepted (e.g. the original factory is returned to deconstruct the machine for unlocking). The mechanism for lengthening the time interval between lock-ins may be, for example, the control chip 135 may start "comparing the input sequence with the default sequence" at a longer interval, which may prevent the host system from being attacked by a brute force unlocking method. Where n may be associated with a default order, for example n may be m times the number of insertions in the default order, where m is greater than or equal to 2.
Please refer to fig. 7, which is a schematic diagram of a system circuit board according to another embodiment of the present invention. As shown in fig. 7, the electronic lock system includes an electronic lock 120 and a system circuit board 130. The electronic lock 120 may be disposed on a door. The system circuit board 130 is disposed on the electronic lock 120, the system circuit board 130 includes a control chip 73, a plurality of piezoelectric keys 71, and a plurality of non-volatile memory circuits 14, and each piezoelectric key 71 is electrically connected to a corresponding non-volatile memory circuit 14. The piezoelectric key 71 may include a component made of a piezoelectric material, and when the piezoelectric key 71 is pressed by an external force, the piezoelectric material is deformed by the pressure, so that the piezoelectric key 71 may generate a trigger voltage. In this embodiment, the trigger voltage can be used to write data into the nonvolatile memory circuit 14 and also used to activate the control chip 73.
When the piezoelectric key 71 is pressed to generate a trigger voltage, each nonvolatile memory circuit 14 can write data by the trigger voltage from the corresponding piezoelectric key 71. When the system circuit board 130 is not activated and receives the trigger voltage, the control chip 73 of the system circuit board 130 reads a plurality of data stored in the nonvolatile memory circuits 14, and outputs an unlocking signal SUL to the electronic lock 120 to unlock the electronic lock 120 when the plurality of data is equal to the default password.
In one embodiment, the piezoelectric key may include a component made of piezoelectric material, and the non-volatile memory circuit may include a write circuit and a resistive memory, and when the write circuit and the resistive memory receive the trigger voltage, the write circuit changes the impedance of the resistive memory to write data.
In the present embodiment, the implementation of writing data into the nonvolatile memory circuits, reading a plurality of data stored in the nonvolatile memory circuits 14, and comparing the plurality of data with the default password by using the trigger voltage is the same as the previous embodiment, and therefore, the detailed description thereof is omitted here.
Although the present invention has been described with reference to the foregoing embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.

Claims (11)

1.一种主机系统,其特征在于,包含:1. a host system, is characterized in that, comprises: 一机箱,具有一侧边门;a chassis with a side door; 一电子锁,配置于该侧边门上,用以锁定该侧边门于该机箱上;以及an electronic lock disposed on the side door for locking the side door on the chassis; and 一系统电路板,配置于该机箱内且耦接该电子锁,该系统电路板具有多个通用串行总线端口以及多个非挥发性存储电路,其中每一该多个通用串行总线端口电连接相对应的该非挥发性存储电路,而每一该非挥发性存储电路由来自对应的该通用串行总线端口的一触发电压以写入数据;a system circuit board disposed in the chassis and coupled to the electronic lock, the system circuit board has a plurality of USB ports and a plurality of non-volatile memory circuits, wherein each of the plurality of USB ports is electrically connecting the corresponding non-volatile memory circuits, and each of the non-volatile memory circuits is written in data by a trigger voltage from the corresponding USB port; 其中在该系统电路板未启动且接收到该触发电压时,该系统电路板读取所述多个非挥发性存储电路储存的多笔数据,并且在该多笔数据等于一默认密码时,输出一解锁信号至该电子锁,以解锁该电子锁。When the system circuit board is not activated and receives the trigger voltage, the system circuit board reads multiple data stored in the multiple non-volatile storage circuits, and when the multiple data is equal to a default password, outputs An unlocking signal is sent to the electronic lock to unlock the electronic lock. 2.如权利要求1所述的主机系统,其特征在于,当一通用串行总线装置插入该多个通用串行总线端口中的其中一个时,该通用串行总线装置的一供电单元提供该触发电压。2 . The host system of claim 1 , wherein when a USB device is inserted into one of the plurality of USB ports, a power supply unit of the USB device provides the trigger voltage. 3.如权利要求2所述的主机系统,其特征在于,该系统电路板包含一控制芯片,耦接所述多个通用串行总线端口及该电子锁,且该控制芯片以该触发电压作为一操作电源,以读取所述多个非挥发性存储电路储存的该多笔数据,并比较该多笔数据与该默认密码,当该多笔数据等于该默认密码时,该控制芯片输出该解锁信号至该电子锁,以解锁该电子锁。3. The host system of claim 2, wherein the system circuit board comprises a control chip, coupled to the plurality of USB ports and the electronic lock, and the control chip uses the trigger voltage as a an operating power source to read the multiple data stored in the multiple non-volatile storage circuits, and compare the multiple data with the default password, when the multiple data is equal to the default password, the control chip outputs the An unlock signal is sent to the electronic lock to unlock the electronic lock. 4.如权利要求3所述的主机系统,其特征在于,每一所述多个非挥发性存储电路包含一写入电路以及一非挥发性内存,当该写入电路以及该非挥发性内存接收到该触发电压时,该写入电路对该非挥发性内存写入数据。4. The host system of claim 3, wherein each of the plurality of non-volatile memory circuits comprises a writing circuit and a non-volatile memory, when the writing circuit and the non-volatile memory When receiving the trigger voltage, the writing circuit writes data to the non-volatile memory. 5.如权利要求4所述的主机系统,其特征在于,该非挥发性内存为一电阻式内存,该写入电路改变该电阻式内存的阻抗,以写入数据。5 . The host system of claim 4 , wherein the non-volatile memory is a resistive memory, and the writing circuit changes the impedance of the resistive memory to write data. 6 . 6.如权利要求4所述的主机系统,其特征在于,该控制芯片包含一读取单元以及一比较单元,而该默认密码为一默认输入顺序,当该控制芯片接收到该触发电压时,该读取单元读取所述多个非挥发性内存储存的多笔数据以记录该通用串行总线装置插入该多个通用串行总线端口的一输入顺序,该比较单元比较该输入顺序以及该默认输入顺序,当该输入顺序等于该默认输入顺序时,该控制芯片输出该解锁信号至该电子锁,以解锁该电子锁。6. The host system of claim 4, wherein the control chip comprises a reading unit and a comparing unit, and the default password is a default input sequence, when the control chip receives the trigger voltage, The reading unit reads a plurality of pieces of data stored in the plurality of non-volatile memories to record an input sequence of the USB device inserted into the plurality of USB ports, and the comparison unit compares the input sequence and the Default input sequence, when the input sequence is equal to the default input sequence, the control chip outputs the unlocking signal to the electronic lock to unlock the electronic lock. 7.如权利要求6所述的主机系统,其特征在于,当该控制芯片接收该触发电压超过一默认时间或是等到该触发电压稳定,当该控制芯片才启动,致使该读取单元读取所述多个非挥发性内存储存的该多笔数据,且该比较单元比较该多笔数据与该默认密码,当该输入顺序等于该默认密码时,该控制芯片输出该解锁信号至该电子锁,以解锁该电子锁。7 . The host system of claim 6 , wherein when the control chip receives the trigger voltage for more than a default time or waits until the trigger voltage is stable, the control chip starts up, causing the reading unit to read The plurality of pieces of data stored in the plurality of non-volatile memories, and the comparison unit compares the plurality of pieces of data with the default password, when the input sequence is equal to the default password, the control chip outputs the unlock signal to the electronic lock , to unlock the electronic lock. 8.如权利要求3所述的主机系统,其特征在于,该系统电路板更包含一双电源电路,耦接于所述多个通用串行总线端口及该控制芯片,用以接收插入所述多个通用串行总线端口的一通用串行总线装置的一外部电源电压及该系统电路板的一待机电源电压,并且当接收到该外部电源电压且未接收到该待机电源电压时,该双电源电路提供该外部电源电压至该控制芯片,当接收到该待机电源电压时,无论是否接收到该外部电源电压,该双电源电路提供该待机电源电压至该控制芯片。8. The host system of claim 3, wherein the system circuit board further comprises a dual power supply circuit, coupled to the plurality of USB ports and the control chip, for receiving the insertion of the plurality of an external power supply voltage for a USB device of a USB port and a standby power supply voltage for the system circuit board, and when the external power supply voltage is received and the standby power supply voltage is not received, the dual power supply The circuit provides the external power supply voltage to the control chip, and when receiving the standby power supply voltage, regardless of whether the external power supply voltage is received, the dual power supply circuit provides the standby power supply voltage to the control chip. 9.一种主机系统的电子锁解锁方法,其特征在于,包含:9. An electronic lock unlocking method of a host system, characterized in that, comprising: 当一主机系统的一系统电路板为未启动时,判断该系统电路板是否接收一触发电压;When a system circuit board of a host system is not activated, determining whether the system circuit board receives a trigger voltage; 当该系统电路板未启动且接收到该触发电压时,通过该系统电路板的一控制芯片检测多个通用串行总线端口被插入的一输入顺序;When the system circuit board is not activated and the trigger voltage is received, a control chip of the system circuit board detects an input sequence in which a plurality of USB ports are inserted; 通过该控制芯片比对该输入顺序与一默认输入顺序;以及Compare the input sequence with a default input sequence by the control chip; and 当该输入顺序等于该默认输入顺序时,通过该控制芯片输出一解锁信号至该电子锁,以解锁该电子锁。When the input sequence is equal to the default input sequence, the control chip outputs an unlocking signal to the electronic lock to unlock the electronic lock. 10.一种电子锁系统,其特征在于,包含:10. An electronic lock system, characterized in that, comprising: 一电子锁;以及an electronic lock; and 一系统电路板,耦接该电子锁,该系统电路板具有至少一压电按键以及多个非挥发性存储电路,其中每一该至少一压电按键以电连接相对应的非挥发性存储电路,而每一该多个压电按键被按压时产生一触发电压,每一非挥发性存储电路由来自对应的该压电按键的该触发电压以写入数据;a system circuit board coupled to the electronic lock, the system circuit board has at least one piezoelectric button and a plurality of non-volatile memory circuits, wherein each of the at least one piezoelectric button is electrically connected to a corresponding non-volatile memory circuit , and each of the plurality of piezoelectric buttons generates a trigger voltage when pressed, and each non-volatile memory circuit writes data by the trigger voltage from the corresponding piezoelectric button; 其中在该系统电路板未启动且接收到该触发电压时,该系统电路板读取所述多个非挥发性存储电路储存的多笔数据,并且在该多笔数据等于一默认密码时,输出一解锁信号至该电子锁,以解锁该电子锁。When the system circuit board is not activated and receives the trigger voltage, the system circuit board reads multiple data stored in the multiple non-volatile storage circuits, and when the multiple data is equal to a default password, outputs An unlocking signal is sent to the electronic lock to unlock the electronic lock. 11.如权利要求10所述的电子锁系统,其特征在于,该至少一多个压电按键包含一由压电材料制作的组件,每一所述多个非挥发性存储电路包含一写入电路以及一电阻式内存,当该写入电路以及该电阻式内存接收到该触发电压时,该写入电路改变该电阻式内存的阻抗,以写入数据。11 . The electronic lock system of claim 10 , wherein the at least one piezoelectric key comprises a component made of piezoelectric material, and each of the plurality of non-volatile memory circuits comprises a write A circuit and a resistive memory, when the writing circuit and the resistive memory receive the trigger voltage, the writing circuit changes the impedance of the resistive memory to write data.
CN202010138216.XA 2020-03-03 2020-03-03 Host system and electronic lock unlocking method thereof Pending CN113360959A (en)

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JP2011094292A (en) * 2009-10-27 2011-05-12 Aiphone Co Ltd Electric lock system
US20160049180A1 (en) * 2014-06-16 2016-02-18 Micron Technology, Inc. Semiconductor device including input/output circuit
CN107578515A (en) * 2017-09-22 2018-01-12 联想(北京)有限公司 The control method of a kind of electronic equipment and electronic lock
CN110032251A (en) * 2017-12-28 2019-07-19 新唐科技股份有限公司 Host system and its electronic lock unlocking method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011094292A (en) * 2009-10-27 2011-05-12 Aiphone Co Ltd Electric lock system
US20160049180A1 (en) * 2014-06-16 2016-02-18 Micron Technology, Inc. Semiconductor device including input/output circuit
CN107578515A (en) * 2017-09-22 2018-01-12 联想(北京)有限公司 The control method of a kind of electronic equipment and electronic lock
CN110032251A (en) * 2017-12-28 2019-07-19 新唐科技股份有限公司 Host system and its electronic lock unlocking method

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