CN113359672A - Electric power system chip protection control circuit board and secondary equipment in electric power system - Google Patents
Electric power system chip protection control circuit board and secondary equipment in electric power system Download PDFInfo
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- CN113359672A CN113359672A CN202110674484.8A CN202110674484A CN113359672A CN 113359672 A CN113359672 A CN 113359672A CN 202110674484 A CN202110674484 A CN 202110674484A CN 113359672 A CN113359672 A CN 113359672A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B23/00—Testing or monitoring of control systems or parts thereof
- G05B23/02—Electric testing or monitoring
- G05B23/0205—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
- G05B23/0208—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterized by the configuration of the monitoring system
- G05B23/0213—Modular or universal configuration of the monitoring system, e.g. monitoring system having modules that may be combined to build monitoring program; monitoring system that can be applied to legacy systems; adaptable monitoring system; using different communication protocols
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/24—Pc safety
- G05B2219/24065—Real time diagnostics
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Abstract
The invention relates to a chip protection control circuit board for an electric power system. This electric power system chip ization protection control circuit board includes: the control circuit and the acquisition circuit are used for acquiring relevant data of the power system chip; the control circuit is connected between the power system chip and a power supply of the power system chip, and the acquisition circuit is electrically connected with the control circuit and the power supply of the power system chip; the relevant data acquired by the acquisition circuit is output to the control circuit, and the control circuit controls the power supply to the power system chip to be switched on or off according to the relevant data. Therefore, the power system chip can be protected by controlling the on-off of the power supply of the power system chip.
Description
Technical Field
The application relates to the technical field of power systems, in particular to a chip protection control circuit board of a power system and secondary equipment in the power system.
Background
In the technical field of power systems, electric primary equipment, electric secondary equipment and the like are involved in the process of transmitting electric energy to a user terminal, wherein the electric primary equipment refers to high-voltage electric equipment directly used for producing, transmitting and distributing electric energy, such as a generator, a transformer, a motor and the like, and the electric secondary equipment refers to low-voltage electric equipment which is used for monitoring and controlling the work of the electric primary equipment and providing operation conditions for maintenance personnel, such as control instruments, signal equipment, automatic devices and the like.
Electric secondary equipment is in the course of the work, and its control chip probably breaks down, when breaking down, can cause digital signal to read mistake, data processing mistake etc. to lead to the power failure of large tracts of land, output alarm information when control chip breaks down usually among the traditional art, maintain by fortune dimension personnel, however this kind of technique manual handling is consuming time longer, thereby can't solve the problem in time, finally can't avoid the large tracts of land power failure problem that is brought by the chip trouble.
Disclosure of Invention
Therefore, a need exists for a power system chip protection control circuit board, which solves the problem of large-area power failure caused by the failure of the conventional power system chip.
The application provides a power system chip protection control circuit board, includes: the control circuit and the acquisition circuit are used for acquiring relevant data of the power system chip;
the control circuit is connected between the power system chip and a power supply of the power system chip, and the acquisition circuit is electrically connected with the control circuit and the power supply of the power system chip;
the relevant data acquired by the acquisition circuit is output to the control circuit, and the control circuit controls the power supply to the power system chip to be switched on or off according to the relevant data.
In one embodiment, the control circuit comprises a switch circuit and a controller which are connected with each other;
the switch circuit is connected between the power supply and the power system chip, the controller is connected with the acquisition circuit, and the controller outputs a signal to the switch circuit according to the related data to control the switch circuit to be turned off or on.
In one embodiment, the switch circuit comprises a field effect transistor and a seventh resistor;
the grid electrode of the field effect tube is connected with the controller, the source electrode of the field effect tube is electrically connected with the power supply of the power system chip, and the drain electrode of the field effect tube is connected with the power system chip;
the seventh resistor is connected between the drain electrode of the field effect transistor and the grid electrode of the field effect transistor.
In one embodiment, the method further comprises the following steps: an analog-to-digital conversion unit;
the analog-to-digital conversion unit is connected between the acquisition circuit and the controller, the acquisition circuit acquires relevant data of the power system chip and outputs an analog signal, the analog-to-digital conversion unit converts the analog signal into a digital signal and then outputs the digital signal, and the controller outputs a high level signal or a low level signal to the switch circuit according to the digital signal to control the switch circuit to be switched on or switched off.
In one embodiment, the acquisition circuit comprises a voltage acquisition circuit and a current acquisition circuit.
In one embodiment, the acquisition circuit comprises a voltage acquisition circuit or a current acquisition circuit.
The voltage acquisition circuit is electrically connected with the control circuit and a power supply of the power system chip;
the current acquisition circuit is electrically connected with the control circuit and a power supply of the power system chip.
In one embodiment, the voltage acquisition circuit comprises a second resistor and a third resistor, a first end of the second resistor is connected with a power supply of the power system chip, a second end of the second resistor is connected with a first end of the third resistor and the control circuit, and a second end of the third resistor is grounded;
the current acquisition circuit comprises a fourth resistor, the first end of the fourth resistor is connected with the power supply of the power system chip and the control circuit, and the second end of the fourth resistor is grounded.
In one embodiment, the method further comprises the following steps: the power supply circuit is used for acquiring the output voltage of an external power supply and converting the output voltage to output direct current, and the direct current output by the power supply circuit is a power supply of the power system chip.
In one embodiment, the power circuit comprises a power management chip, a first inductor, a first diode, a second diode, a third diode, a fourth diode, a fifth resistor, a sixth resistor, a fourth capacitor, a fifth capacitor, a sixth capacitor and a seventh capacitor;
the positive power supply end of the power supply management chip is connected with the external power supply and is grounded through the fourth capacitor; the reference voltage end and the power ground end of the power management chip are both grounded;
the current detection end and the voltage detection end of the power management chip are both connected with the acquisition circuit;
a drain voltage first output end of the power management chip is connected with a first end of the first inductor, and a second end of the first inductor is connected with the anode of the third diode; the cathode of the third diode is connected with the power supply anode of the power supply management chip and is grounded through the sixth capacitor; the seventh capacitor is connected with the sixth capacitor in parallel;
a second output end of the drain voltage of the power management chip is connected with a second end of the first inductor and is grounded through a fifth capacitor;
the first output end of the drain voltage of the power management chip is also connected with the cathode of the second diode, and the anode of the second diode is grounded;
the anode of the second diode is also connected with the anode of the first diode, and the cathode of the first diode is connected with an external power supply;
the working state indicating end of the power management chip is connected with the cathode of the fourth diode, and the anode of the fourth diode is connected with the external power supply through the fifth resistor;
the working state indicating end of the power management chip is further connected with the anode of the fifth diode, the cathode of the fifth diode is grounded, and the anode of the fifth diode is further connected with the external power supply through the sixth resistor.
In one embodiment, the method further comprises the following steps: the display circuit is used for displaying relevant data of the power system chip and is connected with the control circuit;
the display circuit comprises a latch, an NAND gate and a display screen, wherein the data input end of the latch is connected with the drain open bidirectional input and output end of the controller in the control circuit and the data bus end of the display screen;
the control end of the latch is grounded, the latch allowing end is connected with the address latch allowing signal end of the controller, the first state output end of the latch is connected with the read-write signal end of the display screen, and the second state output end of the latch is connected with the register selecting end of the display screen;
the enable end of the display screen is connected with the output end of the NAND gate;
the first input end of the NAND gate is connected with the write gating end of the external data memory of the controller, and the second input end of the NAND gate is connected with the read gating end of the external data memory of the controller.
A secondary device in an electrical power system, comprising: the chip protection control circuit board comprises a power system chip, a power supply of the power system chip and the power system chip protection control circuit board; the power system chip protection control circuit board is connected between the power system chip and a power supply of the power system chip.
According to the chip protection control circuit board for the power system, the acquisition circuit acquires the relevant data of the power system chip, so that the control circuit can control the power supply of the power supply source to the power system chip to be switched on and off according to the relevant data of the power system chip acquired by the acquisition circuit. The power system chip can be protected by controlling the on-off of the power supply of the power system chip.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments or the conventional technologies of the present application, the drawings used in the descriptions of the embodiments or the conventional technologies will be briefly introduced below, it is obvious that the drawings in the following descriptions are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a block diagram of a power system on-chip protection control circuit board according to an embodiment;
FIG. 2 is a block diagram of a chip protection control circuit board of the power system according to another embodiment;
FIG. 3 is a block diagram of an embodiment of a power system on-chip protection control circuit board;
FIG. 4 is a block diagram of the chip protection control circuit board of the power system according to an embodiment;
fig. 5 is a block diagram of a chip protection control circuit board of an embodiment of the present invention.
Detailed Description
To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Embodiments of the present application are set forth in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
It will be understood that, as used herein, the terms "first," "second," and the like may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, a first resistance may be referred to as a second resistance, and similarly, a second resistance may be referred to as a first resistance, without departing from the scope of the present application. The first resistance and the second resistance are both resistances, but they are not the same resistance.
It is to be understood that "connection" in the following embodiments is to be understood as "electrical connection", "communication connection", and the like if the connected circuits, modules, units, and the like have communication of electrical signals or data with each other.
As used herein, the singular forms "a", "an" and "the" may include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises/comprising," "includes" or "including," etc., specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof. Also, as used in this specification, the term "and/or" includes any and all combinations of the associated listed items.
In one embodiment, referring to fig. 1, the electrical system chip protection control circuit board includes a control circuit 102 and an acquisition circuit 104 for acquiring data related to the electrical system chip, wherein the control circuit 102 is connected between an electrical system chip 106 and a power supply 108 of the electrical system chip, and the acquisition circuit 104 is electrically connected to the control circuit 102 and the power supply 108 of the electrical system chip.
Specifically, the related data acquired by the acquisition circuit 104 is output to the control circuit 102, and the control circuit 102 controls the on/off of the power supply from the power supply 108 to the power system chip 106 according to the related data.
Wherein, the related data of the power system chip can be the voltage, current, etc. of the power system chip, the collecting circuit 104 can collect the voltage, current, etc. of the power system chip 106, and outputs the collected voltage, current, etc. to the control circuit 102, and the control circuit 102 processes the received voltage, current, etc., for example, when the received voltage, current, etc. of the power system chip 106 is not within the preset range, indicating that the current power system chip 106 is malfunctioning, the control circuit 102 may control the power system chip's power supply 108 to disconnect the power supply to the power system chip 106, when the received voltage, current, etc. of the power system chip 106 is within a predetermined range, the control circuit may control the power supply 108 of the power system chip to continue to supply power to the power system chip 106 if the power system chip 106 is not faulty.
In the above embodiment, the control circuit is connected between the power system chip and the power supply of the power system chip, the acquisition circuit is electrically connected to the control circuit and the power supply of the power system chip, the relevant data acquired by the acquisition circuit is output to the control circuit, and the control circuit controls the power supply of the power supply to the power system chip to be switched on and off according to the relevant data. The power system chip can be protected by controlling the on-off of the power supply of the power system chip.
In one embodiment, referring to fig. 2, the control circuit 102 includes a switch circuit 202 and a controller 204 connected to each other, the switch circuit 202 is connected between the power supply 108 of the power system chip and the power system chip 106, and the controller 204 is connected to the acquisition circuit 104. The controller 204 may be implemented by a single chip (e.g., AT89C 51).
Specifically, the acquisition circuit 104 transmits the acquired relevant data of the power system chip 106 to the controller 204, and the controller 204 processes the received relevant data and outputs a signal to the switch circuit 202 to control the switch circuit 202 to be turned on or off, so that the power supply 108 of the power system chip is controlled to be turned on or off for supplying power to the power system chip 106 by turning on or off the switch circuit 202. When the power system chip 106 is not in a fault, the switch circuit 202 is in a closed state, the power supply 108 of the power system chip supplies power to the power system chip 106, and when the power system chip is in a fault, the switch circuit 202 is controlled to be opened, so that the power supply 108 of the power system chip is disconnected from supplying power to the power system chip 106.
The controller 204 may control the switch circuit 202 to be closed by outputting a high level signal to the switch circuit 202, so that the power supply 108 of the power system chip may supply power to the power system chip 106, and the controller 204 may control the switch circuit 202 to be opened by outputting a low level signal to the switch circuit 202, so that the power supply 108 of the power system chip stops supplying power to the power system chip 106. Therefore, the on-off of the power supply source to the power system chip is controlled by controlling the on-off of the switch circuit.
In one embodiment, referring to fig. 3, the switch circuit 202 includes a fet Q1 and a seventh resistor R7, wherein a gate of the fet Q1 is connected to the control terminal K of the controller 204, a source of the fet Q1 is electrically connected to the power supply of the power system chip, and a drain of the fet Q1 is connected to the power system chip 106; the seventh resistor R7 is connected between the drain of the fet and the gate of the fet. The power supply 108 of the power system chip may be a switching power supply, an energy storage capacitor power supply, or the like.
In one embodiment, when the controller 204 inputs a high-level signal to the gate of the fet, the fet is turned on between the drain and the source, and the switch circuit is closed, so that the power system chip 106 is powered by the power supply 108 of the power system chip.
In one embodiment, when the controller 204 inputs a low-level signal to the gate of the fet, the drain and the source of the fet are turned off, the switch circuit is turned off, and the power supply 108 of the power system chip cannot supply power to the power system chip 106.
In one embodiment, as shown with reference to FIG. 3, the acquisition circuit includes a voltage acquisition circuit 302. In one embodiment, as shown with reference to FIG. 3, the acquisition circuit includes a current acquisition circuit 304. In one embodiment, the acquisition circuit may also include both the voltage acquisition circuit 302 and the current acquisition circuit 304. When the acquisition circuit only includes one of the voltage acquisition circuit 302 and the current acquisition circuit 304, components and parts can be saved, loss can be reduced, and the like, and when the acquisition circuit includes two, the control circuit 102 can judge by combining voltage and current when judging whether the power system chip has a fault, thereby improving the judgment accuracy.
The voltage acquisition circuit 302 is electrically connected with the control circuit 102 and a power supply of the power system chip; the current collection circuit 304 is electrically connected to the control circuit and the power supply of the power system chip.
In one embodiment, referring to fig. 3, the voltage acquisition circuit 302 includes a second resistor R2 and a third resistor R3, a first end of the second resistor R2 is connected to the power supply 108 of the power system chip, a second end of the second resistor R2 is connected to the first end of the third resistor R3 and the control circuit 102, and a second end of the third resistor R3 is grounded. The voltage of the circuit system chip can be acquired through the voltage acquisition circuit. In one embodiment, resistance voltage division sampling can be realized according to the second resistor R2 and the third resistor R3, wherein R2 can be used as an upper voltage division resistor, R3 can be used as a lower voltage division resistor, a voltage output by a power supply of the power chip is divided by the second resistor R2 and the third resistor R3 and then output, and a voltage across two ends of the lower voltage division resistor R3 can be used as a collected voltage of the power system chip.
In one embodiment, referring to fig. 3, the current collecting circuit 304 includes a fourth resistor R4, a first end of the fourth resistor R4 is connected to the power supply 108 and the control circuit 102 of the power system chip, and a second end of the fourth resistor R4 is connected to ground.
In one embodiment, the current collecting circuit 304 includes a fourth resistor R4, a first end of the fourth resistor R4 is connected to the control circuit 102 and to the power supply 108 of the power system chip through an eighth capacitor C8, wherein the eighth capacitor C8 has a function of filtering noise.
The current of the circuit system chip can be acquired through the current acquisition circuit. In one embodiment, the fourth resistor R4 is used as a sampling resistor, and the current output from the power supply of the power system chip is input to the fourth resistor R4 and then output, so that a voltage difference exists across the fourth resistor R4, and the current of the power system chip can be obtained according to the voltage difference across the sampling resistor R4 and the resistance value of the sampling resistor.
In one embodiment, referring to fig. 4, the power supply device further includes a power supply circuit 402 that obtains an output voltage of an external power supply, converts the output voltage, and outputs a direct current, where the direct current output by the power supply circuit 402 is a power supply source of the power system chip.
In one embodiment, referring to fig. 3, the power circuit 402 includes a power management chip U5, a first inductor L1, a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5, a fifth resistor R5, a sixth resistor R6, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, and a seventh capacitor C7.
In one embodiment, the power management chip U5 may receive a voltage input from an external power source and output a dc power matching the power system chip, the first inductor L1 may have a dc-limiting function to isolate a small amount of the dc power output by the power management chip U5, the first diode D1 may have a voltage stabilizing function to protect electronic components in the power circuit and prevent the electronic components from being broken down by high current, the second diode D2 may isolate a reverse voltage, the third diode D3 may output the dc power output by the power management chip U5, the fourth diode D4 and the fifth diode D5 are light emitting diodes to display an operating state of the power management chip, the fifth resistor R5 may have a current limiting function to prevent the fourth diode D4 from being broken down, the sixth resistor R6 may have a current limiting function to prevent the fifth diode D5 from being broken down, the fourth capacitor C4 is used for isolating direct current and communicating alternating current, the alternating current output of the external power supply input to the power management chip is grounded, and the direct current is prevented from passing through, the fifth capacitor C5 is used for isolating direct current and communicating alternating current, the alternating current output of the power management chip is grounded, and the direct current is prevented from passing through, and the sixth capacitor C6 and the seventh capacitor C7 can form a filter circuit, so that the output direct current is smoother.
In one embodiment, the positive power supply terminal VCC of the power management chip is connected to an external power supply and is grounded through a fourth capacitor C4; the reference voltage end VREF and the power ground end GND of the power management chip are grounded; the current detection end AD _ A and the voltage detection end AD _ V of the power management chip U5 are both connected with the acquisition circuit 104; the drain voltage first output terminal PD of the power management chip is connected to the first terminal of the first inductor L1, and the second terminal of the first inductor L1 is connected to the anode of the third diode D3; the cathode of the third diode D3 is connected with the power supply anode of the power supply management chip and is grounded through a sixth capacitor C6; the seventh capacitor C7 is connected in parallel with the sixth capacitor C6; a second output terminal ND of the drain voltage of the power management chip is connected to the second terminal of the first inductor L1 and is grounded through a fifth capacitor C5; the drain voltage first output end PD of the power management chip is also connected with the cathode of a second diode D2, and the anode of the second diode D2 is grounded; the anode of the second diode D2 is also connected with the anode of the first diode D1, and the cathode of the first diode D1 is connected with an external power supply; the working state indicating end LED of the power management chip is connected with the cathode of a fourth diode D4, and the anode of the fourth diode D4 is connected with an external power supply through a fifth resistor R5; the working state indicating end LED of the power management chip is also connected with the anode of a fifth diode D5, the cathode of the fifth diode D5 is grounded, and the anode of the fifth diode is also connected with an external power supply through a sixth resistor. The output voltage of an external power supply can be obtained through the power supply circuit, the output voltage is converted to output direct current, the direct current output by the power supply circuit is a power supply of the power system chip, and on the other hand, the direct current can be selected to be output through the first output end of the drain voltage or output through the second output end of the drain voltage according to relevant data of the power system chip collected by the collecting circuit.
In one embodiment, an external power supply outputs a voltage to a power supply positive terminal VCC of a power management chip, ac power output by the power management chip can be output to a ground terminal through a fourth capacitor C4, dc power is prevented from being output to the ground terminal through a fourth capacitor C4, each electronic component in a power supply circuit is protected through a first diode D1, and a situation that the electronic component is broken down by high current due to excessive current input by the external power supply is prevented, after the power management chip U5 receives the voltage input by the external power supply, whether dc power is output through a drain voltage first output terminal or dc power is output through a drain voltage second output terminal can be selected according to relevant data of a power system chip collected by a collecting circuit, after the dc power is output, a small amount of ac power in the dc power output by the power management chip U5 can be isolated through a first inductor L1, the reverse voltage is isolated by the second diode D2, so that the direct current output by the power management chip U5 is not output to other positions, the direct current output by the power management chip U5 is output with the aid of the third diode D3, and the output direct current is smoother by the filter circuit formed by the sixth capacitor C6 and the seventh capacitor C7, wherein the power management chip U5 can assume its state by the fourth diode D4 and the fifth diode D5, the fourth diode D4 and the fifth resistor R5 can prevent the fourth diode D4 from being broken down, and the fifth diode D5 is connected in series with the sixth resistor R6, so that the fifth diode D5 can be prevented from being broken down.
In one embodiment, referring to fig. 5, the power system chip protection control circuit board further includes a display circuit for displaying data related to the power system chip, the display circuit is connected to the control circuit, and as shown in fig. 5, the display circuit includes a latch 502, a nand gate 504 and a display 506, data input terminals (a DO terminal, a D1 terminal, a D2 terminal, a D3 terminal, a D4 terminal, a D5 terminal, a D6 terminal, and a D7 terminal) of the latch 502 are connected to drain-open bidirectional input/output terminals (a P0.01AD1 terminal, a P0.2/AD2 terminal, a P0.3/AD3 terminal, a P0.4/AD4 terminal, a P0.5/AD5 terminal, a P0.6/AD6 terminal, a P0.7/AD7 terminal, and a P0.0/AD0 terminal) of the controller 204 in the control circuit and data bus terminals (a DO terminal, a D1 terminal, a D2 terminal, a D3 terminal, a D4 terminal, a D5 terminal, a D6 terminal, and a D7 terminal) of the display screen 506; the control end (OE end) of the latch 502 is grounded, the latch enable end (LE end) is connected with the address latch enable signal end (ALE end) of the controller 204, the first state output end (Q0 end) of the latch 502 is connected with the read-write signal end (RW end) of the display screen 506, and the second state output end (Q1 end) is connected with the register selection end (RS end) of the display screen 506; the enable end (end E) of the display screen 506 is connected to the output end of the nand gate 504; the nand gate 504 has a first input terminal connected to the write strobe (P3.6/WR) of the external data memory of the controller 204 and a second input terminal connected to the read strobe (P3.7/RD) of the external data memory of the controller. Through the display circuit, the related data of the power system chip can be displayed to a user, so that a judgment basis is provided for the user.
In one embodiment, the controller may display the received data related to the power system chip on the LCD display screen, for example, signals may be input to the LCD display screen through the latch, and specifically, the controller may connect the drain open bidirectional input/output terminals (P0.01AD1 terminal, P0.2/AD2 terminal, P0.3/AD3 terminal, P0.4/AD4 terminal, P0.5/AD5 terminal, P0.6/AD6 terminal, P0.7/AD7 terminal, and P0.0/AD0 terminal) with the data input terminals (DO terminal, D1 terminal, D2 terminal, D3 terminal, D4 terminal, D5 terminal, D6 terminal, and D7 terminal) of the latch, connect the data input terminals of the latch with the data bus terminals (DO terminal, D1 terminal, D2 terminal, D3 terminal, D4 terminal, D5 terminal, D6 terminal) of the display screen 506, and connect the nand gate control terminal (573) with the display control terminal, therefore, data interaction with the LCD is realized, when the controller needs to display related data on the LCD display screen, the controller can write a gating end (P3.6/WR) input signal to the NAND gate by outputting the external data memory, trigger the enabling end of the display screen by the NAND gate, output data to the latch by the drain open circuit bidirectional input and output end, and output the data to the LCD display screen by the latch for display.
In one embodiment, referring to fig. 5, the power system chip protection control circuit board further includes: an analog-to-digital conversion unit 602; the analog-to-digital conversion unit is connected between the acquisition circuit 104 and the controller 204, the acquisition circuit 104 acquires relevant data of the power system chip and outputs an analog signal, wherein the relevant data of the power system chip can be voltage data, current data and the like, and the voltage data and the current data are continuously changed values, so that the signal output by the acquisition circuit 104 is an analog signal, the analog signal can be converted into a digital signal through the analog-to-digital conversion unit and then output, and the controller 204 outputs a high level signal or a low level signal to the switch circuit according to the digital signal to control the switch circuit to be turned off or turned on. When the controller processes signals, the digital signals are more visual and convenient to process, and analog signals collected by the collecting circuit can be converted into digital signals through the analog-to-digital conversion unit and then output to the controller.
In one embodiment, the analog-to-digital conversion unit 602 includes an analog-to-digital conversion chip U4, and a first analog input terminal (CH0 terminal), a second analog input terminal (CH1 terminal) of the analog-to-digital conversion chip are connected to the acquisition circuit 104; a power supply end (VCC) of the analog-to-digital converter is connected to an external power supply, and a ground end (GND) of the analog-to-digital converter is grounded; the chip selection enable end (CS end) of the analog-to-digital converter is connected with the serial input end (P3.0/RXD end) of the controller 204 in the control circuit, and the clock input end (CLK) is connected with the serial output end (P3.1/TXD end) of the controller; and a data input end (DI end) and a data output end (DO end) of the analog-to-digital converter are connected with an external interrupt end of the controller. The analog signal acquired by the acquisition circuit can be converted into a digital signal through the analog-to-digital conversion unit and then output to the controller.
In one embodiment, there is provided a secondary device in a power system, including: the power system chip, the power supply of the power system chip and the power system chip protection control circuit board in the embodiment; the power system chip protection control circuit board is connected between the power system chip and a power supply of the power system chip.
The control circuit in the power system chip protection control circuit board controls the power supply of the power supply source to the power system chip to be switched on and off according to the relevant data of the power system chip collected by the collecting circuit.
In the description herein, references to the description of "some embodiments," "other embodiments," "desired embodiments," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, a schematic description of the above terminology may not necessarily refer to the same embodiment or example.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A power system chip protection control circuit board is characterized by comprising: the control circuit and the acquisition circuit are used for acquiring relevant data of the power system chip;
the control circuit is connected between the power system chip and a power supply of the power system chip, and the acquisition circuit is electrically connected with the control circuit and the power supply of the power system chip;
the relevant data acquired by the acquisition circuit is output to the control circuit, and the control circuit controls the power supply to the power system chip to be switched on or off according to the relevant data.
2. The power system on-chip protection control circuit board of claim 1, wherein the control circuit comprises a switch circuit and a controller connected to each other;
the switch circuit is connected between the power supply and the power system chip, the controller is connected with the acquisition circuit, and the controller outputs a signal to the switch circuit according to the related data to control the switch circuit to be turned off or on.
3. The power system on-chip protection control circuit board of claim 2, wherein the switching circuit comprises a field effect transistor, a seventh resistor;
the grid electrode of the field effect tube is connected with the controller, the source electrode of the field effect tube is electrically connected with the power supply of the power system chip, and the drain electrode of the field effect tube is connected with the power system chip;
the seventh resistor is connected between the drain electrode of the field effect transistor and the grid electrode of the field effect transistor.
4. The power system on-chip protection control circuit board of claim 2, further comprising: an analog-to-digital conversion unit;
the analog-to-digital conversion unit is connected between the acquisition circuit and the controller, the acquisition circuit acquires relevant data of the power system chip and outputs an analog signal, the analog-to-digital conversion unit converts the analog signal into a digital signal and then outputs the digital signal, and the controller outputs a high level signal or a low level signal to the switch circuit according to the digital signal to control the switch circuit to be switched on or switched off.
5. The power system chip protection control circuit board according to claim 1, wherein the collecting circuit comprises a voltage collecting circuit and/or a current collecting circuit;
the voltage acquisition circuit is electrically connected with the control circuit and a power supply of the power system chip;
the current acquisition circuit is electrically connected with the control circuit and a power supply of the power system chip.
6. The power system chip protection control circuit board according to claim 5, wherein the voltage acquisition circuit comprises a second resistor and a third resistor, a first end of the second resistor is connected to a power supply of the power system chip, a second end of the second resistor is connected to a first end of the third resistor and the control circuit, and a second end of the third resistor is grounded;
the current acquisition circuit comprises a fourth resistor, the first end of the fourth resistor is connected with the power supply of the power system chip and the control circuit, and the second end of the fourth resistor is grounded.
7. The power system on-chip protection control circuit board of claim 1, further comprising: the power supply circuit is used for acquiring the output voltage of an external power supply and converting the output voltage to output direct current, and the direct current output by the power supply circuit is a power supply of the power system chip.
8. The power system on-chip protection control circuit board of claim 7, wherein the power circuit comprises a power management chip, a first inductor, a first diode, a second diode, a third diode, a fourth diode, a fifth resistor, a sixth resistor, a fourth capacitor, a fifth capacitor, a sixth capacitor, and a seventh capacitor;
the positive power supply end of the power supply management chip is connected with the external power supply and is grounded through the fourth capacitor; the reference voltage end and the power ground end of the power management chip are both grounded;
the current detection end and the voltage detection end of the power management chip are both connected with the acquisition circuit;
a drain voltage first output end of the power management chip is connected with a first end of the first inductor, and a second end of the first inductor is connected with the anode of the third diode; the cathode of the third diode is connected with the power supply anode of the power supply management chip and is grounded through the sixth capacitor, and the seventh capacitor is connected with the sixth capacitor in parallel;
a second output end of the drain voltage of the power management chip is connected with a second end of the first inductor and is grounded through the fifth capacitor;
the first output end of the drain voltage of the power management chip is also connected with the cathode of the second diode, and the anode of the second diode is grounded;
the anode of the second diode is also connected with the anode of the first diode, and the cathode of the first diode is connected with an external power supply;
the working state indicating end of the power management chip is connected with the cathode of the fourth diode, and the anode of the fourth diode is connected with the external power supply through the fifth resistor;
the working state indicating end of the power management chip is also connected with the anode of the fifth diode, and the cathode of the fifth diode is grounded;
the anode of the fifth diode is also connected with the external power supply through the sixth resistor.
9. The power system on-chip protection control circuit board of claim 1, further comprising: the display circuit is used for displaying relevant data of the power system chip and is connected with the control circuit;
the display circuit comprises a latch, an NAND gate and a display screen, wherein the data input end of the latch is connected with the drain open bidirectional input and output end of the controller in the control circuit and the data bus end of the display screen;
the control end of the latch is grounded, the latch allowing end is connected with the address latch allowing signal end of the controller, the first state output end of the latch is connected with the read-write signal end of the display screen, and the second state output end of the latch is connected with the register selecting end of the display screen;
the enable end of the display screen is connected with the output end of the NAND gate;
the first input end of the NAND gate is connected with the write gating end of the external data memory of the controller, and the second input end of the NAND gate is connected with the read gating end of the external data memory of the controller.
10. A secondary device in an electric power system, comprising: a power system chip, a power supply source of the power system chip and the power system chiplike protection control circuit board according to any one of claims 1-9; the power system chip protection control circuit board is connected between the power system chip and a power supply of the power system chip.
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| CN202110674484.8A CN113359672A (en) | 2021-06-17 | 2021-06-17 | Electric power system chip protection control circuit board and secondary equipment in electric power system |
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