CN113314414B - Manufacturing method of low-power-consumption ultrafast recovery rectifier diode - Google Patents

Abstract

According to the manufacturing method of the low-power consumption ultrafast recovery rectifier diode, the high-temperature bonding is performed after the high-conductivity P-type monocrystalline silicon wafer and the N-type monocrystalline silicon wafer are subjected to boron diffusion, and the silicon wafer forming the PN junction is thinned, so that the thickness of the diode chip can be thinned indirectly, the forward voltage drop of the diode device is effectively reduced, and the purposes of low power consumption and high frequency of the device are achieved.

Description

A method of manufacturing a low-power ultra-fast recovery rectifier diode

Technical field

The invention relates to a manufacturing method of a low-power ultra-fast recovery rectifier diode.

Background technique

At present, machine manufacturers have increasingly higher requirements for high-frequency diode devices, which require a small reverse recovery time, a small forward voltage drop and a high reverse operating voltage.

Usually, the chip manufacturing of this type of diode requires the use of ion implantation process and epitaxial process. The semiconductor planar process is commonly used in the manufacturing of silicon transistors. That is, after growing a silicon oxide film on the silicon wafer, a silicon oxide film window is opened by photolithography. Then, localized diffusion of P and N-type semiconductor impurities is performed under the mask of silicon oxide film to form a PN junction. The PN junction is protected by a silicon oxide film to achieve low reverse leakage current. The silicon oxide film serves as an insulating medium and also plays the role of surface passivation of the PN junction.

Contents of the invention

In order to solve the above technical problems, the present invention provides a manufacturing method of a low-power ultra-fast recovery rectifier diode.

The present invention is realized through the following technical solutions.

The invention provides a method for manufacturing a low-power ultra-fast recovery rectifier diode, the steps of which are:

1. Use high-conductivity P-type single crystal silicon wafers, first perform single-sided boron diffusion, and then use electron beam evaporation to form a metallized layer film on the boron diffusion surface;

2. Use N-type monocrystalline silicon wafers to diffuse boron on one side, and then conduct electron beam evaporation on the boron side to form a metallized layer film;

3. Use the metallized layer for high-temperature bonding of the silicon wafers processed in steps 1 and 2. The bonding equipment is a vacuum sintering furnace;

4. Grind and thin the bonded silicon wafer;

5. Clean the ground silicon wafer;

6. Adjust the energy and implantation angle of the ion implanter, implant phosphorus on the N-type silicon wafer, and implant boron on the P-type silicon wafer;

7. The ion-implanted silicon wafer is evaporated by electron beam to form a double-sided metallization layer.

8. Tube core forming;

9. Mold installation and welding;

10. Corrosion forming.

In step one, the thickness of the P-type single crystal silicon wafer is 300 μm ± 5 μm, and the resistivity is 0.01Ω·cm～0.02Ω·cm.

In the second step, the thickness of the N-type single crystal silicon wafer is 300 μm ± 5 μm, and the resistivity is 20Ω·cm～25Ω·cm.

In the step 4, the N-type silicon wafer is ground down by 180 μm±5 μm, and the P-type silicon wafer is ground down by 180 μm±5 μm. After grinding, the total thickness of the silicon wafer is 240 μm±5 micrometers.

The energy and implant angle of the ion implanter described in Step 6 are dose=1e13 and 0 degrees.

The beneficial effect of the present invention is that by using metallization layers to bond high-conductivity silicon wafers and silicon wafers that have formed PN junctions, and then thinning the silicon wafers that have formed PN junctions, the thickness of the diode chip can be indirectly thinned. Effectively reduce the forward voltage drop of the diode device to achieve the purpose of low power consumption and high frequency of the device.

Detailed ways

The technical solution of the present invention is further described below, but the scope of protection claimed is not limited to the description.

A method of manufacturing a low-power ultra-fast recovery rectifier diode, the steps of which are:

1. Select high conductivity P-type single crystal silicon wafer, first perform single-sided boron diffusion, and then use electron beam evaporation to form a metallization layer film on the boron diffusion surface;

2. Use N-type monocrystalline silicon wafers to perform single-sided boron diffusion. First, perform single-sided boron diffusion to increase the doping concentration on the surface of the silicon wafer so that the subsequent metallization layer will form ohmic contact with the silicon wafer. Then use electrons on the boron diffusion surface. Beam evaporation to form metallized layer film

3. Use the metallized layer for high-temperature bonding of the silicon wafers processed in steps 1 and 2. The bonding equipment is a vacuum sintering furnace;

4. Grind and thin the bonded silicon wafer;

5. Clean the ground silicon wafer;

6. Adjust the energy and implantation angle of the ion implanter, implant phosphorus on the N-type silicon wafer, and implant boron on the P-type silicon wafer to increase the doping concentration on the surface of the silicon wafer, so that the subsequent metallization layer and the silicon wafer will form an ohmic touch;

7. The ion-implanted silicon wafer is evaporated by electron beam to form a double-sided metallization layer.

8. Tube core forming;

9. Mold installation and welding;

10. Corrosion forming.

In step one, the thickness of the P-type single crystal silicon wafer is 300 μm ± 5 μm, and the resistivity is 0.01Ω·cm～0.02Ω·cm.

In the second step, the thickness of the N-type single crystal silicon wafer is 300 μm ± 5 μm, and the resistivity is 20Ω·cm～25Ω·cm.

In step four, the N-type silicon wafer is ground to 180 μm ± 5 μm, and the P-type silicon wafer is ground to 180 μm ± 5 μm. The total thickness of the polished silicon wafer is 240 μm ± 5 μm.

The energy and implant angle of the ion implanter described in Step 6 are dose=1e13 and 0 degrees.

The present invention uses metallization layer by layer to bond high-conductivity silicon wafers and silicon wafers that have formed PN junctions, and then thins the silicon wafers that have formed PN junctions, which can indirectly thin the thickness of the diode chip and effectively reduce the risk of the diode device. The forward voltage drop reaches the low power consumption and high frequency of the device (trr≤30ns, I _F =1A, I _R =1A, i _rr =0.1A).

Claims (1)

1. A manufacturing method of a low-power consumption ultrafast recovery rectifier diode comprises the following steps:

1. selecting a high-conductivity P-type monocrystalline silicon wafer, firstly performing single-sided boron diffusion, and then forming a metallized layer film on a boron diffusion surface by adopting electron beam evaporation;

2. selecting an N-type monocrystalline silicon wafer, performing single-sided boron diffusion, and performing electron beam evaporation on the boron surface to form a metallized layer film;

3. carrying out high-temperature bonding on the silicon wafers processed in the first step and the second step by adopting a metallized layer, wherein bonding equipment is a vacuum sintering furnace;

4. grinding and thinning the bonded silicon wafer;

5. cleaning the ground silicon wafer;

6. adjusting the energy and the injection angle of an ion implanter, injecting phosphorus into the surface of the N-type silicon wafer, and injecting boron into the P-type silicon wafer;

7. performing electron beam evaporation on the silicon wafer subjected to ion implantation to form a double-sided metallization layer;

8. forming a tube core;

9. filling a mold and welding;

10. etching and forming;

the thickness of the P-type monocrystalline silicon piece in the first step is 300 mu m plus or minus 5 mu m, and the resistivity is 0.01Ω & cm-0.02Ω & cm;

the thickness of the N-type monocrystalline silicon piece in the second step is 300 mu m plus or minus 5 mu m, and the resistivity is 20 omega cm-25 omega cm;

in the fourth step, the N-type silicon wafer is ground to 180 mu m plus or minus 5 mu m, the P-type silicon wafer is ground to 180 mu m plus or minus 5 mu m, and the total thickness of the ground silicon wafer is 240 mu m plus or minus 5 mu m.