[go: up one dir, main page]

CN113284801B - Preparation method of gallium nitride-based high electron mobility transistor epitaxial wafer - Google Patents

Preparation method of gallium nitride-based high electron mobility transistor epitaxial wafer Download PDF

Info

Publication number
CN113284801B
CN113284801B CN202110342496.0A CN202110342496A CN113284801B CN 113284801 B CN113284801 B CN 113284801B CN 202110342496 A CN202110342496 A CN 202110342496A CN 113284801 B CN113284801 B CN 113284801B
Authority
CN
China
Prior art keywords
layer
buffer layer
resistance buffer
growing
nucleation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202110342496.0A
Other languages
Chinese (zh)
Other versions
CN113284801A (en
Inventor
葛永晖
梅劲
刘春杨
刘旺平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HC Semitek Zhejiang Co Ltd
Original Assignee
HC Semitek Zhejiang Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HC Semitek Zhejiang Co Ltd filed Critical HC Semitek Zhejiang Co Ltd
Priority to CN202110342496.0A priority Critical patent/CN113284801B/en
Publication of CN113284801A publication Critical patent/CN113284801A/en
Application granted granted Critical
Publication of CN113284801B publication Critical patent/CN113284801B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/015Manufacture or treatment of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/40FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/475High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
    • H10D30/4755High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

本公开提供了一种氮化镓基高电子迁移率晶体管外延片的制备方法,属于半导体技术领域。制备方法包括:提供一衬底;在衬底上生长成核层,在生长成核层的过程中,对成核层进行第一次高温腐蚀处理;在成核层上生长高阻缓冲层,在生长高阻缓冲层的过程中,依次对高阻缓冲层进行第二次高温腐蚀处理和离子束轰击处理;在高阻缓冲层上依次生长沟道层和AlGaN势垒层。采用该制备方法可以有效避免外延层内晶格失配产生的应力和缺陷延伸,提高最终形成的外延层的晶体质量,并提高电子迁移率晶体管的电子迁移率。

Figure 202110342496

The disclosure provides a method for preparing a gallium nitride-based high electron mobility transistor epitaxial wafer, which belongs to the field of semiconductor technology. The preparation method includes: providing a substrate; growing a nucleation layer on the substrate, performing a first high-temperature corrosion treatment on the nucleation layer during the growth of the nucleation layer; growing a high-resistance buffer layer on the nucleation layer, In the process of growing the high-resistance buffer layer, the high-resistance buffer layer is sequentially subjected to a second high-temperature corrosion treatment and ion beam bombardment treatment; a channel layer and an AlGaN barrier layer are sequentially grown on the high-resistance buffer layer. The preparation method can effectively avoid the stress and defect extension caused by lattice mismatch in the epitaxial layer, improve the crystal quality of the finally formed epitaxial layer, and improve the electron mobility of the electron mobility transistor.

Figure 202110342496

Description

氮化镓基高电子迁移率晶体管外延片的制备方法Preparation method of gallium nitride-based high electron mobility transistor epitaxial wafer

技术领域technical field

本公开涉及半导体技术领域,特别涉及一种氮化镓基高电子迁移率晶体管外延片的制备方法。The disclosure relates to the technical field of semiconductors, in particular to a method for preparing gallium nitride-based high electron mobility transistor epitaxial wafers.

背景技术Background technique

HEMT(High Electron Mobility Transistor,高电子迁移率晶体管)是FET(FieldEffect Transistor,场效应晶体管)的一种,它使用两种具有不同能隙的材料形成异质结,为载流子提供沟道。GaN(氮化镓)基材料具有宽带隙、高电子迁移率、耐高压、抗辐射、易形成异质结构、自发极化效应大等特性,适合制备HEMT等半导体器件。HEMT (High Electron Mobility Transistor, High Electron Mobility Transistor) is a type of FET (Field Effect Transistor, Field Effect Transistor), which uses two materials with different energy gaps to form a heterojunction to provide a channel for carriers. GaN (gallium nitride)-based materials have the characteristics of wide band gap, high electron mobility, high voltage resistance, radiation resistance, easy formation of heterostructures, and large spontaneous polarization effect, and are suitable for the preparation of semiconductor devices such as HEMTs.

相关技术中,GaN基HEMT包括外延层以及分别设置在外延层上的源极、漏极、栅极,源极和漏极与外延层之间形成欧姆接触,栅极与外延层之间形成肖特基接触。外延层包括衬底以及依次层叠在衬底上的沟道层、势垒层,沟道层和势垒层的异质结界面处形成高浓度、高迁移率的二维电子气。In the related art, a GaN-based HEMT includes an epitaxial layer and a source, a drain, and a gate respectively disposed on the epitaxial layer. The source and the drain form an ohmic contact with the epitaxial layer, and a ohmic contact is formed between the gate and the epitaxial layer. Teki contacts. The epitaxial layer includes a substrate and a channel layer and a barrier layer sequentially stacked on the substrate, and a two-dimensional electron gas with high concentration and high mobility is formed at the heterojunction interface of the channel layer and the barrier layer.

衬底的材料采用蓝宝石或者碳化硅,沟道层的材料采用GaN,衬底和沟道层之间存在较大的晶格失配,晶格失配产生的应力和缺陷在外延层内延伸和积累,导致外延层的晶体质量较差,影响载流子的迁移率。The material of the substrate is sapphire or silicon carbide, and the material of the channel layer is GaN. There is a large lattice mismatch between the substrate and the channel layer, and the stress and defects caused by the lattice mismatch extend and form in the epitaxial layer. Accumulation, resulting in poor crystal quality of the epitaxial layer, affecting the mobility of carriers.

发明内容Contents of the invention

本公开实施例提供了一种氮化镓基高电子迁移率晶体管外延片的制备方法,可以有效避免外延层内晶格失配产生的应力和缺陷延伸,提高最终形成的外延层的晶体质量,并提高电子迁移率晶体管的电子迁移率。所述技术方案如下:The embodiment of the present disclosure provides a method for preparing a gallium nitride-based high electron mobility transistor epitaxial wafer, which can effectively avoid stress and defect extension caused by lattice mismatch in the epitaxial layer, and improve the crystal quality of the finally formed epitaxial layer. And improve the electron mobility of the electron mobility transistor. Described technical scheme is as follows:

本公开实施例提供了一种氮化镓基高电子迁移率晶体管外延片的制备方法,所述制备方法包括:An embodiment of the present disclosure provides a method for preparing a gallium nitride-based high electron mobility transistor epitaxial wafer, the preparation method comprising:

提供一衬底;providing a substrate;

在所述衬底上生长成核层,在生长所述成核层的过程中,对所述成核层进行第一次高温腐蚀处理;growing a nucleation layer on the substrate, and performing a first high-temperature corrosion treatment on the nucleation layer during the process of growing the nucleation layer;

在所述成核层上生长高阻缓冲层,在生长所述高阻缓冲层的过程中,依次对所述高阻缓冲层进行第二次高温腐蚀处理和离子束轰击处理;growing a high-resistance buffer layer on the nucleation layer, and sequentially performing a second high-temperature corrosion treatment and ion beam bombardment treatment on the high-resistance buffer layer during the process of growing the high-resistance buffer layer;

在所述高阻缓冲层上依次生长沟道层和AlGaN势垒层。A channel layer and an AlGaN barrier layer are grown sequentially on the high-resistance buffer layer.

可选地,所述在生长所述成核层的过程中,对所述成核层进行第一次高温腐蚀处理,包括:Optionally, during the process of growing the nucleation layer, performing a first high-temperature corrosion treatment on the nucleation layer includes:

生长第一成核层;growing the first nucleation layer;

将所述第一成核层在热碱溶液中浸泡第一设定时间;Soaking the first nucleation layer in hot alkali solution for a first set time;

将浸泡后的所述第一成核层进行去离子水甩干烘干;Spinning and drying the first nucleation layer after soaking with deionized water;

在所述第一成核层上生长第二成核层。A second nucleation layer is grown on the first nucleation layer.

可选地,所述生长所述第一成核层包括:Optionally, the growing the first nucleation layer includes:

控制反应室温度为600~950℃,压力为100~300mbar,生长所述第一成核层,所述第一成核层的厚度为所述成核层总厚度的1/3~1/2。Control the temperature of the reaction chamber to be 600-950°C and the pressure to be 100-300mbar to grow the first nucleation layer, the thickness of the first nucleation layer being 1/3-1/2 of the total thickness of the nucleation layer .

可选地,所述将所述第一成核层在热碱溶液中浸泡第一设定时间,包括:Optionally, soaking the first nucleation layer in hot alkali solution for a first set time includes:

将所述第一成核层在KOH或NaOH的浓度为20%~50%,温度为30~60℃的热碱溶液中浸泡15~35min。Soaking the first nucleation layer in a hot alkali solution with a KOH or NaOH concentration of 20% to 50% and a temperature of 30 to 60°C for 15 to 35 minutes.

可选地,所述将浸泡后的所述第一成核层进行去离子水甩干烘干,包括:Optionally, said drying the soaked first nucleation layer with deionized water, including:

将浸泡后的所述第一成核层放入烘箱,在50~150℃,真空度-500~-720pa的条件下烘干20-60min。Put the soaked first nucleation layer into an oven, and dry it for 20-60min at 50-150°C and vacuum degree of -500--720pa.

可选地,所述在生长所述高阻缓冲层的过程中,依次对所述高阻缓冲层进行第二次高温腐蚀处理和离子束轰击处理,包括:Optionally, during the process of growing the high-resistance buffer layer, sequentially performing a second high-temperature etching treatment and ion beam bombardment treatment on the high-resistance buffer layer, including:

生长第一高阻缓冲层;growing a first high-resistance buffer layer;

将所述第一高阻缓冲层在热碱溶液中浸泡第二设定时间;Soaking the first high-resistance buffer layer in hot alkali solution for a second set time;

将浸泡后的所述第一高阻缓冲层进行去离子水甩干烘干;Spinning and drying the first high-resistance buffer layer after soaking with deionized water;

在所述第一高阻缓冲层上生长第二高阻缓冲层;growing a second high resistance buffer layer on the first high resistance buffer layer;

对所述第二高阻缓冲层进行离子束轰击;performing ion beam bombardment on the second high-resistance buffer layer;

在所述第二高阻缓冲层上生长第三高阻缓冲层。growing a third high resistance buffer layer on the second high resistance buffer layer.

可选地,所述生长第一高阻缓冲层,包括:Optionally, the growing the first high-resistance buffer layer includes:

控制反应室温度为1000~1200℃,压力为100~300mbar,生长所述第一高阻缓冲层,所述第一高阻缓冲层的厚度为所述高阻缓冲层总厚度的1/2~2/3。controlling the temperature of the reaction chamber to be 1000-1200° C., and the pressure to be 100-300 mbar to grow the first high-resistance buffer layer, and the thickness of the first high-resistance buffer layer is 1/2 to 1/2 of the total thickness of the high-resistance buffer layer. 2/3.

可选地,所述将所述第一高阻缓冲层在热碱溶液中浸泡第二设定时间,包括:Optionally, said soaking said first high-resistance buffer layer in hot alkali solution for a second set time includes:

将所述第一高阻缓冲层在KOH或NaOH的浓度为20%~50%,温度为30~60℃的热碱溶液中浸泡15~35min。Soak the first high-resistance buffer layer in a hot alkali solution with a concentration of KOH or NaOH of 20%-50% and a temperature of 30-60° C. for 15-35 minutes.

可选地,所述在所述第一高阻缓冲层上生长所述第二高阻缓冲层,包括:Optionally, the growing the second high-resistance buffer layer on the first high-resistance buffer layer includes:

控制反应室温度为1000~1200℃,压力为100~300mbar,生长所述第二高阻缓冲层,所述第二高阻缓冲层的厚度为100~200nm。The temperature of the reaction chamber is controlled to be 1000-1200° C. and the pressure is 100-300 mbar to grow the second high-resistance buffer layer, and the thickness of the second high-resistance buffer layer is 100-200 nm.

可选地,所述对所述第二高阻缓冲层进行离子束轰击,包括:Optionally, performing ion beam bombardment on the second high-resistance buffer layer includes:

采用C、Ar混合的离子源,在10-7~10-5Pa的真空条件下,控制所述离子源产生的离子束流为20~150mA,能量为5~30KeV,功率为5~20kw,将所述离子束加速聚焦,使所述离子束轰击所述第二高阻缓冲层。Using the ion source mixed with C and Ar, under the vacuum condition of 10 -7 ~ 10 -5 Pa, the ion beam current generated by the ion source is controlled to be 20 ~ 150mA, the energy is 5 ~ 30KeV, and the power is 5 ~ 20kw, accelerating and focusing the ion beam so that the ion beam bombards the second high-resistance buffer layer.

本公开实施例提供的技术方案带来的有益效果是:The beneficial effects brought by the technical solutions provided by the embodiments of the present disclosure are:

通过在衬底上生长GaN沟道层之前,先在衬底上形成成核层,在成核层形成过程中,先对成核层进行第一次高温腐蚀处理,可以在成核层上形成多孔结构,多孔GaN形成的驰豫可以有效的释放AlGaN高阻缓冲层形成的压电应力,提高底层的晶体质量,从而有利于获得迁移率较高的沟道层和二维电子气界面。同时,在生长完成核层后,在生长高阻缓冲层的过程中,先对高阻缓冲层进行第二次高温腐蚀处理,从而可以进一步在高阻缓冲层上形成多孔,由于多孔存在,多孔间的空气不导电,可以形成一层高阻薄膜,增加阻抗,减少背景载流子对沟道的影响。接着对高阻缓冲层进行离子束轰击处理,有利于形成表面统一的悬挂键,保持化学键合状态的均匀性和一致性,使得外延层内延伸和积累的应力整体上得到减少,缺陷减少,外延层的晶体质量得到提高,高电子迁移率晶体管的电子迁移率较高。By forming a nucleation layer on the substrate before growing the GaN channel layer on the substrate, and performing the first high-temperature corrosion treatment on the nucleation layer during the formation of the nucleation layer, it is possible to form on the nucleation layer Porous structure, the relaxation formed by porous GaN can effectively release the piezoelectric stress formed by the AlGaN high-resistance buffer layer, improve the crystal quality of the bottom layer, and thus help to obtain a channel layer with higher mobility and a two-dimensional electron gas interface. At the same time, after the growth of the nuclear layer is completed, in the process of growing the high-resistance buffer layer, the high-resistance buffer layer is subjected to a second high-temperature corrosion treatment, so that pores can be further formed on the high-resistance buffer layer. The air in between is non-conductive and can form a high-resistance film to increase impedance and reduce the influence of background carriers on the channel. Then, ion beam bombardment treatment is performed on the high-resistance buffer layer, which is conducive to the formation of uniform dangling bonds on the surface, and maintains the uniformity and consistency of the chemical bonding state, so that the stress extending and accumulating in the epitaxial layer is generally reduced, and the defects are reduced. The crystal quality of the layer is improved, and the electron mobility of the high electron mobility transistor is higher.

附图说明Description of drawings

为了更清楚地说明本公开实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本公开的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings that need to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For those skilled in the art, other drawings can also be obtained based on these drawings without creative effort.

图1是本公开实施例提供的一种氮化镓基高电子迁移率晶体管外延片的制备方法流程图;FIG. 1 is a flowchart of a method for preparing a gallium nitride-based high electron mobility transistor epitaxial wafer provided by an embodiment of the present disclosure;

图2是本公开实施例提供的另一种氮化镓基高电子迁移率晶体管外延片的制备方法流程图;FIG. 2 is a flow chart of another method for preparing GaN-based high electron mobility transistor epitaxial wafers provided by an embodiment of the present disclosure;

图3是本公开实施例提供的一种氮化镓基高电子迁移率晶体管外延片的结构示意图。FIG. 3 is a schematic structural diagram of a gallium nitride-based high electron mobility transistor epitaxial wafer provided by an embodiment of the present disclosure.

具体实施方式Detailed ways

为使本公开的目的、技术方案和优点更加清楚,下面将结合附图对本公开实施方式作进一步地详细描述。In order to make the purpose, technical solution and advantages of the present disclosure clearer, the implementation manners of the present disclosure will be further described in detail below in conjunction with the accompanying drawings.

图1是本公开实施例提供的一种氮化镓基高电子迁移率晶体管外延片的制备方法流程图,如图1所示,该制备方法包括:Fig. 1 is a flow chart of a method for preparing a gallium nitride-based high electron mobility transistor epitaxial wafer provided by an embodiment of the present disclosure. As shown in Fig. 1 , the preparation method includes:

步骤101、提供一衬底。Step 101, providing a substrate.

示例性地,衬底可以是蓝宝石、Si或SiC衬底。Exemplarily, the substrate may be a sapphire, Si or SiC substrate.

步骤102、在衬底上生长成核层,在生长成核层的过程中,对成核层进行第一次高温腐蚀处理。Step 102, growing a nucleation layer on the substrate, and performing a first high-temperature corrosion treatment on the nucleation layer during the process of growing the nucleation layer.

其中,成核层为GaN层。Wherein, the nucleation layer is a GaN layer.

步骤103、在成核层上生长高阻缓冲层,在生长高阻缓冲层的过程中,依次对高阻缓冲层进行第二次高温腐蚀处理和离子束轰击处理。Step 103 , growing a high-resistance buffer layer on the nucleation layer. During the process of growing the high-resistance buffer layer, performing a second high-temperature corrosion treatment and ion beam bombardment treatment on the high-resistance buffer layer in sequence.

其中,高阻缓冲层为AlGaN层。Wherein, the high-resistance buffer layer is an AlGaN layer.

步骤104、在高阻缓冲层上依次生长沟道层和AlGaN势垒层。Step 104, growing a channel layer and an AlGaN barrier layer sequentially on the high-resistance buffer layer.

其中,沟道层为GaN层。该沟道层为二维电子气的输运通道,要求表面平整并且掺杂浓度很小,以减小对二维电子气的散射。Wherein, the channel layer is a GaN layer. The channel layer is a transport channel for the two-dimensional electron gas, and requires a smooth surface and low doping concentration to reduce the scattering of the two-dimensional electron gas.

AlGaN势垒层通过本身较大的白发极化或者压电极化作用,会在势垒层与沟道层的界面处产生大量的正的极化电荷,该极化正电荷可以吸引电子,从而形成二维电子气。The AlGaN barrier layer will generate a large amount of positive polarization charges at the interface between the barrier layer and the channel layer through its own large white hair polarization or piezoelectric polarization, and the polarized positive charges can attract electrons. Thus a two-dimensional electron gas is formed.

本公开实施例通过在衬底上生长GaN沟道层之前,先在衬底上形成成核层,在成核层形成过程中,先对成核层进行第一次高温腐蚀处理,可以在成核层上形成多孔结构,多孔GaN形成的驰豫可以有效的释放AlGaN高阻缓冲层形成的压电应力,提高底层的晶体质量,从而有利于获得迁移率较高的沟道层和二维电子气界面。同时,在生长完成核层后,在生长高阻缓冲层的过程中,先对高阻缓冲层进行第二次高温腐蚀处理,从而可以进一步在高阻缓冲层上形成多孔,由于多孔存在,多孔间的空气不导电,可以形成一层高阻薄膜,增加阻抗,减少背景载流子对沟道的影响。接着对高阻缓冲层进行离子束轰击处理,有利于形成表面统一的悬挂键,保持化学键合状态的均匀性和一致性,使得外延层内延伸和积累的应力整体上得到减少,缺陷减少,外延层的晶体质量得到提高,高电子迁移率晶体管的电子迁移率较高。In the embodiments of the present disclosure, a nucleation layer is first formed on the substrate before the GaN channel layer is grown on the substrate. A porous structure is formed on the core layer, and the relaxation formed by porous GaN can effectively release the piezoelectric stress formed by the AlGaN high-resistance buffer layer and improve the crystal quality of the bottom layer, which is conducive to obtaining a channel layer with higher mobility and two-dimensional electrons. air interface. At the same time, after the growth of the nuclear layer is completed, in the process of growing the high-resistance buffer layer, the high-resistance buffer layer is subjected to a second high-temperature corrosion treatment, so that pores can be further formed on the high-resistance buffer layer. The air in between is non-conductive and can form a high-resistance film to increase impedance and reduce the influence of background carriers on the channel. Then, ion beam bombardment treatment is performed on the high-resistance buffer layer, which is conducive to the formation of uniform dangling bonds on the surface, and maintains the uniformity and consistency of the chemical bonding state, so that the stress extending and accumulating in the epitaxial layer is generally reduced, and the defects are reduced. The crystal quality of the layer is improved, and the electron mobility of the high electron mobility transistor is higher.

图2是本公开实施例提供的另一种氮化镓基高电子迁移率晶体管外延片的制备方法流程图,如图2所示,该制备方法包括:Fig. 2 is a flow chart of another GaN-based high electron mobility transistor epitaxial wafer preparation method provided by an embodiment of the present disclosure. As shown in Fig. 2 , the preparation method includes:

步骤201、提供一衬底。Step 201, providing a substrate.

示例性地,衬底可以是蓝宝石、Si或SiC衬底。Exemplarily, the substrate may be a sapphire, Si or SiC substrate.

需要说明的是,在本实施例中,可以采用MOCVD(Metal organic Chemic alVaporDeposition,金属有机化合物化学气相沉淀方法)在衬底上依次生长成核层、高阻缓冲层、沟道层和AlGaN势垒层。生长过程中控制的温度和压力实际上是指MOCVD设备的反应室内的温度和压力。It should be noted that, in this embodiment, a nucleation layer, a high-resistance buffer layer, a channel layer, and an AlGaN barrier can be sequentially grown on the substrate by MOCVD (Metal organic Chemic alVaporDeposition, metal organic compound chemical vapor deposition method) layer. The temperature and pressure controlled during the growth actually refer to the temperature and pressure in the reaction chamber of the MOCVD equipment.

示例性地,采用高纯NH3作为N源,三甲基镓(TMGa)及三乙基镓(TEGa)作为镓源,三甲基铝(TMAl)作为铝源。Exemplarily, high-purity NH 3 is used as the N source, trimethylgallium (TMGa) and triethylgallium (TEGa) are used as the gallium source, and trimethylaluminum (TMAl) is used as the aluminum source.

示例性地,步骤401还可以包括:Exemplarily, step 401 may also include:

对衬底进行高温H2化退火处理。The substrate is subjected to a high temperature H2O annealing treatment.

退火处理方式包括:在MOCVD设备的反应室内为氢气(作为载气)气氛下,高温处理衬底6~10min。其中,反应室温度为1000~1100℃,反应室压力控制在200~500torr。The annealing treatment method includes: treating the substrate at a high temperature for 6-10 minutes in a hydrogen (as carrier gas) atmosphere in a reaction chamber of the MOCVD equipment. Wherein, the temperature of the reaction chamber is 1000-1100° C., and the pressure of the reaction chamber is controlled at 200-500 torr.

步骤202、在衬底上生长成核层。Step 202, growing a nucleation layer on the substrate.

其中,成核层为GaN层,厚度为80~150nm。Wherein, the nucleation layer is a GaN layer with a thickness of 80-150 nm.

示例性地,步骤202可以包括:Exemplarily, step 202 may include:

第一步、生长第一成核层。The first step is to grow the first nucleation layer.

可选地,第一步包括:Optionally, the first step includes:

控制反应室温度为600~950℃,压力为100~300mbar,生长第一成核层。The temperature of the reaction chamber is controlled to be 600-950° C. and the pressure is 100-300 mbar to grow the first nucleation layer.

其中,第一成核层的厚度为成核层总厚度的1/3~1/2。Wherein, the thickness of the first nucleation layer is 1/3˜1/2 of the total thickness of the nucleation layer.

若第一成核层的厚度过薄,则难以有效改善外延层的结晶行为,对晶体质量影响较小。若第一成核层的厚度过厚,又会导致需要较厚的外延层进行填平,同时由于处理深度过大,会引入半极性面生长,可能导致外延层表面形貌的异常。If the thickness of the first nucleation layer is too thin, it is difficult to effectively improve the crystallization behavior of the epitaxial layer, and the crystal quality is less affected. If the thickness of the first nucleation layer is too thick, a thicker epitaxial layer will be required for filling. At the same time, due to the excessive treatment depth, semipolar plane growth will be introduced, which may lead to abnormal surface morphology of the epitaxial layer.

第二步、将第一成核层在热碱溶液中浸泡第一设定时间。The second step is soaking the first nucleation layer in hot alkali solution for a first set time.

可选地,第二步包括:Optionally, the second step includes:

将第一成核层在KOH或NaOH的浓度为20%~50%,温度为30~60℃的热碱溶液中浸泡15~35min。Soak the first nucleation layer in a hot alkali solution with a KOH or NaOH concentration of 20% to 50% and a temperature of 30 to 60° C. for 15 to 35 minutes.

在本公开实施例中,第一设定时间为15~35min。In the embodiment of the present disclosure, the first set time is 15-35 minutes.

若第一设定时间过长,会导致刻蚀深度过厚,一方面需要更厚的外延层填平,另一方面会引入半极性面的生长,导致外延层表面形貌异常。若第一设定时间过短,又会导致刻蚀深度偏浅,难以影响到外延层晶体质量。If the first setting time is too long, the etching depth will be too thick. On the one hand, a thicker epitaxial layer is required to fill it up. On the other hand, it will introduce the growth of semi-polar planes, resulting in abnormal surface morphology of the epitaxial layer. If the first setting time is too short, the etching depth will be shallow, and it is difficult to affect the crystal quality of the epitaxial layer.

第三步、将浸泡后的第一成核层进行去离子水甩干烘干。The third step is drying the soaked first nucleation layer with deionized water.

可选地,第三步包括:Optionally, the third step includes:

将浸泡后的第一成核层放入烘箱,在50~150℃,真空度-500~-720pa的条件下烘干20-60min。Put the soaked first nucleation layer into an oven, and dry it for 20-60min at 50-150°C and vacuum degree of -500--720pa.

第四步、在第一成核层上生长第二成核层。Step 4, growing a second nucleation layer on the first nucleation layer.

可选地,第四步包括:Optionally, the fourth step includes:

控制反应室温度为600~950℃,压力为100~300mbar,生长第二成核层。The temperature of the reaction chamber is controlled to be 600-950° C. and the pressure is 100-300 mbar to grow the second nucleation layer.

该步骤中通过先生长一定厚度的第一成核层,再对第一成核层进行高温腐蚀处理,可以改善由于衬底与氮化镓晶格常数差异引入的位错和应力的延伸,提升成核层的晶体质量。In this step, by first growing the first nucleation layer with a certain thickness, and then performing high-temperature corrosion treatment on the first nucleation layer, the extension of dislocation and stress introduced by the difference in lattice constant between the substrate and gallium nitride can be improved, and the Crystalline quality of the nucleation layer.

步骤203、对成核层进行原位退火处理。Step 203 , performing an in-situ annealing treatment on the nucleation layer.

示例性地,控制反应室温度在1000℃~1200℃,压力为100~300mbar,对成核层进行原位退火处理,时间在5分钟至10分钟之间。Exemplarily, the temperature of the reaction chamber is controlled at 1000° C. to 1200° C., the pressure is 100 to 300 mbar, and the nucleation layer is annealed in situ for 5 minutes to 10 minutes.

步骤204、在成核层上生长高阻缓冲层。Step 204, growing a high-resistance buffer layer on the nucleation layer.

其中,高阻缓冲层为AlGaN层,厚度为1~3um。Wherein, the high-resistance buffer layer is an AlGaN layer with a thickness of 1-3um.

示例性地,步骤204可以包括:Exemplarily, step 204 may include:

第一步、生长第一高阻缓冲层。The first step is to grow the first high-resistance buffer layer.

可选地,第一步包括:Optionally, the first step includes:

控制反应室温度为1000~1200℃,压力为100~300mbar,生长第一高阻缓冲层。The temperature of the reaction chamber is controlled to be 1000-1200° C. and the pressure is 100-300 mbar to grow the first high-resistance buffer layer.

其中,第一高阻缓冲层的厚度为高阻缓冲层总厚度的1/2~2/3。Wherein, the thickness of the first high-resistance buffer layer is 1/2˜2/3 of the total thickness of the high-resistance buffer layer.

若第一高阻缓冲层的厚度过薄,则难以起到应力释放的作用,若第一高阻缓冲层的厚度过厚,又会导致高阻缓冲层的厚度较薄,工艺窗口偏窄,难以保持稳定性和重复性。If the thickness of the first high-resistance buffer layer is too thin, it is difficult to play the role of stress release; if the thickness of the first high-resistance buffer layer is too thick, the thickness of the high-resistance buffer layer will be thinner and the process window will be narrower. Difficulty maintaining stability and repeatability.

第二步、将第一高阻缓冲层在热碱溶液中浸泡第二设定时间。The second step is soaking the first high-resistance buffer layer in hot alkali solution for a second set time.

可选地,第二步包括:Optionally, the second step includes:

将第一高阻缓冲层在KOH或NaOH的浓度为20%~50%,温度为30~60℃的热碱溶液中浸泡15~35min。Soak the first high-resistance buffer layer in a hot alkali solution with a KOH or NaOH concentration of 20% to 50% and a temperature of 30 to 60°C for 15 to 35 minutes.

在本公开实施例中,第二设定时间为15~35min。In the embodiment of the present disclosure, the second set time is 15-35 minutes.

若第二设定时间过长,会导致刻蚀深度过大,出现过多的微型缺陷,影响发光二极管的器件性能。若第二设定时间过短,又会导致难以有效改善高阻缓冲层的晶体质量。If the second setting time is too long, the etching depth will be too large, and too many micro-defects will appear, which will affect the device performance of the light emitting diode. If the second setting time is too short, it will be difficult to effectively improve the crystal quality of the high-resistance buffer layer.

第三步、将浸泡后的第一高阻缓冲层进行去离子水甩干烘干。In the third step, the soaked first high-resistance buffer layer is dried with deionized water.

可选地,第三步包括:Optionally, the third step includes:

将浸泡后的第一高阻缓冲层放入烘箱,在50~150℃,真空度-500~-720pa的条件下烘干20-60min。Put the soaked first high-resistance buffer layer into an oven, and dry it for 20-60 minutes at 50-150°C and vacuum degree of -500--720pa.

第四步、在第一高阻缓冲层上生长第二高阻缓冲层。Step 4, growing a second high-resistance buffer layer on the first high-resistance buffer layer.

可选地,第四步包括:Optionally, the fourth step includes:

控制反应室温度为1000~1200℃,压力为100~300mbar,生长第二高阻缓冲层。The temperature of the reaction chamber is controlled to be 1000-1200° C., and the pressure is 100-300 mbar to grow the second high-resistance buffer layer.

其中,第二高阻缓冲层的厚度为100~200nm。若第二高阻缓冲层的厚度过薄,难以有效填平处理层形成的表面差异,若第二高阻缓冲层的厚度过厚,又会导致工艺窗口收窄,稳定性及重复性难以保证。Wherein, the thickness of the second high-resistance buffer layer is 100-200 nm. If the thickness of the second high-resistance buffer layer is too thin, it is difficult to effectively fill in the surface differences formed by the treatment layer. If the thickness of the second high-resistance buffer layer is too thick, the process window will be narrowed, and the stability and repeatability are difficult to guarantee. .

第五步、对第二高阻缓冲层进行离子束轰击。The fifth step is to bombard the second high-resistance buffer layer with ion beams.

在本公开实施例中,对第二高阻缓冲层进行离子束轰击,是指在真空条件下,将离子源产生的离子束经过加速聚焦,使之撞击到第二高阻缓冲层表面。其中,现有的离子束产生方法主要是加速器方法。加速器方法主要是通过加速粒子并使不同的粒子撞击,打散原子获得离子的方法。离子源从加速器获得的离子束的能量一般从几百电子伏到几万电子伏。因为用高引出电压方式获得较高能量的离子束受到击穿的限制,所以必须使离子在电场和磁场中加速,这类装置叫做加速器。使用各种加速器可以使离子获得很高的能量(如几百吉电子伏),也可以使离子减速,以获得能量较低的(如几十电子伏)但流强很高的离子束。In the embodiment of the present disclosure, bombarding the second high-resistance buffer layer with an ion beam refers to accelerating and focusing the ion beam generated by the ion source to hit the surface of the second high-resistance buffer layer under vacuum conditions. Among them, the existing ion beam generation method is mainly the accelerator method. The accelerator method is mainly a method of obtaining ions by accelerating particles and colliding different particles to break up atoms. The energy of the ion beam obtained by the ion source from the accelerator generally ranges from hundreds of electron volts to tens of thousands of electron volts. Because the high-energy ion beam obtained by high-extraction voltage is limited by the breakdown, it is necessary to accelerate the ions in the electric field and magnetic field. This type of device is called an accelerator. Various accelerators can be used to obtain high energy (such as hundreds of GeV) for ions, and can also decelerate ions to obtain low energy (such as tens of electron volts) but high-intensity ion beams.

可选地,第五步包括:Optionally, the fifth step includes:

采用C、Ar混合的离子源,在10-7~10-5Pa的真空条件下,控制离子源产生的离子束流为20~150mA,能量为5~30KeV,功率为5~20kw,将离子束加速聚焦,使离子束轰击第二高阻缓冲层。Using the ion source mixed with C and Ar, under the vacuum condition of 10 -7 ~ 10 -5 Pa, the ion beam current generated by the ion source is controlled to be 20 ~ 150mA, the energy is 5 ~ 30KeV, and the power is 5 ~ 20kw. The beam is accelerated and focused so that the ion beam bombards the second high-resistance buffer layer.

第六步、在第二高阻缓冲层上生长第三高阻缓冲层。Step 6, growing a third high-resistance buffer layer on the second high-resistance buffer layer.

可选地,第六步包括:Optionally, the sixth step includes:

控制反应室温度为1000~1200℃,压力为100~300mbar,生长第三高阻缓冲层。The temperature of the reaction chamber is controlled to be 1000-1200° C. and the pressure is 100-300 mbar to grow the third high-resistance buffer layer.

步骤205、在高阻缓冲层上生长沟道层。Step 205 , growing a channel layer on the high resistance buffer layer.

示例性地,在N2、H2气氛、温度为900℃~1100℃、反应室压力为100mbar~200mbar的条件下,通入TMGa作为III族源,NH3作为V族源,生长厚度为15~100nm的GaN沟道层。Exemplarily, under the conditions of N 2 and H 2 atmosphere, the temperature is 900°C-1100°C, and the reaction chamber pressure is 100mbar-200mbar, TMGa is introduced as the group III source, NH 3 is used as the group V source, and the growth thickness is 15 ~100nm GaN channel layer.

步骤206、在沟道层上生长AlGaN势垒层。Step 206 , growing an AlGaN barrier layer on the channel layer.

示例性地,在纯H2气氛、温度为950℃~1200℃、反应室压力为100mbar~200mbar的条件下,通入TMGa、TMAl作为III族源,NH3作为V族源,生长厚度为5~20nm的AlGaN势垒层。Exemplarily, under the conditions of a pure H2 atmosphere, a temperature of 950°C to 1200°C, and a reaction chamber pressure of 100mbar to 200mbar, TMGa and TMAl are introduced as Group III sources, NH3 is used as Group V sources, and the growth thickness is 5 ~20nm AlGaN barrier layer.

其中,AlGaN势垒层中Al摩尔掺杂量0.25-0.35。Wherein, the molar doping amount of Al in the AlGaN barrier layer is 0.25-0.35.

本公开实施例通过在衬底上生长GaN沟道层之前,先在衬底上形成成核层,在成核层形成过程中,先对成核层进行第一次高温腐蚀处理,可以在成核层上形成多孔结构,多孔GaN形成的驰豫可以有效的释放AlGaN高阻缓冲层形成的压电应力,提高底层的晶体质量,从而有利于获得迁移率较高的沟道层和二维电子气界面。同时,在生长完成核层后,在生长高阻缓冲层的过程中,先对高阻缓冲层进行第二次高温腐蚀处理,从而可以进一步在高阻缓冲层上形成多孔,由于多孔存在,多孔间的空气不导电,可以形成一层高阻薄膜,增加阻抗,减少背景载流子对沟道的影响。接着对高阻缓冲层进行离子束轰击处理,有利于形成表面统一的悬挂键,保持化学键合状态的均匀性和一致性,使得外延层内延伸和积累的应力整体上得到减少,缺陷减少,外延层的晶体质量得到提高,高电子迁移率晶体管的电子迁移率较高。In the embodiments of the present disclosure, a nucleation layer is first formed on the substrate before the GaN channel layer is grown on the substrate. A porous structure is formed on the core layer, and the relaxation formed by porous GaN can effectively release the piezoelectric stress formed by the AlGaN high-resistance buffer layer and improve the crystal quality of the bottom layer, which is conducive to obtaining a channel layer with higher mobility and two-dimensional electrons. air interface. At the same time, after the growth of the nuclear layer is completed, in the process of growing the high-resistance buffer layer, the high-resistance buffer layer is subjected to a second high-temperature corrosion treatment, so that pores can be further formed on the high-resistance buffer layer. The air in between is non-conductive and can form a high-resistance film to increase impedance and reduce the influence of background carriers on the channel. Then, ion beam bombardment treatment is performed on the high-resistance buffer layer, which is conducive to the formation of uniform dangling bonds on the surface, and maintains the uniformity and consistency of the chemical bonding state, so that the stress extending and accumulating in the epitaxial layer is generally reduced, and the defects are reduced. The crystal quality of the layer is improved, and the electron mobility of the high electron mobility transistor is higher.

图3是本公开实施例提供的一种氮化镓基高电子迁移率晶体管外延片的结构示意图,如图3所示,该氮化镓基高电子迁移率晶体管外延片包括衬底1以及层叠在衬底1上的成核层2、高阻缓冲层3、沟道层4和AlGaN势垒层5。3 is a schematic structural diagram of a gallium nitride-based high electron mobility transistor epitaxial wafer provided by an embodiment of the present disclosure. As shown in FIG. 3 , the gallium nitride-based high electron mobility transistor epitaxial wafer includes a substrate 1 and a stacked Nucleation layer 2 , high resistance buffer layer 3 , channel layer 4 and AlGaN barrier layer 5 on substrate 1 .

可选地,成核层2为GaN层,厚度为80~150nm。Optionally, the nucleation layer 2 is a GaN layer with a thickness of 80-150 nm.

可选地,高阻缓冲层3为AlGaN层,厚度为1~3um。高阻缓冲层3可以实现位错过滤的有益效果,提升外延片的晶体质量。Optionally, the high-resistance buffer layer 3 is an AlGaN layer with a thickness of 1-3 um. The high-resistance buffer layer 3 can realize the beneficial effect of dislocation filtering and improve the crystal quality of the epitaxial wafer.

可选地,沟道层4为GaN层,厚度为50~300nm。Optionally, the channel layer 4 is a GaN layer with a thickness of 50-300 nm.

该沟道层4为二维电子气的输运通道,要求表面平整并且掺杂浓度很小,以减小对二维电子气的散射。The channel layer 4 is a transport channel for the two-dimensional electron gas, and requires flat surface and low doping concentration to reduce the scattering of the two-dimensional electron gas.

可选地,AlGaN势垒层5的厚度为30~100nm。Optionally, the thickness of the AlGaN barrier layer 5 is 30-100 nm.

AlGaN势垒层5通过本身较大的白发极化或者压电极化作用,会在势垒层5与沟道层4的界面处产生大量的正的极化电荷,该极化正电荷可以吸引电子,从而形成二维电子气。The AlGaN barrier layer 5 will generate a large amount of positive polarized charges at the interface between the barrier layer 5 and the channel layer 4 through its own large white hair polarization or piezoelectric polarization, and the polarized positive charges can be Electrons are attracted to form a two-dimensional electron gas.

本公开实施例通过在衬底上生长GaN沟道层之前,先在衬底上形成成核层,在成核层形成过程中,先对成核层进行第一次高温腐蚀处理,可以在成核层上形成多孔结构,多孔GaN形成的驰豫可以有效的释放AlGaN高阻缓冲层形成的压电应力,提高底层的晶体质量,从而有利于获得迁移率较高的沟道层和二维电子气界面。同时,在生长完成核层后,在生长高阻缓冲层的过程中,先对高阻缓冲层进行第二次高温腐蚀处理,从而可以进一步在高阻缓冲层上形成多孔,由于多孔存在,多孔间的空气不导电,可以形成一层高阻薄膜,增加阻抗,减少背景载流子对沟道的影响。接着对高阻缓冲层进行离子束轰击处理,有利于形成表面统一的悬挂键,保持化学键合状态的均匀性和一致性,使得外延层内延伸和积累的应力整体上得到减少,缺陷减少,外延层的晶体质量得到提高,高电子迁移率晶体管的电子迁移率较高。In the embodiments of the present disclosure, a nucleation layer is first formed on the substrate before the GaN channel layer is grown on the substrate. A porous structure is formed on the core layer, and the relaxation formed by porous GaN can effectively release the piezoelectric stress formed by the AlGaN high-resistance buffer layer and improve the crystal quality of the bottom layer, which is conducive to obtaining a channel layer with higher mobility and two-dimensional electrons. air interface. At the same time, after the growth of the nuclear layer is completed, in the process of growing the high-resistance buffer layer, the high-resistance buffer layer is subjected to a second high-temperature corrosion treatment, so that pores can be further formed on the high-resistance buffer layer. The air in between is non-conductive and can form a high-resistance film to increase impedance and reduce the influence of background carriers on the channel. Then, ion beam bombardment treatment is performed on the high-resistance buffer layer, which is conducive to the formation of uniform dangling bonds on the surface, and maintains the uniformity and consistency of the chemical bonding state, so that the stress extending and accumulating in the epitaxial layer is generally reduced, and the defects are reduced. The crystal quality of the layer is improved, and the electron mobility of the high electron mobility transistor is higher.

以上所述,并非对本公开作任何形式上的限制,虽然本公开已通过实施例揭露如上,然而并非用以限定本公开,任何熟悉本专业的技术人员,在不脱离本公开技术方案范围内,当可利用上述揭示的技术内容作出些许更动或修饰为等同变化的等效实施例,但凡是未脱离本公开技术方案的内容,依据本公开的技术实质对以上实施例所作的任何简单修改、等同变化与修饰,均仍属于本公开技术方案的范围内。The above is not intended to limit the present disclosure in any form. Although the present disclosure has been disclosed above through the embodiments, it is not used to limit the present disclosure. When the technical content disclosed above can be used to make some changes or be modified into equivalent embodiments with equivalent changes, any simple modifications made to the above embodiments based on the technical essence of the present disclosure, Equivalent changes and modifications still fall within the scope of the technical solutions of the present disclosure.

Claims (10)

1.一种氮化镓基高电子迁移率晶体管外延片的制备方法,其特征在于,所述制备方法包括:1. A preparation method of gallium nitride-based high electron mobility transistor epitaxial wafer, characterized in that, the preparation method comprises: 提供一衬底;providing a substrate; 在所述衬底上生长成核层,在生长所述成核层的过程中,对所述成核层进行第一次高温腐蚀处理;growing a nucleation layer on the substrate, and performing a first high-temperature corrosion treatment on the nucleation layer during the process of growing the nucleation layer; 在所述成核层上生长高阻缓冲层,在生长所述高阻缓冲层的过程中,依次对所述高阻缓冲层进行第二次高温腐蚀处理和离子束轰击处理,所述高阻缓冲层为AlGaN层;A high-resistance buffer layer is grown on the nucleation layer, and during the process of growing the high-resistance buffer layer, the high-resistance buffer layer is sequentially subjected to a second high-temperature corrosion treatment and ion beam bombardment treatment, and the high-resistance buffer layer is The buffer layer is an AlGaN layer; 在所述高阻缓冲层上依次生长沟道层和AlGaN势垒层。A channel layer and an AlGaN barrier layer are grown sequentially on the high-resistance buffer layer. 2.根据权利要求1所述的制备方法,其特征在于,所述在生长所述成核层的过程中,对所述成核层进行第一次高温腐蚀处理,包括:2. The preparation method according to claim 1, characterized in that, in the process of growing the nucleation layer, the first high-temperature corrosion treatment is carried out to the nucleation layer, comprising: 生长第一成核层;growing the first nucleation layer; 将所述第一成核层在热碱溶液中浸泡第一设定时间;Soaking the first nucleation layer in hot alkali solution for a first set time; 将浸泡后的所述第一成核层进行去离子水甩干烘干;Spinning and drying the first nucleation layer after soaking with deionized water; 在所述第一成核层上生长第二成核层。A second nucleation layer is grown on the first nucleation layer. 3.根据权利要求2所述的制备方法,其特征在于,所述生长所述第一成核层包括:3. The preparation method according to claim 2, wherein said growing said first nucleation layer comprises: 控制反应室温度为600~950℃,压力为100~300mbar,生长所述第一成核层,所述第一成核层的厚度为所述成核层总厚度的1/3~1/2。Control the temperature of the reaction chamber to be 600-950°C and the pressure to be 100-300mbar to grow the first nucleation layer, the thickness of the first nucleation layer being 1/3-1/2 of the total thickness of the nucleation layer . 4.根据权利要求2所述的制备方法,其特征在于,所述将所述第一成核层在热碱NaOH溶液中浸泡第一设定时间,包括:4. preparation method according to claim 2, is characterized in that, described first nucleation layer is immersed in hot alkali NaOH solution for the first set time, comprising: 将所述第一成核层在KOH或NaOH的浓度为20%~50%,温度为30~60℃的热碱溶液中浸泡15~35min。Soaking the first nucleation layer in a hot alkali solution with a KOH or NaOH concentration of 20% to 50% and a temperature of 30 to 60°C for 15 to 35 minutes. 5.根据权利要求2所述的制备方法,其特征在于,所述将浸泡后的所述第一成核层进行去离子水甩干烘干,包括:5. The preparation method according to claim 2, wherein said soaking said first nucleation layer is dried with deionized water, comprising: 将浸泡后的所述第一成核层放入烘箱,在50~150℃,真空度-500~-720pa的条件下烘干20-60min。Put the soaked first nucleation layer into an oven, and dry it for 20-60min at 50-150°C and vacuum degree of -500--720pa. 6.根据权利要求1至5任一项所述的制备方法,其特征在于,所述在生长所述高阻缓冲层的过程中,依次对所述高阻缓冲层进行第二次高温腐蚀处理和离子束轰击处理,包括:6. The preparation method according to any one of claims 1 to 5, characterized in that, in the process of growing the high-resistance buffer layer, the high-resistance buffer layer is sequentially subjected to a second high-temperature corrosion treatment and ion beam bombardment treatments, including: 生长第一高阻缓冲层;growing a first high resistance buffer layer; 将所述第一高阻缓冲层在热碱溶液中浸泡第二设定时间;Soaking the first high-resistance buffer layer in hot alkali solution for a second set time; 将浸泡后的所述第一高阻缓冲层进行去离子水甩干烘干;Spinning and drying the first high-resistance buffer layer after soaking with deionized water; 在所述第一高阻缓冲层上生长第二高阻缓冲层;growing a second high resistance buffer layer on the first high resistance buffer layer; 对所述第二高阻缓冲层进行离子束轰击;performing ion beam bombardment on the second high-resistance buffer layer; 在所述第二高阻缓冲层上生长第三高阻缓冲层。growing a third high resistance buffer layer on the second high resistance buffer layer. 7.根据权利要求6所述的制备方法,其特征在于,所述生长第一高阻缓冲层,包括:7. The preparation method according to claim 6, wherein said growing the first high-resistance buffer layer comprises: 控制反应室温度为1000~1200℃,压力为100~300mbar,生长所述第一高阻缓冲层,所述第一高阻缓冲层的厚度为所述高阻缓冲层总厚度的1/2~2/3。controlling the temperature of the reaction chamber to be 1000-1200° C., and the pressure to be 100-300 mbar to grow the first high-resistance buffer layer, and the thickness of the first high-resistance buffer layer is 1/2 to 1/2 of the total thickness of the high-resistance buffer layer. 2/3. 8.根据权利要求6所述的制备方法,其特征在于,所述将所述第一高阻缓冲层在热碱溶液中浸泡第二设定时间,包括:8. The preparation method according to claim 6, wherein said soaking said first high-resistance buffer layer in hot alkali solution for a second set time includes: 将所述第一高阻缓冲层在KOH或NaOH的浓度为20%~50%,温度为30~60℃的热碱溶液中浸泡15~35min。Soak the first high-resistance buffer layer in a hot alkali solution with a concentration of KOH or NaOH of 20%-50% and a temperature of 30-60° C. for 15-35 minutes. 9.根据权利要求6所述的制备方法,其特征在于,所述在所述第一高阻缓冲层上生长所述第二高阻缓冲层,包括:9. The preparation method according to claim 6, wherein the growing the second high-resistance buffer layer on the first high-resistance buffer layer comprises: 控制反应室温度为1000~1200℃,压力为100~300mbar,生长所述第二高阻缓冲层,所述第二高阻缓冲层的厚度为100~200nm。The temperature of the reaction chamber is controlled to be 1000-1200° C. and the pressure is 100-300 mbar to grow the second high-resistance buffer layer, and the thickness of the second high-resistance buffer layer is 100-200 nm. 10.根据权利要求6所述的制备方法,其特征在于,所述对所述第二高阻缓冲层进行离子束轰击,包括:10. The preparation method according to claim 6, wherein the ion beam bombardment of the second high-resistance buffer layer comprises: 采用C、Ar混合的离子源,在10-7~10-5Pa的真空条件下,控制所述离子源产生的离子束流为20~150mA,能量为5~30KeV,功率为5~20kw,将所述离子束加速聚焦,使所述离子束轰击所述第二高阻缓冲层。Using the ion source mixed with C and Ar, under the vacuum condition of 10 -7 ~ 10 -5 Pa, the ion beam current generated by the ion source is controlled to be 20 ~ 150mA, the energy is 5 ~ 30KeV, and the power is 5 ~ 20kw, accelerating and focusing the ion beam so that the ion beam bombards the second high-resistance buffer layer.
CN202110342496.0A 2021-03-30 2021-03-30 Preparation method of gallium nitride-based high electron mobility transistor epitaxial wafer Active CN113284801B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110342496.0A CN113284801B (en) 2021-03-30 2021-03-30 Preparation method of gallium nitride-based high electron mobility transistor epitaxial wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110342496.0A CN113284801B (en) 2021-03-30 2021-03-30 Preparation method of gallium nitride-based high electron mobility transistor epitaxial wafer

Publications (2)

Publication Number Publication Date
CN113284801A CN113284801A (en) 2021-08-20
CN113284801B true CN113284801B (en) 2023-06-09

Family

ID=77276032

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110342496.0A Active CN113284801B (en) 2021-03-30 2021-03-30 Preparation method of gallium nitride-based high electron mobility transistor epitaxial wafer

Country Status (1)

Country Link
CN (1) CN113284801B (en)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2764309B1 (en) * 1997-06-06 1999-08-27 Corning Inc PROCESS FOR CREATING A SILICON LAYER ON A SURFACE
CN101740384B (en) * 2008-11-12 2011-08-31 中国科学院半导体研究所 Method for preparing enhanced aluminum-gallium-nitrogen/gallium nitride transistor with high electron mobility
CN101748364A (en) * 2009-12-17 2010-06-23 中国航天科技集团公司第五研究院第五一○研究所 Method for reducing stress of titanium dioxide thin film
CN103915320A (en) * 2014-04-22 2014-07-09 西安神光皓瑞光电科技有限公司 Method improving crystalline quality through buffering layer of chemical treatment
CN110660657A (en) * 2019-09-30 2020-01-07 福建北电新材料科技有限公司 Method for releasing residual stress on surface of substrate slice

Also Published As

Publication number Publication date
CN113284801A (en) 2021-08-20

Similar Documents

Publication Publication Date Title
CN112701160B (en) Gallium nitride-based high-electron-mobility transistor epitaxial wafer and preparation method thereof
CN116960173B (en) High electron mobility transistor epitaxial structure, preparation method and HEMT device
US20130171811A1 (en) Method for manufacturing compound semiconductor
WO2019119589A1 (en) N-polar plane high-frequency gan rectifier epitaxial structure on silicon substrate and manufacturing method therefor
CN101724910A (en) Method for eliminating surface defects of GaN thick film material
CN110034174A (en) High electron mobility transistor epitaxial wafer and preparation method thereof
CN113284801B (en) Preparation method of gallium nitride-based high electron mobility transistor epitaxial wafer
CN107658374B (en) Epitaxial wafer of light emitting diode and preparation method thereof
CN114023646A (en) A high-resistance GaN-based HEMT device and preparation method thereof
CN116646248B (en) Epitaxial wafer preparation method, epitaxial wafer thereof and high-electron mobility transistor
CN105679650B (en) Method for preparing high-mobility AlGaN/GaN electronic power device on Si substrate
JP2005303250A (en) Semiconductor device and its manufacturing method
CN109686820B (en) A kind of manufacturing method of light-emitting diode epitaxial wafer
CN108288816A (en) A kind of semiconductor laser material passivating method
CN104037282B (en) Growth AlGaN thin film on a si substrate and its preparation method and application
CN112331563B (en) Preparation method of GaN-based high electron mobility transistor epitaxial wafer
CN114512394A (en) Preparation method of high electron mobility transistor epitaxial wafer with improved crystal quality
CN114649194A (en) Preparation method of boron-doped silicon substrate HEMT epitaxial wafer for improving crystal quality
CN114517288A (en) A kind of method of forming InN thin film on SiC substrate
CN113948390B (en) A silicon-based AlGaN/GaN HEMT based on the epitaxial layer on the back of the substrate and its preparation method
CN111415858A (en) Preparation method and application of AlN or AlGaN thin film material
CN113964034B (en) A silicon-based AlGaN/GaN HEMT based on the GeSnSi epitaxial layer on the back of the substrate and its preparation method
CN115938939B (en) Method for improving two-dimensional electron gas concentration of gallium nitride-based high electron mobility transistor
CN113161457B (en) Ultraviolet light emitting diode epitaxial wafer and method of making the same
CN118116805A (en) HEMT epitaxial structure and preparation method thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant