CN113270505B - A photodetector structure and preparation method thereof - Google Patents
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/30—Coatings
- H10F77/306—Coatings for devices having potential barriers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F30/00—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
- H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
- H10F30/21—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
- H10F30/22—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes
- H10F30/223—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier being a PIN barrier
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F71/00—Manufacture or treatment of devices covered by this subclass
- H10F71/121—The active layers comprising only Group IV materials
- H10F71/1212—The active layers comprising only Group IV materials consisting of germanium
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Abstract
Description
技术领域Technical Field
本发明涉及半导体生产领域,特别涉及一种光电探测器结构及其制备方法。The present invention relates to the field of semiconductor production, and in particular to a photoelectric detector structure and a preparation method thereof.
背景技术Background technique
高性能的光电探测器是连接光学器件与电子器件的核心设备,其优异的光电性能为实现光电信号的高效转换传输,与信息的准确读取提供坚实的基础,为光电集成芯片技术方案提供了核心的设备保障。High-performance photodetectors are core devices that connect optical devices and electronic devices. Their excellent photoelectric performance provides a solid foundation for the efficient conversion and transmission of photoelectric signals and the accurate reading of information, and provides core equipment support for optoelectronic integrated chip technology solutions.
传统的PIN探测器结构大部分内部无光学谐振增强效应,其响应度有待提升。也有少数设置谐振腔结构的探测器,但是其通常利用结构精细且复杂的布拉格反射镜,制作工艺也很复杂。Most of the traditional PIN detector structures have no optical resonance enhancement effect, and their responsiveness needs to be improved. There are also a few detectors with resonant cavity structures, but they usually use Bragg reflectors with fine and complex structures, and the manufacturing process is also very complicated.
为此,提出本发明。To this end, the present invention is proposed.
发明内容Summary of the invention
本发明的主要目的在于提供一种光电探测器结构,其在PIN堆叠结构下方设有较厚的双层氧化硅结构,这样利于增强器件内部光学反射,在器件内部形成光学谐振腔,增强其光学谐振腔效应;在同样入射光的条件下,该结构光电探测器相比于传统探测器响应度更高,光电转换能力更强。The main purpose of the present invention is to provide a photodetector structure, which has a thicker double-layer silicon oxide structure under the PIN stack structure, which is beneficial to enhancing the optical reflection inside the device, forming an optical resonant cavity inside the device, and enhancing its optical resonant cavity effect; under the same incident light conditions, the photodetector with this structure has higher responsiveness and stronger photoelectric conversion capability than traditional detectors.
本发明的另一目的在于提供上述光电探测器结构的制备方法,该方法先分开制作两个衬底后键合,将多层结构集成为一体,具有材料缺陷少、流程简单等优点。Another object of the present invention is to provide a method for preparing the above-mentioned photodetector structure. This method first separately manufactures two substrates and then bonds them to integrate the multi-layer structure into one, which has the advantages of fewer material defects and simple process.
一种光电探测器结构,包括由下至上依次堆叠的:A photodetector structure, comprising:
衬底,Substrate,
第一氧化硅层,The first silicon oxide layer,
第二氧化硅层,所述第二氧化硅层的厚度为10nm~1μm,a second silicon oxide layer, wherein the thickness of the second silicon oxide layer is 10 nm to 1 μm,
氧化铝层,Aluminum oxide layer,
P-I-N堆叠层。P-I-N stacked layers.
一种光电探测器结构的制备方法,包括:A method for preparing a photodetector structure, comprising:
形成衬底A:Forming substrate A:
在衬底上形成锗缓冲层;forming a germanium buffer layer on the substrate;
形成本征半导体层;forming an intrinsic semiconductor layer;
形成P型半导体层;forming a P-type semiconductor layer;
形成氧化铝层,Forming an aluminum oxide layer,
形成或不形成第二氧化硅层,得到衬底A,并且所述第二氧化硅层的厚度为10nm~1μm;Forming or not forming a second silicon oxide layer to obtain a substrate A, wherein the thickness of the second silicon oxide layer is 10 nm to 1 μm;
形成衬底B:在另一衬底上形成第一氧化硅层,并且若衬底A不形成第二氧化硅层,则继续形成第二氧化硅层,得到衬底B;Forming substrate B: forming a first silicon oxide layer on another substrate, and if the second silicon oxide layer is not formed on substrate A, continuing to form the second silicon oxide layer to obtain substrate B;
键合:Bond:
将所述衬底A和所述衬底B键合;Bonding the substrate A and the substrate B;
去除所述衬底A中的衬底和锗缓冲层;removing the substrate and the germanium buffer layer in the substrate A;
在所述本征半导体层表面形成N型半导体层,或者对所述本征半导体层的浅表层进行N型离子注入以形成N型半导体层。An N-type semiconductor layer is formed on the surface of the intrinsic semiconductor layer, or N-type ions are implanted into a shallow layer of the intrinsic semiconductor layer to form the N-type semiconductor layer.
与现有技术相比,本发明达到了以下技术效果:Compared with the prior art, the present invention achieves the following technical effects:
(1)在PIN堆叠结构下方设有较厚的双层氧化硅结构,这样利于增强器件内部光学反射,在器件内部形成光学谐振腔,增强其光学谐振腔效应;在同样入射光的条件下,该结构光电探测器相比于传统探测器响应度更高,光电转换能力更强。(1) A thicker double-layer silicon oxide structure is provided under the PIN stack structure, which is beneficial to enhancing the optical reflection inside the device, forming an optical resonant cavity inside the device, and enhancing its optical resonant cavity effect; under the same incident light conditions, the photodetector with this structure has a higher responsiveness and a stronger photoelectric conversion capability than traditional detectors.
(2)利用先制作P层和I层、后键合、最后制作N层的手段可以减小PIN堆叠结构的缺陷问题,改善器件可靠性。(2) The defect problem of the PIN stacking structure can be reduced and the device reliability can be improved by first making the P layer and the I layer, then bonding them, and finally making the N layer.
(3)在外延锗缓冲层的基础上可以获得高质量的锗,提高器件可靠性。(3) High-quality germanium can be obtained based on the epitaxial germanium buffer layer, thereby improving device reliability.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
通过阅读下文优选实施方式的详细描述,各种其他的优点和益处对于本领域普通技术人员将变得清楚明了。附图仅用于示出优选实施方式的目的,而并不认为是对本发明的限制。Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the following detailed description of the preferred embodiment.The drawings are only for the purpose of illustrating the preferred embodiments and are not to be construed as limiting the invention.
图1为本发明提供的一种光电探测器的结构示意图;FIG1 is a schematic diagram of the structure of a photoelectric detector provided by the present invention;
图2至图6为制作图1所示结构中不同步骤形成的结构示意图。2 to 6 are schematic diagrams of structures formed in different steps in making the structure shown in FIG. 1 .
具体实施方式Detailed ways
以下,将参照附图来描述本公开的实施例。但是应该理解,这些描述只是示例性的,而并非要限制本公开的范围。此外,在以下说明中,省略了对公知结构和技术的描述,以避免不必要地混淆本公开的概念。Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present disclosure. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessary confusion of the concepts of the present disclosure.
在附图中示出了根据本公开实施例的各种结构示意图。这些图并非是按比例绘制的,其中为了清楚表达的目的,放大了某些细节,并且可能省略了某些细节。图中所示出的各种区域、层的形状以及它们之间的相对大小、位置关系仅是示例性的,实际中可能由于制造公差或技术限制而有所偏差,并且本领域技术人员根据实际所需可以另外设计具有不同形状、大小、相对位置的区域/层。Various structural schematic diagrams according to embodiments of the present disclosure are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for the purpose of clear expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may further design regions/layers with different shapes, sizes, and relative positions according to actual needs.
在本公开的上下文中,当将一层/元件称作位于另一层/元件“上”时,该层/元件可以直接位于该另一层/元件上,或者它们之间可以存在居中层/元件。另外,如果在一种朝向中一层/元件位于另一层/元件“上”,那么当调转朝向时,该层/元件可以位于该另一层/元件“下”。In the context of the present disclosure, when a layer/element is referred to as being "on" another layer/element, the layer/element may be directly on the other layer/element or an intervening layer/element may exist between them. In addition, if a layer/element is "on" another layer/element in one orientation, the layer/element may be "below" the other layer/element when the orientation is reversed.
如图1所示的光电探测器结构,其在PIN堆叠结构下方设置较厚的双层氧化硅结构,这样利于增强器件内部光学反射,在器件内部形成光学谐振腔,增强其光学谐振腔效应。The photodetector structure shown in FIG1 has a thicker double-layer silicon oxide structure disposed below the PIN stack structure, which is beneficial for enhancing the optical reflection inside the device, forming an optical resonant cavity inside the device, and enhancing its optical resonant cavity effect.
该探测器包括由下至上依次堆叠的:The detector consists of the following stacked from bottom to top:
衬底201,Substrate 201,
第一氧化硅层202,The first silicon oxide layer 202,
第二氧化硅层106,所述第二氧化硅层106的厚度为10nm~1μm,The second silicon oxide layer 106 has a thickness of 10 nm to 1 μm.
氧化铝层105,Aluminum oxide layer 105,
P-I-N堆叠层。P-I-N stacked layers.
其中,衬底主要是硅基衬底(但本发明对此并不特别限定,也适用于其他半导体材料的衬底),但对晶向、有无埋氧层等方面无具体要求,可以是本领域技术人员熟知的任何用以承载半导体集成电路组成元件的底材,例如绝缘体上硅(silicon-on-insulator,SOI)、体硅(bulk silicon)、锗硅等。Among them, the substrate is mainly a silicon-based substrate (but the present invention is not particularly limited to this and is also applicable to substrates of other semiconductor materials), but there are no specific requirements on the crystal orientation, the presence or absence of a buried oxide layer, etc. It can be any substrate known to those skilled in the art for carrying semiconductor integrated circuit components, such as silicon-on-insulator (SOI), bulk silicon, silicon germanium, etc.
第一氧化硅层202的厚度优选10nm~1μm,氧化铝层105的厚度不作特别限制。The thickness of the first silicon oxide layer 202 is preferably 10 nm to 1 μm, and the thickness of the aluminum oxide layer 105 is not particularly limited.
第二氧化硅层106的厚度是形成谐振腔的关键之一,厚度要求达到10nm~1μm,这样在同样入射光的条件下,如图1所示的光电探测器相比于传统探测器响应度更高,光电转换能力更强。The thickness of the second silicon oxide layer 106 is one of the keys to forming a resonant cavity, and the thickness is required to reach 10 nm to 1 μm. Thus, under the same incident light condition, the photodetector shown in FIG. 1 has a higher responsiveness and a stronger photoelectric conversion capability than a traditional detector.
P-I-N堆叠层主要指垂直堆叠结构,包括述P型掺杂半导体层、本征半导体层和N型掺杂半导体层,这三者采用锗,如图1所示分别为P型锗层104、本征锗层103和N型锗层107。The P-I-N stacked layer mainly refers to a vertical stacked structure, including a P-type doped semiconductor layer, an intrinsic semiconductor layer and an N-type doped semiconductor layer, all of which use germanium, as shown in FIG. 1 , respectively a P-type germanium layer 104, an intrinsic germanium layer 103 and an N-type germanium layer 107.
所述P-I-N堆叠层还连接有电极,通常是P层和N层分别连接有电极。The P-I-N stacked layer is also connected to electrodes, usually the P layer and the N layer are connected to electrodes respectively.
上述光电探测器可以是任意用途的探测器,例如光电子发射器件、光电倍增管、光电导器件等。The photodetector may be any detector for any purpose, such as a photoelectron emission device, a photomultiplier tube, a photoconductive device, etc.
上述光电探测器的制备方法对其质量很关键,采用如下方法可以获得高质量、缺陷少、响应度高的器件,包括制作牺牲衬底、支撑衬底和键合三部分。The preparation method of the above-mentioned photodetector is critical to its quality. The following method can be used to obtain a high-quality, defect-free, and highly responsive device, including the preparation of a sacrificial substrate, a supporting substrate, and bonding.
制作如图2所示的衬底A(即牺牲衬底):Prepare substrate A (i.e. sacrificial substrate) as shown in FIG2:
第一步,在衬底101上形成锗缓冲层102。这一步所用的衬底主要是硅基衬底(但本发明对此并不特别限定,也适用于其他半导体材料的衬底),但对晶向、有无埋氧层等方面无具体要求,可以是本领域技术人员熟知的任何用以承载半导体集成电路组成元件的底材,例如绝缘体上硅(silicon-on-insulator,SOI)、体硅(bulk silicon)、锗硅等。In the first step, a germanium buffer layer 102 is formed on the substrate 101. The substrate used in this step is mainly a silicon-based substrate (but the present invention is not particularly limited to this, and is also applicable to substrates of other semiconductor materials), but there are no specific requirements for the crystal orientation, the presence or absence of a buried oxide layer, etc., and it can be any substrate known to those skilled in the art for carrying semiconductor integrated circuit components, such as silicon-on-insulator (SOI), bulk silicon, germanium silicon, etc.
第二步,以锗为例,形成本征半导体层103,形成手段是任意的,例如采用典型的APCVD、UHVCVD、LPCVD、RTCVD、PECVD、MBE或外延生长等,优选RPCVD。In the second step, taking germanium as an example, an intrinsic semiconductor layer 103 is formed. The formation means is arbitrary, such as typical APCVD, UHVCVD, LPCVD, RTCVD, PECVD, MBE or epitaxial growth, etc., preferably RPCVD.
第三步,形成P型锗层104,形成手段也是任意的,例如采用典型的APCVD、UHVCVD、LPCVD、RTCVD、PECVD、MBE或外延生长等,优选RPCVD。同步掺杂,或者分布掺杂,P型掺杂的离子可以是硼、镓等。The third step is to form a P-type germanium layer 104. The forming method is also arbitrary, such as typical APCVD, UHVCVD, LPCVD, RTCVD, PECVD, MBE or epitaxial growth, preferably RPCVD. Synchronous doping or distributed doping, the P-type doping ions can be boron, gallium, etc.
第四步,形成氧化铝层105,氧化铝可以降低界面缺陷以及增强粘附性。The fourth step is to form an aluminum oxide layer 105. Aluminum oxide can reduce interface defects and enhance adhesion.
第五步,形成第二氧化硅层106,并且所述第二氧化硅层的厚度为10nm~1μm;沉积的手段包括但不限于APCVD、UHVCVD、LPCVD、RTCVD、PECVD等(除了热氧化形式之外形成的氧化层,包括硅源为正硅酸乙酯(TEOS)的氧化硅)。The fifth step is to form a second silicon oxide layer 106, and the thickness of the second silicon oxide layer is 10nm to 1μm; the deposition means include but are not limited to APCVD, UHVCVD, LPCVD, RTCVD, PECVD, etc. (except for the oxide layer formed by thermal oxidation, including silicon oxide whose silicon source is tetraethyl orthosilicate (TEOS)).
制作如图3所示的衬底B(即支撑衬底):Prepare substrate B (i.e., supporting substrate) as shown in FIG3:
在另一衬底201上形成第一氧化硅层202,第一氧化硅层202为热氧化层,衬底主要是硅基衬底(但本发明对此并不特别限定,也适用于其他半导体材料的衬底),但对晶向、有无埋氧层等方面无具体要求,可以是本领域技术人员熟知的任何用以承载半导体集成电路组成元件的底材,例如绝缘体上硅(silicon-on-insulator,SOI)、体硅(bulk silicon)、锗硅等。A first silicon oxide layer 202 is formed on another substrate 201. The first silicon oxide layer 202 is a thermal oxide layer. The substrate is mainly a silicon-based substrate (but the present invention is not particularly limited to this and is also applicable to substrates of other semiconductor materials). However, there are no specific requirements on the crystal orientation, the presence or absence of a buried oxide layer, etc. It can be any substrate known to those skilled in the art for carrying semiconductor integrated circuit components, such as silicon-on-insulator (SOI), bulk silicon, silicon germanium, etc.
键合:Bond:
第一步,将图2所述的衬底A和图3所述的衬底B键合,所述第一氧化硅层202和所述第二氧化硅层106接触,得到如图4所示的结构;在键合之前对表面的氧化硅层进行表面平滑处理,例如CMP。In the first step, the substrate A described in FIG. 2 and the substrate B described in FIG. 3 are bonded, so that the first silicon oxide layer 202 and the second silicon oxide layer 106 are in contact, and a structure as shown in FIG. 4 is obtained; before bonding, the surface silicon oxide layer is subjected to surface smoothing treatment, such as CMP.
第二步,去除所述衬底101和锗缓冲层102,得到如图5所示的结构;去除的手段不限,例如磨抛、湿法腐蚀、干法刻蚀、CMP中的一种或多种手段结合去除。In the second step, the substrate 101 and the germanium buffer layer 102 are removed to obtain a structure as shown in FIG. 5 ; the removal method is not limited, such as a combination of one or more methods including grinding and polishing, wet etching, dry etching, and CMP.
第三步,在所述本征层表面形成N型锗层107,如图1所示,或者对所述本征层的浅表层进行N型离子注入以形成N型锗层,N型离子可以是磷、砷等。In the third step, an N-type germanium layer 107 is formed on the surface of the intrinsic layer, as shown in FIG. 1 , or an N-type ion implantation is performed on the shallow surface of the intrinsic layer to form an N-type germanium layer. The N-type ions may be phosphorus, arsenic, etc.
最后形成电极,探测器结构,如图6所示。Finally, the electrode and detector structure are formed, as shown in FIG6 .
或者,本发明也可以在衬底B上形成第二氧化硅层,具体方法如下:Alternatively, the present invention can also form a second silicon oxide layer on the substrate B, and the specific method is as follows:
制作衬底A:Making substrate A:
第一步,在衬底上形成锗缓冲层。In the first step, a germanium buffer layer is formed on the substrate.
第二步,形成本征锗层。The second step is to form an intrinsic germanium layer.
第三步,形成P型锗层。The third step is to form a P-type germanium layer.
第四步,形成氧化铝层。The fourth step is to form an aluminum oxide layer.
制作衬底B(即支撑衬底):Making substrate B (i.e. supporting substrate):
第一步,在另一衬底上形成第一氧化硅层,第一氧化硅层为热氧化层。In the first step, a first silicon oxide layer is formed on another substrate, where the first silicon oxide layer is a thermal oxide layer.
第二步,继续形成第二氧化硅层,并且所述第二氧化硅层的厚度为10nm~1μm,形成方法采用热氧化法之外的其他方法,沉积的手段包括但不限于APCVD、UHVCVD、LPCVD、RTCVD、PECVD等(除了热氧化形式之外形成的氧化层,包括硅源为正硅酸乙酯(TEOS)的氧化硅)。In the second step, a second silicon oxide layer is formed, and the thickness of the second silicon oxide layer is 10 nm to 1 μm. The formation method adopts methods other than thermal oxidation, and the deposition means include but are not limited to APCVD, UHVCVD, LPCVD, RTCVD, PECVD, etc. (the oxide layer formed in addition to the thermal oxidation form includes silicon oxide whose silicon source is tetraethyl orthosilicate (TEOS)).
键合:Bond:
第一步,将衬底A和衬底B键合;在键合之前进行表面平滑处理,例如CMP。In the first step, substrate A and substrate B are bonded; before bonding, surface smoothing treatment such as CMP is performed.
第二步,去除衬底A的硅衬底和锗缓冲层;去除的手段不限,例如磨抛、湿法腐蚀、干法刻蚀、CMP中的一种或多种手段结合去除。The second step is to remove the silicon substrate and the germanium buffer layer of the substrate A; the removal method is not limited, such as polishing, wet etching, dry etching, CMP or a combination of one or more methods.
第三步,在所述本征层表面形成N型锗层,或者对所述本征层的浅表层进行N型离子注入以形成N型锗层,N型离子可以是磷、砷等。The third step is to form an N-type germanium layer on the surface of the intrinsic layer, or to perform N-type ion implantation on the shallow layer of the intrinsic layer to form an N-type germanium layer. The N-type ions may be phosphorus, arsenic, etc.
最后形成电极,探测器结构,亦如图6所示。Finally, the electrode and detector structure are formed, as shown in FIG6 .
以上对本公开的实施例进行了描述。但是,这些实施例仅仅是为了说明的目的,而并非为了限制本公开的范围。本公开的范围由所附权利要求及其等价物限定。不脱离本公开的范围,本领域技术人员可以做出多种替代和修改,这些替代和修改都应落在本公开的范围之内。The embodiments of the present disclosure are described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present disclosure. The scope of the present disclosure is defined by the appended claims and their equivalents. Without departing from the scope of the present disclosure, a person skilled in the art may make a variety of substitutions and modifications, which should all fall within the scope of the present disclosure.
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