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CN113241325A - 电子装置以及电子装置的制造方法 - Google Patents

电子装置以及电子装置的制造方法 Download PDF

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Publication number
CN113241325A
CN113241325A CN202110002261.7A CN202110002261A CN113241325A CN 113241325 A CN113241325 A CN 113241325A CN 202110002261 A CN202110002261 A CN 202110002261A CN 113241325 A CN113241325 A CN 113241325A
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CN
China
Prior art keywords
electronic device
circuit board
liquid
solder
component
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Pending
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CN202110002261.7A
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English (en)
Inventor
泷泽直树
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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Priority claimed from JP2020156554A external-priority patent/JP2021118350A/ja
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Publication of CN113241325A publication Critical patent/CN113241325A/zh
Pending legal-status Critical Current

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Abstract

本发明提供一种能够在不产生电气不良的情况下在基板高密度地安装部件的电子装置以及电子装置的制造方法。电子装置具有：半导体芯片(20、21)；以及电路板(12)，其正面被镀膜12a覆膜，在该正面的预定的部件区域经由第一、第二焊料(16a、16b)而配置有半导体芯片(20、21)。而且，电子装置沿电路板(12)的该部件区域的侧部在正面形成有防液部(14)。因此，能够在缩短半导体芯片(20、21)的间隔的同时，在它们之间形成防液部(14)而抑制第一、第二焊料(16a、16b)的扩散。

Description

电子装置以及电子装置的制造方法
技术领域
本发明涉及一种在基板焊料接合有部件的电子装置以及电子装置的制造方法。
背景技术
作为电子装置的一例的半导体装置包括功率设备，并且被用作功率转换装置。功率设备是例如包括IGBT(Insulated Gate Bipolar Transistor：绝缘栅双极型晶体管)、功率MOSFET(Metal Oxide Semiconductor Field Effect Transistor：金属氧化物半导体场效应管)的半导体芯片。这样的半导体装置包括该半导体芯片、以及经由焊料而配置有半导体芯片的陶瓷电路基板。陶瓷电路基板具备绝缘板、以及形成在该绝缘板上的多个电路板。在多个电路板中的任一电路板都经由焊料而配置有半导体芯片。另外，存在如下情况：在电路板，在半导体芯片的部件区域的周围形成有缝隙。这样的缝隙具有半导体芯片的位置校准、以及抑制焊料的扩散这样的功能。
在这样的半导体装置中，在陶瓷电路基板的电路板经由焊料而配置半导体芯片，通过使该焊料熔融、固化，从而使半导体芯片固接在电路板。但是，熔融了的焊料会向半导体芯片的部件区域外流出。进而，有流出的焊料还会越过缝隙的情况。因此，为了防止焊料的流出而提出了各种各样的技术。例如，在电路板上，沿该半导体芯片而形成有由线状的氧化物构成的焊料流动防止部(例如，参照专利文献1)。另外，在电路板的表面形成镀膜，在该镀膜的半导体芯片的部件区域的周围形成有不沾焊料的部分(例如，参照专利文献2)。另外，在绝缘性基板上的铜覆膜，在不配置半导体芯片的部位形成有氧化铜覆膜(例如，参照专利文献3)。另外，在安装部件的装配面的通过焊料接合的半导体芯片的周围分别形成有第一区域、以及焊料的润湿性比第一区域低的第二区域(例如，参照专利文献4)。另外，在将陶瓷电路基板经由焊料而配置在金属基板的情况下，也在陶瓷电路基板的部件区域的周围形成有阻挡材料(例如，参照专利文献5、专利文献6)。另外，在经由焊料而装配有半导体芯片的安装部件的半导体芯片的部件区域的周围形成有隔壁层(例如，参照专利文献7)。此外，对配置有半导体芯片的引线的半导体芯片的周围进行激光照射，从而在该周围形成有槽部，并且在槽部的两侧形成有氧化区域。槽部的壁面由氧化了的母基板和氧化了的电镀材料的一部分构成(例如，参照专利文献8)。
此外，这样的半导体装置的半导体芯片和陶瓷电路基板被密封部件密封。在半导体装置中，为了提高密封部件与陶瓷电路基板之间的密接性而在电路板的半导体芯片的周围形成有由条纹状的凹部构成的固定层(例如，参照专利文献9)。
现有技术文献
专利文献
专利文献1：日本特开2013-247256号公报
专利文献2：日本特开2008-177383号公报
专利文献3：日本特开平8-031848号公报
专利文献4：日本特开2009-218280号公报
专利文献5：日本特开2010-212723号公报
专利文献6：日本特开2006-216729号公报
专利文献7：日本特开2016-174053号公报
专利文献8：日本特开2017-005149号公报
专利文献9：日本特开2016-029676号公报
发明内容
技术问题
近年来，正在寻求半导体装置的小型化、大容量化。而且，随着半导体芯片的安装密度的提高，半导体芯片彼此之间的间隔变窄。因此，难以在半导体芯片彼此之间形成用于限制焊料的流出的部件。若半导体芯片之下的焊料熔融，则很有可能导致在半导体芯片彼此之间结合，并且导致产生半导体芯片的接触不良。因此，还会导致半导体装置的可靠性降低。
本发明是鉴于这点而做出的，其目的在于，提供一种能够在不产生电气不良的情况下在基板高密度地安装部件的电子装置以及电子装置的制造方法。
技术方案
根据本发明的一个观点，提供一种电子装置以及电子装置的制造方法，其具有第一部件；以及电路板，其正面被镀膜覆膜，在所述正面的第一部件区域经由第一焊料而配置有所述第一部件，所述电子装置沿所述电路板的所述第一部件区域的侧部在所述正面形成有防液部，该防液部包括使所述镀膜氧化而构成的氧化膜，并且在所述氧化膜之下残存所述镀膜的一部分。
技术效果
根据公开的技术，能够提供可以在不产生电气不良的情况下在基板高密度地安装部件并且抑制可靠性的降低的电子装置以及电子装置的制造方法。
附图说明
图1是示出实施方式的电子装置的侧视图。
图2是示出实施方式的电子装置的俯视图。
图3是实施方式的电子装置所包括的电路板的俯视图。
图4是实施方式的电子装置所包括的电路板的截面图。
图5是示出实施方式的电子装置的制造方法的流程的图。
图6是实施方式的电子装置所包括的陶瓷电路基板的俯视图。
图7是示出实施方式的电子装置的制造方法的涂覆焊料的工序的俯视图。
图8是实施方式的电子装置的制造方法的回流焊接工序的俯视图(其一)。
图9是实施方式的电子装置的制造方法的回流焊接工序的俯视图(其二)。
图10是实施方式的电子装置的制造方法的回流焊接工序的俯视图(其三)。
图11是参考例的电子装置的制造方法的回流焊接工序的俯视图(其一)。
图12是参考例的电子装置的制造方法的回流焊接工序的俯视图(其二)。
图13是在实施方式的电子装置的陶瓷电路基板形成的防液部的形成例的俯视图(其一)。
图14是在实施方式的电子装置的陶瓷电路基板形成的防液部的形成例的俯视图(其二)。
符号说明
10 陶瓷电路基板
11 绝缘板
12 电路板
12a 镀膜
13 金属板
14 防液部
14a 抗蚀部
14b 热影响区域
15 键合线
16a 第一焊料
16b 第二焊料
20、21、23a、23b、23c、23d 半导体芯片
20a、21a 部件区域
22 电子部件
30 触点部件
31 焊料板
40 外部连接端子
45 密封部件
50 电子装置
具体实施方式
以下，参照附图，对实施方式进行说明。应予说明，在以下说明中，“正面”和“上表面”在图1的电子装置50中，表示朝向上侧的面。同样地，“上”在图1的电子装置50中，表示上侧的方向。“背面”和“下表面”在图1的电子装置50中，表示朝向下侧的面。同样地，“下”在图1的电子装置50中，表示下侧的方向。根据需要在其他附图也意味着同样的方向性。“正面”、“上表面”、“上”、“背面”、“下表面”、“下”、“侧面”只不过是便于确定相对的位置关系的表现而已，并不限定本发明的技术思想。例如，“上”和“下”不必须意味着相对于地面的铅直方向。即，“上”和“下”的方向不限于重力方向。
利用图1和图2对实施方式的电子装置进行说明。图1是示出实施方式的电子装置的侧视图，图2是示出实施方式的电子装置的俯视图。应予说明，在本实施方式中，举例对将半导体装置作为电子装置的情况进行说明。另外，图1用虚线来表示密封部件，在图2中，省略密封部件的图示。另外，电子装置50省略关于收纳陶瓷电路基板10等的壳体的记载。另外，在本实施方式中，针对多个电路板12、多个半导体芯片20、21、多个触点部件30、多个键合线15、多个外部连接端子40，在不分别进行区别的情况下，标注相同的符号而进行说明。应予说明，针对除此以外的构成，也在具有多个并且不分别进行区别的情况下，标注相同符号而利用相同符号进行说明。
如图1和图2所示，电子装置50具有陶瓷电路基板10、以及与陶瓷电路基板10的正面接合的半导体芯片20、21。电子装置50具有与陶瓷电路基板10的正面接合的触点部件30。半导体芯片20、21和触点部件30经由作为接合材料的焊料(省略图示)而接合在陶瓷电路基板10的正面。另外，电子装置50具有键合线15，该键合线15将陶瓷电路基板10的正面与半导体芯片20、21的主电极电连接。另外，在触点部件30压入而安装有外部连接端子40。此外，电子装置50以使安装于触点部件30的外部连接端子40的前端部突出的方式，与陶瓷电路基板10的正面的半导体芯片20、21一起被密封部件45密封。
陶瓷电路基板10具有绝缘板11、形成在绝缘板11的正面的多个电路板12、以及形成在绝缘板11的背面的金属板13。绝缘板11由导热性优良的材质构成。这样的材质是导热性高的陶瓷。陶瓷是例如氧化铝、氮化铝、氮化硅。另外，绝缘板11的厚度是0.5mm以上且2.0mm以下。多个电路板12由导电性优良的材质的母材构成。这样的材质是例如铜或铜合金等。而且，为了提高耐腐蚀性，针对电路板12的表面，通过电镀处理而形成有镀膜12a(参照图4)。镀膜所使用的电镀材料是例如镍或镍合金。作为镍合金，优选镍-磷合金、镍-硼合金。金属板13由导热性优良的金属构成。这样的金属是例如铝、铁、银、铜、或至少包括其中一种的合金。金属板13的厚度是0.1mm以上且2.0mm以下。为了提高耐腐蚀性，针对金属板13的表面，可以通过电镀处理而形成镀膜。镀膜所使用的电镀材料是例如镍、镍-磷合金、镍-硼合金。另外，在金属板13的背面可以安装冷却模块(省略图示)。应予说明，绝缘板11在俯视下成为例如矩形。另外，金属板13在俯视下，成为面积比绝缘板11小且总面积比电路板12大的矩形。因此，陶瓷电路基板10成为例如矩形。
在电路板12适当地形成有防液部14。防液部14形成在电路板12的配置有半导体芯片20、21的部件区域的间隙。另外，防液部14形成在半导体芯片20与触点部件30(外部连接端子40)之间的间隙。另外，防液部14形成在半导体芯片21与电路板12的端部(接合有键合线15的区域)之间的间隙。这样的防液部14沿陶瓷电路基板10的长度方向或宽度方向形成。应予说明，防液部14的形成位置以及形成方向为一例，能够形成在根据需要的位置以及方向。应予说明，后面会对防液部14进行详细说明。
作为具有这样的构成的陶瓷电路基板10，能够使用例如DCB(Direct CopperBonding：直接铜键合衬底)基板、AMB(Active Metal Brazed：活性金属钎焊)基板。另外，也可以在陶瓷电路基板10的金属板13的背面经由导热接合材料而安装冷却模块(省略图示)。由此，能够进一步提高电子装置50的散热性。应予说明，导热接合材料是例如导热膏、焊料、银焊。导热膏是例如混入有金属氧化物的填料的硅。冷却模块适用由导热性优良的金属构成的模块。这样的金属是例如铝、铁、银、铜或至少包括其中一种的合金。另外，冷却模块是例如具有散热器，并且利用液体制冷剂的冷却装置，该散热器具备一个或多个散热片。
半导体芯片20包括由硅或碳化硅构成的例如IGBT、功率MOSFET等开关元件。这样的半导体芯片20在俯视下成为矩形，例如，在背面具备漏电极(或集电极)作为主电极，在正面具备栅电极和源电极(或发射极)分别作为控制电极和主电极。应予说明，栅电极设置在半导体芯片20的正面的短边的中央部。另外，半导体芯片21包括二极管。二极管是SBD(Schottky Barrier Diode：肖特基二极管)、PiN(P-intrinsic-N)二极管等FWD(FreeWheeling Diode：续流二极管)。这样的半导体芯片21在背面具备阴电极作为主电极，在正面具备阳电极作为主电极。上述半导体芯片20、21的背面侧接合在预定的电路板(省略图示)上。应予说明，半导体芯片20、21经由焊料(省略图示)而接合在电路板12上。后面会对焊料进行说明。另外，虽然省略图示，但是可以使用同时具有IGBT与FWD的功能的RC(Reverse-Conducting：反向导通)-IGBT来代替半导体芯片20、21。另外，电子部件22以横跨一对电路板12的方式设置。电子部件22是例如热敏电阻、电流传感器。应予说明，这样的半导体芯片20、21的厚度是例如180μm以上且220μm以下，平均为200μm左右。
键合线15适当地电连接在半导体芯片20、21与电路板12之间，或者适当地电连接在多个半导体芯片20、21之间。这样的键合线15由导电性优良的材质构成。这样的材质是例如金、银、铜、铝、或至少包括其中一种的合金。另外，供控制用的电流流通的键合线15的直径是例如110μm以上且200μm以下。供主电流流通的键合线15的直径可以是例如350μm以上且600μm以下。
触点部件30具备：主体部，其在内部形成有圆筒状的贯通孔；以及凸缘，其分别设置在主体部的开口端部。该贯通孔可以是圆筒形或多棱柱形。触点部件30由导电性优良的金属构成。这样的金属是例如银、铜、镍、或至少包括其中一种的合金。为了提高耐腐蚀性，针对触点部件30的表面，可以通过电镀处理而形成镀膜。镀膜所使用的电镀材料是例如镍、镍-磷合金、镍-硼合金。
外部连接端子40具有棒状的主体部、以及在主体部的两端部分别形成的锥状的前端部。主体部成为棱柱状。外部连接端子40的截面的对角线的长度比触点部件30的主体部的直径长百分之几。因此，外部连接端子40能够相对于触点部件30而压入。另外，外部连接端子40也由导电性优良的金属构成。这样的金属是例如银、铜、镍、或至少包括其中一种的合金。为了提高耐腐蚀性，针对外部连接端子40的表面，可以通过电镀处理而形成镀膜。期望镀膜所使用的电镀材料是镍或包括镍的合金。作为包含镍的合金是例如镍-磷合金、镍-硼合金。
另外，将半导体芯片20、21以及触点部件30接合在电路板12的焊料以无铅焊料为主体。无铅焊料以由锡和银形成的合金、由锡和锑形成的合金、由锡和锌形成的合金、以及由锡和铜形成的合金中的至少任一合金为主要成分。另外，在焊料中也可以含有添加物。添加物是例如铜、铋、铟、镍、锗、钴或硅。另外，接合半导体芯片20、21的焊料与接合触点部件30的焊料优选焊料组成不同。在该情况下，接合半导体芯片20、21的焊料难以产生空隙，并且具有耐高温性。例如，这样的焊料是以锡和锑为主要成分的合金。接合触点部件30等布线端子的焊料具有比半导体芯片20、21之下的焊料低的弹性率。触点部件30之下的焊料是例如以锡和银为主要成分的合金。另外，接合半导体芯片20、21的焊料可以比接合触点部件30的焊料薄。半导体芯片20、21之下的焊料的厚度是0.05mm以上且0.25mm以下。触点部件30之下的焊料的厚度是0.10mm以上且0.50mm以下。由于半导体芯片20、21之下的焊料的弹性率比触点部件30之下的焊料的弹性率高，所以能够使半导体芯片20、21的焊料的厚度薄于触点部件30的焊料的厚度。因此，能够较好地对电子装置50工作时的半导体芯片20、21的发热进行散热。如上所述，触点部件30之下的焊料厚。因此，触点部件30之下的焊料能够承受将外部连接端子40插入触点部件30的贯通孔时的应力，并且能够抑止焊料中的裂缝以及剥离等的产生。因此，能够防止电子装置50的破损。
密封部件45可以是例如硅胶。另外，所述密封部件45包括例如环氧树脂、酚醛树脂、马来酰亚胺树脂等热固化性树脂、以及含于热固化性树脂的填充材料。作为这样的密封部件45的一例，包括环氧树脂、以及作为填料填充在环氧树脂中的二氧化硅、氧化铝、氮化硼或氮化铝等填充材料。
接下来，利用图3和图4对形成在电路板12的防液部14进行说明。图3是实施方式的电子装置所包括的电路板的俯视图，图4是实施方式的电子装置所包括的电路板的截面图。应予说明，图3放大表示图2的电路板12的虚线区域。另外，图4是图3的单点划线Y-Y的截面图。应予说明，在图3和图4中，图示出形成在电路板12的表面的镀膜12a。
图3所示的防液部14直线状地形成在一对半导体芯片20、21之间的镀膜12a。应予说明，在图3中，设置有三组一对半导体芯片20、21。另外，半导体芯片20的长边沿后述的防液部14的形成方向配置。此时，半导体芯片20以使设置有栅电极的短边不与防液部14对置的方式配置。在半导体芯片20的长边沿着防液部14的形成方向的情况下，与短边沿着防液部14的形成方向的情况相比，能够以更长的距离来限制焊料的端的位置，因此半导体芯片20的位置容易稳定。应予说明，考虑到引线的配置位置，半导体芯片20只要以使设置有栅电极的边不与防液部14对置的方式配置即可。防液部14能够阻挡焊料。这样的防液部14包括抗蚀部14a、以及热影响区域14b。抗蚀部14a是氧化膜。氧化膜是例如镍氧化膜。通过对镀膜12a进行激光照射，从而使镀膜12a氧化而形成这样的抗蚀部14a。应予说明，激光照射可以是连续地发射激光的焊缝激光、照射脉冲状的激光的光点激光中的任一者。在图3中，示出利用焊缝激光进行激光照射的情况。因此，图3的防液部14在俯视下是直线状(在光点激光的情况下为点线状)的激光痕。另外，如后所述，防液部14通过激光照射的激光扫描而形成。特别是，抗蚀部14a每次激光扫描都与沿彼此形成的多个激光痕相接，或者以使一部分重叠的方式形成。如此形成的抗蚀部14a优选在焊料接合前使抗蚀部14a(氧化膜)的厚度为40nm以上。并且，焊料接合后的抗蚀部14a(氧化膜)的厚度优选为25nm以上。认为焊料接合前后抗蚀部14a(氧化膜)的厚度减少的理由是因为氧化膜的一部分被焊料所包括的焊剂还原。另外，抗蚀部14a的宽度最小能够被设为150μm。
热影响区域14b是沿抗蚀部14a而形成的氧化膜。如上所述，为了形成抗蚀部14a，对镀膜12a上利用激光照射而进行激光扫描。此时，随着抗蚀部14a的形成而导致该抗蚀部14a的两侧的镀膜12a因激光的热量而受到影响。由此，热影响区域14b形成在抗蚀部14a的两侧。另外，用于形成抗蚀部14a的激光的输出越大，热影响区域14b的宽度越宽。另外，与使抗蚀部14a的宽度变宽相关联地，热影响区域14b的宽度也变宽。其中，若抗蚀部14a的宽度成为预定值以上，则热影响区域14b的宽度也成为固定。如图4所示，这样的热影响区域14b与从抗蚀部14a离开相关联地，由激光产生的热量的影响下降。
对于具有这样的构成的防液部14的防液能力而言，抗蚀部14a的防液能力比热影响区域14b高。此外，对于热影响区域14b的防液能力而言，抗蚀部14a侧的防液能力比外侧高。因此，对于防液部14而言，如图4所示，虽然第一、第二焊料16a、16b多少会波及到防液部14的外侧，但是第一、第二焊料16a、16b不能波及到包含抗蚀部14a的防液部14的中心部。另外，由于这样的防液部14通过激光照射而形成，所以在防液部14之下还存在残存镀膜12a的一部分的部位。防液部与残存镀膜的一部分的部分的合计厚度优选为6μm以上。防液部之下的残存镀膜的一部分的部分的厚度优选为5μm以上。
应予说明，图3所示的防液部14相对于半导体芯片20、21的形成为一例。防液部14的抗蚀部14a通过如下的条件而形成于镀膜12a。首先，抗蚀部14a优选与半导体芯片20、21分离至少0.3mm以上。另外，抗蚀部14a优选与电路板12的端部分离0.5mm以上。抗蚀部14a的宽度优选为0.4mm以上且0.5mm以下。其中，在抗蚀部14a难以与半导体芯片20、21分离0.3mm以上的情况下，并且难以与电路板12的端部分离0.5mm以上的情况下，抗蚀部14a的宽度优选被设为0.15mm以上。另外，抗蚀部14a在其端部与电路板12的端部分离0.5mm以上的情况下，其长度优选从半导体芯片20、21的端面起最大延伸1.0mm为止。另外，抗蚀部14a优选与触点部件30分离0.3mm以上。在不能够采取0.3mm以上的距离的情况下，优选将抗蚀部14a的宽度设为0.1mm以上且0.2mm以下。
接下来，按照图5所示的流程，利用示出各工序的图6～图10对这样的电子装置50的制造方法进行说明。图5是示出实施方式的电子装置的制造方法的流程的图。图6是实施方式的电子装置所包括的陶瓷电路基板的俯视图。图7是示出实施方式的电子装置的制造方法的涂覆焊料的工序的俯视图。图8～图10是实施方式的电子装置的制造方法的回流焊接工序的俯视图，对应于图3的部位。
电子装置50按照以下所示的制造工序(流程)而被制造出来。以下的各制造工序根据需要而被人为地执行或被制造装置执行。
[步骤S10]
准备半导体芯片20、21、陶瓷电路基板10、以及触点部件30。不限于这些部件，预先准备电子装置50的制造所需要的部件。应予说明，陶瓷电路基板10具有绝缘板11、形成在绝缘板11的正面的多个电路板12(参照图6)、以及形成在绝缘板11的背面的金属板13。应予说明，在图6中，标注在多个电路板12的矩形的虚线表示之后的半导体芯片20、21的部件区域20a、21a。另外，虽然在图6中省略图示，但是在电路板12的表面通过电镀处理而形成有镀膜。
[步骤S11]
如图6所示，针对陶瓷电路基板10的电路板12，通过激光照射而分别形成防液部14。激光照射是例如利用YAG激光、YVO4激光的照射。利用这样的激光装置，通过利用焊缝激光或光点激光对预定的区域反复进行激光扫描而形成抗蚀部14a。应予说明，预定的区域是例如配置有半导体芯片20、21的区域之间、以及分别配置有半导体芯片20、21与触点部件30的区域之间(参照图2)。根据需要，也可以是配置有多个触点部件30的区域。抗蚀部14a的宽度能够根据激光扫描的扫描次数来适当地控制。图3所示的抗蚀部14a的宽度为一例。通过使激光扫描的扫描次数相比当前情况增加、减少，从而能够使抗蚀部14a的宽度比图3所示的抗蚀部14a的宽度宽或窄。激光照射的条件能够在扫描速度为1000mm/秒、扫描间隔为40μm、光点可变为-10以上且10以下、脉冲频率为25kHz以上且60kHz以下之间适当地设定。此时，通过激光照射而使电路板12的表面的镀膜12a氧化，设为电路板12的母材部分不露出的程度的激光扫描以及激光输出。另外，随着形成抗蚀部14a，在抗蚀部14a的两侧沿抗蚀部14a而形成有热影响区域14b。如此地形成的单侧的热影响区域14b的宽度是例如50μm以上。
[步骤S12]
如图7所示，在陶瓷电路基板10的电路板12上的半导体芯片20、21的部件区域20a、21a以及触点部件30的设置区域分别配置焊料板31。应予说明，代替焊料板31，在陶瓷电路基板10的电路板12也可以利用例如分液器来涂覆焊料。应予说明，以针对半导体芯片20、21的焊料板为四边形，针对触点部件30的焊料板为圆形的方式而示出图7所示的焊料板31。
应予说明，该情况下的焊料板31使用同样材质的焊料板。该焊料板31由无铅焊料构成，该无铅焊料例如以由锡-银-铜形成的合金、由锡-锌-铋形成的合金、由锡-铜形成的合金、由锡-银-铟-铋形成的合金中的至少任一合金为主要成分。除此之外，所述焊料板31包括具有去除电路板12(镀膜12a)上的氧化物的作用的焊剂。焊剂能够含有例如环氧树脂、羧酸、松香树脂、活性剂、以及溶剂，而且能够根据需要而含有其他成分。此外，这样的焊料板31可以包括镍、锗、钴或硅等添加物。
[步骤S13]
在步骤S12中配置的焊料板31上，利用安装装置(省略图示)分别装配半导体芯片20、21以及触点部件30。应予说明，此时，电子部件22也同样地装配。
[步骤S14]
在步骤13中在陶瓷电路基板10的电路板12经由焊料板31而装配了半导体芯片20、21以及触点部件30的状态下，将其搬入回流炉。例如如图8所示，此时的电路板12(镀膜12a)上的半导体芯片20、21处于搭载在焊料板31上的状态。在该状态下，使炉内减压，以回流处理温度进行加热处理(回流焊接工序)。回流处理温度是例如250℃以上且300℃以下。由此，镀膜12a与半导体芯片20、21之间的焊料板31熔融。如图9所示，从焊料板31熔融了的第一、第二焊料16a、16b扩散到半导体芯片20、21的外侧。此时，有时半导体芯片20、21会在扩散了的第一、第二焊料16a、16b之上移动。另外，扩散了的第一、第二焊料16a、16b也涉及到防液部14上。根据情况，有时第一、第二焊料16a、16b也会在防液部14上结合。其后，防液部14上的第一、第二焊料16a、16b通过防液部14的防液性而被防液部14阻拦，从而隔开预定的间隔。伴随于此，如图10所示，在扩散了的第一、第二焊料16a、16b上错位了的半导体芯片20、21也返回预定的配置位置。而且，利用从熔融了的第一、第二焊料16a、16b凝固了的第一、第二焊料16a、16b而在电路板12(镀膜12a)接合半导体芯片20、21(参照图4)。对于触点部件30来说，也同样地利用焊料而接合到电路板12(镀膜12a)。
[步骤S15]
从回流炉中取出在各电路板12接合有半导体芯片20、21以及触点部件30的陶瓷电路基板10。而且，使用未图示的超声波键合工具，利用键合线15将陶瓷电路基板10的各电路板12的预定区域与半导体芯片20、21电连接。另外，在如此地连接了键合线15后，将外部连接端子(省略图示)压入各触点部件30。
[步骤S16]
将在各电路板12接合有半导体芯片20、21以及触点部件30并利用键合线15进行了电连接的陶瓷电路基板10装配到壳体，并利用密封部件45进行密封。由此，制造出图1和图2所示的电子装置50。
在此，利用图11和图12对在电路板12不形成防液部14而在形成有防液部14的部位形成有缝隙的情况下的上述步骤S14的回流焊接进行说明。图11和图12是参考例的电子装置的制造方法的回流焊接工序的俯视图。应予说明，参考例的电子装置除代替防液部14而设置的缝隙140以外，都成与电子装置50相同的构成，标注同一符号，并省略其说明。另外，图11和图12示出对应于图8和图10的状态的情况。
在陶瓷电路基板10的形成有缝隙140的电路板12(镀膜12a)经由焊料板31而配置半导体芯片20、21，并将其搬入回流炉(参照图11)。应予说明，缝隙140是形成在电路板12(镀膜12a)的凹状的槽。在该状态下，若使炉内减压而以回流处理温度进行加热处理，则镀膜12a与半导体芯片20、21之间的焊料板31熔融。从焊料板31溶融了的第一、第二焊料16a、16b扩散到半导体芯片20、21的外侧。因此，例如，导致电路板12的(图12的中间的)半导体芯片20因扩散了的第一焊料16a而在该位置旋转或错位。旋转了的半导体芯片20的一部分经由第一焊料16a而位于缝隙140上。在第一焊料16a填充缝隙140内的情况下，有可能在缝隙140内产生空隙。若如此地导致空隙产生则导致相对于半导体芯片20的散热性降低。应予说明，该情况在半导体芯片21侧也会产生。
另外，在电路板12(图12的左侧和右侧)，导致第一、第二焊料16a、16b在间隙结合。在这样的情况下，导致半导体芯片20、21电连接，并导致成为电子装置50的电气不良的原因。
因此，上述电子装置50具有：作为部件的半导体芯片20、21；以及电路板12，其正面被镀膜12a覆膜，在该正面的预定的部件区域经由第一、第二焊料16a、16b而配置有半导体芯片20、21。而且，电子装置50沿电路板12的该部件区域的侧部而在正面形成有防液部14，该防液部14包括使镀膜12a氧化而构成的氧化膜，并且在该氧化膜之下残存有镀膜12a的一部分。由此，由于第一、第二焊料16a、16b被防液部14阻挡，所以利用防液部14来抑制所述第一、第二焊料16a、16b的扩散。另外，因为防液部14通过激光照射而形成，所以即使在狭窄的范围也能够形成防液部14。因此，能够在缩短半导体芯片20、21的间隔的同时，在所述半导体芯片20、21之间形成防液部14而抑制第一、第二焊料16a、16b的扩散。另外，无需为了抑制这样的第一、第二焊料16a、16b的扩散而在电路板12形成缝隙。因此，能够防止电路板12的抗折强度的降低。因此，能够在不产生电气不良的情况下高密度地安装半导体芯片20、21，另外，能够抑制电子装置50的强度的降低，并能够抑制电子装置50的可靠性的降低。
接下来，基于图13和图14对针对配置有半导体芯片的电路板(镀膜)而形成的防液部14的各种形成例进行说明。图13和图14是在实施方式的电子装置的陶瓷电路基板形成的防液部的形成例的俯视图。应予说明，在图13和图14中，在电路板12的表面形成有镀膜12a。示例出在该镀膜12a通过焊料(省略图示)而接合有半导体芯片23a、23b、23c、23d的情况。另外，在图13和图14中，是相对于电路板12(镀膜12a)而两行两列地配置半导体芯片23a、23b、23c、23d的情况。
在图13的(A)中，防液部14连续地(十字状地)形成在半导体芯片23a、23b、23c、23d之间。此外，防液部14形成在半导体芯片23a、23b、23c、23d的周围。应予说明，防液部14也可以连续地(十字状地)仅形成在半导体芯片23a、23b、23c、23d之间。另外，在图13的(B)中，图13的(A)中的防液部14断续地形成。应予说明，图13的(B)的断续的防液部14为一例。也可以使间隔变窄而形成为更多的点线状。在图13的(C)中，图13的(A)中的防液部14也断续地形成。其中，在图13的(C)中，除了防液部14交叉的部分以外，断续地形成剩下的部分。
在图14的(A)中，相对于图13的(C)的情况，防液部14还分别形成在包围半导体芯片23a、23b、23c、23d的区域的角部。在图14的(B)中，相对于图13的(C)的情况，防液部14在半导体芯片23a、23b、23c、23d的边界连续地形成。在图14的(C)中，相对于图14的(B)的情况，防液部14还分别形成在包围半导体芯片23a、23b、23c、23d的区域的角部。
通过如此地形成防液部14从而能够防止半导体芯片23a、23b、23c、23d下的焊料的扩散，并且能够使半导体芯片23a、23b、23c、23d的配置位置最大限度地接近。应予说明，图13和图14的防液部14的宽度能够根据需要而适当地设定。另外，防液部14不限于图13和图14的情况，能够针对半导体芯片等而适当地形成在镀膜12a上。

Claims (20)

1.一种电子装置，其特征在于，具有：
第一部件；以及
电路板，其正面被镀膜覆膜，并且在所述正面的第一部件区域经由第一焊料而配置有所述第一部件，
所述电子装置沿所述电路板的所述第一部件区域的侧部在所述正面形成有防液部，该防液部包括使所述镀膜氧化而构成的氧化膜，并且在所述氧化膜之下残存有所述镀膜的一部分。
2.根据权利要求1所述的电子装置，其特征在于，
所述防液部包括热影响区域，该热影响区域在所述氧化膜的两侧沿所述氧化膜而形成。
3.根据权利要求2所述的电子装置，其特征在于，
所述热影响区域的宽度为50μm以上。
4.根据权利要求1所述的电子装置，其特征在于，
所述氧化膜的厚度为25nm以上。
5.根据权利要求1所述的电子装置，其特征在于，
所述氧化膜的宽度为100μm以上且500μm以下。
6.根据权利要求1所述的电子装置，其特征在于，
所述第一部件与所述氧化膜之间的距离小于300μm。
7.根据权利要求6所述的电子装置，其特征在于，
所述氧化膜的宽度为100μm以上且200μm以下。
8.根据权利要求1所述的电子装置，其特征在于，
所述防液部与残存有所述镀膜的一部分的部分的合计厚度为6μm以上。
9.根据权利要求1所述的电子装置，其特征在于，
所述防液部之下的残存有所述镀膜的一部分的部分的厚度为5μm以上。
10.根据权利要求1所述的电子装置，其特征在于，
所述电路板由铜或铜合金构成，
所述镀膜是镍或包括镍的合金。
11.根据权利要求1所述的电子装置，其特征在于，
所述防液部在俯视下为直线状或点线状。
12.根据权利要求11所述的电子装置，其特征在于，
所述防液部所包含的所述氧化膜包括利用对所述镀膜照射的激光而形成的第一激光痕。
13.根据权利要求12所述的电子装置，其特征在于，
所述氧化膜包括所述第一激光痕以及第二激光痕，所述第二激光痕沿所述第一激光痕与所述第一激光痕相接，或者一部分与所述第一激光痕重叠。
14.根据权利要求13所述的电子装置，其特征在于，
所述第一部件是俯视下为矩形的半导体芯片，
所述半导体芯片以使所述半导体芯片的长边与所述防液部的形成方向平行的方式与所述防液部相邻地配置。
15.根据权利要求14所述的电子装置，其特征在于，
所述半导体芯片靠除所述半导体芯片的正面的与所述防液部对置的长边以外的边而具备控制电极。
16.根据权利要求1至15中任一项所述的电子装置，其特征在于，
所述电子装置还具有第二部件，
所述电路板在所述正面设置有第二部件区域，该第二部件区域与所述第一部件区域相邻，并且经由第二焊料而配置有所述第二部件，所述防液部形成在所述第一部件区域和所述第二部件区域之间的间隙。
17.根据权利要求1至15中任一项所述的电子装置，其特征在于，
所述第一部件区域设置在所述电路板的端部的附近，
所述防液部沿所述第一部件区域的所述端部侧的侧部而形成。
18.根据权利要求1至15中任一项所述的电子装置，其特征在于，
所述电子装置还具有导电性的第三部件，
所述电路板在所述正面设置有第三部件区域，该第三部件区域与所述第一部件区域相邻，并且配置有所述第三部件，所述防液部形成在所述第一部件区域和所述第三部件区域之间的间隙。
19.一种电子装置的制造方法，其特征在于，具有：
准备第一部件、以及设定有第一部件区域的正面被镀膜覆膜后的电路板的工序；
与所述镀膜的所述第一部件区域相邻地通过照射激光而在所述镀膜的表面形成具有氧化膜且在所述氧化膜之下残存所述镀膜的一部分的防液部的工序；
在所述镀膜的所述第一部件区域配置第一焊料的工序；
在所述第一焊料上配置所述第一部件的工序；以及
熔融所述第一焊料的工序。
20.根据权利要求19所述的电子装置的制造方法，其特征在于，
在形成所述防液部的工序中形成的所述氧化膜的厚度为40nm以上。
CN202110002261.7A 2020-01-23 2021-01-04 电子装置以及电子装置的制造方法 Pending CN113241325A (zh)

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