CN113220513B - Test keysets - Google Patents
Test keysets Download PDFInfo
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- CN113220513B CN113220513B CN202110461196.4A CN202110461196A CN113220513B CN 113220513 B CN113220513 B CN 113220513B CN 202110461196 A CN202110461196 A CN 202110461196A CN 113220513 B CN113220513 B CN 113220513B
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- switching
- interposer
- test
- module connector
- network
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- 238000012360 testing method Methods 0.000 title claims abstract description 57
- 230000007704 transition Effects 0.000 claims abstract description 27
- 230000000712 assembly Effects 0.000 claims abstract description 18
- 238000000429 assembly Methods 0.000 claims abstract description 18
- 238000012546 transfer Methods 0.000 claims description 42
- 238000004519 manufacturing process Methods 0.000 description 8
- 230000000694 effects Effects 0.000 description 6
- 238000000034 method Methods 0.000 description 5
- 238000012986 modification Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000004075 alteration Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2273—Test methods
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N17/00—Diagnosis, testing or measuring for television systems or their details
- H04N17/002—Diagnosis, testing or measuring for television systems or their details for television cameras
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- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- General Physics & Mathematics (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- General Health & Medical Sciences (AREA)
- Health & Medical Sciences (AREA)
- Biomedical Technology (AREA)
- Structure Of Telephone Exchanges (AREA)
Abstract
The invention discloses a test adapter plate, which comprises: an adapter plate main body and an adapter network; the switching network is located on the switching board main body, the switching network includes the multiunit switching subassembly that is the array arrangement, every switching subassembly in multiunit switching subassembly includes: a first transition region and a plurality of second transition regions; wherein the first transition areas of each of the plurality of sets of transition assemblies are interconnected.
Description
Technical Field
The invention relates to the field of testing, in particular to a testing adapter plate.
Background
The test is one of the most critical and indispensable links in the production process of the product, and through the test, the quality of the product can be known, and whether the required quality standard is met can be judged. The test adapter board is one of the necessary devices in the test process. For a series of testing devices used in a module factory, a one-to-one correspondence mode is generally adopted, each different main chip is provided with a fixed testing main board, the structure and the interface of the testing main board are fixed, each used module is different in PIN (personal identification number) PIN definition, and a special design of a testing adapter board to connect the module and the testing main board is needed, so that labor design, time required for board manufacturing, production cost and the like are wasted.
Disclosure of Invention
The embodiment of the application solves the technical problem that different modules in the prior art need to be designed to be connected with different test adapter plates and test mainboards by providing the test adapter plate, and achieves the technical effects of improving the utilization efficiency of the test adapter plate and further saving the production cost.
The application provides the following technical scheme through one embodiment of the application:
a test interposer, comprising:
an adapter plate main body and an adapter network;
the switching network is located on the switching board main body, the switching network includes the multiunit switching subassembly that is the array arrangement, every switching subassembly in multiunit switching subassembly includes: a first transition region and a plurality of second transition regions;
wherein the first transition areas of each of the plurality of sets of transition assemblies are interconnected.
Preferably, the switching components are arranged in a square array, wherein each vertical column of switching components in the square array is a group.
Preferably, the transfer assembly is a circular assembly, the first transfer region is located in the middle of the transfer assembly, and the second transfer region of the transfer assembly is disposed around the first transfer region.
Preferably, the transfer assembly comprises four second transfer areas, and the four second transfer areas are uniformly arranged around the first transfer area.
Preferably, the test patch panel further comprises:
a motherboard interface group and a module connector;
The plurality of interfaces of the module connector are respectively connected with the first switching areas of the plurality of groups of switching components in a one-to-one correspondence manner;
and the interfaces of the main board interface group are respectively connected with the second switching areas in each group of switching components in a one-to-one correspondence manner.
Preferably, the number of the second switching areas in each group of switching components is greater than or equal to the number of interfaces of the motherboard interface group, and the number of the groups of switching components in the switching network is greater than or equal to the number of interfaces of the module connector.
Preferably, the test patch panel includes:
A first module connector and a second module connector; the interface type of the first module connector is different from the interface type of the second module connector.
Preferably, the motherboard interface group and the module connector are located at an edge portion of the test adapter board, and the switching network is located at a middle portion of the test adapter board.
Preferably, the adapter plate main body is provided with a mark to represent the connection relation of the components.
Preferably, the first transfer region and the second transfer region are pad structures.
One or more technical solutions provided in the embodiments of the present application at least have the following technical effects or advantages:
The embodiment of the application provides a test adapter plate, which comprises: an adapter plate main body and an adapter network; the switching network is located on the switching board main body, the switching network includes the multiunit switching subassembly that is the array arrangement, every switching subassembly in multiunit switching subassembly includes: a first transition region and a plurality of second transition regions; wherein the first transition areas of each of the plurality of sets of transition assemblies are interconnected. Therefore, the first transfer area of each group of transfer assemblies can be connected with the corresponding second transfer area based on the requirements of the pins of different camera modules. Therefore, the technical problem that different modules in the prior art need to be designed into different test adapter plate connection modules and test mainboards is solved, the utilization efficiency of the test adapter plate is improved, and the technical effect of saving production cost is achieved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a test adapter board according to an embodiment of the present application;
Fig. 2 is a schematic structural diagram of a switching assembly of a test switching board according to an embodiment of the present application;
fig. 3 is a schematic diagram illustrating connection of the switching assembly in the dashed circle in fig. 1.
Detailed Description
The embodiment of the application solves the technical problem that different modules in the prior art need to be designed to be connected with different test adapter plates and test mainboards by providing the test adapter plate, and achieves the technical effects of improving the utilization efficiency of the test adapter plate and further saving the production cost.
The technical scheme of the embodiment of the application aims to solve the technical problems, and the overall thought is as follows:
A test interposer, comprising: an adapter plate main body and an adapter network; the switching network is located on the switching board main body, the switching network includes the multiunit switching subassembly that is the array arrangement, every switching subassembly in multiunit switching subassembly includes: a first transition region and a plurality of second transition regions; wherein the first transfer areas in each of the plurality of sets of transfer assemblies are interconnected.
In order to better understand the above technical solutions, the following detailed description will refer to the accompanying drawings and specific embodiments.
First, the term "and/or" appearing herein is merely an association relationship describing associated objects, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.
Example 1
The present embodiment provides a test patch panel, as shown in fig. 1, including:
the interposer body 100 and the interposer network 140;
The switching network 140 is located on the switching board main body 100, and the switching network 140 includes a plurality of groups of switching components 141 arranged in an array, as shown in fig. 2, the switching components 141 include a first switching region 210 and a plurality of second switching regions 220;
Wherein the first transition areas 210 of each set of transition assemblies 141 of the plurality of sets of transition assemblies 141 are connected to each other.
Specifically, the adapter plate body 100 may have a square or disc-shaped structure so as to place the module connector at an edge portion of the adapter plate 100 body. The material of the adapter plate body 100 is preferably lightweight plastic, so that the adapter plate body 100 is lightweight and not easily conductive. The connection wires of the interposer network 140, the motherboard interface group 120 and the module connector 130 are inside the interposer body 100, so that the connection wires can be prevented from falling off or being damaged due to external contact.
Further, as shown in fig. 1, the switching components 141 are arranged in a square array, wherein each column of switching components in the square array is a group, so that the operator can conveniently identify and reduce the error of jumper connection. Of course, the adaptor assembly 141 may also be a group of adaptor assemblies 141 per row or region, and the embodiment is not particularly limited.
Further, the adapter element 141 is a circular element, the first adapter region 210 is located in the middle of the adapter element 141, and the second adapter region 220 of the adapter element 141 is disposed around the first adapter region 210. The operator can conveniently select the corresponding second transfer area 220 to be connected with the first transfer area 210, and when the second transfer area 220 is in jumper connection with the first transfer area 210, a lot of space is reduced.
Further, each pod 141 in the pod network 140 has four second pod regions 220, and the four second pod regions 220 are uniformly disposed about the first pod region 210. Thus, each switching component is not too much, and the operator is difficult to distinguish. Furthermore, errors in the operation process are reduced, and the production efficiency is improved.
In the implementation process, as shown in fig. 3, the circular adapter assembly 141 is divided into five areas, the square area in the middle of the circular adapter assembly 141 is the first adapter area 210 of the adapter assembly, and the four areas of the circular adapter assembly 141 are the second adapter areas 220 of the adapter assembly. Wherein the areas of the upper, lower, left and right areas are equal.
Specifically, the first transferring area 210 of the transferring assembly 141 is connected to the interface 1 of the module connector 130, the second transferring area 220 at the left part of the transferring assembly 141 is connected to the interface D of the motherboard interface group 120, the second transferring area 220 at the right part of the transferring assembly 141 is connected to the interface a of the motherboard interface group 120, the second transferring area 220 at the upper part of the transferring assembly 141 is connected to the interface B of the motherboard interface group 120, and the second transferring area 220 at the lower part of the transferring assembly 141 is connected to the interface C of the motherboard interface group 120.
Further, the test patch panel, still include: a motherboard interface set 120 and a module connector 130; the interfaces of the module connector 130 are respectively connected with the first switching areas of the multiple groups of switching components in a one-to-one correspondence manner; the interfaces of the motherboard interface group 120 are respectively connected with the second switching areas in each group of switching components in a one-to-one correspondence manner.
In the implementation process, the module connector 130 is connected to the test camera module, and the motherboard interface group 120 is connected to the test motherboard. The first transfer area 210 of each set of transfer assemblies 141 may be connected to the corresponding second transfer area 220 based on different camera modules, so as to satisfy different definitions of pins of different camera modules, which need to be connected to different interfaces of the test motherboard.
Further, the number of the second transferring areas 220 in each transferring assembly is greater than or equal to the number of interfaces of the motherboard interface group 120, and the number of the transferring assemblies 141 is greater than or equal to the number of interfaces of the module connector 130.
Specifically, as shown in fig. 1, if the number of interfaces of the module connector 130 is 10, the number of sets of the adapter components 141 is at least 10. If the number of interfaces of the motherboard interface group 120 is 24, the number of second switching areas of each group of switching components 141 is at least 24, so as to ensure that the interfaces of the module connector 130 can be connected with any interfaces of the motherboard interface group 120. Thus, if the number of second transition areas of each transition assembly 141 is 4, there are 6 transition assemblies per set of transition assemblies. When hot, if the number of second transition areas of each transition assembly 141 is 2, there are 12 transition assemblies per set of transition assemblies. The embodiment is not particularly limited as long as the number of the second transfer areas of each set of transfer components 141 is guaranteed to be equal to or greater than the interface data of the motherboard interface set.
Further, the module connector 130 includes: a first module connector and a second module connector; the interface type of one module connector is different from the interface type of the second module connector so as to be compatible with various testing requirements.
Specifically, the module connector 130 may be a BTB (Board-to-Board) connector and a ZIF (Zero Insertion Force ) connector. The small pitch, the number of pins and the high-speed transmission function of the BTB connector are the most suitable for the requirements of the smart phone connector. The ZIF connector has high reliability, small signal crosstalk, and no performance loss, and can be plugged in two seconds, wherein the plugging times can reach 10,000 times.
Further, as shown in fig. 1, the motherboard interface group 120 and the module connector 130 are located at an edge portion of the interposer body 100, so as to facilitate connection between the test motherboard and the camera module. The interposer network 140 is positioned in the middle of the interposer body 100, and can maximally utilize the space of the test interposer, thereby reducing the size of the interposer.
Further, the first transfer region 210 and the second transfer region 220 are of a pad structure, so that an operator can use a solder paste welding manner to perform jumper connection on the corresponding first transfer region 210 and the second transfer region 220. Of course, the adapter assembly 141 may have a knob that is rotated by a pointer to control which second adapter region 210 the first adapter region 210 is connected to.
Further, the interposer body 100 has a logo to characterize the connection relationship of the components.
Specifically, as shown in fig. 1, each interface of the motherboard interface group 120 has a corresponding identifier a-X, each interface of the module connector 130 also has a corresponding identifier 1-10 and a corresponding identifier 1-8, and the connection relationship between the first switching area and the second switching area of each group of switching components 141 in the switching network 140 has an identifier. Thus, jumper connection can be performed quickly and clearly.
The technical scheme provided by the embodiment of the application at least has the following technical effects or advantages:
1. In the embodiment of the application, as the test adapter plate has the adapter network structure, the first adapter region of each group of adapter assemblies can be connected with the corresponding second adapter region based on the requirements of pins of different camera modules. Therefore, the technical problem that different modules in the prior art need to be designed into different test adapter plate connection modules and test mainboards is solved, the utilization efficiency of the test adapter plate is improved, and the technical effect of saving production cost is achieved.
2. In the embodiment of the application, since the transfer component is a circular component, the first transfer area of the transfer component is in the middle, and the second transfer area of the transfer component is around the first transfer area. Therefore, operators can conveniently select the corresponding second switching area to be connected with the first switching area, and when the second switching area is connected with the first switching area in a jumper manner, a lot of space is reduced.
3. In the embodiment of the application, the switching groups are arranged in a square array, wherein each vertical column of switching components in the square array is a group, each interface of the main board interface group is provided with a corresponding identifier A-X, each interface of the module connector is also provided with corresponding identifiers 1-10 and 1-8, and the connection relation between the first switching region and the second switching region of each group of switching components in the switching network is provided with an identifier. Therefore, the method can be convenient for operators to identify and reduce the error of jumper connection.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
Claims (8)
1. A test interposer, comprising:
an adapter plate main body and an adapter network;
the switching network is located on the switching board main body, the switching network includes the multiunit switching subassembly that is the array arrangement, every switching subassembly in multiunit switching subassembly includes: a first transition region and a plurality of second transition regions;
Wherein the first transfer areas of each of the plurality of sets of transfer assemblies are connected to each other;
The switching assembly is a circular assembly, the first switching area is positioned in the middle of the switching assembly, and the second switching area of the switching assembly is arranged around the first switching area;
the test adapter plate further comprises a main board interface group and a module connector, wherein a plurality of interfaces of the module connector are respectively connected with the first transfer areas of the multiple groups of transfer assemblies in a one-to-one correspondence manner, and a plurality of interfaces of the main board interface group are respectively connected with a plurality of second transfer areas of each group of transfer assemblies in a one-to-one correspondence manner.
2. The test patch panel of claim 1, wherein the patch modules are arranged in a square array, wherein each column of patch modules in the square array is a group.
3. The test interposer of claim 1, wherein said interposer assembly comprises four of said second interposer regions, said four of said second interposer regions being disposed uniformly about said first interposer region.
4. The test patch panel of claim 1, wherein the number of second patch areas in each set of patch modules is greater than or equal to the number of interfaces of the motherboard interface set, and the number of sets of patch modules in the patch network is greater than or equal to the number of interfaces of the module connector.
5. The test patch panel of claim 1, comprising:
A first module connector and a second module connector; the interface type of the first module connector is different from the interface type of the second module connector.
6. The test interposer of claim 1, wherein the motherboard interface groups and module connectors are located at an edge portion of the test interposer, and the interposer network is located in a middle portion of the test interposer.
7. The test interposer of claim 1, wherein the interposer body has indicia thereon to characterize the connection relationship of the components.
8. The test interposer of claim 1, wherein the first and second interposer regions are pad structures.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110461196.4A CN113220513B (en) | 2021-04-27 | 2021-04-27 | Test keysets |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110461196.4A CN113220513B (en) | 2021-04-27 | 2021-04-27 | Test keysets |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113220513A CN113220513A (en) | 2021-08-06 |
| CN113220513B true CN113220513B (en) | 2024-10-22 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110461196.4A Active CN113220513B (en) | 2021-04-27 | 2021-04-27 | Test keysets |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN204349152U (en) * | 2014-12-26 | 2015-05-20 | 昆山龙显电子有限公司 | A kind of multiplex test adaptor plate |
| CN211554184U (en) * | 2019-12-24 | 2020-09-22 | 昆山丘钛微电子科技有限公司 | Test board |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108663648A (en) * | 2017-03-27 | 2018-10-16 | 富泰华工业（深圳）有限公司 | The test board and test method of adjustment probe location |
| CN211698062U (en) * | 2018-10-08 | 2020-10-16 | 江西盛泰光学有限公司 | Test board for camera module |
| CN211580109U (en) * | 2020-04-13 | 2020-09-25 | 重庆市天实精工科技有限公司 | Universal mobile phone camera static test board |
-
2021
- 2021-04-27 CN CN202110461196.4A patent/CN113220513B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN204349152U (en) * | 2014-12-26 | 2015-05-20 | 昆山龙显电子有限公司 | A kind of multiplex test adaptor plate |
| CN211554184U (en) * | 2019-12-24 | 2020-09-22 | 昆山丘钛微电子科技有限公司 | Test board |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113220513A (en) | 2021-08-06 |
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