CN113109621B - Method, system, device and medium for filtering out attenuated DC component in fault signal - Google Patents

Abstract

The invention discloses a method, a system, a device and a medium for filtering an attenuated direct current component in a fault signal, wherein the method comprises the following steps: acquiring a discrete signal containing a plurality of sampling points according to the fault signal; acquiring sampling data from the discrete signal, and performing discrete Fourier transform on the sampling data to obtain a DFT output phasor sequence; performing rotation difference operation on the DFT output phasor sequence to obtain a rotation difference phasor sequence, and obtaining an attenuation time constant according to the rotation difference phasor sequence; performing attenuation difference operation on the DFT output phasor sequence according to the attenuation time constant to obtain an attenuation difference phasor sequence; and constructing a linear equation set according to the attenuation difference phasor sequence, and obtaining the accurate fundamental frequency phasor after filtering the attenuation direct current component according to the linear equation set. The invention provides a discrete Fourier transform improved algorithm capable of filtering and attenuating direct-current components, overcomes the defects of the existing extraction algorithm, improves the performance of a relay protection device, and can be widely applied to the field of power systems.

Description

Method, system, device and medium for filtering out attenuated DC component in fault signal

technical field

The invention relates to the field of power systems, and in particular, to a method, system, device and medium for filtering out attenuated DC components in fault signals.

Background technique

The extraction accuracy of the fundamental frequency components in the fault signal by the protection measuring components (such as overcurrent components, low voltage components and impedance components) largely determines the performance of the relay protection device. Since the discrete Fourier transform (DFT) can filter out the integer harmonics in the fault signal, DFT is widely used to extract the fundamental frequency component. However, the attenuated DC component in the fault signal cannot be filtered out by the traditional discrete Fourier transform, so the fundamental frequency component extraction algorithm that can filter out the attenuated DC component has always been the focus of domestic and foreign scholars. With the increase in the access of electrical equipment, the load of power grids in various places in my country continues to increase. As the first line of defense of modern power systems, the importance of relay protection is self-evident. In order to improve the performance of the relay protection device, the research on the extraction algorithm of the fundamental frequency component that filters out the attenuated DC component has an urgent need and important research value.

The existing fundamental frequency component extraction algorithms mainly include instantaneous value algorithm and discrete Fourier transform (DFT) improved algorithm. Among them, the accuracy of the instantaneous value algorithm is extremely dependent on the modeling of the specific signal, and the secondary attenuation DC component, noise and other components contained in the fault signal have a great impact on the accuracy of this kind of algorithm, so this kind of method is not suitable for stability. Relay protection devices that require higher performance and accuracy. On the other hand, most of the improved DFT algorithms filter out the attenuated DC component by utilizing additional data time windows. The existing algorithms of this type can theoretically completely filter out the attenuated DC component, but there are generally problems such as insufficient anti-noise capability, large inter-harmonic response or too long data time window, and the performance improvement of the relay protection device is limited. , can not meet the needs of relay protection.

SUMMARY OF THE INVENTION

In order to solve one of the technical problems existing in the prior art at least to a certain extent, the purpose of the present invention is to provide a method, system, device and medium for filtering the attenuated DC component in the fault signal.

The technical scheme adopted in the present invention is:

A method for filtering out attenuated DC components in a fault signal, comprising the following steps:

Obtain a discrete signal containing multiple sampling points according to the fault signal;

Obtain sampled data from the discrete signal, perform discrete Fourier transform on the sampled data, and obtain a DFT output phasor sequence;

performing a rotation difference operation on the DFT output phasor sequence to obtain a rotation difference phasor sequence, and obtaining a decay time constant according to the rotation difference phasor sequence;

According to the decay time constant, an attenuation difference operation is performed on the DFT output phasor sequence to obtain an attenuation difference phasor sequence;

A linear equation system is constructed according to the attenuation difference phasor sequence, and an accurate fundamental frequency phasor after filtering out the attenuation DC component is obtained according to the linear equation system.

Further, the number of the sampling points is N+N _ex , N is the number of sampling points in one cycle, and N _ex is a natural number greater than or equal to 2;

The acquiring sampling data from the discrete signal includes:

The sampled data in the [kΔt, T+(k-1)Δt] time window is extracted from the discrete signal; wherein, T is the period of the fault signal, and Δt is the sampling interval.

Further, the rotation difference operation is performed on the DFT output phasor sequence using the following formula:

为旋转差分相量序列；n为采样间隔数，其取值范围为1≤n≤N_ex-1；in,

is the rotating differential phasor sequence; n is the number of sampling intervals, and its value range is 1≤n≤N _ex -1;

The obtaining of the decay time constant α according to the rotated differential phasor sequence includes:

A linear equation for e ^{- αΔt} is constructed using the rotated difference phasor sequence:

Using the linear least squares solution, we get:

小于等于ε，代表该衰减直流分量可忽略不计，在这种情况下衰减时间常数α应视为0；若

大于ε，衰减时间常数则可根据式(3)求得；If the cumulative term

is less than or equal to ε, which means that the decaying DC component can be ignored. In this case, the decay time constant α should be regarded as 0; if

greater than ε, the decay time constant can be obtained according to formula (3);

The decay time constant α is:

Among them, ε is a very small positive number.

Further, an attenuation difference operation is performed on the DFT output phasor sequence using the following formula:

为衰减差分相量；in,

is the attenuation differential phasor;

满足以下关系式：Using Equation (5), the attenuation differential phasor sequence can be obtained

Satisfy the following relation:

为准确基频相量。in,

is an accurate fundamental frequency phasor.

Further, the expression for constructing the obtained system of linear equations is:

和

分别代表

的实部与虚部。in,

and

Representing

The real and imaginary parts of .

Further, the fault signal includes a fundamental frequency component, an integer harmonic, an attenuated DC component and a DC offset component;

The expression of the fault signal is:

Among them, A ₀ is the amplitude of the offset DC component, A _m is the amplitude of each integer harmonic, ω is the angular velocity, t is the time, θ _m is the initial phase angle of each integer harmonic, and D is the initial phase angle of the attenuated DC component value, α is the decay time constant.

Further, the discrete Fourier transform is performed on the sampled data, and the obtained output is:

为DFT输出相量；

为

中包含的准确基频相量；

为

中由衰减直流分量造成的衰减直流相量；

为T时刻的DFT输出相量；

为

中包含的准确基频相量；

为

中由衰减直流分量造成的衰减直流相量；B₁为准确基频相量的幅值；θ₁为准确基频相量的初相角；j为虚数单位。in,

is the DFT output phasor;

for

The exact fundamental frequency phasor contained in ;

for

The attenuated DC phasor caused by the attenuated DC component in ;

is the DFT output phasor at time T;

for

The exact fundamental frequency phasor contained in ;

for

The attenuated DC phasor caused by the attenuated DC component in ; B ₁ is the amplitude of the accurate fundamental frequency phasor; θ ₁ is the initial phase angle of the accurate fundamental frequency phasor; j is the imaginary unit.

Another technical scheme adopted by the present invention is:

A system for filtering out attenuated DC components in fault signals, comprising:

The sampling module is used to obtain discrete signals including multiple sampling points according to the fault signal;

a transformation module, configured to obtain sampled data from the discrete signal, perform discrete Fourier transform on the sampled data, and obtain a DFT output phasor sequence;

a difference solving module, configured to perform a rotational difference operation on the DFT output phasor sequence to obtain a rotational difference phasor sequence, and obtain a decay time constant according to the rotational difference phasor sequence;

An attenuation solving module, configured to perform an attenuation differential operation on the DFT output phasor sequence according to the attenuation time constant to obtain an attenuation differential phasor sequence;

The equation solving module is used for constructing a linear equation system according to the attenuation difference phasor sequence, and obtaining an accurate fundamental frequency phasor after filtering out the attenuation DC component according to the linear equation system.

Another technical scheme adopted by the present invention is:

A device for filtering out attenuated DC components in a fault signal, comprising:

at least one processor;

at least one memory for storing at least one program;

When the at least one program is executed by the at least one processor, the at least one processor implements the above method.

Another technical scheme adopted by the present invention is:

A storage medium in which a processor-executable program is stored, the processor-executable program being used to perform the above-described method when executed by the processor.

The beneficial effects of the present invention are as follows: the present invention provides an improved discrete Fourier transform (DFT) algorithm capable of filtering out the attenuated DC component, overcomes the shortcomings of the existing algorithm for extracting the fundamental frequency component of the fault signal, and improves the performance of the relay protection device .

Description of drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following descriptions are given to the accompanying drawings of the embodiments of the present invention or the related technical solutions in the prior art. It should be understood that the drawings in the following introduction are only In order to facilitate and clearly express some embodiments of the technical solutions of the present invention, for those skilled in the art, other drawings can also be obtained from these drawings without creative work.

1 is a flow chart of steps of a method for filtering out attenuated DC components in a fault signal according to an embodiment of the present invention;

Fig. 2 is the vector schematic diagram of the rotation difference operation process in the embodiment of the present invention;

3 is a schematic diagram of the amplitude-frequency response characteristic of a method for filtering out attenuating DC components in a fault signal in a frequency range of 1 to 1000 Hz according to an embodiment of the present invention;

4 is a schematic diagram of a three-phase line current signal waveform before and after the fault signal is acquired in the embodiment of the present invention;

FIG. 5 is a comparison diagram of a result of extracting a fundamental frequency component by a method for filtering out an attenuated DC component in a fault signal according to an embodiment of the present invention and a result extracted by a full-wave DFT algorithm.

Detailed ways

The following describes in detail the embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary, only used to explain the present invention, and should not be construed as a limitation of the present invention. The numbers of the steps in the following embodiments are only set for the convenience of description, and the sequence between the steps is not limited in any way, and the execution sequence of each step in the embodiments can be adapted according to the understanding of those skilled in the art Sexual adjustment.

In the description of the present invention, it should be understood that the azimuth description, such as the azimuth or position relationship indicated by up, down, front, rear, left, right, etc., is based on the azimuth or position relationship shown in the drawings, only In order to facilitate the description of the present invention and simplify the description, it is not indicated or implied that the indicated device or element must have a particular orientation, be constructed and operated in a particular orientation, and therefore should not be construed as limiting the present invention.

In the description of the present invention, the meaning of several is one or more, the meaning of multiple is two or more, greater than, less than, exceeding, etc. are understood as not including this number, above, below, within, etc. are understood as including this number. If it is described that the first and the second are only for the purpose of distinguishing technical features, it cannot be understood as indicating or implying relative importance, or indicating the number of the indicated technical features or the order of the indicated technical features. relation.

In the description of the present invention, unless otherwise clearly defined, words such as setting, installation, connection should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above words in the present invention in combination with the specific content of the technical solution.

As shown in FIG. 1 , this embodiment provides a method for filtering out attenuated DC components in a fault signal, including the following steps:

S1. Acquire a discrete signal including a plurality of sampling points according to the fault signal.

In addition to the fundamental frequency component, the actual fault signal also includes various harmonics, attenuated DC components and DC offset components, so the fault signal can be expressed as:

In formula (8), A ₀ is the amplitude of the offset DC component, A _m is the amplitude of each integer harmonic, ω is the angular velocity, t is the time, θ _m is the initial phase angle of each integer harmonic, and D is The initial value of the attenuation DC component, α is the attenuation time constant.

S2. Obtain sampling data from the discrete signal, and perform discrete Fourier transform on the sampling data to obtain a DFT output phasor sequence.

从而得到DFT输出相量序列。For a discrete signal containing N+N _ex (N is the number of sampling points in a cycle, N _ex is a natural number greater than or equal to 2) sampling points, extract the [kΔt, T+(k-1)Δt] time window (T is Period, Δt is the sampling interval), the sampled data is subjected to discrete Fourier transform (DFT) to obtain the DFT output phasor

Thus, the DFT output phasor sequence is obtained.

The discrete Fourier transform (DFT) is performed on the sampled data in the time window [kΔt, T+(k-1)Δt], and the output phasor should be:

为DFT输出相量；

为

中包含的准确基频相量；

为

中由衰减直流分量造成的衰减直流相量；

为T时刻的DFT输出相量；

为

中包含的准确基频相量；

为

中由衰减直流分量造成的衰减直流相量；B₁为准确基频相量的幅值；θ₁为准确基频相量的初相角；j为虚数单位。In formula (9),

is the DFT output phasor;

for

The exact fundamental frequency phasor contained in ;

for

The attenuated DC phasor caused by the attenuated DC component in ;

is the DFT output phasor at time T;

for

The exact fundamental frequency phasor contained in ;

for

The attenuated DC phasor caused by the attenuated DC component in ; B ₁ is the amplitude of the accurate fundamental frequency phasor; θ ₁ is the initial phase angle of the accurate fundamental frequency phasor; j is the imaginary unit.

S3. Perform a rotational difference operation on the DFT output phasor sequence to obtain a rotational difference phasor sequence, and obtain a decay time constant according to the rotational difference phasor sequence.

进行旋转差分运算：Using DFT to output a phasor sequence

Perform a rotational difference operation:

为旋转差分相量；n为采样间隔数，其取值范围为1≤n≤N_ex-1。In formula (1)

is the rotating differential phasor; n is the number of sampling intervals, and its value range is 1≤n≤N _ex -1.

构建关于e^-αΔt的线性方程：Using formula (1), the rotation difference phasor sequence can be obtained

Construct a linear equation for e ^{- αΔt} :

Using the linear least squares solution, we get:

小于等于ε(ε为一极小正数)，则代表该衰减直流分量可忽略不计，在这种情况下衰减时间常数α应视为0；若

大于ε，衰减时间常数则可根据式(3)求得。综上，可得衰减时间常数α：In formula (3), if the cumulative term

Less than or equal to ε (ε is a very small positive number), it means that the attenuation DC component can be ignored, in this case the attenuation time constant α should be regarded as 0; if

If it is greater than ε, the decay time constant can be obtained according to formula (3). In summary, the decay time constant α can be obtained:

S4, according to the decay time constant, perform the decay difference operation on the DFT output phasor sequence to obtain the decay difference phasor sequence.

进行衰减差分运算：According to the solved decay time constant, use DFT to output the phasor sequence

Perform the attenuation difference operation:

为衰减差分相量。In formula (5)

is the attenuation differential phasor.

满足以下关系式：Using the above formula, the attenuation difference phasor sequence can be obtained

Satisfy the following relation:

S5. Construct a linear equation system according to the attenuation difference phasor sequence, and obtain an accurate fundamental frequency phasor after filtering out the attenuation DC component according to the linear equation system.

为DFT输出相量

中包含的准确基频相量。根据上式，利用衰减差分相量序列

可构建关于x₀和y₀的线性方程组：In the above formula (6),

output phasor for DFT

The exact fundamental frequency phasor contained in . According to the above formula, using the attenuation differential phasor sequence

A system of linear equations for x ₀ and y ₀ can be constructed:

和

分别代表

的实部与虚部(k＝n，n+1，n+2，...，N_ex)。求上述方程(7)的线性最小二乘解可得x₀和y₀，最后可得准确基频相量为

In the above equation (7),

and

Representing

The real and imaginary parts of (k=n, n+1, n+2, . . . , N _ex ). By solving the linear least squares solution of the above equation (7), x ₀ and y ₀ can be obtained, and finally the exact fundamental frequency phasor can be obtained as

及

衰减直流相量

及

的数学关系可由式(10)和式(11)表示：As shown in Figure 2, in the above formula (9), the accurate fundamental frequency phasor

and

Attenuated DC Phasor

and

The mathematical relationship of can be expressed by equations (10) and (11):

进行旋转差分运算：Using DFT to output a phasor sequence

Perform a rotational difference operation:

中的准确基频分量已被消去，故

应等于对两个间隔n个采样间隔的衰减直流相量

及

作旋转差分运算得到的结果，即：According to formula (9), formula (10) and formula (11),

The exact fundamental frequency component in the

should be equal to the decaying DC phasor for two intervals of n sampling intervals

and

The result obtained by the rotation difference operation is:

及

满足以下关系式：Therefore, according to equations (11) and (12), when n is constant, the two rotated differential phasors differ by one sampling interval

and

Satisfy the following relation:

According to equation (13), by changing the value of k and using multiple rotating differential phasors, the following set of overdetermined equations for solving the decay time constant α can be achieved:

According to equation (2), e ^-αΔt can be calculated from the following equation (3):

若小于等于ε(ε为一极小正数)，则代表该衰减直流分量可忽略不计，在这种情况下衰减时间常数α应视为0。若

大于ε，衰减时间常数则可根据式(3)求得。综上，可得衰减时间常数α：It is worth noting that the cumulative term in Eq. (3)

If it is less than or equal to ε (ε is a very small positive number), it means that the decaying DC component can be ignored, in this case, the decay time constant α should be regarded as 0. like

If it is greater than ε, the decay time constant can be obtained according to formula (3). In summary, the decay time constant α can be obtained:

Example 1

Define the model for the fault signal:

Among them, ω=2πf _f , and f _f is the fundamental frequency of 50Hz.

According to the fundamental wave frequency, the period T is 0.02s; if the sampling interval Δt is 0.0002s, the number of sampling points N in one period is 100. Taking Δt as an interval, starting from time t=0, the instantaneous value of the signal is obtained in a time window with a length of one cycle plus eight sampling points, and a 50Hz fundamental wave, 2 to 10 integer harmonics containing 108 instantaneous values can be obtained. And attenuated DC discrete signal, then N _ex =8.

S101. Obtain the DFT output phasor sequence

从而得到DFT输出相量序列如下：For the discrete signal containing 100+8 sampling points, extract the sampled data in the [kΔt, T+(k-1)Δt] time window and perform discrete Fourier transform (DFT) to obtain the DFT output phasor

Thus, the DFT output phasor sequence is obtained as follows:

S102, solve the decay time constant α.

进行旋转差分运算：Take n=4, output the phasor sequence to the DFT

Perform a rotational difference operation:

如下：Find the Rotation Difference Phasor Sequence

as follows:

代入方程(2)：will rotate the differential phasor sequence

Substitute into equation (2):

大于ε(ε为一极小正数)，通过求解上述方程，可求出

故

because

greater than ε (ε is a very small positive number), by solving the above equation, we can find

Therefore

S103. Solve the accurate fundamental frequency phasor

进行衰减差分运算：According to the obtained decay time constant α=25, use DFT to output the phasor sequence

Perform the attenuation difference operation:

如下：Using the above formula, the attenuation difference phasor sequence can be obtained

as follows:

Taking n=4, according to formula (6), we can get:

根据上式，利用衰减差分相量序列，可构建关于x₀和y₀的线性方程组：Depend on

According to the above equation, using the decaying difference phasor sequence, a linear system of equations for x ₀ and y ₀ can be constructed:

The linear least squares solution of the above equation can be obtained as x ₀ =86.6025 and y ₀ =50.0000, and finally the exact fundamental frequency phasor can be obtained as

Example 2

Define the model for the fault signal:

f _h (h, t)=10+100*cos(2π*h*t)+80*e ^-25t

where h=1, 2, 3, . . . , 1000.

According to the fundamental frequency of 50Hz, the period T is 0.02s; if the sampling interval Δt is 0.0002s, the number of sampling points N in one cycle is 100. Taking Δt as an interval, h takes values 1, 2, 3, ..., 1000 in sequence, and starting from time t=0, the signal f _h (h, t) is acquired in a time window with a length of one cycle plus 10 sampling points The instantaneous value of 1000 discrete signals each containing 110 instantaneous values can be obtained.

Using the above discrete signal, take N _ex = 10, n = 5 to analyze the amplitude-frequency characteristic of the method, and the result is shown in Fig. 3 . Figure 3 shows the amplitude-frequency response characteristics of the method in the frequency band from 1 to 1000 Hz under the condition of N _ex = 10 and n = 5. The abscissa represents the frequency in Hz, and the ordinate represents the amplitude of the response.

It can be seen from Fig. 3 that the response of the method in this embodiment to each integer harmonic signal in the 1000 Hz frequency band is 0; and the response to the interharmonic signal in the 200 to 1000 Hz frequency band is lower than 3.5%; for the 100 to 200 Hz frequency band Interharmonic signals also have a lower response. This shows that this method has a good inhibitory effect on interharmonics.

Example 3

Use PSCAD/EMTDC to build a 50Hz transmission line model, set a three-phase ground fault at 1/4 of the length of the line when the simulation time is 1.0 seconds (s), and obtain the three-phase line current signal waveforms before and after the fault as shown in Figure 4:

In Figure 4, the blue curve is the A-phase line current waveform, the red curve is the B-phase line current waveform, and the black curve is the C-phase line current waveform; the horizontal axis represents the time, in seconds (s), and the first two faults are extracted. Waveform of six cycles (0.12s) after the cycle plus four cycles after the fault; the vertical axis represents the instantaneous value of the current, and the unit is kiloampere (kA).

Taking the sampling interval Δt as 0.0002s, sampling the three-phase line current signals in four cycles of the simulation time from 1.0s to 1.08s to obtain three discrete current signals each containing 400 instantaneous values; using these three discrete currents Signal, respectively take N _ex = 4, 5, 6,..., 300, and the value of n is the smaller value between the value of the corresponding N _ex divided by two and rounded down and 50, using this method for the above The fundamental frequency component is extracted from the discrete signal, and the extraction result is compared with the extraction result of the same signal by the full-wave DFT algorithm. The result is shown in Figure 5.

In Fig. 5, the horizontal axis is the size of N _ex , and the vertical axis is the modulus value of the fundamental frequency component, and the unit is kA. The blue, red and black solid lines represent the modulo values of the current fundamental frequency components of the three-phase A, B and C extracted by this method respectively; the blue, red and black dotted lines represent the extraction using the full-wave DFT algorithm. The modulus values of the current fundamental frequency components of the A, B, and C three-phase components; the blue, red, and black dotted lines represent the exact modulus values of the current fundamental frequency components of the A, B, and C three-phase components, respectively.

It can be seen from the comparison results in Fig. 5 that, compared with the full-wave DFT algorithm, the method of this embodiment greatly improves the extraction accuracy of the fundamental frequency component of the fault current signal, and the accurate fundamental frequency component amplitude can be obtained by using a shorter data window.

This embodiment also provides a system for filtering out attenuated DC components in fault signals, including:

The sampling module is used to obtain discrete signals including multiple sampling points according to the fault signal;

a transformation module, configured to obtain sampled data from the discrete signal, perform discrete Fourier transform on the sampled data, and obtain a DFT output phasor sequence;

a difference solving module, configured to perform a rotational difference operation on the DFT output phasor sequence to obtain a rotational difference phasor sequence, and obtain a decay time constant according to the rotational difference phasor sequence;

An attenuation solving module, configured to perform an attenuation differential operation on the DFT output phasor sequence according to the attenuation time constant to obtain an attenuation differential phasor sequence;

The equation solving module is used for constructing a linear equation system according to the attenuation difference phasor sequence, and obtaining an accurate fundamental frequency phasor after filtering out the attenuation DC component according to the linear equation system.

The system for filtering out the attenuated DC component in the fault signal in this embodiment can execute the method for filtering the attenuated DC component in the fault signal provided by the method embodiment of the present invention, and can execute any combination of the implementation steps of the method embodiment. , with the corresponding functions and beneficial effects of the method.

This embodiment also provides a device for filtering out the attenuated DC component in the fault signal, including:

at least one processor;

at least one memory for storing at least one program;

When the at least one program is executed by the at least one processor, the at least one processor implements the method shown in FIG. 1 .

A device for filtering out an attenuated DC component in a fault signal in this embodiment can perform the method for filtering out an attenuated DC component in a fault signal provided by the method embodiment of the present invention, and can perform any combination of implementation steps in the method embodiment. , with the corresponding functions and beneficial effects of the method.

Embodiments of the present application further disclose a computer program product or computer program, where the computer program product or computer program includes computer instructions, and the computer instructions are stored in a computer-readable storage medium. The processor of the computer device can read the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions to cause the computer device to perform the method shown in FIG. 1 .

This embodiment also provides a storage medium, which stores an instruction or a program that can execute a method for filtering out the attenuation DC component in a fault signal provided by the method embodiment of the present invention. When the instruction or program is executed, the instruction or program can be executed. Any combination of implementation steps of the method embodiments has the corresponding functions and beneficial effects of the method.

In some alternative implementations, the functions/operations noted in the block diagrams may occur out of the order noted in the operational diagrams. For example, two blocks shown in succession may, in fact, be executed substantially concurrently or the blocks may sometimes be executed in the reverse order, depending upon the functionality/operations involved. Furthermore, the embodiments presented and described in the flowcharts of the present invention are provided by way of example in order to provide a more comprehensive understanding of the technology. The disclosed methods are not limited to the operations and logic flows presented herein. Alternative embodiments are contemplated in which the order of various operations is altered and in which sub-operations described as part of larger operations are performed independently.

Furthermore, although the invention has been described in the context of functional modules, it is to be understood that, unless stated to the contrary, one or more of the described functions and/or features may be integrated in a single physical device and/or or software modules, or one or more functions and/or features may be implemented in separate physical devices or software modules. It will also be appreciated that a detailed discussion of the actual implementation of each module is not necessary to understand the present invention. Rather, given the attributes, functions, and internal relationships of the various functional modules in the apparatus disclosed herein, the actual implementation of such modules will be within the routine skill of the engineer. Accordingly, those skilled in the art, using ordinary skill, can implement the invention as set forth in the claims without undue experimentation. It is also to be understood that the specific concepts disclosed are illustrative only and are not intended to limit the scope of the invention, which is to be determined by the appended claims along with their full scope of equivalents.

The functions, if implemented in the form of software functional units and sold or used as independent products, may be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the present invention can be embodied in the form of a software product in essence, or the part that contributes to the prior art or the part of the technical solution. The computer software product is stored in a storage medium, including Several instructions are used to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes: U disk, removable hard disk, Read-Only Memory (ROM, Read-Only Memory), Random Access Memory (RAM, Random Access Memory), magnetic disk or optical disk and other media that can store program codes .

The logic and/or steps represented in flowcharts or otherwise described herein, for example, may be considered an ordered listing of executable instructions for implementing the logical functions, may be embodied in any computer-readable medium, For use with, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a system including a processor, or other system that can fetch instructions from and execute instructions from an instruction execution system, apparatus, or apparatus) or equipment. For the purposes of this specification, a "computer-readable medium" can be any device that can contain, store, communicate, propagate, or transport the program for use by or in connection with an instruction execution system, apparatus, or apparatus.

More specific examples (non-exhaustive list) of computer readable media include the following: electrical connections with one or more wiring (electronic devices), portable computer disk cartridges (magnetic devices), random access memory (RAM), Read Only Memory (ROM), Erasable Editable Read Only Memory (EPROM or Flash Memory), Fiber Optic Devices, and Portable Compact Disc Read Only Memory (CDROM). In addition, the computer readable medium may even be paper or other suitable medium on which the program may be printed, as the paper or other medium may be optically scanned, for example, followed by editing, interpretation, or other suitable medium as necessary process to obtain the program electronically and then store it in computer memory.

It should be understood that various parts of the present invention may be implemented in hardware, software, firmware or a combination thereof. In the above-described embodiments, various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented by any one or a combination of the following techniques known in the art: Discrete logic circuits, application specific integrated circuits with suitable combinational logic gates, Programmable Gate Arrays (PGA), Field Programmable Gate Arrays (FPGA), etc.

In the above description of the present specification, reference to the description of the terms "one embodiment/example", "another embodiment/example" or "certain embodiments/examples" etc. means the description in conjunction with the embodiment or example. Particular features, structures, materials, or characteristics are included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

Although embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that various changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, The scope of the invention is defined by the claims and their equivalents.

The above is a specific description of the preferred implementation of the present invention, but the present invention is not limited to the above-mentioned embodiments, and those skilled in the art can also make various equivalent deformations or replacements under the premise of not violating the spirit of the present invention. Equivalent modifications or substitutions are included within the scope defined by the claims of the present application.

Claims (8)

1. a method for filtering out the attenuation DC component in the fault signal, is characterized in that, comprises the following steps: Obtain a discrete signal containing multiple sampling points according to the fault signal; Obtain sampled data from the discrete signal, perform discrete Fourier transform on the sampled data, and obtain a DFT output phasor sequence; performing a rotation difference operation on the DFT output phasor sequence to obtain a rotation difference phasor sequence, and obtaining a decay time constant according to the rotation difference phasor sequence; According to the decay time constant, an attenuation difference operation is performed on the DFT output phasor sequence to obtain an attenuation difference phasor sequence; Construct a linear equation system according to the attenuation difference phasor sequence, and obtain an accurate fundamental frequency phasor after filtering out the attenuation DC component according to the linear equation system; The rotation difference operation is performed on the DFT output phasor sequence using the following formula:

in,

is the rotating differential phasor sequence; Δt is the sampling interval; n is the number of sampling intervals, and its value range is 1≤n≤N _ex -1; The obtaining of the decay time constant α according to the rotated differential phasor sequence includes: A linear equation for e ^{- αΔt} is constructed using the rotated difference phasor sequence:

Using the linear least squares solution, we get:

If the cumulative term

is less than or equal to ε, which means that the decaying DC component can be ignored. In this case, the decay time constant α should be regarded as 0; if

greater than ε, the decay time constant can be obtained according to formula (3); The decay time constant α is:

Among them, ε is a very small positive number. 2. the method for attenuating direct current component in a kind of filtering fault signal according to claim 1, is characterized in that, the number of described sampling points is N+N _ex , N is the number of sampling points in a cycle, N _ex is a natural number greater than or equal to 2; The acquiring sampling data from the discrete signal includes: The sampled data in the [kΔt, T+(k-1)Δt] time window is extracted from the discrete signal; wherein, T is the period of the fault signal, and Δt is the sampling interval. 3. a kind of method for attenuating DC component in filtering fault signal according to claim 1, is characterized in that, adopts following formula to carry out attenuation difference operation to described DFT output phasor sequence:

in,

is the attenuation differential phasor; Using Equation (5), the attenuation differential phasor sequence can be obtained

Satisfy the following relation:

in,

is the accurate fundamental frequency phasor, x ₀ is the real part of the accurate fundamental frequency phasor, and y ₀ is the imaginary part of the accurate fundamental frequency phasor;

output phasor for DFT

The exact fundamental frequency phasor contained in , according to Equation (6), using the sequence of attenuated differential phasors

A system of linear equations for x ₀ and y ₀ can be constructed:

in,

and

Representing

The real and imaginary parts of . 4. The method for filtering out an attenuated DC component in a fault signal according to claim 1, wherein the fault signal comprises a fundamental frequency component, an integer harmonic, an attenuated DC component and a DC offset component; The expression of the fault signal is:

Among them, A ₀ is the amplitude of the offset DC component, A _m is the amplitude of each integer harmonic, ω is the angular velocity, t is the time, θ _m is the initial phase angle of each integer harmonic, and D is the initial phase angle of the attenuated DC component value, α is the decay time constant. 5. The method for filtering out the attenuated DC component in the fault signal according to claim 1, wherein the discrete Fourier transform is performed on the sampled data, and the obtained output is:

in,

is the DFT output phasor;

for

The exact fundamental frequency phasor contained in ;

for

The attenuated DC phasor caused by the attenuated DC component in ;

is the DFT output phasor at time T;

for

The exact fundamental frequency phasor contained in ;

for

_The attenuated DC _phasor caused by the attenuated DC component in the N is the number of sampling points included in one cycle, and T is the cycle of the fault signal. 6. A system for filtering out attenuated DC components in fault signals, comprising: The sampling module is used to obtain discrete signals including multiple sampling points according to the fault signal; a transformation module, configured to obtain sampled data from the discrete signal, perform discrete Fourier transform on the sampled data, and obtain a DFT output phasor sequence; a difference solving module, configured to perform a rotational difference operation on the DFT output phasor sequence to obtain a rotational difference phasor sequence, and obtain a decay time constant according to the rotational difference phasor sequence; An attenuation solving module, configured to perform an attenuation differential operation on the DFT output phasor sequence according to the attenuation time constant to obtain an attenuation differential phasor sequence; an equation solving module for constructing a linear equation system according to the attenuation differential phasor sequence, and obtaining an accurate fundamental frequency phasor after filtering out the attenuation DC component according to the linear equation system; The rotation difference operation is performed on the DFT output phasor sequence using the following formula:

in,

is the rotating differential phasor sequence; n is the number of sampling intervals, and its value range is 1≤n≤N _ex -1; The obtaining of the decay time constant α according to the rotated differential phasor sequence includes: A linear equation for e ^{- αΔt} is constructed using the rotated difference phasor sequence:

Using the linear least squares solution, we get:

If the cumulative term

is less than or equal to ε, which means that the decaying DC component can be ignored. In this case, the decay time constant α should be regarded as 0; if

greater than ε, the decay time constant can be obtained according to formula (3); The decay time constant α is:

Among them, ε is a very small positive number. 7. A device for filtering out attenuating DC components in a fault signal, comprising: at least one processor; at least one memory for storing at least one program; When the at least one program is executed by the at least one processor, the at least one processor implements the method of any one of claims 1-5. 8. A storage medium storing a program executable by a processor, wherein the program executable by the processor is used to execute the method according to any one of claims 1-5 when executed by the processor .

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