CN112993033B - GaN device structure and preparation method thereof - Google Patents
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Abstract
本发明提供一种GaN器件结构及其制备方法,制备包括:提供衬底;制备外延结构、辅助功能部以及器件电极,所述辅助功能结构包括若干个叠置的且为p型掺杂层的辅助单元层,辅助掺杂层的掺杂浓度自下层至上层逐渐增加。通过引入多层p型掺杂且浓度渐变的辅助功能部,辅助功能部同时作为器件的帽层结构,可以使得当栅极电压不断增加时,空穴开始注入沟道并产生相等数量的电子,从而增加2DEG。具有高迁移率的电子将在电场的作用下到达漏极,而空穴将保留,因为它们的迁移率远低于电子,从而电流通过注入的空穴数量进行调制,可以在跨导曲线中显示一个双峰,有效改善器件的线性度。
The invention provides a GaN device structure and a preparation method thereof. The preparation includes: providing a substrate; preparing an epitaxial structure, an auxiliary function part and a device electrode, wherein the auxiliary function structure includes a plurality of stacked p-type doped layers. For the auxiliary unit layer, the doping concentration of the auxiliary doping layer gradually increases from the lower layer to the upper layer. By introducing multi-layer p-type doped auxiliary functional parts with graded concentration, the auxiliary functional parts also serve as the cap layer structure of the device, so that when the gate voltage is continuously increased, holes start to be injected into the channel and an equal number of electrons are generated, Thereby increasing 2DEG. Electrons with high mobility will reach the drain under the action of the electric field, while holes will remain because their mobility is much lower than electrons, so the current is modulated by the number of holes injected, which can be shown in the transconductance curve A double peak, effectively improving the linearity of the device.
Description
技术领域technical field
本发明属于集成电路制造技术领域,特别是涉及一种GaN器件结构及其制备方法。The invention belongs to the technical field of integrated circuit manufacturing, and in particular relates to a GaN device structure and a preparation method thereof.
背景技术Background technique
GaN材料的研究与应用是目前全球半导体研究的前沿和热点,是研制微电子器件、光电子器件的新型半导体材料,被誉为是继第一代Ge、Si半导体材料、第二代GaAs、InP化合物半导体材料之后的第三代半导体材料。它具有宽的直接带隙、强的原子键、高的热导率、化学稳定性好(几乎不被任何酸腐蚀)等性质和强的抗辐照能力。The research and application of GaN materials is currently the frontier and hotspot of global semiconductor research. It is a new type of semiconductor material for the development of microelectronic devices and optoelectronic devices. The third generation of semiconductor materials after semiconductor materials. It has the properties of wide direct band gap, strong atomic bond, high thermal conductivity, good chemical stability (hardly corroded by any acid) and strong radiation resistance.
然而,GaN器件由于其材料、器件结构本身特性,在工作时存在预失真非线性化问题。具体的问题是,扩展GaN HEMT功率输出频段到亚毫米波的研究受到短沟道器件非线性的限制,即频率fT(或跨导gm)在高漏压(高栅压)下随偏压升高迅速下降,从而限制了器件在高压下的高速工作特性,并使最大电流密度显著低于理论预测值。However, the GaN device has the problem of predistortion nonlinearity during operation due to its material and the characteristics of the device structure. The specific problem is that the research on extending the power output band of GaN HEMTs to submillimeter waves is limited by the nonlinearity of short-channel devices, that is, the frequency fT (or transconductance gm) increases with the bias voltage at high drain voltage (high gate voltage) high drop rapidly, thus limiting the high-speed operation characteristics of the device at high voltage and making the maximum current density significantly lower than the theoretical prediction.
因此,如何提供一种GaN器件结构及其制备方法以解决上述问题实属必要。Therefore, it is necessary to provide a GaN device structure and a preparation method thereof to solve the above problems.
发明内容SUMMARY OF THE INVENTION
鉴于以上所述现有技术的缺点,本发明的目的在于提供一种GaN器件结构及其制备方法,用于解决现有技术中GaN器件存在预失真非线性化问题,起线性难以有效优化等问题。In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a GaN device structure and a preparation method thereof, which are used to solve the problems of predistortion nonlinearity in the GaN device in the prior art, and it is difficult to effectively optimize the linearity. .
为实现上述目的及其他相关目的,本发明提供一种GaN器件结构的制备方法,所述制备方法包括如下步骤:In order to achieve the above object and other related objects, the present invention provides a preparation method of a GaN device structure, and the preparation method includes the following steps:
提供衬底;provide a substrate;
在所述衬底上形成外延结构,至少包括自下而上设置的GaN沟道层和势垒层;forming an epitaxial structure on the substrate, at least including a GaN channel layer and a barrier layer arranged from bottom to top;
在所述外延结构上形成辅助功能结构,所述辅助功能结构包括若干个叠置的且为p型掺杂层的辅助单元层,所述辅助掺杂层的掺杂浓度自下层至上层逐渐增加;An auxiliary functional structure is formed on the epitaxial structure, and the auxiliary functional structure includes several superimposed auxiliary unit layers which are p-type doped layers, and the doping concentration of the auxiliary doped layers gradually increases from the lower layer to the upper layer ;
在所述辅助功能结构表面定义出栅极区,并刻蚀去除所述栅极区外围的部分所述辅助功能结构至所述势垒层,得到与所述栅极区对应的辅助功能部;A gate region is defined on the surface of the auxiliary function structure, and part of the auxiliary function structure at the periphery of the gate region is etched and removed to the barrier layer to obtain an auxiliary function portion corresponding to the gate region;
制备源极电极、漏极电极和与所述栅极区对应的栅极电极,以得到所述GaN器件结构。A source electrode, a drain electrode, and a gate electrode corresponding to the gate region are prepared to obtain the GaN device structure.
可选地,所述辅助功能结构包括AlGaN功能结构及GaN功能结构中的任意一种,其中,当包括所述AlGaN功能结构时,所述AlGaN功能结构包括若干个AlGaN单元层,作为所述辅助单元层;当包括所述GaN功能结构时,所述GaN功能结构包括若干个GaN单元层,作为所述辅助单元层。Optionally, the auxiliary functional structure includes any one of an AlGaN functional structure and a GaN functional structure, wherein, when the AlGaN functional structure is included, the AlGaN functional structure includes several AlGaN unit layers as the auxiliary unit layer; when the GaN functional structure is included, the GaN functional structure includes several GaN unit layers as the auxiliary unit layers.
可选地,当所述辅助功能结构选择为所述AlGaN功能结构时,所述制备方法还包括步骤:在所述AlGaN功能结构与所述势垒层之间形成GaN插入层,且形成所述辅助功能部时还去除对应的所述GaN插入层。Optionally, when the auxiliary functional structure is selected as the AlGaN functional structure, the preparation method further includes the steps of: forming a GaN insertion layer between the AlGaN functional structure and the barrier layer, and forming the AlGaN functional structure. When assisting the functional part, the corresponding GaN insertion layer is also removed.
可选地,所述辅助单元层的层数为n层,自下而上分别为第1层至第n层,n为大于等于2的整数,其中,每层所述辅助单元层的掺杂浓度介于(0.8-1.2)n*1018/cm3之间,且所述辅助功能结构的总掺杂浓度介于1018/cm3-1019/cm3之间,总厚度介于10nm-100nm之间。Optionally, the number of layers of the auxiliary unit layer is n layers, the first layer to the nth layer from bottom to top, n is an integer greater than or equal to 2, wherein the doping of each layer of the auxiliary unit layer is The concentration is between (0.8-1.2)n*10 18 /cm 3 , and the total doping concentration of the auxiliary functional structure is between 10 18 /cm 3 -10 19 /cm 3 , and the total thickness is between 10nm -100nm.
可选地,在所述外延结构表面定义所述栅极区的步骤包括:在所述外延结构表面形成ITO材料层,利用光刻工艺在所述ITO材料层中定义出所述栅极区,并去除所述栅极区周围的所述ITO材料层,并以所述栅极区的所述ITO材料层作为形成所述辅助功能部的掩膜版。Optionally, the step of defining the gate region on the surface of the epitaxial structure includes: forming an ITO material layer on the surface of the epitaxial structure, and using a photolithography process to define the gate region in the ITO material layer, and removing the ITO material layer around the gate region, and using the ITO material layer in the gate region as a mask for forming the auxiliary function portion.
可选地,刻蚀去除所述栅极区外围的部分所述辅助功能结构的方式包括:采用氧化结合湿法刻蚀的方式进行刻蚀。Optionally, the method for removing part of the auxiliary functional structure at the periphery of the gate region by etching includes: performing etching by using a method of oxidation combined with wet etching.
可选地,所述辅助功能部的纵截面形状为梯形,制备梯形的所述辅助功能部的方式为:在所述辅助功能结构上制备梯形掩膜版,并基于所述梯形掩膜版进行刻蚀,以将所述梯形掩膜版的图形转移到所述辅助功能结构上,得到所述辅助功能部。Optionally, the longitudinal cross-sectional shape of the auxiliary function part is a trapezoid, and the method of preparing the trapezoidal auxiliary function part is as follows: preparing a trapezoidal mask on the auxiliary function structure, and performing the process based on the trapezoidal mask. Etching is performed to transfer the pattern of the trapezoidal mask to the auxiliary function structure to obtain the auxiliary function part.
可选地,形成所述梯形掩膜版的方式为:在所述辅助功能结构上形成掩膜材料层;采用电子束曝光技术进行曝光,其中,曝光剂量自所述栅极区至两侧逐渐增加;对曝光后的结构进行显影得到台阶式掩膜版;对所述台阶式掩膜版进行回火,得到所述梯形掩膜版。Optionally, the method of forming the trapezoidal mask is: forming a mask material layer on the auxiliary function structure; using electron beam exposure technology for exposure, wherein the exposure dose is gradually increased from the gate area to both sides. increase; developing the exposed structure to obtain a stepped mask; tempering the stepped mask to obtain the trapezoidal mask.
另外,本发明还提供一种GaN器件结构,所述GaN器件结构优选采用本发明的制备方法制备得到,当然,也还可以采用其他方法制备,其中,所述GaN器件结构包括:In addition, the present invention also provides a GaN device structure. The GaN device structure is preferably prepared by the preparation method of the present invention. Of course, other methods can also be used to prepare the GaN device structure, wherein the GaN device structure includes:
衬底;substrate;
外延结构,形成在所述衬底上,至少包括自下而上设置的GaN沟道层和势垒层;an epitaxial structure, formed on the substrate, at least including a GaN channel layer and a barrier layer arranged from bottom to top;
辅助功能部,表面定义有栅极区,所述辅助功能部对应所述栅极区形成在所述外延结构上,其中,所述辅助功能结构包括若干个叠置的且为p型掺杂层的辅助单元层,所述辅助掺杂层的掺杂浓度自下层至上层逐渐增加;an auxiliary function part, a gate region is defined on the surface, the auxiliary function part is formed on the epitaxial structure corresponding to the gate region, wherein the auxiliary function structure includes a plurality of stacked p-type doped layers The auxiliary unit layer, the doping concentration of the auxiliary doping layer gradually increases from the lower layer to the upper layer;
源极电极、漏极电极和栅极电极,形成在所述外延结构上,且所述栅极电极与所述栅极区相对应,所述源极电极和所述漏极电极位于所述辅助功能部外围。A source electrode, a drain electrode and a gate electrode are formed on the epitaxial structure, and the gate electrode corresponds to the gate region, and the source electrode and the drain electrode are located on the auxiliary peripheral function.
可选地,所述辅助功能结构包括AlGaN功能结构及GaN功能结构中的任意一种,其中,当包括所述AlGaN功能结构时,所述AlGaN功能结构包括若干个AlGaN单元层,作为所述辅助单元层;当包括所述GaN功能结构时,所述GaN功能结构包括若干个GaN单元层,作为所述辅助单元层。Optionally, the auxiliary functional structure includes any one of an AlGaN functional structure and a GaN functional structure, wherein, when the AlGaN functional structure is included, the AlGaN functional structure includes several AlGaN unit layers as the auxiliary unit layer; when the GaN functional structure is included, the GaN functional structure includes several GaN unit layers as the auxiliary unit layers.
可选地,所述辅助单元层的层数为n层,且自下而上分别为第1层至第n层,n为大于等于2的整数,其中,每层所述辅助单元层的掺杂浓度介于(0.8-1.2)n*1018/cm3之间,且所述辅助功能结构的总掺杂浓度介于1018/cm3-1019/cm3之间,总厚度介于10nm-100nm之间。Optionally, the number of layers of the auxiliary unit layer is n layers, and the layers are from the first layer to the nth layer from bottom to top, and n is an integer greater than or equal to 2, wherein the doping amount of each layer of the auxiliary unit layer is The impurity concentration is between (0.8-1.2)n*10 18 /cm 3 , and the total doping concentration of the auxiliary functional structure is between 10 18 /cm 3 -10 19 /cm 3 , and the total thickness is between Between 10nm-100nm.
可选地,所述辅助功能部的纵截面形状为梯形。Optionally, the longitudinal cross-sectional shape of the auxiliary function part is a trapezoid.
如上所述,本发明的GaN器件结构及其制备方法,通过引入多层p型掺杂且浓度渐变的辅助功能部,辅助功能部同时作为器件的帽层结构,可以使得当栅极电压不断增加时,空穴开始注入沟道并产生相等数量的电子,从而增加2DEG。具有高迁移率的电子将在电场的作用下到达漏极,而空穴将保留,因为它们的迁移率远低于电子,从而电流通过注入的空穴数量进行调制,可以在跨导曲线中显示一个双峰,有效改善器件的线性度。另外,本发明还基于空穴注入引入了梯形设计,进一步改善了器件的线性度。As described above, in the GaN device structure and its preparation method of the present invention, by introducing multi-layer p-type doping and concentration-graded auxiliary functional parts, the auxiliary functional parts simultaneously serve as the cap layer structure of the device, so that when the gate voltage is continuously increased , holes start to inject into the channel and generate an equal number of electrons, thereby increasing the 2DEG. Electrons with high mobility will reach the drain under the action of the electric field, while holes will remain because their mobility is much lower than electrons, so the current is modulated by the number of holes injected, which can be shown in the transconductance curve A double peak, effectively improving the linearity of the device. In addition, the present invention also introduces a trapezoidal design based on hole injection, which further improves the linearity of the device.
附图说明Description of drawings
图1显示为本发明提供的GaN器件结构制备的流程图。FIG. 1 shows a flow chart of the fabrication of the GaN device structure provided by the present invention.
图2-8显示为本发明提供的GaN器件结构制备中各步骤得到结构的示意图。2-8 are schematic diagrams showing the structures obtained by each step in the preparation of the GaN device structure provided by the present invention.
图9显示为基于多层渐变的辅助功能结构设计得到的GaN器件的仿真曲线。Figure 9 shows the simulation curves of a GaN device designed for a multi-layer graded-based secondary function structure.
图10显示为基于单一掺杂的辅助功能结构设计得到的GaN器件的仿真曲线。Figure 10 shows simulation curves for a GaN device designed for a singly doped secondary function structure.
图11显示为方形纵截面和梯形纵截面的辅助功能部设计得到的GaN器件的仿真曲线。FIG. 11 shows simulation curves of GaN devices designed for auxiliary function sections of square longitudinal section and trapezoidal longitudinal section.
图12-14显示为本发明一示例GaN器件结构制备中形成梯形掩膜版各步骤结构示意图。12-14 are schematic diagrams showing the steps of forming a ladder mask in the fabrication of an exemplary GaN device structure of the present invention.
元件标号说明Component label description
101 衬底101 Substrate
102 缓冲层102 Buffer layer
103 GaN功能层103 GaN functional layer
104 势垒层104 Barrier layer
105 辅助功能结构105 Accessibility structure
106 ITO结构106 ITO structure
107 辅助功能部107 Accessibility Department
108 源极电极108 Source electrode
109 漏极电极109 Drain electrode
110 栅极电极110 Gate electrode
S1~S5 步骤S1~S5 steps
具体实施方式Detailed ways
以下通过特定的具体实例说明本发明的实施方式,本领域技术人员可由本说明书所揭露的内容轻易地了解本发明的其他优点与功效。本发明还可以通过另外不同的具体实施方式加以实施或应用,本说明书中的各项细节也可以基于不同观点与应用,在没有背离本发明的精神下进行各种修饰或改变。The embodiments of the present invention are described below through specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
如在详述本发明实施例时,为便于说明,表示器件结构的剖面图会不依一般比例作局部放大,而且所述示意图只是示例,其在此不应限制本发明保护的范围。此外,在实际制作中应包含长度、宽度及深度的三维空间尺寸。When describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional views showing the device structure will not be partially enlarged according to the general scale, and the schematic diagrams are only examples, which should not limit the protection scope of the present invention. In addition, the three-dimensional spatial dimensions of length, width and depth should be included in the actual production.
为了方便描述,此处可能使用诸如“之下”、“下方”、“低于”、“下面”、“上方”、“上”等的空间关系词语来描述附图中所示的一个元件或特征与其他元件或特征的关系。将理解到,这些空间关系词语意图包含使用中或操作中的器件的、除了附图中描绘的方向之外的其他方向。此外,当一层被称为在两层“之间”时,它可以是所述两层之间仅有的层,或者也可以存在一个或多个介于其间的层。另外,本发明中使用的“介于……之间”包括两个端点值。For convenience of description, spatially relative terms such as "below," "below," "below," "below," "above," "on," etc. may be used herein to describe an element shown in the figures or The relationship of a feature to other components or features. It will be understood that these spatially relative terms are intended to encompass other directions of the device in use or operation than those depicted in the figures. In addition, when a layer is referred to as being 'between' two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present. Additionally, "between" as used in the present invention includes both endpoints.
在本申请的上下文中,所描述的第一特征在第二特征“之上”的结构可以包括第一和第二特征形成为直接接触的实施例,也可以包括另外的特征形成在第一和第二特征之间的实施例,这样第一和第二特征可能不是直接接触。In the context of this application, descriptions of structures where a first feature is "on" a second feature can include embodiments in which the first and second features are formed in direct contact, and can also include further features formed over the first and second features. Embodiments between the second features such that the first and second features may not be in direct contact.
需要说明的是,本实施例中所提供的图示仅以示意方式说明本发明的基本构想,遂图示中仅显示与本发明中有关的组件而非按照实际实施时的组件数目、形状及尺寸绘制,其实际实施时各组件的型态、数量及比例可为一种随意的改变,其组件布局型态也可能更为复杂。It should be noted that the diagrams provided in this embodiment are only to illustrate the basic concept of the present invention in a schematic way, so the diagrams only show the components related to the present invention rather than the number, shape and the number of components in the actual implementation. For dimension drawing, the type, quantity and proportion of each component can be arbitrarily changed in actual implementation, and the component layout may also be more complicated.
如图1所示,本发明提供一种GaN器件结构的制备方法,所述制备方法包括如下步骤:As shown in FIG. 1, the present invention provides a preparation method of a GaN device structure, and the preparation method includes the following steps:
S1,提供衬底;S1, provide the substrate;
S2,在所述衬底上形成外延结构,至少包括自下而上设置的GaN沟道层和势垒层;S2, forming an epitaxial structure on the substrate, including at least a GaN channel layer and a barrier layer arranged from bottom to top;
S3,在所述外延结构上形成辅助功能结构,所述辅助功能结构包括若干个叠置的且为p型掺杂层的辅助单元层,所述辅助掺杂层的掺杂浓度自下层至上层逐渐增加;S3, forming an auxiliary function structure on the epitaxial structure, the auxiliary function structure including a plurality of superimposed auxiliary unit layers which are p-type doped layers, and the doping concentration of the auxiliary doped layers is from the lower layer to the upper layer gradually increase;
S4,在所述辅助功能结构表面定义出栅极区,并刻蚀去除所述栅极区外围的部分所述辅助功能结构至所述势垒层,得到与所述栅极区对应的辅助功能部;S4, define a gate region on the surface of the auxiliary function structure, and etch and remove part of the auxiliary function structure around the gate region to the barrier layer to obtain auxiliary functions corresponding to the gate region department;
S5,制备源极电极、漏极电极和与栅极区对应的栅极电极,以得到所述GaN器件结构。S5, preparing a source electrode, a drain electrode and a gate electrode corresponding to the gate region to obtain the GaN device structure.
下面将结合附图详细说明本发明的GaN器件结构的制备方法,其中,需要说明的是,上述顺序并不严格代表本发明所保护的GaN器件结构的制备顺序,本领域技术人员可以依据实际工艺步骤进行改变,图1仅示出了本发明一种示例中的GaN器件结构的制备步骤。The preparation method of the GaN device structure of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that the above sequence does not strictly represent the preparation sequence of the GaN device structure protected by the present invention, and those skilled in the art can refer to the actual process. The steps are changed, and FIG. 1 only shows the fabrication steps of the GaN device structure in one example of the present invention.
首先,如图1中的S1及图2所示,进行步骤S1,提供衬底101。First, as shown in S1 and FIG. 2 in FIG. 1 , step S1 is performed to provide a
具体的,所述衬底101可以为硅(Si)衬底、锗(Ge)衬底、锗化硅(SiGe)衬底、SOI衬底或GOI(Germanium-on-Insulator,绝缘体上锗)衬底、SiC衬底、蓝宝石(Sapphire)衬底、GaN衬底等,优选为SiC、GaN、Sapphire、Si衬底。在其它示例中,所述衬底101还可以为包括其他半导体元素或化合物的衬底,例如砷化镓、磷化铟或碳化硅等,所述衬底101还可以为叠层结构,例如硅/锗硅叠层等,本实施例中,所述衬底101为Si(111)衬底,利用硅作为衬底,可在大尺寸晶圆上实现GaN材料的异质外延,节省了单位尺寸外延成本。Specifically, the
接着,如图1中的S2及图4所示,进行步骤S2,在所述衬底101上形成外延结构,所述外延结构至少包括自下而上设置的GaN沟道层103和势垒层104。另外,所述外延结构中的各个材料层的形成工艺包括但不限于外延工艺。Next, as shown in S2 and FIG. 4 in FIG. 1 , step S2 is performed to form an epitaxial structure on the
在一示例中,形成所述GaN沟道层103之前还包括形成有用于缓解晶格失配的缓冲层102的步骤,其中,所述GaN沟道层103厚度可以介于100nm-1um之间,例如,可以是200nm、500nm、800nm。所述缓冲层102包括但不限于AlGaN层,厚度可以介于1-3um之间,例如可以是1.5um、2um、2.5um。另外,所述势垒层104包括但不限于AlGaN层,厚度可以介于10-30nm之间,例如可以是15nm、20nm、25nm。In an example, before forming the
接着,如图1中的S3及图4所示,进行步骤S3,在所述外延结构上形成辅助功能结构105,所述辅助功能结构105包括若干个叠置的辅助单元层,如辅助单元层105a、105b、105c,所述辅助单元层为p型掺杂层,另外,所述辅助功能结构的各层辅助掺杂层的掺杂浓度自下而上逐渐增加。也就是说,在一示例中,可以是每层辅助单元层的掺杂浓度为均匀掺杂,不同层之间的掺杂浓度不同,相邻辅助单元层之间上层的掺杂浓度大。另外,所述辅助功能结构105的形成工艺包括但不限于外延工艺。Next, as shown in S3 and FIG. 4 in FIG. 1 , step S3 is performed to form an
具体的,所述辅助功能结构105形成在所述势垒层104上还可以作为器件的帽层。另外,通过p型掺杂的所述辅助功能结构105的设计,当栅极电压不断增加时,空穴开始注入沟道并产生相等数量的电子,从而增加2DEG。具有高迁移率的电子将在电场的作用下到达漏极,而空穴将保留,因为它们的迁移率远低于电子。因此,电流通过注入的空穴数量进行调制。并在跨导曲线中显示了一个双峰。参见图9和图10所示,图9显示为采用本发明的多层渐变的辅助功能结构设计得到的GaN器件的仿真曲线(跨导曲线),另外,图10给出了单层单一掺杂得到的仿真曲线(跨导曲线)作为对照。可见,两个图中分别得到了双峰曲线,其中,第2个为注入空穴产生的gm峰值,通过本发明P型掺杂的辅助功能结构,可改善器件线性度,采用多层渐变的辅助功能结构设计的方案,可以使得逐步注入空穴,使gm平坦化更明显,2个峰值间的落差得到缓解,使得gm平坦化得到进一步改善,从而提高器件的线性度。Specifically, the
作为示例,所述辅助功能结构105包括AlGaN功能结构及GaN功能结构中的任意一种。即,辅助功能结构可以只有AlGaN功能结构构成,也可以只由GaN功能结构构成,还可以是有两者共同构成。优选为采用二者当中的任意一者构成。As an example, the auxiliary
在一示例中,所述辅助功能结构105仅由所述AlGaN功能结构构成,具体地,所述AlGaN功能结构包括若干个AlGaN单元层,作为所述辅助单元层,如,辅助单元层105a、105b、105c。In an example, the auxiliary
在另一示例中,所述辅助功能结构105仅由所述GaN功能结构构成,具体地,所述GaN功能结构包括若干个GaN单元层,作为所述辅助单元层,例如,辅助单元层105a、105b、105c。In another example, the auxiliary
进一步示例中,当所述辅助功能结构105选择为所述AlGaN功能结构时,所述制备方法还包括在所述AlGaN功能结构与所述势垒层104之间形成GaN插入层(图中未示出)的步骤,且形成所述辅助功能部时还去除对应的所述GaN插入层。具体的,所述GaN插入层可以作为选择性刻蚀停止层,厚度可以介于1-5nm之间,例如,可以设计为2nm、3nm、4nm。例如,在AlGaN势垒与p-AlGaN帽层中间插入GaN层。In a further example, when the auxiliary
作为示例,所述辅助单元层的层数为n层,且自下而上分别为第1层至第n层,n为大于等于2的整数,例如,图4中显示为3层,分别是:第一层辅助单元层105a、第二层辅助单元层105b、第三层辅助单元层105c。其中,每层所述辅助单元层的浓度增加的方式为线性增加,提高工艺的稳定性及可重复性。As an example, the number of layers of the auxiliary unit layer is n layers, and the layers are from the 1st layer to the nth layer from bottom to top, and n is an integer greater than or equal to 2. For example, it is shown as 3 layers in FIG. : the first
在一示例中,每层所述辅助单元层的掺杂浓度为(0.8-1.2)n*1018/cm3。也就是说,每层所述辅助单元层的掺杂浓度可以为0.9n*1018/cm3、n*1018/cm3、1.1n*1018/cm3。对应地,以三层辅助单元层为例,各层的掺杂浓度在一示例中为:第一层辅助单元层105a为0.9*1018/cm3;第二层辅助单元层105b为1.8*1018/cm3;第三层辅助单元层105c为2.7*1018/cm3。各层的掺杂浓度在另一示例中为:第一层辅助单元层105a为1*1018/cm3;第二层辅助单元层105b为2*1018/cm3;第三层辅助单元层105c为3*1018/cm3。各层的掺杂浓度在又一示例中为:第一层辅助单元层105a为1.1*1018/cm3;第二层辅助单元层105b为2.2*1018/cm3;第三层辅助单元层105c为3.3*1018/cm3。对于其它层,依此类推。In an example, the doping concentration of each of the auxiliary unit layers is (0.8-1.2)n*10 18 /cm 3 . That is, the doping concentration of each of the auxiliary unit layers may be 0.9n*10 18 /cm 3 , n*10 18 /cm 3 , and 1.1n*10 18 /cm 3 . Correspondingly, taking three auxiliary unit layers as an example, in an example, the doping concentration of each layer is: the first
在进一步示例中,所述辅助功能结构105的总掺杂浓度介于1018/cm3-1019/cm3之间,即,各个辅助单元层中掺杂浓度之和介于1018/cm3-1019/cm3之间。例如,可以是2*1018/cm3、5*1018/cm3、8*1018/cm3。在另一可选示例中,所述辅助功能结构105的总厚度介于10nm-100nm之间,例如,可以是20nm、50nm、60nm、80nm。有利于保证栅控能力,缓解短沟道效应。In a further example, the total doping concentration of the auxiliary
接着,如图1中的S4及图5-6所示,进行步骤S4,在所述辅助功能结构105表面定义出栅极区,并对应刻蚀所述栅极区外围的部分所述辅助功能结构105至所述势垒层104,得到与所述栅极区对应的辅助功能部107。Next, as shown in S4 in FIG. 1 and FIGS. 5-6 , step S4 is performed, a gate region is defined on the surface of the
作为示例,参见图7和图8所示,所述辅助功能部107的纵截面形状可以是方形,如图7所示,也可以是梯形,如图8所示。在一优选示例中,所述辅助功能部107的纵截面形状选择为梯形,跨导曲线仿真结构参见图11所示,可以看出,梯形的辅助功能部得到的跨导曲线显示的gm更平坦化,从而更有利于线性优化。另外,以所述辅助功能结构105具有三层辅助单元层105a、105b、105c为例,刻蚀得到所述辅助功能部107后,第一层辅助单元层105a转化成第一功能部单元107a、第二层辅助单元层105b转化成第二功能部单元107b、第三层辅助单元层105c转化成第三功能部单元107c。As an example, referring to FIGS. 7 and 8 , the longitudinal cross-sectional shape of the
在一示例中,形成所述辅助功能部107的方式可以是:如图5所示,现在所述辅助功能结构105的表面沉积ITO(Indium-Tin-Oxide)材料层,厚度可以是介于100-500nm之间,例如,选择为200nm、300nm;然后,利用光刻工艺定义出所述栅极区,并利用湿法刻蚀去除多余的ITO材料层,形成ITO结构106,可以作为栅极金属层,可以共同作为后续栅电极的一部分;接着,如图6所示,并参见图8的结构所示,以所述ITO结构106作为掩膜版,去除所述辅助功能结构105中的多余的材料层,得到用于器件改性的所述辅助功能部107。该示例中,ITO层与GaN光电器件工艺兼容,作为透明电极,可进行相关光学方法表征。而且,后续源极电极和漏极电极制备(如采用Ni/Au制备)时的工艺限制较小,还可提高器件制备效率及可靠性。In an example, the
在另一示例中,形成所述辅助功能部107的方式还可以是:先利用光刻掩膜版定义栅极区,进行刻蚀完辅助功能结构及源、漏欧姆接触制备完以后,以得到源极电极和漏极电极,再进行栅极Ni/Au沉积,以得到栅极电极,该方式中,因为Ni/Au不能承受源、漏电极制备过程中的高温退火,Ni会渗入进半导体势垒,影响器件可靠性,因此后续形成栅极电极。In another example, the
作为示例,所述辅助功能部107的刻蚀形成方式可以是:先采用刻蚀工艺对所述辅助功能结构进行刻蚀,再采用氧化结合湿法刻蚀的方式继续进行刻蚀至所述势垒层。As an example, the
在一示例中,采用ICP刻蚀去除大部分p型掺杂的AlGaN或者是GaN,例如,刻蚀至剩下最后一个辅助单元层,如第一辅助单元层105a,或者,当所述辅助功能结构由若干AlGaN层构成而额外设置有GaN插入层时,采用ICP刻蚀是所述GaN插入层。进一步,再采用氧化结合湿法刻蚀的方式继续进行刻蚀(刻蚀掉剩余的GaN层)至所述势垒层(如AlGaN层)。In one example, most of the p-doped AlGaN or GaN is removed by ICP etching, for example, until the last auxiliary cell layer remains, such as the first
其中,在一具体示例中,氧化结合湿法刻蚀的方式可以是利用O2等离子或臭氧O3进行氧化,形成Ga-O,然后利用酸性化学试剂,如HCl去除氧化层,直至势垒层表面。Wherein, in a specific example, the method of oxidation combined with wet etching may be to use O2 plasma or ozone O3 to oxidize to form Ga-O, and then use acidic chemical reagents such as HCl to remove the oxide layer until the surface of the barrier layer.
另外,当所述辅助功能部107的纵截面形状为梯形时,还可以对所述辅助功能部107的形成方式进一步优化设计,例如,在一示例中,制备梯形的所述辅助功能部107的方式为:在所述辅助功能结构105上制备梯形掩膜版203,并基于所述梯形掩膜版203进行刻蚀,以将所述梯形掩膜版203的图形转移到所述辅助功能结构105上,得到梯形辅助功能部107。In addition, when the longitudinal cross-sectional shape of the
在一具体示例中,参见图12-14所示,提供一种具体制备所述梯形掩膜版203的方式:In a specific example, referring to FIGS. 12-14 , a specific method for preparing the
首先,如图12所示,在辅助功能结构105上形成掩膜材料层201(光刻树脂);掩膜材料层201的材料可以是PMMA,例如,其厚度可以是500nm-1μm之间,可以是600nm、800nm;First, as shown in FIG. 12 , a mask material layer 201 (photoresist resin) is formed on the
接着,继续参见图12所示,采用电子束曝光技术(E-beam)进行曝光,其中,曝光剂量自所述栅极区(图中对应ITO结构)至两侧逐渐增加;例如,栅极区内部的曝光剂量可以选择为相同。在一具体示例中,曝光剂量从中心往两旁逐渐递增,如可以是从300uc/cm2递增到500uc/cm2,进一步示例中,曝光剂量可以呈线性增加;Next, continue to refer to FIG. 12 , use electron beam exposure technology (E-beam) for exposure, wherein the exposure dose gradually increases from the gate region (corresponding to the ITO structure in the figure) to both sides; for example, the gate region The exposure dose inside can be chosen to be the same. In a specific example, the exposure dose is gradually increased from the center to both sides, such as from 300uc/cm 2 to 500uc/cm 2 , and in a further example, the exposure dose can be linearly increased;
接着,如图13所示,对曝光后的结构显影,得到台阶式掩膜版202,可以是MIBK显影;Next, as shown in FIG. 13, the exposed structure is developed to obtain a
最后,如图14所示,对所述台阶式掩膜版202进行回火,得到所述梯形掩膜版203;在一示例中,回火的工艺可以是:在110-130℃(如可以是120℃)温度氛围内退火1-10min(如可以是2min、5min),形成所需平滑的斜边掩膜版,得到所述梯形掩膜版203。Finally, as shown in FIG. 14 , the stepped
在另一示例中,制备梯形的所述辅助功能部107的方式还可以是,采用电化学各向异性刻蚀,利用掺杂浓度越高,刻蚀速率越快的特性,得到梯形结构的辅助功能部,可以简化工艺。例如,对于GaN辅助功能结构来说可以采用Acidic化学试剂,把样品浸入试剂内,再通过置于试剂内的电极加上偏压,从而进行电化学湿法刻蚀,电化学刻蚀方法有利于GaN辅助功能部的有效刻蚀,当辅助功能部选择为GaN功能结构时,采用电化学刻蚀方式。In another example, the method of preparing the trapezoidal auxiliary
最后,如图1中的S5及图7-8所示,进行步骤S5,在所述外延结构上制备源极电极108、漏极电极109和栅极电极110,以得到所述GaN器件结构。Finally, as shown in S5 in FIG. 1 and FIGS. 7-8 , step S5 is performed to prepare the
具体的,当基于ITO材料层定义栅极区是,得到的ITO结构106与栅极电极110共同作为栅极结构进行电性引出,当采用光刻胶掩膜定义栅极区时,栅极电极110直接形成在辅助功能部107表面。其中,在一具体示例中,利用光刻,定义源、漏区,沉积金属、剥离,形成源、漏电极,并在N2下800℃-900℃(如850℃)退火25s-35s(如30s),同时完成ITO栅极与源、漏极制备。当然,还可以采用其他工艺制备各个器件电极。Specifically, when the gate region is defined based on the ITO material layer, the obtained
在一示例中,得到梯形截面的所述辅助功能部107时,梯形的所述辅助功能部107的长边(与所述势垒层相接触的一边)延伸至与两个的源极电极和漏极电极相接触,即,梯形结构与两个电极与势垒层接触的面具有一边缘线性接触,以利于实现有效的逐步空穴注入。In an example, when the
作为示例,形成所述源极电极108、漏极电极109和栅极电极110之后还包括步骤:采用CVD工艺沉积形成SiN层或采用ALD工艺沉积形成Al2O3层作为器件钝化层,以钝化器件表面。当然,也可以是先形成一层Al2O3层,再在Al2O3层表面形成一层SiN层。As an example, after forming the
另外,如图7和8所示,并参见图1-6和图9-11,如图本发明还提供一种GaN器件结构,所述GaN器件结构优选采用本发明的制备方法制备得到,当然,也还可以采用其他方法制备,其中,在GaN器件结构中的特征可以参见在本实施例制备方法中的描述,在此不再赘述。In addition, as shown in Figures 7 and 8, and referring to Figures 1-6 and Figures 9-11, the present invention also provides a GaN device structure, the GaN device structure is preferably prepared by the preparation method of the present invention, of course , can also be prepared by other methods, wherein, for the features in the GaN device structure, reference may be made to the description in the preparation method of this embodiment, which will not be repeated here.
本实施例的所述GaN器件结构包括:The GaN device structure of this embodiment includes:
衬底101;
外延结构,形成在所述衬底上,至少包括自下而上设置的GaN沟道层103和势垒层104;an epitaxial structure, formed on the substrate, at least including a
辅助功能部107,表面定义有栅极区,所述辅助功能部对应所述栅极区形成在所述外延结构上,其中,所述辅助功能结构包括若干个叠置的且为p型掺杂层的辅助单元层,所述辅助掺杂层的掺杂浓度自下层至上层逐渐增加;The
源极电极108、漏极电极109和栅极电极110,形成在所述外延结构上,且所述栅极电极与所述栅极区相对应,所述源极电极和所述漏极电极位于所述辅助功能部107外围。A
作为示例,所述辅助功能结构105包括AlGaN功能层及GaN功能层中的任意一种,其中,当包括所述AlGaN功能层时,所述AlGaN功能层包括若干个AlGaN单元层,作为所述辅助单元层;当包括所述GaN功能层时,所述GaN功能层包括若干个GaN单元层,作为所述辅助单元层。As an example, the auxiliary
作为示例,所述辅助单元层的层数为n层,且自下而上分别为第1层至第n层,n为大于等于2的整数,其中,每层所述辅助单元层的掺杂浓度为(0.8-1.2)n*1018/cm3,且所述辅助功能结构的总掺杂浓度介于1018/cm3-1019/cm3之间,总厚度介于10nm-100nm之间。As an example, the number of layers of the auxiliary unit layer is n, and from bottom to top, the first layer to the nth layer are respectively, and n is an integer greater than or equal to 2, wherein the doping of each layer of the auxiliary unit layer is The concentration is (0.8-1.2)n*10 18 /cm 3 , and the total doping concentration of the auxiliary functional structure is between 10 18 /cm 3 -10 19 /cm 3 , and the total thickness is between 10nm-100nm between.
作为示例,所述辅助功能部107的纵截面形状为梯形。As an example, the longitudinal cross-sectional shape of the
综上所述,本发明的GaN器件结构及其制备方法,通过引入多层p型掺杂且浓度渐变的辅助功能部,辅助功能部同时作为器件的帽层结构,可以使得当栅极电压不断增加时,空穴开始注入沟道并产生相等数量的电子,从而增加2DEG。具有高迁移率的电子将在电场的作用下到达漏极,而空穴将保留,因为它们的迁移率远低于电子,从而电流通过注入的空穴数量进行调制,可以在跨导曲线中显示一个双峰,有效改善器件的线性度。另外,本发明还基于空穴注入引入了梯形设计,进一步改善了器件的线性度。所以,本发明有效克服了现有技术中的种种缺点而具高度产业利用价值。To sum up, in the GaN device structure and its preparation method of the present invention, by introducing a multi-layer p-type doped auxiliary function part with gradient concentration, the auxiliary function part also serves as the cap layer structure of the device, which can make the gate voltage constant when the gate voltage is constant. When increasing, holes start to inject into the channel and generate an equal number of electrons, thereby increasing the 2DEG. Electrons with high mobility will reach the drain under the action of the electric field, while holes will remain because their mobility is much lower than electrons, so the current is modulated by the number of holes injected, which can be shown in the transconductance curve A double peak, effectively improving the linearity of the device. In addition, the present invention also introduces a trapezoidal design based on hole injection, which further improves the linearity of the device. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial application value.
上述实施例仅例示性说明本发明的原理及其功效,而非用于限制本发明。任何熟悉此技术的人士皆可在不违背本发明的精神及范畴下,对上述实施例进行修饰或改变。因此,举凡所属技术领域中具有通常知识者在未脱离本发明所揭示的精神与技术思想下所完成的一切等效修饰或改变,仍应由本发明的权利要求所涵盖。The above-mentioned embodiments merely illustrate the principles and effects of the present invention, but are not intended to limit the present invention. Anyone skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical idea disclosed in the present invention should still be covered by the claims of the present invention.
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