CN112953520A - An all-digital frequency band switching technology of phase-locked loop based on successive approximation logic - Google Patents
An all-digital frequency band switching technology of phase-locked loop based on successive approximation logic Download PDFInfo
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- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
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- H—ELECTRICITY
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- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
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- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
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Abstract
本发明针对目前无线通信系统常常采用的多频段频率源技术，提出了一种基于逐次逼近逻辑的锁相环全数字频带切换技术。提出频带切换电路结构包括分频器、鉴频器和逐次逼近逻辑模块。的其优势在于：全部电路采用数字CMOS逻辑实现，功耗极低，并且实现简单；电路最高工作频率可达130MHz；电路共四种工作模式，并且自动进行模式选择；支持最高4个核心、每个核心128个频带的频带选择分辨率，精度极高，并且切换响应速度快。
The invention proposes a phase-locked loop full-digital frequency band switching technology based on successive approximation logic, aiming at the multi-band frequency source technology often used in the current wireless communication system. The proposed frequency band switching circuit structure includes frequency divider, frequency discriminator and successive approximation logic modules. Its advantages are: all circuits are implemented with digital CMOS logic, with extremely low power consumption and simple implementation; the maximum operating frequency of the circuit can reach 130MHz; the circuit has four operating modes, and the mode selection is performed automatically; it supports up to 4 cores, each The frequency band selection resolution of each core 128 frequency bands is extremely high, and the switching response speed is fast.
Description
Technical Field
The invention relates to a phase-locked loop all-digital frequency band switching technology based on successive approximation logic, belonging to the technical field of frequency source frequency band switching in the design of a radio frequency integrated circuit.
Background
Nowadays, the civil communication system is rapidly developed, and different frequency bands covered by various communication protocols also require different frequency bands of corresponding transceivers, which results in serious complexity and redundancy of the transceiver structure. In order to save power consumption and cost, the radio frequency source in the transceiver often adopts multi-band coverage, and even adopts a plurality of radio frequency sources to enable a single transceiver to be applied to different communication protocols, so that the system design cost is greatly saved.
Radio frequency communication systems employing multiple frequency bands or multiple frequency sources require a band switching module that can be automatically adapted. The most common switching mode is direct control of a digital bus, different frequency bands of different frequency sources are controlled by a plurality of control bits through various digital bus protocols, the method is simple to implement and low in cost, the value of the control bits of the digital bus corresponding to the required frequency band needs to be calculated manually before each frequency band switching is carried out, burning of the control bits needs to be carried out manually, and the method is complicated in steps and not suitable for real-time switching. At present, most of the frequency band switching of the radio frequency phase-locked loop is realized based on a successive approximation logic technology. The technique is actually a negative feedback frequency locking loop, firstly, frequency division processing is carried out on reference frequency, signals obtained after frequency division are sent into a counter for counting, and the obtained result is compared with the output frequency of a frequency source through successive approximation logic to control the output frequency of a multi-core and multi-band frequency source to rise or fall. The successive approximation logic can be realized by adopting full digital logic, so that the design cost and the circuit power consumption are greatly reduced.
Disclosure of Invention
The invention provides a phase-locked loop all-digital frequency band switching technology based on successive approximation logic, which aims to determine the frequency dividing ratio of the whole system, quickly and automatically switch and correct a plurality of frequency bands of a plurality of frequency sources, reduce the locking time of the phase-locked loop, realize all modules by adopting all-digital CMOS logic, greatly reduce the power consumption and the design cost of the system, and is suitable for being applied to scenes with extremely low power consumption, such as portable equipment, medical electronic equipment and the like. The present invention is generally integrated into a radio frequency phase locked loop having multiple frequency sources and multiple frequency bands, as shown in fig. 2.
The invention is realized by the following technical scheme:
the phase-locked loop all-digital frequency band switching technology based on the successive approximation logic comprises the following circuit modules, as shown in fig. 1: a frequency divider, a frequency discriminator, successive approximation logic;
the frequency divider structure is formed by cascading 8D flip-flops as shown in fig. 3, wherein an output QN of each D flip-flop is connected with an input D, an output Q is connected with an input CLK of a next D flip-flop, and an input signal F can be obtainedINDivide by 256 times to obtain an output signal of FOUTThe global reset is controlled by the NRST signal;
wherein the frequency discriminator structure is shown in FIG. 4, and adopts a counter structure to correct the clock F when the rising edge of the clock CLK comesCALCounting the number of the complete cycles to control whether the successive approximation logic works or not, and providing a reference count value for the successive approximation logic;
the successive approximation logic is realized by hardware description language, error correction and parity correction technology are adopted, the frequency discriminator counting is carried out in odd cycles, the frequency discriminator counting result is processed by the successive approximation logic in even cycles for frequency band switching, and the nuclear judgment, the nuclear switching and the frequency band switching can be carried out rapidly;
the connection mode of each module of the phase-locked loop full digital frequency band switching technology based on successive approximation logic is specifically as follows: the frequency divider is coupled to a frequency discriminator, which is coupled to successive approximation logic. The whole circuit module inputs are as follows: reference frequency signal FREFReset NRST, calibration reset CALRST, frequency source divided signal FDIVThe whole circuit module outputs: enable output TRIG, CORE control word output CORE (1:0), BAND control word output BAND (6: 0).
The phase-locked loop all-digital frequency band switching technology based on the successive approximation logic has four working modes of an integral circuit module, including frequency band up-switching, frequency band down-switching, frequency band up-overflowing and frequency band down-overflowing.
The method specifically comprises the following steps:
the method comprises the following steps: the power supply and signal connection method specifically comprises the following substeps:
step 1.1, setting a power supply to be direct current 1.8V;
step 1.2 reference frequency signal FREFIs connected to a reference frequency source and is setThe reference frequency signal is a square wave with 130MHz and 50% duty ratio;
step 1.3, frequency source frequency dividing ratio N is set, and frequency source signal F is transmittedVCOFrequency division is carried out to obtain a frequency source frequency-divided signal FDIV；
Step 1.4, connecting the output control word CORE (1:0) and BAND (6:0) with the frequency source input control word needing to be subjected to frequency BAND selection;
step 1.5 sets reset NRST, correct reset CALRST to low level (0V);
step two: the circuit automatically selects the frequency band, and specifically comprises the following sub-steps:
step 2.1 sets reset NRST and calibration reset CALRST to high level (1.8V), the circuit starts to operate, and at this time, the output control words CORE (1:0) and BAND (6:0) are default 2 (binary value of 01) and 64 (binary value of 1000000), respectively;
and 2.2, judging whether the output control words CORE (1:0) and BAND (6:0) rise or fall by a frequency discriminator and successive approximation logic in the frequency BAND selection circuit according to the reference frequency, gradually approaching to be stable, and finishing the correction if the output enable TRIG is changed from low level to high level after the output control words CORE (1:0) and BAND (6:0) are stable, wherein the reference clock frequency is positioned in the frequency source frequency BAND range determined by the output control words at the moment, and the frequency BAND selection is finished. At this time, the reference frequency signal FREFFrequency-divided signal F of frequency sourceDIVThe difference between the two frequencies is smaller than the minimum band width BW of the frequency source.
Advantageous effects
Compared with the prior frequency source frequency band switching technology, the phase-locked loop full-digital frequency band switching technology based on successive approximation logic provided by the invention has the following beneficial effects:
1. the number of frequency sources related to most of frequency band switching technologies is not more than two, the phase-locked loop all-digital frequency band switching module based on successive approximation logic can output 2 bits of core control bits and 7 bits of frequency band control bits, namely, the phase-locked loop all-digital frequency band switching module supports fast switching among 4 frequency source cores, each frequency source core supports 128 frequency bands at most, the frequency band selection precision is extremely high, and the time required by initial stability of a system can be greatly reduced when the phase-locked loop all-digital frequency band switching module is applied to a radio frequency system;
2. the frequency band control signal of the frequency source can be applied as long as it is in the form of weighted digital bits, without considering the form of the frequency source, such as an LC type oscillator, a relaxation oscillator, a ring oscillator, etc.;
3. all circuit modules are realized by adopting CMOS digital logic, static power consumption is avoided, dynamic power consumption is extremely low, the realization is simple, and the highest working frequency of the circuit is as high as 130 MHz;
4. after the frequency band switching is finished, the circuit automatically generates a trigger signal to stop working, so that the overall power consumption of the circuit is further reduced;
5. the input and output ports of the circuit modules such as the high-frequency divider, the multi-mode digital frequency divider and the like in the multiplex phase-locked loop can be used for being applied to different scenes, and the practicability is high.
Drawings
FIG. 1 is a block diagram of a phase-locked loop full-digital band switching module system based on successive approximation logic according to the present invention;
FIG. 2 is a schematic diagram of a successive approximation logic-based PLL based on an all-digital band switching module applied to the PLL according to the present invention;
FIG. 3 is a circuit diagram of a frequency divider in an all-digital band switching module of a phase-locked loop based on successive approximation logic according to the present invention;
FIG. 4 is a circuit diagram of a frequency discriminator in an all-digital band switching module of a phase-locked loop based on successive approximation logic according to the present invention;
FIG. 5 is a schematic diagram of simulation of the phase-locked loop full-digital band switching module based on successive approximation logic according to the present invention when the operating mode is band up-switching;
FIG. 6 is a schematic diagram of a simulation of the phase-locked loop full-digital band switching module based on successive approximation logic according to the present invention when the operating mode is band down switching;
FIG. 7 is a schematic diagram of a simulation of the phase-locked loop full-digital band switching module according to the present invention when the frequency band overflows upwards;
fig. 8 is a schematic diagram of a simulation of the working mode of the pll-based all-digital band switching module according to the present invention when the frequency band overflows downwards.
Detailed Description
The present invention provides a phase-locked loop full digital band switching technique based on successive approximation logic, and the circuit modules and the working process thereof are further explained and described in detail below with reference to the embodiments and the drawings.
Example 1
The invention provides a phase-locked loop full-digital frequency band switching technology based on successive approximation logic, which can rapidly and automatically switch and correct a plurality of frequency bands of a plurality of frequency sources, reduce the locking time of the phase-locked loop, greatly reduce the power consumption and the design cost of a system by adopting full-digital CMOS logic realization of all modules, is suitable for being applied to a scene with extremely low power consumption, and is generally integrated into a radio frequency phase-locked loop with a plurality of frequency sources and a plurality of frequency bands.
The connection mode of each module of the phase-locked loop all-digital frequency band switching technology based on successive approximation logic is shown in fig. 1, and specifically includes: the frequency divider is coupled to a frequency discriminator, which is coupled to successive approximation logic. The whole circuit module inputs are as follows: reference frequency signal FREFReset NRST, calibration reset CALRST, frequency source divided signal FDIVThe whole circuit module outputs: enable output TRIG, CORE control word output CORE (1:0), BAND control word output BAND (6: 0).
The phase-locked loop all-digital frequency band switching technology based on the successive approximation logic has four working modes of an integral circuit module, including frequency band up-switching, frequency band down-switching, frequency band up-overflowing and frequency band down-overflowing.
The method specifically comprises the following steps:
step A: the power supply and signal connection method specifically comprises the following substeps:
step A.1, setting a power supply to be direct current 1.8V;
step A.2 reference frequency signal FREFThe reference frequency signal is a square wave which is connected with a reference frequency source and has the duty ratio of 50% and the reference frequency signal is 130 MHz;
step A.3, frequency dividing ratio N of frequency source is set, and frequency source signal F is transmittedVCOFrequency division is carried out to obtain a frequency source frequency-divided signal FDIV；
Step A.4, connecting the output control word CORE (1:0) and BAND (6:0) with the frequency source input control word needing to be subjected to frequency BAND selection;
step a.5 sets reset NRST, correction reset CALRST to low level (0V);
and B: the circuit automatically selects the frequency band, and specifically comprises the following sub-steps:
step B.1, setting the reset NRST and the correction reset CALRST to be high level (1.8V), starting the circuit to work, and outputting control words CORE (1:0) and BAND (6:0) of default 2 (binary value is 01) and 64 (binary value is 1000000) respectively;
and B.2, judging whether the output control words CORE (1:0) and BAND (6:0) rise or fall by a frequency discriminator and successive approximation logic in the frequency BAND selection circuit according to the reference frequency, gradually approaching to be stable, and finishing the correction if the output enable TRIG is changed from low level to high level after the output control words CORE (1:0) and BAND (6:0) are stable, wherein the reference clock frequency is positioned in the frequency source frequency BAND range determined by the output control words at the moment, and the frequency BAND selection is finished. At this time, the reference frequency signal FREFFrequency-divided signal F of frequency sourceDIVThe difference between the two frequencies is smaller than the minimum band width BW of the frequency source.
Example 2
The invention provides a phase-locked loop all-digital frequency band switching technology based on successive approximation logic, which can quickly and automatically switch and correct a plurality of frequency bands of a plurality of frequency sources, wherein the connection mode of each module of a circuit is shown in figure 1;
the circuit is simulated, a frequency source adopts 4 COREs, each CORE has 128 frequency BANDs, the COREs are selected by a CORE control word CORE (1:0), the value is changed from 0 to 3 to represent that 1 st CORE to 4 th CORE are selected, the frequency BANDs are selected by a frequency BAND control word BAND (6:0), the value is changed from 0 to 127 to represent that 1 st frequency BAND to 128 th frequency BAND of a certain CORE are selected. The coverage frequency range of the 1 st core is 296.8-461.9 MHz, the coverage frequency range of the 2 nd core is 373.6-545.05 MHz, the coverage frequency range of the 3 rd core is 450.4-628.2 MHz, and the coverage frequency range of the 4 th core is 527.2-711.35 MHz;
when the reference frequency is 130MHz and the frequency source division ratio N is set to 5, the simulation result is shown in fig. 6, and the circuit operation mode is band-up switching, so that the enable output changes from 0 to 1.8V (logic 1) at 108 μ s, and the frequency source output frequency F is at this timeVCO650.45MHz, which is close to 5 × 130MHz being 650MHz, CORE control word CORE (1:0) being 3 (binary value being 11), BAND control word BAND (6:0) being 85 (binary value being 1010101), representing that the circuit takes 108 μ s to complete BAND switching, and the frequency source after switching is the 86 th BAND of the 4 th CORE;
when the reference frequency is 130MHz and the frequency source division ratio N is set to 3, the simulation result is shown in fig. 6, and the circuit operation mode is band-down switching, so that the enable output changes from 0 to 1.8V (logic 1) at 145 μ s, and the frequency source output frequency F is at this timeVCO390.4MHz, approximately 3 × 130MHz 390MHz, CORE control word CORE (1:0) 0 (binary value 00), BAND control word BAND (6:0) 72 (binary value 1001000), representing that the circuit completes BAND switching in 145 μ s, and the switched frequency source is the 73 th BAND of the 1 st CORE;
when the reference frequency is 130MHz and the frequency source division ratio N is set to 6, the simulation result is shown in fig. 7, at this time, the circuit operation mode is band overflow, the frequency source output should be normally around 6 × 130 MHz-780 MHz, but since all cores and bands of the frequency source do not cover this range, the enable output is constantly 0, and the frequency source output frequency F after stabilization is FVCOAt 711.35MHz, the CORE control word CORE (1:0) is 3 (binary value is 11), the BAND control word BAND (6:0) is 127 (binary value is 1111111), i.e. the 128 th BAND of the 4 th CORE, which is the highest frequency range that the frequency source can output.
When the reference frequency is 130MHz and the frequency source division ratio N is set to 2, the simulation result is shown in fig. 8, and the circuit operation mode is that the frequency band overflows downwards, and the frequency source output is normalIn the vicinity of 2x130MHz, but because all cores and frequency bands of the frequency source do not cover the range, the enabled output is constant 0, and the frequency source outputs the frequency F after stabilizationVCOAt 296.8MHz, the CORE control word CORE (1:0) is 0 (binary value of 00) and the BAND control word BAND (6:0) is 0 (binary value of 0000000), i.e., the 1 st BAND of the 1 st CORE, i.e., the lowest frequency range that the frequency source can output.
While the foregoing is directed to the preferred embodiment of the present invention, it is not intended that the invention be limited to the embodiment and the drawings disclosed herein. Equivalents and modifications may be made without departing from the spirit of the disclosure, which is to be considered as within the scope of the invention.
Claims (6)
1. A phase-locked loop full digital frequency band switching technology based on successive approximation logic is characterized in that: a frequency divider, a frequency discriminator, successive approximation logic;
the connection mode of each module of the phase-locked loop full digital frequency band switching technology based on successive approximation logic is as follows:
the frequency divider is coupled to a frequency discriminator, which is coupled to successive approximation logic. The whole circuit module inputs are as follows: reference frequency signal FREFReset NRST, calibration reset CALRST, frequency source divided signal FDIVThe whole circuit module outputs: enable output TRIG, CORE control word output CORE (1:0), BAND control word output BAND (6: 0);
the phase-locked loop all-digital frequency band switching technology based on successive approximation logic has four working modes of an integral circuit module, including frequency band up-switching, frequency band down-switching, frequency band up-overflowing and frequency band down-overflowing;
the method specifically comprises the following steps:
the method comprises the following steps: the power supply and signal connection method specifically comprises the following substeps:
step 1.1, setting a power supply to be direct current 1.8V;
step 1.2 reference frequency signal FREFThe reference frequency signal is a square wave which is connected with a reference frequency source and has the duty ratio of 50% and the reference frequency signal is 130 MHz;
step 1.3, frequency source frequency dividing ratio N is set, and frequency source signal F is transmittedVCOFrequency division is carried out to obtain a frequency source frequency-divided signal FDIV；
Step 1.4, connecting the output control word CORE (1:0) and BAND (6:0) with the frequency source input control word needing to be subjected to frequency BAND selection;
step 1.5 sets reset NRST, correct reset CALRST to low level (0V);
step two: the circuit automatically selects the frequency band, and specifically comprises the following sub-steps:
step 2.1 sets reset NRST and calibration reset CALRST to high level (1.8V), the circuit starts to operate, and at this time, the output control words CORE (1:0) and BAND (6:0) are default 2 (binary value of 01) and 64 (binary value of 1000000), respectively;
and 2.2, judging whether the output control words CORE (1:0) and BAND (6:0) rise or fall by a frequency discriminator and successive approximation logic in the frequency BAND selection circuit according to the reference frequency, gradually approaching to be stable, and finishing the correction if the output enable TRIG is changed from low level to high level after the output control words CORE (1:0) and BAND (6:0) are stable, wherein the reference clock frequency is positioned in the frequency source frequency BAND range determined by the output control words at the moment, and the frequency BAND selection is finished. At this time, the reference frequency signal FREFFrequency-divided signal F of frequency sourceDIVThe difference between the two frequencies is smaller than the minimum band width BW of the frequency source.
2. The successive approximation logic-based phase-locked loop all-digital band switching technique according to claim 1, wherein: the frequency divider is formed by cascading 8D triggers, wherein the output QN of each D trigger is connected with the input D, the output Q is connected with the input CLK of the next D trigger, and the input signal F can be obtainedINA division by 256 is performed.
3. The successive approximation logic-based phase-locked loop all-digital band switching technique according to claim 1, wherein: the frequency discriminator adopts a counter structure and corrects a clock F when a rising edge of a clock CLK arrivesCALCount the number of complete cyclesTo control whether the successive approximation logic is working or not, and to provide the successive approximation logic with a reference count value.
4. The successive approximation logic-based phase-locked loop all-digital band switching technique according to claim 1, wherein: the successive approximation logic is realized by adopting a hardware description language, error correction and odd-even correction technologies are adopted, the frequency discriminator counting is carried out in odd cycles, the frequency discriminator counting result is processed by the successive approximation logic in even cycles to carry out frequency band switching, and nuclear judgment, nuclear switching and frequency band switching can be carried out rapidly.
5. The successive approximation logic-based phase-locked loop all-digital band switching technique according to claim 1, wherein: core control bit 2 bits and band control bit 7 bits can be output, that is, fast switching between 4 frequency source cores is supported, and each frequency source core supports 128 bands at the maximum, and the band selection precision is extremely high.
6. The successive approximation logic-based phase-locked loop all-digital band switching technique according to claim 1, wherein: all circuit modules are realized by adopting CMOS digital logic, the power consumption is extremely low, the realization is simple, the highest working frequency can reach 130MHz, and the circuit modules can be applied to different phase-locked loop systems by multiplexing a radio frequency divider and a multi-mode frequency divider, and have high practicability.
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| US20090079506A1 (en) * | 2007-09-26 | 2009-03-26 | National Taiwan University | Phase-locked loop and method with frequency calibration |
| CN103746688A (en) * | 2013-12-20 | 2014-04-23 | 北京时代民芯科技有限公司 | Automatic frequency-tuning phase-locked loop and automatic frequency-tuning method thereof |
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Application publication date: 20210611 |