CN112925032B - Step delay pulse acquisition method and system in equivalent sampling - Google Patents
Step delay pulse acquisition method and system in equivalent sampling Download PDFInfo
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Abstract
The invention provides a step delay pulse acquisition method and system in equivalent sampling, and belongs to the technical field of ground penetrating radars. The method comprises the following steps: s1) responding to a trigger pulse, and generating a single-period sine signal according to a preset rule; s2) shifting the single-period sinusoidal signal to a preset reference voltage; s3) converting the shifted single-period sinusoidal signal into a square wave signal; s4) outputting a stepping delay pulse along the falling edge of the square wave signal; s5) repeating the steps S1-S4) to obtain continuous step delay pulses. The scheme of the invention utilizes the high-frequency resolution characteristic of the DDS chip to obtain high-precision stepping delay pulse, thereby realizing high-precision equivalent sampling. So that the step delay can be easily achieved at the pS level, even at the sub-pS level, and the accuracy of equivalent sampling can be greatly improved.
Description
Technical Field
The invention relates to the technical field of ground penetrating radars, in particular to a step delay pulse acquisition method in equivalent sampling and a step delay pulse acquisition system in equivalent sampling.
Background
The equivalent sampling method is a conventional method for acquiring echo signals of the existing ground penetrating radar, one sample is acquired in each signal period or every few signal periods, the acquired samples are recombined into a new signal according to a certain arrangement, the shape of the newly-formed signal is similar to that of the original sampled signal, and the newly-formed signal is increased by a plurality of times compared with the original sampled signal in time width, so that the frequency of the sampled signal is reduced. The accuracy of the equivalent sampling depends on the accuracy and precision of the step delay pulse, and the different generation modes of the step delay determine the different equivalent sampling accuracy.
The existing step delay generation method mainly comprises a fixed delay method and a step delay method. The step delay precision of the fixed delay method is determined by the device, and a high-precision step delay chip is not available at present, so that the precision of equivalent sampling cannot be improved. On the other hand, the limited delay length of the delay chip leads to limited detection depth of the ground penetrating radar.
The step delay method generates step delay limited by the linearity of the fast ramp, and particularly for a large time window with deeper detection, the linearity of the fast ramp is poor, so that the step delay precision is poor, and the equivalent sampling precision when a deeper target is detected is affected.
Aiming at the problems of poor precision and large step delay interval in the step delay process in the prior art, a novel step delay pulse acquisition method is provided.
Disclosure of Invention
The embodiment of the invention aims to provide a step delay pulse acquisition method and system in equivalent sampling, which at least solve the problems of poor precision and large step delay interval in the step delay generation process in the prior art.
In order to achieve the above object, a first aspect of the present invention provides a method for acquiring a step delay pulse in equivalent sampling, which is applied to an impulse ground penetrating radar detection process, and the method includes: s1) responding to a trigger pulse, and generating a single-period sine signal according to a preset rule; s2) shifting the single-period sinusoidal signal to a preset reference voltage; s3) converting the shifted single-period sinusoidal signal into a square wave signal; s4) outputting a stepping delay pulse along the falling edge of the square wave signal; s5) repeating the steps S1-S4) to obtain continuous step delay pulses.
Optionally, in step S1), the generating a single-period sinusoidal signal includes: and dividing the frequency of the acquired clock signal according to the frequency point of the preset clock signal to obtain a single-period sine signal.
Optionally, in step S3), converting the shifted monocycle sinusoidal signal into a square wave signal includes: comparing the shifted single-period sinusoidal signal with the shifted zero voltage to obtain a square wave signal containing high level and low level; the output of the shifted single-period sinusoidal signal, which is larger than the shifted zero voltage, is high level, and the output of the shifted single-period sinusoidal signal, which is smaller than the shifted zero voltage, is low level;
the relation between the square wave signal width and the shifted single-period sine signal width is as follows:
Wherein, Square wave signal width for the nth trigger pulse; t n is the single-period sinusoidal signal width of the nth trigger pulse.
Optionally, in step S4), the step of outputting a step delay pulse along a falling edge of the square wave signal includes: taking the first output low level in the shifted single-period sinusoidal signal as the falling edge of the square wave signal; and outputting corresponding step delay pulse according to the falling edge of the square wave signal.
Optionally, in step S1), the generating a single-period sinusoidal signal according to a preset rule includes: generating a single-period sinusoidal signal according to the frequency of the last single-period sinusoidal signal and a preset stepping frequency; the calculation formula is as follows:
fn＝fn-1-Δf
Wherein f n is the frequency of the single-period sinusoidal signal of the nth trigger pulse; f n-1 is the frequency of the single-period sinusoidal signal of the n-1 th trigger pulse; Δf is a preset step frequency.
A second aspect of the present invention provides a step-by-step delayed pulse acquisition system in equivalent sampling for use in a ground penetrating radar detection process, the system comprising: the frequency dividing unit is used for responding to the trigger pulse and generating a single-period sine signal according to a preset rule; and the processing unit is used for shifting the single-period sinusoidal signal to a preset reference voltage, converting the shifted single-period sinusoidal signal into a square wave signal and outputting a stepping delay pulse along the falling edge of the square wave signal.
Optionally, the frequency dividing unit is a DDS chip.
Optionally, the processing unit includes: a level shift circuit for shifting the single-period sinusoidal signal to a preset reference voltage; a comparator for converting the shifted single-period sinusoidal signal into a square wave signal; and the monostable trigger circuit is used for outputting step delay pulses along the falling edge of the square wave signal.
Optionally, the generating a single-period sinusoidal signal according to a preset rule includes: generating a single-period sinusoidal signal according to the frequency of the last single-period sinusoidal signal and a preset stepping frequency; the system further comprises: and the input unit is used for adjusting the preset reference voltage and the preset stepping frequency according to the detection requirement.
In another aspect, the present invention provides a computer readable storage medium having instructions stored thereon, which when executed on a computer, cause the computer to perform the above-described method for step-delay pulse acquisition in equivalent sampling.
Through the technical scheme, the two sine waves with small frequency phase difference have small period phase difference, the pulse width of the square wave signal generated by the comparator has small phase difference, and the corresponding pulse falling edge has small phase difference, so that extremely high precision stepping delay pulse can be obtained. Based on the method, the high-precision stepping delay pulse is obtained by utilizing the high-frequency resolution characteristic of the DDS chip, so that high-precision equivalent sampling is realized. So that the step delay can be easily achieved at the pS level, even at the sub-pS level, and the accuracy of equivalent sampling can be greatly improved.
Additional features and advantages of embodiments of the invention will be set forth in the detailed description which follows.
Drawings
The accompanying drawings are included to provide a further understanding of embodiments of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain, without limitation, the embodiments of the invention. In the drawings:
FIG. 1 is a flow chart of steps of a method for acquiring step delay pulses in equivalent sampling according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of waveform evolution in an embodiment of a method for acquiring step-and-delay pulses in equivalent sampling according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of an equivalent sample step delay pulse acquisition system according to one embodiment of the present invention;
Fig. 4 is a schematic structural diagram of a processing unit according to an embodiment of the present invention.
Description of the reference numerals
A 10-frequency dividing unit; a 20-processing unit; 30-an input unit;
201-a level shift circuit; 202-a comparator; 203-monostable flip-flop.
Detailed Description
The following describes specific embodiments of the present invention in detail with reference to the drawings. It should be understood that the detailed description and specific examples, while indicating and illustrating the invention, are not intended to limit the invention.
In the prior art, the sampling of echo signals by conventional impulse ground penetrating radars is generally achieved using an equivalent sampling method, and the sampled signals are required to have periodicity. The sampling pulse can collect a sample point in each signal period or every several signal periods, and the collected sample points are recombined into a new signal according to a certain arrangement, the shape of the new signal is similar to that of the original sampled signal, and the new signal is increased by a plurality of times compared with the original sampled signal in time width, so that the frequency of the sampled signal is reduced. If the period of the sampled signal is assumed to be T, the step time is Δt, and the number of samples is n, after equivalent sampling, the period T i of the reproduced signal is:
Ti＝n(T+Δt)；
Wherein, the stepping time delta t represents the sampling precision, and the smaller the delta t is, the higher the sampling precision is; Δt is usually 10 to 50pS.10pS corresponds to a sampling frequency of 100GHz, which is employed in real-time, and 50pS corresponds to 20GHz sampling. And finally, reconstructing the original input waveform signal by recombining the reproduction signals. The sampling rate of the recombined data is determined by the tiny delay step delta t of the sampling signal between each round of sampling, the frequency of equivalent sampling, namely the actual sampling frequency, can be controlled by controlling the delta t, if the delta t is small enough, the frequency of equivalent sampling is high enough, various high-frequency components can be acquired, and the function of high-frequency real-time sampling is realized through low frequency.
According to the scheme of the invention, an echo signal from a ground penetrating radar antenna is firstly sent to a sampling gate circuit, the sampling time of the sampling gate circuit is controlled by a step delay pulse generating circuit and a sampling pulse generating circuit, the step delay pulse generates high-precision step delay pulse under the action of emission trigger, the step delay pulse is sent to the sampling pulse generating circuit to realize high-precision step delay and narrow pulse generation, then is sent to the sampling gate circuit to realize equivalent sampling, the sampled circuit is sent to a holding amplifying circuit to realize signal broadening and amplifying, and finally, AD (analog-to-digital) conversion is carried out to obtain a complete digital signal after complete equivalent sampling.
The current generation mode of the stepping time delta t mainly comprises a fixed time delay method and a stepping system method, and the two methods have the use defects.
The fixed delay method is relatively simple to realize, but is limited by the influence of the stepping range of the delay chip, and has the problems of insufficient stepping precision, smaller delay range and the like. For the occasion with deeper detection depth and high detection precision requirement, the fixed delay method can not meet the requirement.
The step system method is that a trigger pulse signal synchronous with a sampled signal generates a fast ramp with the same frequency as the trigger signal, good linearity and short delay time through a fast ramp generator, meanwhile, a step wave generator generates steps with a certain level value, the two waveforms are compared through a fast comparator 202, and when the amplitude of the fast ramp reaches the level value of the step wave, the output level of the comparator 202 is turned over to generate a reverse level. In a period, after a fast ramp wave is finished, the step wave rises by one step, the newly generated step wave is compared with the fast ramp wave to generate a new pulse signal, and compared with the previous pulse signal, a time difference delta t exists in time, and the time difference is a step value. In the stepping system method, a fast ramp wave generator generally generates a fast ramp wave signal through an RC circuit, and the inherent nonlinear characteristic of the RC circuit leads to insufficient linearity of the fast ramp wave signal, so that stepping delay generates deviation, and equivalent sampling precision and accuracy are affected. And as the detection depth increases, the linearity of the ramp wave generated by the RC circuit further worsens, so that the deeper the detection depth is, the worse the detection precision is. There is also a problem that the step wave and the fast ramp wave need to be precisely synchronized, and are relatively difficult to realize. Based on the above, the invention provides a step delay pulse acquisition method in equivalent sampling and a step delay pulse acquisition system in equivalent sampling.
Fig. 3 is a system configuration diagram of an equivalent sample-in-step delayed pulse acquisition system according to an embodiment of the present invention. As shown in fig. 3, an embodiment of the present invention provides a step delay pulse acquisition system in equivalent sampling, which is applied to a ground penetrating radar detection process, and the system includes: a frequency dividing unit 10 for generating a single-period sinusoidal signal according to a preset rule in response to a trigger pulse; the processing unit 20 is configured to shift the monocycle sinusoidal signal to a preset reference voltage, convert the shifted monocycle sinusoidal signal into a square wave signal, and output a step delay pulse along a falling edge of the square wave signal.
Preferably, as shown in fig. 4, the processing unit 20 includes: a level shift circuit 201 for shifting the single-period sinusoidal signal to a preset reference voltage; a comparator 202 for converting the shifted single-period sinusoidal signal into a square wave signal; and the monostable trigger circuit 203 is used for outputting a stepping delay pulse along the falling edge of the square wave signal.
Preferably, the frequency dividing unit 10 is a DDS chip.
Preferably, the system further comprises: an input unit 30 for adjusting the preset reference voltage and the preset step frequency according to the detection requirement.
Fig. 1 is a flow chart of a method for obtaining a step delay pulse in equivalent sampling according to an embodiment of the present invention. As shown in FIG. 1, the invention utilizes the high frequency resolution characteristic of the DDS chip to obtain high-precision step delay pulse, thereby realizing high-precision equivalent sampling. The principle is that two sine waves with small frequency phase difference are utilized, the period of the sine waves is inevitably small, the pulse width of the square wave signal generated by the comparator 202 is inevitably small, and the corresponding pulse falling edge is inevitably small, so that extremely high-precision step delay pulse is obtained. Specifically, the method comprises the following steps:
step S1: in response to the trigger pulse, a single-period sinusoidal signal is generated according to a preset rule.
Specifically, after the ground penetrating radar enters the working state, a trigger pulse is generated, and the DDS chip of the frequency dividing unit 10 responds to the trigger pulse to divide the frequency of the acquired clock signal. Preferably, the selected DDS chip is an AD9834 chip, the highest frequency resolution of the AD9834 chip can reach 4mHz, the cycle time difference is 0.04pS, and pS (picosecond) level and even sub-pS level equivalent sampling can be easily realized. The first single-period sine wave is output according to a preset clock frequency point, for example, the frequency of the first single-period sine wave is 8MHz after the preset 30M clock signal is divided.
Step S2: shifting the single-period sinusoidal signal to a preset reference voltage.
Specifically, if the preset reference voltage is set to zero level, noise interference is easily suffered, so that fluctuation is large, and the subsequent comparison result is inaccurate. In order to minimize noise interference, it is preferable that the preset reference voltage is set to the amplitude value of the single-period sinusoidal signal. For example, if the amplitude of a single-period sine wave is 2v, the preset voltage is also set to 2v. The DDS chip sends the generated monocycle sine signal to the level shift circuit 201, and the level shift circuit 201 biases the monocycle sine signal to a preset voltage position, that is, longitudinally shifts the waveform of the monocycle sine signal in a two-dimensional coordinate axis, and shifts the original zero point to the preset voltage position.
Step S3: the shifted single-period sinusoidal signal is converted into a square wave signal.
Specifically, in order to facilitate the confirmation of the step delay pulse, it is preferable to convert the shifted single-period sinusoidal signal into a square wave signal, and then confirm the corresponding step delay pulse according to the characteristic of the square wave signal that the inflection point is obvious.
First, the level shift circuit 201 sends the shifted single-period sinusoidal signal to the comparator 202, and the comparator 202 obtains a corresponding preset reference voltage. Preferably, when the single-period sinusoidal signal is shifted, the preset reference voltage is set to be the amplitude value of the single-period sinusoidal signal, and the whole single-period sinusoidal signal is longitudinally shifted by one amplitude value, so that the zero point of the single-period sinusoidal signal is the preset reference voltage. Based on the above, the waveform direction of the single-period sinusoidal signal is compared with the preset reference voltage, all the outputs of the single-period sinusoidal signal which are larger than the preset reference voltage are high-level, all the outputs of the single-period sinusoidal signal which are smaller than the preset reference value are low-level, square electric waves only containing high-level and low-level are obtained, and a unique falling edge exists between the last high-level of the output and the first low-level of the output. After the output high-level direction electric waves are reserved, because the monocycle sinusoidal signals are segmented along the preset reference voltage, the width of the square wave signals generated at the moment is 1/2 of the width of the monocycle sinusoidal signals, namely the square wave signals have the following expression:
Wherein, The square wave signal width of the triggering pulse is transmitted for the nth time; t n is the single-period sinusoidal signal width of the nth transmitted trigger pulse.
Step S4: and outputting a step delay pulse along the falling edge of the square wave signal.
Specifically, a unique falling edge of the square wave exists at the last output high level position, and the output of the stepping delay pulse along the falling edge enables the uniqueness and the stepping property of the output stepping delay pulse to be better, and the characteristics of continuous phase, high frequency resolution, small period time difference and the like of the DDS chip are effectively utilized, so that the generated stepping delay pulse is higher in accuracy. The comparator 202 sends the generated square wave to the monostable trigger circuit 203, and the monostable trigger circuit 203 outputs a corresponding step delay pulse along the unique falling edge of the square wave, so as to finish the output of one step delay pulse.
Step S5: repeating the steps S1-S4 to obtain continuous step delay pulses.
In particular, as for the equivalent sampling method, the step time is a set of continuous step delay pulses, so that equivalent sampling cannot be achieved by outputting only one step delay pulse. In order to improve the accuracy of the step delay, it is preferable that the characteristic of the DDS having a high frequency resolution is used to generate a sinusoidal signal having a high frequency resolution, and the sinusoidal signal is compared with a set threshold level, and if the sinusoidal signal is greater than the threshold level, a pulse is generated in the next period, and then compared with the set threshold, and if the sinusoidal signal is greater than the threshold level, a pulse is generated, and since the second frequency signal has a lower frequency than the first frequency signal and has a larger period, the second pulse has a wider pulse width than the first pulse width, and corresponds to a step delay Δt from the falling edge angle. Based on this, the accuracy of the step delay of the output will depend entirely on the frequency difference of the DDS output signals, which can reach the millihertz level, and the step delay can be achieved to be pS level, even sub-pS level, by this feature of the DDS chip.
Based on the above design rule, it is first necessary to set a step frequency, that is, a difference between the frequency of the sinusoidal signal generated in one cycle and the frequency of the sinusoidal signal generated in the previous cycle. The specific value of the stepping frequency is determined by the working condition of the ground penetrating radar which is specifically required to be detected, and after the requirements of the detection progress and the detection agility are comprehensively measured, the stepping frequency is adjusted by an operator through the input unit 30.
Preferably, adaptive training is performed first, the optimal step frequency of each detection depth is recorded, and a correlation function between the detection depth and the step frequency is generated. The subsequent operator only needs to set a depth range threshold value to be detected, and the system automatically selects the adaptive stepping frequency according to a correlation function between the preset detection depth and the stepping frequency. After one step delay pulse is output, a new single-period sine signal is generated according to the step frequency in response to the next trigger pulse. The calculation formula is as follows:
fn＝fn-1-Δf；
Wherein f n is the frequency of the single-period sinusoidal signal of the nth trigger pulse; f n-1 is the frequency of the single-period sinusoidal signal of the n-1 th trigger pulse; Δf is a preset step frequency.
For example, the frequency of a single-period sinusoidal signal output at a time is 10MHz, and the preset step frequency is 200Hz. After the step delay pulse output is completed, responding to the next trigger pulse, and outputting a single-period sine signal with the frequency of 9.9998MHz. According to the rule of step S3, if the signal width of the monocycle sine signal with the frequency of 10MHz is 100nS, the width of the square wave output by the monocycle sine signal with the frequency of 10MHz is 50nS. The signal width of the monocycle sine signal at 9.9998MHz is 100.002nS, and the square wave of the monocycle sine signal at 9.9998MHz has a width of 50.001nS. The output step-delayed pulse of the monocycle sinusoidal signal at a frequency of 9.9998MHz is delayed by 1pS compared to the output step-delayed pulse of the monocycle sinusoidal signal at a frequency of 10 MHz. Thereby realizing the step delay of the pS stage.
Specifically, according to the rule of step S5, each time a delay pulse signal is output, a new single-period sinusoidal signal is generated according to a preset step frequency when the next trigger pulse is generated, and then a new delay pulse signal is correspondingly generated, so that a continuous step delay pulse is formed. The delay between every two adjacent delay pulse signals is the same.
In one possible embodiment, as shown in fig. 2, the preset step frequency is 128Hz, the preset number of repetitions is 1001, and the preset reference voltage is 1.5v. Based on the above rule, the DDS chip outputs 8MHz single-period sine wave V 1 in response to the transmission trigger pulse of the ground penetrating radar, and then sends the output signal to the level shift circuit 201 to bias the output signal to 1.5V, thereby obtaining biased single-period sine wave V 2. Then, V 2 is compared with the 1.5V reference voltage, when the sine wave voltage is greater than 1.5V, a high level is output, when the sine wave voltage is less than 1.5V, a low level is output, at this time, the comparator 202 outputs a square wave signal V 3 with a pulse width of 125 nS/2=62.5ns, and the square wave signal is sent to the monostable trigger circuit 203 again, and the step delay pulse V 4 is triggered and output on the falling edge. Then a second emission trigger pulse arrives, the DDS outputs a single-period sine signal with the frequency of 7.999872MHz, the comparator 202 outputs a square wave signal with the pulse width of 62.501nS, the monostable trigger circuit 203 triggers again on the falling edge of the square wave signal to generate step delay pulses, the second step delay pulse delays by 1pS relative to the first step delay pulse, and the step delay pulses generated subsequently are delayed by 1pS relative to the previous step delay pulse. When the 1001 st emission trigger pulse arrives, the DDS generates a single-period sine signal with the frequency of 7.874016MHz, at this time, the comparator 202 outputs a square wave signal with the pulse width of 63.5nS, and the falling edge of the square wave signal triggers the monostable trigger circuit to generate a step delay pulse, and the step delay pulse is delayed by 1nS relative to the first delay pulse signal, so that the equivalent sampling of 1001 points is performed in total, and the ground penetrating radar completes one scanning detection. High resolution (0.15 mm) detection of shallow targets (less than 15cm deep) is achieved.
The embodiment of the invention also provides a computer readable storage medium, wherein the computer readable storage medium stores instructions, and when the computer readable storage medium runs on a computer, the computer is caused to execute the step delay pulse acquisition method in equivalent sampling.
Those skilled in the art will appreciate that all or part of the steps in a method for implementing the above embodiments may be implemented by a program stored in a storage medium, where the program includes several instructions for causing a single-chip microcomputer, chip or processor (processor) to perform all or part of the steps in a method according to the embodiments of the invention. And the aforementioned storage medium includes: a usb disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The alternative embodiments of the present invention have been described in detail above with reference to the accompanying drawings, but the embodiments of the present invention are not limited to the specific details of the above embodiments, and various simple modifications may be made to the technical solutions of the embodiments of the present invention within the scope of the technical concept of the embodiments of the present invention, and all the simple modifications belong to the protection scope of the embodiments of the present invention. In addition, the specific features described in the above embodiments may be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, the various possible combinations of embodiments of the invention are not described in detail.
In addition, any combination of the various embodiments of the present invention may be made, so long as it does not deviate from the idea of the embodiments of the present invention, and it should also be regarded as what is disclosed in the embodiments of the present invention.
Claims (10)
1. The step delay pulse acquisition method in equivalent sampling is applied to a ground penetrating radar detection process, and is characterized by comprising the following steps of:
S1) responding to a trigger pulse, and generating a single-period sine signal according to a preset rule;
S2) shifting the single-period sinusoidal signal to a preset reference voltage; wherein,
The preset reference voltage is set to be the amplitude value of a single-period sinusoidal signal;
the shifting the monocycle sinusoidal signal to a preset reference voltage includes:
In the two-dimensional coordinate axis, longitudinally shifting the waveform of the single-period sinusoidal signal, and shifting the original zero point to a preset voltage position;
S3) converting the shifted single-period sinusoidal signal into a square wave signal;
s4) outputting a stepping delay pulse along the falling edge of the square wave signal;
S5) repeating the steps S1-S4) to obtain continuous step delay pulses.
2. The method according to claim 1, wherein in step S1), the generating a monocycle sinusoidal signal includes:
and dividing the frequency of the acquired clock signal according to the frequency point of the preset clock signal to obtain a single-period sine signal.
3. The method according to claim 1, wherein in step S3) converting the shifted monocycle sinusoidal signal into a square wave signal comprises:
Comparing the shifted single-period sinusoidal signal with the shifted zero voltage to obtain a square wave signal containing high level and low level; the output of the shifted single-period sinusoidal signal, which is larger than the shifted zero voltage, is high level, and the output of the shifted single-period sinusoidal signal, which is smaller than the shifted zero voltage, is low level;
the relation between the square wave signal width and the shifted single-period sine signal width is as follows:
Wherein, Square wave signal width for the nth trigger pulse;
tn is the single period sinusoidal signal width of the nth trigger pulse.
4. A method according to claim 3, wherein in step S4) the step of outputting a step delay pulse along the falling edge of the square wave signal comprises:
taking the first output low level in the shifted single-period sinusoidal signal as the falling edge of the square wave signal;
and outputting corresponding step delay pulse according to the falling edge of the square wave signal.
5. The method according to claim 1, wherein in step S1), the generating a single-period sinusoidal signal according to a preset rule comprises:
Generating a single-period sinusoidal signal according to the frequency of the last single-period sinusoidal signal and a preset stepping frequency; the calculation formula is as follows:
fn＝fn-1-Δf
Wherein f n is the frequency of the single-period sinusoidal signal of the nth trigger pulse;
f n-1 is the frequency of the single-period sinusoidal signal of the n-1 th trigger pulse;
Δf is a preset step frequency.
6. A step-by-step delayed pulse acquisition system in equivalent sampling for use in a ground penetrating radar detection process, the system comprising:
The frequency dividing unit is used for responding to the trigger pulse and generating a single-period sine signal according to a preset rule;
The processing unit is used for shifting the single-period sinusoidal signal to a preset reference voltage, converting the single-period sinusoidal signal after shifting into a square wave signal and outputting a stepping delay pulse along the falling edge of the square wave signal; wherein,
The preset reference voltage is set to be the amplitude value of a single-period sinusoidal signal;
the shifting the monocycle sinusoidal signal to a preset reference voltage includes:
In the two-dimensional coordinate axis, the waveform of the single-period sinusoidal signal is longitudinally shifted, and the original zero point is shifted to a preset voltage position.
7. The system of claim 6, wherein the frequency dividing unit is a DDS chip.
8. The system of claim 6, wherein the processing unit comprises:
A level shift circuit for shifting the single-period sinusoidal signal to a preset reference voltage;
a comparator for converting the shifted single-period sinusoidal signal into a square wave signal;
and the monostable trigger circuit is used for outputting step delay pulses along the falling edge of the square wave signal.
9. The system of claim 7, wherein the generating a monocycle sinusoidal signal according to a preset rule comprises: generating a single-period sinusoidal signal according to the frequency of the last single-period sinusoidal signal and a preset stepping frequency;
the system further comprises:
And the input unit is used for adjusting the preset reference voltage and the preset stepping frequency according to the detection requirement.
10. A computer readable storage medium having instructions stored thereon, which when run on a computer causes the computer to perform the equivalent sample step delay pulse acquisition method of any one of claims 1 to 5.
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| CN102055438A (en) * | 2010-11-16 | 2011-05-11 | 北京航天测控技术开发公司 | High-speed square wave generating device and method |
| CN109507644A (en) * | 2018-12-25 | 2019-03-22 | 北京华航无线电测量研究所 | Larger Dynamic Ground Penetrating Radar sampling front-end delay equivalent sampling method and circuit |
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| CN102055438A (en) * | 2010-11-16 | 2011-05-11 | 北京航天测控技术开发公司 | High-speed square wave generating device and method |
| CN109507644A (en) * | 2018-12-25 | 2019-03-22 | 北京华航无线电测量研究所 | Larger Dynamic Ground Penetrating Radar sampling front-end delay equivalent sampling method and circuit |
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