CN112911175B - Noise reduction system for low-light-level imaging of CMOS image sensor - Google Patents
Noise reduction system for low-light-level imaging of CMOS image sensor Download PDFInfo
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Abstract
The invention discloses a noise reduction system for low-light-level imaging of a CMOS image sensor, which comprises a pixel module, an amplification sampling module, an ADC module and a digital processing module, wherein the pixel module is used for generating a reset signal and a pixel signal and transmitting the reset signal and the pixel signal to the amplification sampling module; the amplifying and sampling module is used for amplifying, sampling and holding the reset signal and the pixel signal transmitted by the pixel module and transmitting the reset signal and the pixel signal to the ADC module; the ADC module is also connected with a RAMP generator, the RAMP generator is used for generating a RAMP signal and transmitting the RAMP signal to the ADC module, the ADC module is used for comparing the reset signal and the pixel signal transmitted by the amplification and sampling module with the RAMP signal, generating a corresponding pulse signal, accumulating and counting the pulse signal, and transmitting the accumulated count value to the digital processing module; the digital processing module is used for carrying out mean value processing on the accumulated count value transmitted by the ADC module and outputting the count value after noise reduction so as to reduce the influence of random noise on imaging quality in a low-light-level environment and improve the imaging effect.
Description
Technical Field
The invention relates to the technical field of imaging of image sensors, in particular to a noise reduction system for low-light-level imaging of a CMOS image sensor.
Background
With the rapid development of CMOS image sensors, the CMOS image sensors are applied to special environments, such as imaging in low-light environment. In the working process of the CMOS image sensor, the noise generated by the pixel can be roughly divided into random noise and fixed noise, both of which have great influence on the imaging quality of the CMOS image sensor, and especially under the low light level condition, the effective noise reduction technology becomes especially important for the imaging of the CMOS image sensor.
At present, for the elimination of fixed noise, a correlated double sampling technology is generally adopted, and the technology is very mature. Meanwhile, a plurality of noise reduction technologies exist in the circuit structure, but random noise exists in the dim light field, the random noise cannot be completely eliminated, and the dim light environment is particularly sensitive, so that the existing noise reduction technology cannot achieve a particularly ideal effect in the dim light field. Therefore, how to reduce the influence of random noise and improve the imaging effect becomes one of the difficulties in the development of the CMOS image sensor in the field of low-light level imaging.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a noise reduction system for CMOS image sensor low-light-level imaging, which can reduce the influence of random noise on the imaging quality in a low-light-level environment and improve the imaging effect.
In order to solve the above problems, the present invention provides a noise reduction system for low-light level imaging of a CMOS image sensor, which includes a pixel module, an amplification sampling module, an ADC module, and a digital processing module, which are connected in sequence, wherein the pixel module is configured to generate a reset signal and a pixel signal and transmit the reset signal and the pixel signal to the amplification sampling module; the amplifying and sampling module is used for amplifying, sampling and holding the reset signal and the pixel signal transmitted by the pixel module and transmitting the reset signal and the pixel signal to the ADC module; the ADC module is also connected with a RAMP generator, the RAMP generator is used for generating a RAMP signal and transmitting the RAMP signal to the ADC module, the ADC module is used for comparing the reset signal and the pixel signal transmitted by the amplification and sampling module with the RAMP signal, generating corresponding pulse signals, accumulating and counting the signals, and transmitting the accumulated count value to the digital processing module; and the digital processing module is used for carrying out mean value processing on the accumulated count value transmitted by the ADC module and outputting the count value subjected to noise reduction.
Furthermore, the amplifying and sampling module comprises a programmable gain amplifier and a sample hold circuit which are sequentially connected, the programmable gain amplifier is connected with the pixel module, and the sample hold circuit is connected with the ADC module; the programmable gain amplifier is used for amplifying reset signals and pixel signals generated by the pixel module, and the sampling and holding circuit is used for sampling and holding the amplified reset signals and pixel signals and sequentially transmitting the held reset signals and pixel signals to the ADC module.
Further, the ADC module comprises a comparator and a counter which are connected in sequence, the comparator is connected with the amplification and sampling module, and the counter is connected with the digital processing module; the comparator is used for comparing the reset signal and the pixel signal with a RAMP signal generated by the RAMP generator and generating a corresponding pulse signal, and the counter is used for performing accumulated counting on the pulse signal generated by the comparator and transmitting the accumulated count value to the digital processing module.
Further, the ramp signal includes a first ramp signal for comparing with the reset signal and generating a first pulse signal, and a second ramp signal for comparing with the pixel signal and generating a second pulse signal.
The pulse signal counting device further comprises a time sequence generator, wherein the time sequence generator is connected with the ADC module and used for generating a time sequence signal and providing a time sequence for the ADC module to count the pulse signal.
Further, the digital processing module is a divider, and the digital processing module is configured to divide the accumulated count value transmitted by the ADC module by the count number to obtain a count value after noise reduction and output the count value.
The invention has the beneficial effects that:
(1) The reset signal and the pixel signal generated by the pixel module are amplified, sampled, read, compared and accumulated by the amplifying and sampling module for multiple times to obtain an accumulated count value, and then the accumulated count value is averaged and then output to obtain a count value which is subjected to noise reduction and has the same digit as that of the ADC, and the count value is close to a real count value, so that the influence of extra level generated by random noise on the imaging quality of the CMOS image sensor is reduced;
(2) The final output count value is the value after mean processing, and the precision of the value is related to the times of the generated reset signal and the pixel signal, so that the invention can determine the times of reading, comparing and the like of the reset signal and the pixel signal according to the actual application condition of the CMOS under the low-light environment, thereby controlling the noise reduction effect and meeting the requirements of actual application.
Drawings
Fig. 1 is a system configuration diagram of a noise reduction system for low-light imaging of a CMOS image sensor according to a preferred embodiment of the present invention.
Fig. 2 is a distribution diagram of the positive and negative amplitudes of noise.
Fig. 3 is a diagram of practical application of the noise reduction processing of the present invention.
Detailed Description
The invention will be further described with reference to the accompanying drawings.
In the description of the present invention, unless otherwise specified and limited, it is to be noted that the term "connected" is to be interpreted broadly, and may be, for example, a mechanical connection or an electrical connection, or a communication between two elements, or may be a direct connection or an indirect connection through an intermediate medium, and a specific meaning of the term may be understood by those skilled in the art according to specific situations.
Fig. 1 is a system diagram of a noise reduction system for low-light imaging of a CMOS image sensor according to a preferred embodiment of the present invention. The pixel module 1, the amplification sampling module 2, the ADC module 3, the digital processing module 4, the RAMP generator 5 and the time sequence generator 6 are sequentially connected, and the input end of the ADC module 3 is connected with the output ends of the RAMP generator 5 and the time sequence generator 6. The pixel module 1 is used for generating a reset signal V rst And a pixel signal V sig And transmitted to the up-sampling module 2. The amplifying and sampling module 2 is used for transmitting a reset signal V to the pixel module 1 rst And a pixel signal V sig Amplifying, sampling, and holding the reset signal V rst Continuously transmitting the pixel signals to the ADC module 3 for multiple times, and maintaining the pixel signals V sig And transmitted to the ADC block 3 a plurality of times in succession. The RAMP generator 5 is used for generating and resetting a signal V rst And a pixel signal V sig Transmitting the corresponding ramp signal to the ADC module 3; the timing generator 6 is used for generating a timing signal and transmitting the timing signal to the ADC module 3; the ADC module 3 is used for amplifying and samplingReset signal V transmitted by block 2 rst And a pixel signal V sig And comparing the pulse signals with the ramp signals and generating corresponding pulse signals, then performing accumulation counting on the pulse signals according to the timing signals, and transmitting the accumulated count values to the digital processing module 4. The digital processing module 4 is configured to perform an average processing on the accumulated count value transmitted by the ADC module 3, and output a count value after noise reduction.
The amplifying and sampling module 2 comprises a programmable gain amplifier 21 and a sample hold circuit 22 which are sequentially connected, the programmable gain amplifier 21 is connected with the pixel module 1, and the programmable gain amplifier 21 is used for resetting a signal V generated by the pixel module 1 rst And a pixel signal V sig Amplifying; the sample-and-hold circuit 22 is connected to the ADC block 3, and the sample-and-hold circuit 22 amplifies the reset signal V amplified by the programmable gain amplifier 21 rst And a pixel signal V sig Sampling and holding, then first holding the reset signal V rst Continuously transmitting to ADC module 3 for many times, waiting to reset signal V rst After the transmission is completed, the pixel signal V is maintained sig And transmitted to the ADC block 3 a plurality of times in succession.
The ADC block 3 comprises a comparator 31 and a counter 32 connected in sequence, the comparator 31 is connected to the amplification sampling block 2, and meanwhile, the comparator 31 is further connected to the output terminal of the RAMP generator 5 to receive a RAMP signal Vramp generated by the RAMP generator 5, the RAMP signal comprises a first RAMP signal and a second RAMP signal, and the number of the first RAMP signal and a reset signal V are rst Corresponding to the number of the second ramp signals, and the number of the second ramp signals is equal to the number of the pixel signals V sig The RAMP generator 5 sequentially transmits the generated plurality of first RAMP signals and second RAMP signals to the comparator 31; since the amplifying and sampling module 2 has the functions of sampling and holding, the comparator 31 will read the reset signal V first rst And will reset signal V rst Comparing with the first ramp signal, generating a first pulse signal, transmitting to the counter 32, and reading the pixel signal V sig And converts the pixel signal V sig Comparing with the second ramp signal to generate a second pulse signalThe signal is then transmitted to the counter 32 to satisfy the comparison process for the ramp signal. The counter 32 is connected to the digital processing module 4, and meanwhile, the counter 32 is further connected to an output end of the timing generator 6 to receive the timing signal generated by the timing generator 6, and the counter 32 sequentially counts the first pulse signal and the second pulse signal generated by the comparator 31 according to the timing generated by the timing generator 6 and transmits the counted value to the digital processing module 4.
The digital processing module 4 is a divider, and the digital processing module 4 divides the accumulated count value transmitted by the ADC module 3 by the number of times of counting to obtain a count value after noise reduction and output the count value, so as to reduce the influence of random noise on imaging quality in a dim light environment and improve imaging effect.
The working principle of the invention is as follows:
as shown in FIG. 1, the pixel module 1 generates a reset signal V rst And a pixel signal V sig The signal is transmitted to a programmable gain amplifier 21 of the amplification sampling module 2; the programmable gain amplifier 21 applies the reset signal V rst And a pixel signal V sig Respectively amplified and transmitted to the sample hold circuit 22; the sample hold circuit 22 responds to the reset signal V rst And a pixel signal V sig Sampling and holding, then first holding the reset signal V rst The signal V to be reset is transmitted to the comparator 31 in succession rst After the transfer is completed, the sample-and-hold circuit 22 will hold the pixel signal V again sig Transmitted to the comparator 31 a plurality of times in succession; at the same time, the RAMP generator 5 also transmits the generated first RAMP signal and second RAMP signal, the number of which is respectively equal to the reset signal V, to the comparator 31 rst And a pixel signal V sig Correspondingly, the comparator 31 firstly compares the first ramp signal with the reset signal V rst Comparing the second ramp signal with the pixel signal V sig Comparing, when the first ramp signal is greater than the reset signal V rst And the second ramp signal is greater than the pixel signal V sig The comparator 31 generates the corresponding first pulse signal and second pulse signal and sequentially outputs the first pulse signal and the second pulse signalThe first pulse signal and the second pulse signal are transmitted to the counter 32; the counter 32 counts the first pulse signal and the second pulse signal in cooperation with the time sequence generated by the time sequence generator 6, and transmits an accumulated count value obtained by continuously accumulating the pulse widths of all the first pulse signal and the second pulse signal to the digital processing module 4; and finally, calculating the average value of the accumulated count value through the digital processing module 4, wherein the average value is the count value after the noise influence is reduced.
Reading reset signal V at ADC module 3 rst And a pixel signal V sig In the process of (3), the signal level entering the comparator 31 is the actual reset signal V due to the presence of random noise rst Level or actual pixel signal V sig The level is formed after superposition with a random noise level, which causes the comparator 31 to reset the signal V rst Compared with the first ramp signal or on the pixel signal V sig An error may occur in the comparison with the second ramp signal, thereby causing the count value of the counter 32 not to correctly reflect the actual reset signal V rst And a pixel signal V sig And finally, the imaging effect under low light is influenced.
In addition, although the instantaneous amplitude of the random noise is unpredictable, the amplitude distribution of the random noise conforms to a gaussian distribution, and the amplitude variation caused by the random noise is positive or negative, so that, when the sampling points are sufficient, all points with positive amplitude also follow the gaussian distribution, and the probability density function formula is:
wherein: x is the positive amplitude of a certain sampling point, sigma is the standard deviation of the positive amplitude distribution of the sampling point, and m is the average value of the positive amplitude distribution of the sampling point. For a gaussian distribution, the standard deviation σ of the positive amplitude distribution of the sampling points in the above equation is equal to the root mean square value of the pile-up noise.
Similarly, the points of negative amplitude also conform to a gaussian distribution, the formula of which is the same as the distribution of positive amplitudes. As shown in fig. 2, the distribution diagrams of the positive amplitude and the negative amplitude of the same noise source are shown, so it can be known that, for the same noise source, all the points of the positive amplitude and the points of the negative amplitude are added together to be cancelled, that is, after the corresponding positive amplitude and the negative amplitude are superposed in an infinite number of sampling, the result is 0, that is, the influence of the noise amplitude level on the actual signal level can be eliminated.
Therefore, in the same conversion period, only the reset signal V read by the ADC module 3 is needed rst And a pixel signal V sig Is enough, namely the ADC module 3 reads the reset signal V from the amplifying and sampling module 2N times respectively rst And N times pixel signal V sig And comparing 2N times with RAMP signals generated by RAMP in the ADC module 3, finally generating 2N pulse signals to the counter 32, continuously accumulating and counting the counter 32 according to 2N pulse widths to counteract the influence of instantaneous amplitude of random noise on the accumulated count value, finally dividing the final count value in the counter 32 by N through the digital processing module 4, and finally obtaining a count value which can be closer to reality, wherein the digit of the count value is consistent with that of the ADC module 3.
As shown in fig. 3, it is a practical application diagram of the noise reduction processing of the present invention, where the number of times of reading of the ADC module 3 is 16, i.e., N =16. At this time, when the RAMP generator 5 provides 16 sets of RAMP signals (i.e. 16 first RAMP signals and 16 second RAMP signals) to the comparator 31, the timing generator 6 also provides 16 sets of timings to the counter 32, and the comparator 31 first provides 16 reset signals V rst Comparing with 16 first ramp signals and generating 16 first pulse signals, and outputting 16 pixel signals V sig And comparing the digital signals with 16 second ramp signals to generate 16 second pulse signals, after the comparison is completed by the comparator 31, sequentially transmitting the 32 pulse signals to the counter 32, completing the accumulation counting work of the 32 pulse signals by the counter 32 according to 16 groups of timing signals generated by the timing generator 6, transmitting the accumulated technical value to the digital processing module 4, and finally, dividing the accumulated technical value by 16 by the digital processing module 4 to obtain a final count value after noise reduction processing.
The invention samples, reads, compares, accumulates and counts for multiple times, then takes an average valueThe effect of the random noise generating extra level is reduced, and the noise reduction effect is better when the number of reading and comparing times is more, because the whole process is to each pixel signal V sig The operation is performed, and normal CMOS image sensor arrays generally have the number of pixels of 1k × 1k, 2k × 2k or even 20k × 20k, so the present invention is well embodied in the overall application effect of large quantities.
It should be noted that, in this document, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent structures made by using the contents of the present specification and the drawings can be directly or indirectly applied to other related technical fields, and are within the scope of the present invention.
Claims (6)
1. A noise reduction system for low-light imaging of a CMOS image sensor is characterized by comprising a pixel module, an amplification sampling module, an ADC module and a digital processing module which are sequentially connected, wherein the pixel module is used for generating a reset signal and a pixel signal and transmitting the reset signal and the pixel signal to the amplification sampling module; the amplifying and sampling module is used for amplifying, sampling and holding the reset signal and the pixel signal transmitted by the pixel module and transmitting the reset signal and the pixel signal to the ADC module; the ADC module is also connected with a RAMP generator, the RAMP generator is used for generating a RAMP signal and transmitting the RAMP signal to the ADC module, the ADC module is used for comparing the reset signal and the pixel signal transmitted by the amplification and sampling module with the RAMP signal, generating a corresponding pulse signal, accumulating and counting the pulse signal, and transmitting the accumulated count value to the digital processing module; the digital processing module is used for carrying out mean value processing on the accumulated count value transmitted by the ADC module and outputting the count value after noise reduction;
the ADC module is further used for reading the reset signal and the pixel signal sampled by the amplification sampling module according to the preset times in the same conversion period, the preset times for reading the reset signal and the pixel signal by the ADC module enable points of positive amplitude and negative amplitude of random noise carried in the reset signal and the pixel signal to be in accordance with Gaussian distribution, and probability densities of the points of the positive amplitude and the negative amplitude are calculated by adopting the following functions:
wherein: p is X (x) The probability density function of a point with positive or negative amplitude, x is the positive or negative amplitude of a certain sampling point, sigma is the standard deviation of the positive or negative amplitude distribution of the sampling point, and m is the average value of the positive or negative amplitude distribution of the sampling point.
2. The CMOS image sensor low-light level imaging noise reduction system according to claim 1, wherein the amplifying and sampling module comprises a programmable gain amplifier and a sample-and-hold circuit which are connected in sequence, the programmable gain amplifier is connected with the pixel module, and the sample-and-hold circuit is connected with the ADC module; the programmable gain amplifier is used for amplifying reset signals and pixel signals generated by the pixel module, and the sampling and holding circuit is used for sampling and holding the amplified reset signals and pixel signals and sequentially transmitting the held reset signals and pixel signals to the ADC module.
3. The CMOS image sensor low-light imaging noise reduction system according to claim 1, wherein the ADC module comprises a comparator and a counter which are connected in sequence, the comparator is connected with the amplification sampling module, and the counter is connected with the digital processing module; the comparator is used for comparing the reset signal and the pixel signal with a RAMP signal generated by the RAMP generator and generating a corresponding pulse signal, and the counter is used for performing accumulated counting on the pulse signal generated by the comparator and transmitting the accumulated count value to the digital processing module.
4. The noise reduction system for low-light imaging of the CMOS image sensor as claimed in claim 1, wherein the ramp signal comprises a first ramp signal and a second ramp signal, the first ramp signal is used for comparing with the reset signal and generating a first pulse signal, and the second ramp signal is used for comparing with the pixel signal and generating a second pulse signal.
5. The noise reduction system for micro-light imaging of the CMOS image sensor as claimed in claim 1, further comprising a timing generator connected to the ADC module, wherein the timing generator is configured to generate a timing signal for providing timing for the ADC module to count the pulse signal.
6. The noise reduction system for micro-light imaging of the CMOS image sensor as claimed in claim 1, wherein the digital processing module is a divider, and the digital processing module is configured to divide the accumulated count value transmitted by the ADC module by the number of counts to obtain a count value after noise reduction and output the count value.
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