Disclosure of Invention
The invention aims to provide a preparation method of an AlGaInP thin film LED chip with a specific light-emitting pattern, which can realize a specific light-emitting pattern, also can prepare a plurality of independent light-emitting patterns on one LED chip, and realizes independent control of each light-emitting pattern through independent electrode design and the like. The LED chip has strong application flexibility and has good application prospect in the specific indication and display fields.
The purpose of the invention is realized as follows:
a preparation method of an AlGaInP film LED chip with a specific luminous pattern is characterized in that: the method comprises the following specific steps:
a) providing a substrate, and forming an LED epitaxial layer on the substrate, wherein the LED epitaxial layer is respectively a corrosion cut-off layer, an n-type ohmic contact layer, an n-type layer, a light emitting layer and a p-type layer from bottom to top;
b) forming a P-surface passivation layer on the LED epitaxial layer, patterning the P-surface passivation layer to expose part of the P-type layer, and then sequentially preparing a P electrode and a bonding protection layer; in the area without the P-surface passivation layer, the P electrode is connected with the P-type layer; the prepared P electrode is covered on the whole surface or is patterned;
c) providing a supporting substrate, and forming a bonding metal layer on the front surface of the supporting substrate;
d) bonding the LED epitaxial layer and the support substrate together through a bonding metal layer and a bonding protective layer by adopting a wafer thermocompression bonding method;
e) removing the substrate; the LED epitaxial layer is transferred to a support substrate from a substrate, and the corrosion cut-off layer, the n-type ohmic contact layer, the n-type layer, the light emitting layer and the p-type layer are sequentially arranged from the upper surface of the LED epitaxial layer to the support substrate;
f) removing the corrosion stopping layer;
g) removing the n-type ohmic contact layer of the set region to expose the n-type layer of the set region;
h) removing part of the LED epitaxial layer, namely the patterned LED epitaxial layer, so that the remained LED epitaxial layer is a set pattern which corresponds to the final luminous pattern of the LED chip;
i) preparing a pn junction passivation layer on the surface of the LED epitaxial layer, and patterning the pn junction passivation layer to expose the n-type ohmic contact layer; wrapping the edge and the side wall of the LED epitaxial layer by the pn junction passivation layer, or covering the surface and the side wall of the LED epitaxial layer except the light-emitting pattern region and the n-type ohmic contact layer by the pn junction passivation layer, or covering the surface and the side wall of the whole chip except the light-emitting pattern region and the n-type ohmic contact layer by the pn junction passivation layer;
j) preparing an N electrode, and patterning the N electrode to ensure that a light-emitting pattern area has no N electrode, wherein the N electrode not only covers the N-type ohmic contact layer for conducting, but also covers the upper part of the LED epitaxial layer except the light-emitting pattern area for blocking light, so that the light emitted by the LED epitaxial layer is only emitted from the set light-emitting pattern area, and the LED chip with a specific light-emitting pattern is obtained;
k) preparing a surface passivation layer to protect the exposed light-emitting pattern region, and patterning the surface passivation layer to expose the bonding pad;
l) cutting by using a cutting tool to form N independent LED chips.
Preferably, the material of the P-side passivation layer in the step b) is SiO2Or SiNx。
Preferably, the P-side passivation layer in the step b) covers the edge of the LED epitaxial layer remained in the step h), so that the side wall and the edge of the LED epitaxial layer are completely wrapped by the P-side passivation layer and the pn junction passivation layer, and the reliability of the LED chip is ensured.
Preferably, the P-side passivation layer in step b) covers the edge of the epitaxial layer remaining in step h) by 1-5 μm.
Preferably, the P-electrode in step b) can form ohmic contact with the P-type layer, and has a higher reflection coefficient, so that the light extraction efficiency of the LED chip can be improved.
Preferably, the temperature of the wafer thermocompression bonding in the step d) is 80-250 ℃, and the bonding pressure is 10-50kg/cm2The bonding time is 10-40 min.
Preferably, the exposed n-type layer is subjected to surface roughening after the step g), so that the light extraction efficiency of the LED chip can be improved.
Preferably, in step i), a pn junction passivation layer is grown by using a chemical vapor deposition, a physical vapor deposition, an atomic layer deposition or a sol-gel method, the pn junction passivation layer covers the surface and the side wall of the whole LED chip, and then the pn junction passivation layer in the light-emitting pattern region is removed by photolithography and etching.
Preferably, the patterned LED epitaxial layer remaining after step h) has a planar geometric structure of circular, triangular or square shape, or contains various text shapes, the pattern being continuous or independent.
Preferably, mutually independent and unconnected LED epitaxial layers are reserved on the same LED chip, and meanwhile, independent P electrodes or N electrodes are respectively prepared on the surfaces of the mutually independent LED epitaxial layers, so that independent control over a plurality of separated light-emitting patterns can be realized by supplying power to different electrodes.
Preferably, the LED epitaxial layer patterned in step h) is subjected to sidewall tilting by dry etching or wet etching.
Preferably, the patterned N electrode in the step j) covers not only the upper part of the LED epitaxial layer or the pn junction passivation layer except the light-emitting pattern, but also the side wall of the LED epitaxial layer, so that light leakage from the side surface of the LED chip is avoided, and the quality of the light-emitting pattern is improved.
The invention can be used in the fields of indication, display and the like, has the advantages of more energy saving, better luminous pattern effect, richer patterns and the like compared with the scheme of realizing a specific luminous pattern by adopting the light shielding sheet at present, and is favorable for batch production. In addition, the invention can also realize the independent control of a plurality of separated luminous patterns on the same LED chip.
Detailed Description
The technical solution in the embodiment of the present invention is further described below with reference to the drawings in the embodiment of the present invention. In addition, the drawings of the present invention are not to scale, but are to be understood as being simplified and not to scale.
Example 1:
in this embodiment, a method for manufacturing an AlGaInP thin film LED chip with a circular light emitting pattern is provided, where before formal chip manufacturing, shapes of layers in a chip structure are designed according to the light emitting pattern, and the specific chip manufacturing includes the following steps:
a) providing a substrate 101, growing an LED epitaxial layer 100 on the substrate 101 by using MOCVD, wherein the LED epitaxial layer 100 is respectively a corrosion stop layer 102, an n-type ohmic contact layer 103, an n-type layer 104, a light emitting layer 105 and a p-type layer 106 from bottom to top, as shown in FIG. 1;
b) as shown in fig. 2(a), a P-side passivation layer 201 is formed on the LED epitaxial layer 100, the P-side passivation layer 201 is patterned to expose a part of the P-type layer 106, and then a P-electrode 202 and an adhesive protection layer 203 are sequentially prepared;
the P-side passivation layer 201 is a dielectric layer with poor conductivity, such as SiO2(ii) a A P-surface ohmic contact is formed at the joint of the P-electrode 202 and the P-type layer 106; the P electrode prepared in this embodiment is covered on the whole surface, and a patterned P electrode can also be prepared; the P-electrode 202 is a metal single layer with high reflectivity or a metal stack with high reflectivity; the P-side passivation layer 201 can help to improve the reflectivity of the P-electrode 202; the thickness of the P electrode 202 is 0.05-1 μm. The material of the bonding metal layer 203 is a metal single layer with acid-base corrosion resistance or a laminated structure, and the thickness of the bonding protective layer 203 is 0.1-10 μm;
after the step b) is finished, the surface structure of the chip is shown as a top view 11(c), wherein black represents an area with a P-side passivation layer, and white represents an area without the P-side passivation layer;
c) providing a support substrate 301, and depositing a bonding metal layer 302 on the front surface of the support substrate 301; the supporting substrate 301 has good electrical conductivity and thermal conductivity, and the thickness of the supporting substrate 301 is 50-600 μm; the material of the bonding metal layer 202 has a low melting point or better fluidity, and the thickness of the bonding metal layer 202 is 0.5-10 μm;
d) bonding the LED epitaxial layer 100 and the support substrate 301 together through the bonding metal layer 302 and the bonding protective layer 203 by adopting a wafer thermocompression bonding method; the wafer hot-pressing bonding temperature is 80-250 ℃, and the bonding pressure is 10-50kg/cm2The bonding time is 10-40 min; the structure is shown in fig. 3 (a);
e) removing the substrate 101;
f) removing the corrosion stop layer 102; after this step is completed, the n-type ohmic contact layer 103, the n-type layer 104, the light emitting layer 105, and the p-type layer 106 are formed in this order from the upper surface to the supporting substrate 301, as shown in fig. 4 (a);
in this embodiment, the substrate 101 is GaAs, and the substrate 101 is removed by wet etching using a mixed solution of ammonia and hydrogen peroxide, or by dry etching. This step enables the transfer of the LED epitaxial layers 100 from the substrate 101 to the support base plate 301. In the embodiment, the corrosion stop layer 102 is GaInP, and the wet etching is performed by removing the corrosion stop layer 102 by using a mixed solution of hydrochloric acid and phosphoric acid;
g) removing the n-type ohmic contact layer 103 in the set region to expose the n-type layer 104 in the region; then, roughening the surface of the n-type layer 104, as shown in fig. 5(a), or performing microstructure surface treatment on the surface of the n-type layer 104 to improve the light extraction efficiency;
h) removing part of the LED epitaxial layer 100 to obtain a patterned LED epitaxial layer 000, which has a structure shown in fig. 6 (a);
after step h), the patterned LED epitaxial layer 000 is left in a set circular shape, as shown in the black area of fig. 11 (b); the patterned LED epitaxial layer 000 corresponds to the final emission pattern, as shown by the white area of fig. 11 (d);
i) preparing a pn junction passivation layer 701 on the surface of the LED epitaxial layer, and patterning the pn junction passivation layer, as shown in FIG. 7(a), in the present embodiment, the pn junction passivation layer 701 covers the surface and the sidewall of the whole chip except for the light-emitting pattern region and the n-type ohmic contact layer region;
after the step i) is finished, the surface structure of the chip is shown as a top view 11(e), wherein black represents a pn junction passivation layer 701, and white regions are a light-emitting pattern region and an n-type ohmic contact layer region; as shown in fig. 11(f), the light emitting pattern region is a circle at the center, and the n-type ohmic contact layer 103 region is a ring shape surrounding the light emitting pattern;
j) preparing an N electrode 801 and patterning the N electrode, as shown in fig. 8(a), in the present embodiment, the N electrode 801 layer covers the surface and the sidewall of the entire chip except for the light emitting pattern region; directly contacting the n-type ohmic contact layer 103 and the pn junction passivation layer;
after the step j) is finished, the surface structure of the chip is shown as a top view 11(d), wherein black represents an N electrode, white represents a light-emitting pattern area, and the thickness of the N electrode 801 is 0.1-10 μm;
k) preparing a surface passivation layer 901 to protect the exposed light-emitting pattern region, and patterning the light-emitting pattern region to leave a bonding pad, i.e. a routing position (in this embodiment, since the surface of the whole chip except the light-emitting region is provided with N electrodes, a separate bonding pad is not designed);
l) cutting by using a cutting tool to form N independent LED chips.
The material for growing the pn junction passivation layer 701 is a single layer or a plurality of stacked layers of silicon oxide, silicon nitride, silicon oxynitride, polyimide, aluminum oxide, aluminum nitride and titanium oxide; the thickness of the pn junction passivation layer 701 is 0.01 μm to 10 μm.
As shown in fig. 10, in this embodiment, the LED epitaxial layer 100 is an AlGaInP thin film LED structure with a tilted sidewall, and the tilt angle of the sidewall of the LED epitaxial layer 100 is 1 to 179 °, which can be realized by wet etching or dry etching.
Fig. 11 is a top view of a surface structure of an LED chip with a circular light-emitting pattern according to the present embodiment. Corresponding to the circular light emitting pattern, the patterned LED epitaxial layer 000 is designed to be circular, and the P-side passivation layer 201, the pn junction passivation layer 701 and the N electrode 801 are complementary to the circular shape, that is, the region without the P-side passivation layer 201, the pn junction passivation layer 701 or the N electrode 801 on the whole chip is circular. The diameter of each circle is defined as a characteristic dimension d, and as shown in fig. 11(a), the logical relationship of the characteristic dimension d is: d1 < d2 ═ d3 < d4 ═ d5 < d6, wherein d1, d2, d3, d4, d5 and d6 correspond to the diameters of the P-side passivation layer 201, the N-electrode 801, the inner ring of the N-type ohmic contact layer 103, the outer ring of the N-type ohmic contact layer 103, the pn-junction passivation layer 701 and the light-emitting layer 105, respectively.
Example 2:
the embodiment provides a preparation method of an AlGaInP thin-film LED chip which has two luminous patterns and can be controlled independently, wherein the two luminous patterns are circular and square, and the specific chip preparation comprises the following steps:
a) providing a substrate 101, growing an LED epitaxial layer 100 on the substrate 101 by using MOCVD, wherein the epitaxial layer 100 is respectively a corrosion stop layer 102, an n-type ohmic contact layer 103, an n-type layer 104, a light emitting layer 105 and a p-type layer 106 from bottom to top, as shown in FIG. 1;
b) as shown in fig. 2(b), a P-side passivation layer 201 is formed on the LED epitaxial layer 100, the P-side passivation layer 201 is patterned to expose a part of the P-type layer 106, and then a P-electrode 202 and an adhesive protection layer 203 are sequentially prepared;
the P-side passivation layer 201 is a dielectric layer with poor conductivity, such as SiO2(ii) a A P-surface ohmic contact is formed at the joint of the P-electrode 202 and the P-type layer 106; the P electrode prepared in this embodiment is covered on the whole surface, and a patterned P electrode can also be prepared; the P-electrode 202 is a metal single layer with high reflectivity or a metal stack with high reflectivity; the P-side passivation layer 201 can help to improve the reflectivity of the P-electrode 202; the thickness of the P electrode 202 is 0.05-1 μm. The material of the bonding metal layer 203 is a metal single layer with acid-base corrosion resistance or a laminated structure, and the thickness of the bonding protective layer 203 is 0.1-10 μm;
after the step b) is finished, the surface structure of the chip is shown as a top view 12(c), wherein black represents an area with a P-side passivation layer, and white represents an area without the P-side passivation layer;
c) providing a support substrate 301, and depositing a bonding metal layer 302 on the front surface of the support substrate 301; the supporting substrate 301 has good electrical conductivity and thermal conductivity, and the thickness of the supporting substrate 301 is 50-600 μm; the material of the bonding metal layer 202 has a low melting point or better fluidity, and the thickness of the bonding metal layer 202 is 0.5-10 μm;
d) bonding the epitaxial layer 100 and the substrate 301 together through the bonding metal layer 302 and the bonding protective layer 203 by adopting a wafer thermocompression bonding method; the wafer hot-pressing bonding temperature is 80-250 ℃, the bonding pressure is 10-50kg/cm2, and the bonding time is 10-40 min; the structure is shown in fig. 3 (b);
e) removing the substrate 101;
f) removing the corrosion stop layer 102; after this step is completed, the n-type ohmic contact layer 103, the n-type layer 104, the light-emitting layer 105, and the p-type layer 106 are formed in this order from the surface to the supporting substrate 301, as shown in fig. 4 (b);
in this embodiment, the substrate 101 is GaAs, and the substrate 101 is removed by wet etching using a mixed solution of ammonia and hydrogen peroxide, or by dry etching. This step enables the transfer of the LED epitaxial layers 100 from the substrate 101 to the base plate 301. In the embodiment, the corrosion stop layer 102 is GaInP, and the wet etching is performed by removing the corrosion stop layer 102 by using a mixed solution of hydrochloric acid and phosphoric acid;
g) removing the n-type ohmic contact layer 103 in the set region to expose the n-type layer 104 in the region; then, roughening the surface of the n-type layer 104, as shown in fig. 5(b), or performing microstructure surface treatment on the surface of the n-type layer 104 to improve the light extraction efficiency;
h) removing part of the LED epitaxial layer 100 to obtain a patterned LED epitaxial layer 000, which has a structure shown in fig. 6 (b);
after step h), the remaining patterned LED epitaxial layer 000 is circular and square independent of each other, as shown by the black area in fig. 12 (b); patterning the epitaxial layer 000 corresponds to the final emission pattern, as shown by the white area in fig. 12 (d);
i) preparing a pn junction passivation layer 701 on the surface of the epitaxial layer and patterning the pn junction passivation layer, as shown in fig. 7(b), in the present embodiment, the pn junction passivation layer 701 covers the surface and the sidewall of the whole chip except for the light emitting pattern region and the n-type ohmic contact region;
after the step i) is finished, the surface structure of the chip is shown as a top view 12(g), wherein black represents that a pn junction passivation layer 701 is arranged, and a white area does not have the pn junction passivation layer 701 and is a light-emitting pattern area and an n-type ohmic contact layer area; as shown in fig. 12(d), the light emitting pattern region is a circle or a square, and the n-type ohmic contact layer 103 surrounds the light emitting pattern;
j) preparing an N electrode 801 and patterning the N electrode, as shown in fig. 8(b), different from embodiment 1, in this embodiment, the N electrode 801 layer does not cover the surface and the sidewall of the whole chip except for the light emitting pattern region, but only covers the upper side and the sidewall of the N-type ohmic contact layer 103 and the patterned epitaxial layer 000, the circular light emitting pattern is separated from the N electrode of the square light emitting pattern, and leads are led out from respective pads, so as to realize independent control of different light emitting patterns;
after the step j) is finished, the surface structure of the chip is shown as a top view 12(f), wherein black represents an N electrode, white represents a light-emitting pattern area, and the thickness of the N electrode 801 is 0.1-10 μm;
k) preparing a surface passivation layer 901 to protect the exposed light-emitting pattern region, and patterning the light-emitting pattern region to expose the bonding pad;
after the step k), the surface structure of the chip is shown in a top view 12(e), wherein black represents a surface passivation layer, white represents a bonding pad area, and the thickness of the N electrode 801 is 0.1-10 μm;
l) cutting by using a cutting tool to form N independent LED chips.
The material for growing the pn junction passivation layer 701 is a single layer or a plurality of stacked layers of silicon oxide, silicon nitride, silicon oxynitride, polyimide, aluminum oxide, aluminum nitride and titanium oxide; the thickness of the pn junction passivation layer 701 is 0.01 μm to 10 μm.
Fig. 12 is a top view of the chip surface structure in the fabrication process of an AlGaInP thin film LED chip with two light emitting patterns and capable of being controlled independently according to this embodiment. The patterned LED epitaxial layer 000 is designed into independent circles and squares corresponding to the circular and square light emitting patterns, and the P-side passivation layer 201, the pn-junction passivation layer 701 and the N-electrode 801 are complementary to the light emitting patterns, i.e. the region without the P-side passivation layer 201, the pn-junction passivation layer 701 or the N-electrode 801 on the whole chip is circular and square. The diameter of each circle is defined as a characteristic dimension d, and as shown in fig. 12(a), the logical relationship of the characteristic dimension d is: d1 < d2 ═ d3 < d4 ═ d5 < d6 < d7, wherein d1, d2, d3, d4, d5, d6 and d7 correspond to the diameters of the P-side passivation layer 201, the inner circle of the N-electrode 801, the inner circle of the N-type ohmic contact layer 103, the outer circle of the N-type ohmic contact layer 103, the pn-junction passivation layer 701, the light-emitting layer 105 and the outer circle of the N-electrode 801, respectively. Defining the side length of each square as a feature size l, as shown in fig. 12(a), the logical relationship of the feature size l is: l1 < l2 ═ l3 < l4 ═ l5 < l6 < l7, wherein l1, l2, l3, l4, l5, l6, and l7 correspond to the P-side passivation layer 201, the inner side of the N-electrode 801, the inner side of the N-type ohmic contact layer 103, the outer side of the N-type ohmic contact layer 103, the pn-junction passivation layer 701, the diameter of the light-emitting layer 105, and the outer side of the N-electrode 801, respectively.
In embodiment 2, two light emitting pattern circles and squares are independent of each other, have a common P electrode and an individual N electrode, and can be individually controlled by simply selectively conducting the N electrode.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.