Disclosure of Invention
The invention aims to provide a battery self-checking encryption method, a self-checking encryption circuit and a battery management circuit for improving the performance of a battery pack and ensuring the information safety of a battery, and solves the problems of mismatching of battery pack consistency and unsafe battery information.
Based on the above object, the present invention provides a battery self-checking authentication method applied to a battery management circuit, wherein the battery unit information is self-checked, and if the information of a certain battery unit does not meet the requirement of consistency of a battery pack, the battery unit is not connected to the battery pack; the battery management circuit encrypts battery cell information that is entered into the battery pack.
Optionally, when the main controller needs to acquire the battery information, the main controller sends authentication information to the battery management circuit to perform identity verification, and after the identity verification passes, the main controller decrypts the battery information to acquire the battery information.
Optionally, an international cryptographic algorithm AES or a national cryptographic algorithm SM4 is used for information encryption and decryption.
Optionally, an international cryptographic hash algorithm SHA or a national cryptographic algorithm SM3 is used for identity authentication.
Optionally, the battery cell information self-test includes at least one of manufacturer, nominal capacity, type, model, batch, production date, voltage, current, temperature, and cycle number.
Optionally, the battery cell information self-check includes a battery actual capacity self-check, and the battery actual capacity self-check includes a voltage difference self-check of the battery cell when the battery pack is fully charged and a voltage difference self-check of the battery cell when the battery pack is fully discharged.
The invention also provides a battery self-checking circuit, which is used for self-checking the information of the battery unit, and if the information of a certain battery unit does not accord with the consistency requirement of the battery pack, the battery unit is not connected with the battery pack; the battery management circuit encrypts battery cell information that is entered into the battery pack.
Optionally, when the main controller needs to acquire the battery information, the authentication information is sent first to perform identity verification, and after the identity verification passes, the main controller decrypts the battery information to acquire the battery information.
The invention also provides a battery management circuit, which is characterized in that: a battery self-test circuit as claimed in any one of claims 7 or 8 integrated into a battery management circuit.
Compared with the prior art, the invention has the following advantages: the certified battery cells can ensure that the battery packs are from the same battery manufacturer, the same batch and the characteristics of the battery cells are consistent. When battery consistency is ensured, accurate battery equalization is achieved and safe operation of the battery system at its maximum capacity is ensured.
Detailed Description
Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, but the present invention is not limited to only these embodiments. The invention is intended to cover alternatives, modifications, equivalents and alternatives which may be included within the spirit and scope of the invention.
In the following description of the preferred embodiments of the present invention, specific details are set forth in order to provide a thorough understanding of the present invention, and it will be apparent to those skilled in the art that the present invention may be practiced without these specific details.
The invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. It should be noted that the drawings are in simplified form and are not to precise scale for the purpose of facilitating and clearly explaining the embodiments of the present invention.
As shown in fig. 1, a block diagram of a battery management circuit of the present invention is illustrated, and analog and digital circuits such as a plurality of cell monitoring and protection modules, a one-time programmable (OTP) module 19, an EEPROM memory module 20, an algorithm engine module 21, and an MCU 18 are integrated into one chip to form a system-on-chip 10 by using a BCD high-voltage process, so as to meet the requirements of high-reliability electric and hybrid vehicles (EV, HEV, PHEV, and mild hybrid) applications. The algorithm engine module carries out AISC curing on the SHA/AES/SM3/SM4 algorithm, and the algorithm has the advantages of high operation speed, high efficiency and no occupation of MCU time.
As shown in fig. 2, a flow chart illustrating the battery self-check encryption of the present invention includes the following steps:
s1: self-checking battery unit information, and if the information of a certain battery unit does not meet the consistency requirement of the battery pack, not accessing the battery pack by the battery unit;
s2: the information of each battery of the battery pack is stored in a battery management circuit and is stored in an EEPROM in an encrypted manner, and the stored information cannot be lost when a system is powered down;
s3: when the host needs to read the battery information stored by the battery management circuit, the host firstly performs identity authentication; and after the authentication is passed, decrypting the battery information.
The consistency requirement of the battery can be set according to the actual application requirement;
the battery information self-checking scheme of step S1 includes:
(1) the host microcontroller writes parameters such as battery Manufacturer information, manufacturing lot information, nominal voltage value when the battery core leaves the factory, nominal current value, temperature range, etc. into the upper 3 bytes of Manufacturer data (4 bytes, manfacturer _ ID) in the OTP 19 through the UART 24.
(2) The full capacity of each single cell in the battery pack is collected, wherein the full capacity refers to the charge amount reaching 90%, because the service life of the battery is rapidly reduced by keeping the battery at (or close to) 100% of the capacity position for a long time. And calculating the voltage pole difference value Vfill _ ep of the full capacity of the single battery cell, wherein if the Vfill _ ep is more than or equal to rho multiplied by Vstd, the full capacity performance of the single battery cell is poor. Vfull _ ep is max (| Vfull _ n-Vfull _ m |), wherein Vfull _ n and Vfull _ m represent full-capacity voltage values of two different battery cells, ρ is a mismatch coefficient, and has a value range of 10% -20%, and Vstd is a nominal voltage value stored in the OTP when the battery cells leave a factory.
(3) The voltage value of the empty capacity of each single battery cell in the battery pack is collected, the empty capacity refers to the battery capacity when the battery is discharged to 30% instead of being completely discharged to 0, and therefore the battery can be prevented from entering a deep discharge state. And (4) calculating a voltage pole difference value Vempty _ ep of the empty capacity of the single battery cell, wherein if the Vempty _ ep is more than or equal to rho multiplied by Vstd, the empty capacity performance of the battery cell is poor. The value of "v" is not limited to "max" (| v _ n-v _ m |), where v _ n and v _ m represent two different cell empty capacity voltage values.
(4) And positioning the single battery cell with the worst full capacity consistency in the battery pack, calculating a relative polarization value Rfull _ ep, and when Rfull _ ep (i) of a certain single battery cell is more than or equal to rho, determining that the full capacity consistency of the battery cell is the worst. And Rfull _ ep (i) ═ max (| Vfull _ i-Vfull _ mean |)/Vfull _ mean × 100%, where Vfull _ i is a full-capacity voltage value of a certain single cell, and Vfull _ mean is an average value of full-capacity voltages of all cells.
(5) And positioning the single battery cell with the worst hollow capacity consistency of the battery pack, calculating a relative polarization value Rempty _ ep, and when the Rempty _ ep (i) of a certain single battery cell is more than or equal to rho, determining that the hollow capacity consistency of the battery cell is the worst. The cell voltage value of each cell is equal to or greater than a predetermined value, and the cell voltage value of each cell is equal to or greater than a predetermined value.
(6) After the self-test is completed, if all the battery cells meet the requirements of full capacity and empty capacity consistency, the highest bit of the lowest byte of Manufacturer data (4 bytes, Manufacturer _ ID) in the OTP 19, namely the authentication identification bit "AUTHEN" is written to "1", otherwise, "0" is written, and write protection is immediately started after data is written, and the lowest byte can only be written inside the chip. In the daisy chain centralized BMS system, the host microcontroller reads the authentication identification bit of each slave chip through the Isolate UART 23, if the read AUTHEN bit is '1', the slave chip passes the consistency self-checking authentication, otherwise, the slave chip does not pass the consistency self-checking authentication.
The information encryption and decryption in the steps 2 and 3 can adopt an international quotient secret algorithm AES or a national secret algorithm SM 4; the identity authentication in step 2 can adopt an international secret hash algorithm SHA or a national secret algorithm SM 3.
Fig. 3 illustrates an identity authentication flow chart of the present invention, when the host needs to read the battery information, the identity authentication needs to be performed first, and the data encrypted by the EEPROM in the battery monitoring chip can be read only after the identity authentication is passed. The EEPROM has three modes of write protection, read protection and authentication protection, when the corresponding function is enabled, the internal fuse is fused and the corresponding protection function is started, and once the corresponding protection function is enabled, the internal fuse is irreversible. The identity authentication step is as follows:
(1) the host microcontroller writes 8 bytes (64 bits) of SN and 4 bytes of Manufacturer _ ID in the OTP through a UART (universal asynchronous receiver/transmitter) of the slave chip, the Manufacturer data are Manufacturer information of the battery cell and various parameters of the battery cell, and 20 bytes of identity authentication key (Secret _ ID) are written in the EEPROM; in the cascade structure, the key data written in each chip needs to be different, and the host can generate a plurality of groups of keys with 20 bytes through the random number generator and properly store the keys. The host's random number may be generated by hardware as a true random or implemented by software as a pseudo random.
(2) The slave chip inputs 20 bytes of Secret, 4 bytes of Manufacturer _ ID, 8 bytes of SN, 22 bytes of local data (Partial) and 10 bytes of Binding data (Binding) into a one-way Hash function to obtain 256-bit Hash value (Hash), and then stores the Hash value in a register (Scatchpad). The Binding data can make Hash calculation more Hash, the Partial data can be used for calculating different Hash values and applied to the dynamic identity authentication service, and the default value is all 0x 00. Different Partial data are randomly written into the slave by the host during working to obtain different Hash values, so that the condition that a data interception party cheats identity authentication by simulating the same Hash value externally after the Hash value fixed on a bus is intercepted is avoided.
(3) After the host sends an identity authentication command to the Slave chip, the 256-bit Hash value Slave _ Hash is read from the temporary storage. The host microcontroller inputs the same 64-byte Message data into a one-way Hash function to obtain a 256-bit Hash value (Master _ Hash), and the host compares whether the Slave _ Hash and the Master _ Hash are the same or not, if so, the identity authentication is passed, otherwise, the identity authentication is not passed. The SHA or SM3 algorithm of the host computer can be realized by micro-control software or a solidified algorithm module, preferably a solidified algorithm module, so that the operation speed is high and the efficiency is high. In the daisy chain cascade structure, when the host needs to read the battery information data of a certain slave, the host needs to address first and then authenticate one to one identity before realizing the operation.
Fig. 4 illustrates an information encryption flow chart of the present invention, and the encryption steps are: (1) firstly, a True Random Number Generator (TRNG) arranged in a chip generates 20 bytes of true random numbers called Salt (Salt), then the Salt with 20 bytes, the Manufacturer _ ID with 4 bytes, the SN with 8 bytes, the Partial with 22 bytes and the Binding with 10 bytes are input into a one-way hash function with 64 bytes to obtain 256-bit hash values and the 256-bit hash values are stored in a temporary memory, wherein continuous 128 bits are taken as a key KEK of an encryption session key, and the initial bits of the value are appointed by parameter bytes of an ID card command sent by a host; (2) then, the true random number generator generates a 128-bit session key CEK, the session key CEK is encrypted by AES or SM4 with the key KEK generated in the step (1) to generate an enypCEK, and then the KEK is discarded; (3) storing the encrypted session key encrypt CEK in an EEPROM; (4) the battery information is encrypted with the session key CEK and stored in EEPROM, and the CEK is then discarded.
FIG. 5 is a flowchart illustrating the host decryption process of the present invention, the decryption steps being: (1) firstly, the host performs identity authentication, and the initial bit of the selection key KEK is agreed in the parameter byte of the identity authentication command sent by the host, which is 0x00 as a default, that is, from the first bit. After the authentication is passed, the host sends a command for obtaining the session key to obtain a 256-bit Hash value and a 128-bit encrypted session key encrypt CEK; (2) intercepting a key KEK of the session key at the correct position from the 256-bit Hash value; (3) running AES or SM4 decryption algorithm, decrypting 128-bit session key CEK according to key KEK, and then discarding KEK; (4) the host sends a command for reading battery information and acquires data; (5) running AES or SM4 decryption algorithm, decrypting the battery information data according to the session key CEK and storing, and then discarding the CEK.
The AES or SM4 algorithm of the host can be realized by micro-control software or a solidified algorithm module, preferably a solidified algorithm module, so that the running speed is high and the efficiency is high.
Although the embodiments have been described and illustrated separately, it will be apparent to those skilled in the art that some common techniques may be substituted and integrated between the embodiments, and reference may be made to one of the embodiments not explicitly described, or to another embodiment described.
The above-described embodiments do not limit the scope of the present invention. Any modification, equivalent replacement, and improvement made within the spirit and principle of the above-described embodiments should be included in the protection scope of the technical solution.