CN112817889B - Data acquisition method and system - Google Patents
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- CN112817889B CN112817889B CN201911118023.1A CN201911118023A CN112817889B CN 112817889 B CN112817889 B CN 112817889B CN 201911118023 A CN201911118023 A CN 201911118023A CN 112817889 B CN112817889 B CN 112817889B
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Abstract
The application discloses a data acquisition method and a system, wherein the data acquisition method comprises the following steps: for each tile in the storage area, judging whether the data line number of a first data line in the tile is equal to the current line number, and judging whether the data line number of a second data line in the tile is equal to the sum of the current line number and a preset value; and if the judgment result of one of the data lines is equal to the judgment result of the first data line, cutting the first data line in the corresponding fragment to a preset space, and setting the data line number of the first data line cut to the preset space as the current line number. The data acquisition method can ensure the synchronism of the data acquired by a plurality of camera boards.
Description
Technical Field
The present application relates to the field of imaging technologies, and in particular, to a method and a system for acquiring data.
Background
In the related art, a five-line array camera board can be connected through an adapter board, and meanwhile, five-channel data are collected, wherein 5 network ports are arranged on the adapter board, the five network ports are in one-to-one corresponding communication connection with the five camera boards, and then are integrally uploaded to an upper computer for processing through a CameraLink interface.
However, in the course of implementing the present invention, the inventors found that there are at least the following problems in the related art: if one line of data is lost abnormally in the transmission process of a certain camera board, the signals of the camera boards in all subsequent lines are delayed by one line compared with the other lines, if a plurality of lost lines appear more, the image synthesized by the upper computer by adopting the received line data is more and more disordered, besides the whole reset and no other method can be solved, and the synchronism and the reliability of the data acquired by a plurality of camera boards are greatly reduced.
Disclosure of Invention
The present application aims to solve at least one of the technical problems in the related art described above to some extent.
To this end, a first object of the application is to propose a method of data acquisition. The data acquisition method can effectively ensure the synchronism of the data acquired by the plurality of camera boards.
A second object of the present application is to provide a data acquisition system.
To achieve the above object, an embodiment of a first aspect of the present application discloses a data acquisition method, including the steps of: for each tile in the storage area, judging whether the data line number of a first data line in the tile is equal to the current line number, and judging whether the data line number of a second data line in the tile is equal to the sum of the current line number and a preset value; wherein, the data in each of the plurality of tiles in the storage area is written by a corresponding fifo on the interposer; and if the judgment result of one of the data lines is equal to the judgment result, cutting the first data line in the corresponding fragment to a preset space, and setting the data line number of the first data line cut to the preset space as the current line number.
According to the data acquisition method, the data of the lost line can be supplemented by the data of the adjacent area by modifying the data line number, and the synchronism and the reliability of the data acquired by a plurality of camera boards can be ensured, so that the accuracy of picture recovery is improved.
In some examples, further comprising: if the data line number of the first data line is larger than the current line number and the data line number of the second data line is larger than the sum of the current line number and a preset value, copying the first data line to the preset space, and setting the data line number of the first data line copied to the preset space as the current line number. Through the step, more error conditions can be adjusted, and the synchronism and the reliability of data acquired by a plurality of camera boards are further ensured, so that the accuracy of picture recovery is improved.
In some examples, further comprising: and if the data line number of the first data line is smaller than the current line number and the data line number of the second data line is smaller than the sum of the current line number and the preset value, changing the data reading address of the corresponding fragment so as to skip reading the first data line and update the second data line into the first data line. Also, through the step, more error conditions can be adjusted, and the synchronism and the reliability of data acquired by a plurality of camera boards are further ensured, so that the accuracy of picture recovery is improved.
In some examples, for each tile in the storage area, determining whether the data line number of the first data line in the tile is equal to the current line number, and whether the data line number of the second data line in the tile is equal to the sum of the current line number and the preset value includes: updating the current line number, and setting each tile in the current line number lower storage area to be in an unread state; for each tile in the unread state in the storage area, judging whether the data line number of the first data line in the tile is equal to the current line number, and judging whether the data line number of the second data line in the tile is equal to the sum of the current line number and a preset value. And responding to the update of the current line number, and setting the state of each fragment under the current line number so as to facilitate the rapid processing of the data of each fragment.
In some examples, after shearing the first data line in the respective tile to a preset space or copying the data of the first data line in the respective tile to the preset space, the method further comprises: and setting the corresponding tile under the current line number to be in a read state. The time of caching data in each slice may not be synchronous, the slice is set to an unread state before the data is read for the current line number, and the slice is set to a read state after the data is read, so that the data of each slice can be read accurately and quickly through the setting of the read unread state.
In some examples, the method further comprises: detecting whether a first data line and a second data line are cached in each piece of the storage area which is in an unread state under the current line number; for each tile in the storage area, determining whether the data line number of the first data line in the tile is equal to the current line number, and whether the data line number of the second data line in the tile is equal to the sum of the current line number and a preset value, includes: if it is detected that the first data line and the second data line are cached in the area, which is in the unread state, under the current line number in the storage area, then for each area in the storage area, judging whether the data line number of the first data line in the area is equal to the current line number, and whether the data line number of the second data line in the area is equal to the sum of the current line number and a preset value. After two lines of data are confirmed to be cached, the subsequent reading operation is carried out, and the data can be read out quickly, timely and accurately.
In some examples, the method further comprises: and detecting whether one line of data is cached in fifo corresponding to each tile, and if so, writing the cached one line of data into the corresponding tile. By detecting whether the fifo is full of data, whether the corresponding tile is required to be written with data or not can be determined, so that the data in the fifo can be written into the tile corresponding to the fifo in time.
In some examples, before shearing the first data line in the corresponding tile to the preset space or copying the data of the first data line in the corresponding tile to the preset space, further comprising: judging whether a writing operation exists in the corresponding patch; if so, the write operation is preferentially performed.
A second aspect of the present application discloses a data acquisition system comprising: the judging module is used for judging whether the data line number of the first data line in each area is equal to the current line number and whether the data line number of the second data line in each area is equal to the sum of the current line number and a preset value; wherein, the data in each of the plurality of tiles in the storage area is written by a corresponding fifo on the interposer; and the shearing module is used for shearing the first data line in the corresponding fragment to a preset space when the judging result of one of the data lines is equal to the judging result, and setting the data line number of the first data line sheared to the preset space as the current line number.
According to the data acquisition system provided by the application, the synchronism and the reliability of the data acquired by the plurality of camera boards can be ensured, so that the accuracy of picture recovery is improved.
In some examples, the data acquisition system further includes: and the copying module is used for copying the first data line to the preset space when the data line number of the first data line is larger than the current line number and the data line number of the second data line is larger than the sum of the current line number and a preset value, and setting the data line number of the first data line copied to the preset space as the current line number.
In some examples, the data acquisition system further includes: and the changing module is used for changing the data reading address of the corresponding fragment when the data line number of the first data line is smaller than the current line number and the data line number of the second data line is smaller than the sum of the current line number and the preset value so as to skip reading the first data line and update the second data line into the first data line.
In some examples, the determining module is specifically configured to: updating the current line number, and setting each tile in the current line number lower storage area to be in an unread state; for each tile in the unread state in the storage area, judging whether the data line number of the first data line in the tile is equal to the current line number, and judging whether the data line number of the second data line in the tile is equal to the sum of the current line number and a preset value.
In some examples, after shearing the first data line in the respective tile to a preset space or copying the data of the first data line in the respective tile to the preset space, the system is further to: and setting the corresponding tile under the current line number to be in a read state.
In some examples, the system further comprises: the detection module is used for detecting whether a first data line and a second data line are cached in each fragment in an unread state under the current line number in the storage area; the judging module is further used for: if it is detected that the first data line and the second data line are cached in the area, which is in the unread state, under the current line number in the storage area, then for each area in the storage area, judging whether the data line number of the first data line in the area is equal to the current line number, and whether the data line number of the second data line in the area is equal to the sum of the current line number and a preset value.
In some examples, the system is further to: and detecting whether one line of data is cached in fifo corresponding to each tile, and if so, writing the cached one line of data into the corresponding tile.
In some examples, prior to shearing the first data line in the respective tile to a preset space, or copying the data of the first data line in the respective tile to the preset space, the system is further to: judging whether a writing operation exists in the corresponding patch; if so, the write operation is preferentially performed.
Additional aspects and advantages of the application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application.
Drawings
The foregoing and/or additional aspects and advantages of the application will become apparent and may be better understood from the following description of embodiments taken in conjunction with the accompanying drawings in which:
FIG. 1 is a schematic diagram of a related art data acquisition device;
FIG. 2 is a flow chart of data acquisition by the data acquisition device of FIG. 1 in the related art;
FIG. 3 is a flow chart of a method of data acquisition according to one embodiment of the application;
Fig. 4 is a block diagram of a data acquisition system according to one embodiment of the application.
Detailed Description
Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the application.
The following describes a data acquisition method and system according to an embodiment of the present application with reference to the accompanying drawings.
Before describing the data acquisition method according to the embodiment of the present invention, the data acquisition method in the related art will be briefly described.
As shown in fig. 1, a patch panel is usually connected to a five-line camera board at most, and meanwhile, data of the five channels are collected, and then integrated and uploaded to an upper computer for processing through a CameraLink interface. The interface board and the camera boards are connected through low-voltage DIFFERENTIAL SIGNALING (low-voltage differential signaling) lines, the LVDS lines are used for sending trigger signals, the interface board generates the trigger signals, and the trigger signals are sent to the camera boards through the LVDS lines, so that the camera boards are ensured to be exposed and collect data at the same time. The adapter plate is provided with 5 network ports, the five network ports are in one-to-one corresponding communication connection with the five camera plates, the adapter plate is connected with the camera plates through gigabit network cables, and the gigabit network cables are used for sequentially sending each line of data generated by each linear array camera to the adapter plate. The adapter plate is provided with a FPGA, cameraLink sending module and a CameraLink interface, the specific model of the FPGA can be altera 5CEBA5F 238N, the configuration of the CameraLink interface is in a Base mode, the CameraLink interface corresponds to a single-channel connection chip in the Base mode, and the CameraLink interface is connected by adopting a cable which can be a later CameraLink line. Two ends of the CameraLink line are respectively connected with the adapter board and the upper computer in a communication way through a CameraLink interface, and the part connected with the CameraLink line is the CameraLink interface. The FPGA has fifo (first input first output, first in first out) memory, and likewise, the transmitting module of the CameraLink also has fifo memory. And the transmitting module of the CameraLink integrates the data acquired by each camera and uploads the data to the upper computer through the CameraLink line.
The data packet of each row of data sent by the camera board is added with 32 bits of data for marking the current row number, based on this, as shown in fig. 2, fifo1-5 is a memory of the FPGA, and the flow of integrating the data by the adapter board is as follows: each network port of the adapter plate receives data transmitted by a corresponding camera plate, and after the packet heads are identified, one row of data is written into the corresponding fifo. The transmission of a line of data is protocol, i.e. in a so-called format, where, for example, each packet may follow the following protocol: header (4 bytes, 0xA5 0xCC 0x00 0x00) +line number (4 bytes) +line number+line data+packet trailer (4 bytes, 0xff×4). In fig. 2, the state indicates a rdusedw signal, principally fifo, indicating the number of data buffered at the fifo read port, and when the rdusedw signal indicates that N data are available for readout in the corresponding fifo, it indicates that a line of data has been buffered.
Detecting whether data quantity of at least one line is cached in fifo 1-5; if not, continuing to execute the step; if yes, reading one line of data from the fifo1-5 in sequence and writing the data into the fifo in the CameraLink transmitting module, and after the step is finished, returning to repeatedly execute the step of detecting whether the fifo1-5 has at least one line of data quantity; the CameraLink transmitting module detects that at least one line of data is cached in the fifo, reads out and packages the line of data, and transmits the line of data to the upper computer. It should be noted that, the data buffered in the fifo is actually composed of the original five-line data, that is, when the total five-line data read from fifo1-5 is written into eth_fifo, the data are sequentially arranged (may be in a preset arrangement sequence between camera boards), that is, the data are integrated.
However, if a certain camera board loses one line of data abnormally in the transmission process, the signal of the camera board is delayed by one line from other lines in all subsequent lines according to the above process operation, if a plurality of lost lines occur again, the image synthesized by the upper computer by adopting the received data is more and more disordered, and the synchronism and the reliability of the data acquired by a plurality of camera boards are greatly reduced.
The invention provides a data acquisition method based on the problems, and the synchronization and reliability of data acquired by a plurality of camera boards are effectively improved.
Fig. 3 is a flow chart of a method of collecting data according to another embodiment of the present application. As shown in fig. 3, the data acquisition method according to one embodiment of the present application includes the following steps:
S301: for each of the tiles in the storage area, judging whether the data line number of the first data line in the tile is equal to the current line number, and whether the data line number of the second data line in the tile is equal to the sum of the current line number and a preset value, wherein the data in each of the tiles in the storage area is written by the corresponding fifo on the adapter plate. The preset value may be 1, or may be any other predetermined value.
The storage area may be a memory, such as: DDR3 (DDR, also called Double Rate SDRAM, double DATE RATE SDRSDRAM is a high speed CMOS dynamic random access memory).
Specifically, in view of the limited depth of fifo, and fifo is a fifo buffer, data is written in sequence and read out in sequence, and the same data cannot be read out repeatedly, so the memory is added in the application, and the implementation of the method of the embodiment of the application is completed by using the memory. Specifically, the embodiment of the application can realize stable data synchronization through caching by DDR3 external storage. In DDR3, 5 slices may be correspondingly divided, and data written from 5 fifo may be received, for example: the data in fifo1-fifo5 is received in a one-to-one correspondence. Of course, in other embodiments, fifo may be other numbers, such as 4, 6, etc. The number of tiles divided in DDR3 may be equal to or greater than the number of fifo, so that there may be one tile for each fifo for storing data written by the fifo.
The first data row and the second data row are one row of data in the region, which are arranged in the first bit and the second bit according to the storage sequence, namely, the read address points to the starting address of the first data row currently, and the second data row is one row of data arranged behind the first data row according to the storage sequence.
In one embodiment, for each tile in the storage area, determining whether the data line number of the first data line in the tile is equal to the current line number, and whether the data line number of the second data line in the tile is equal to the sum of the current line number and a preset value includes: updating the current line number, and setting each fragment in the lower storage area of the current line number to be in an unread state; for each tile in the unread state in the storage area, judging whether the data line number of the first data line in the tile is equal to the current line number, and judging whether the data line number of the second data line in the tile is equal to the sum of the current line number and a preset value.
Each line of data written by fifo into a tile itself carries a data line number, which is the line number currently to be read out, and for example, the data may be read in the order of 1,2, 3.
It should be understood that when fifo is written into the tile data, it is written in the form of a data packet, and the data packet includes a data line number. For example: each network port receives data transmitted by a corresponding camera board, and writes one line of data into a corresponding fifo after the packet header is identified. Transmitting a line of data is protocol-oriented, i.e.: each data packet follows the following protocol:
Header (4 bytes, 0xA5 0xCC 0x00 0x00) +data line number (4 bytes) +line data+packet tail (4 bytes, 0xff×4).
Therefore, to avoid the situation that the signal of the camera board in all subsequent lines lags behind other lines due to the abnormal loss of one line of data in the transmission process, the current line number can be updated, and each tile in the memory area under the current line number is set to be in an unread state, so that each tile in the unread state in the memory area is judged to determine whether the data line number of the first data line in each tile in the unread state is the same as the current line number.
In some examples, the method further comprises: detecting whether a first data line and a second data line are cached in each fragment in an unread state under the current line number in a storage area; for each tile in the storage area, determining whether the data line number of the first data line in the tile is equal to the current line number, and whether the data line number of the second data line in the tile is equal to the sum of the current line number and a preset value, includes: if it is detected that the first data line and the second data line are cached in the area which is in an unread state under the current line number in the storage area, judging whether the data line number of the first data line in the area is equal to the current line number or not and whether the data line number of the second data line in the area is equal to the sum of the current line number and a preset value or not according to each area in the storage area.
S302: and if the judgment result of one of the data lines is equal to the judgment result of the first data line, cutting the first data line in the corresponding fragment to a preset space, and setting the data line number of the first data line cut to the preset space as the current line number. The preset space is, for example, fifo of a transmitting module of the CameraLink in the adapter board, which is also referred to herein as fifo of the CameraLink.
It should be understood that if the judgment result of one is equal to any one of the judgment results, then the first data line in the corresponding tile is cut to the preset space, the data line number of the first data line cut to the preset space is set as the current line number, for example, the data line number of the first data line in the tile is equal to the current line number, and whether the data line number of the second data line in the tile is equal to the sum of the current line number and the preset value, the first data line in the corresponding tile is cut to the preset space, and the data line number of the first data line cut to the preset space is set as the current line number; for another example, the data line number of the second data line in the slice is equal to the sum of the current line number and the preset value, whether the data line number of the first data line in the slice is equal to the current line number or not, the first data line in the corresponding slice is cut to the preset space, the data line number of the first data line cut to the preset space is set as the current line number, and therefore synchronism and reliability of data acquired by a plurality of camera boards can be effectively guaranteed, and accuracy of picture recovery is improved.
It should be noted that, copying or cutting a line of data from each tile into fifo of the CameraLink may be directly writing the data into fifo of the CameraLink, such as the data packet containing the address or the identifier of each camera board, so that the data written into fifo under the current line number may be arranged in a predetermined order between the camera boards, for example, data corresponding to fifo1-5 in turn. Of course, it is also possible to indirectly write into the fifo of the CameraLink, additionally set eth_fifo1-5, respectively corresponding to 5 slices one by one, directly write one line of data of a slice into the corresponding eth_fifo in eth_fifo1-5 by cutting or copying under the current line number, and then write eth_fifo1-5 into the fifo of the CameraLink in a predetermined sequence between camera boards. For example, the current line number is noted as: local_line_num; the data line number of the first data line in the tile is recorded as: line_num; the data line number of the second data line in the slice is recorded as: line_num_next; when line_num is equal to local_line_num, or line_num_next is equal to local_line_num+1, where 1 is a preset value, the line of the corresponding tile, i.e., the first line of data (in the order in which the data is stored in the tile, the line refers to the data_ of the previous line), is read out in a cut manner and written into the corresponding eth_fifo, where the line number written into eth_fifo is set to be local_line_num, and the tile under the current line number is marked as read out after the line of data is written into eth_fifo.
That is, the front row of data is correct regardless of whether the rear row is correct or not, and the rear row of data is correct regardless of whether the front row is correct or not, that is, only if there is a correct row, the situation that a certain row is suddenly changed (for example, a transmission error and a DDR3 read-write error) and the whole row is misplaced, for example, the row numbers 1,2,3, 56, 5, 6, and 7.
Further, after reading the first data line from the respective tile, the method further comprises: and setting the corresponding tile under the current line number to be in a read state. The first data line is read from the corresponding tile, and the first data line in the corresponding tile may be cut to a preset space, or the data of the first data line in the corresponding tile may be copied to the preset space.
It should be noted that the clipping means that after reading the data, the read address is pointed to the start address of the next row, and the next row is the next row of the row currently read out according to the storage order of the data. Copying means that the read address is continued to point to the start address of the current row after the data is read.
Further, the data acquisition method further includes: if the data line number of the first data line is larger than the current line number and the data line number of the second data line is larger than the sum of the current line number and the preset value, copying the first data line to a preset space, and setting the data line number of the first data line copied to the preset space as the current line number.
For example: line_num is greater than local_line_num and line_num_next is greater than local_line_num+1.
The data of the corresponding tile, i.e. the first data row, is read out in a duplicated manner and written into the corresponding eth_fifo, wherein the row number written into eth_fifo is set to be local_line_num, and the tile under the current row number is marked as read out after the data is written into eth_fifo.
In this case, it means that there is less line data, for example, local_line_num that needs to be read currently is 5, line_num that is actually read is 9, line_num_next is 10, and it is not difficult to see the line data that has no line number 5 in the cache (of course, if there is no line number 6,7,8 data, the latter line data needs to be copied to be filled), so the data of line number 9 that is currently to be read is filled.
Further, the data acquisition method further includes: if the data line number of the first data line is smaller than the current line number and the data line number of the second data line is smaller than the sum of the current line number and the preset value, changing the data reading address of the corresponding patch so as to skip reading the first data line and update the second data line into the first data line.
And after updating the second data line to the first data line under the current line number, if the first data line and the second data line continue to exist, returning to execute S301 again until one line of data is read out from the patch under the current line number, and marking the current line number as read.
For example: if line_num is less than local_line_num and line_num_next is less than local_line_num+1, then the read address is directly increased to the start address pointing to the next line, and then the state jumps back to "detect whether each tile has data buffered full of two lines, i.e. whether the first data line and the second data line are buffered, if there is and under the current line number (local_line_num) the tile is not marked for readout. That is, the present application does not perform a read operation for the current first data when there is one more line. Further, the data acquisition method further includes: if the judgment result of one is larger than that of the other, and the judgment result of the other is smaller than that of the other, cutting the first data line in the corresponding patch area to a preset space, and setting the data line number of the first data line cut to the preset space as the current line number.
It should be understood that if the data line number of the first data line is smaller than the current line number, the data line number of the second data line is larger than the sum of the current line number and the preset value, or if the data line number of the first data line is larger than the current line number, and the data line number of the second data line is smaller than the sum of the current line number and the preset value, the first data line in the corresponding tile is cut to the preset space, and the data line number of the first data line cut to the preset space is set as the current line number.
Specifically, when another data abnormality occurs, the processing can be performed in the above-described mode 1). Namely: the data of the corresponding tile, namely the first data row, is read out in a shearing mode and written into the corresponding eth_fifo, wherein the row number written into the eth_fifo is set as local_line_num, and the tile under the current row number is marked as read out after the data is written into the eth_fifo.
If all slices under the current line number are marked as read, the current line number (local_line_num) is updated in a manner of increasing 1, and each slice under the new current line number is marked as not read.
Further, before the first data line in the corresponding tile is cut to the preset space or the data of the first data line in the corresponding tile is copied to the preset space, the method further includes: judging whether a writing operation exists in the corresponding slice area; if so, the write operation is preferentially performed.
Specifically, before reading data from the sector of DDR3, it is also necessary to determine whether a write operation is required for the sector, and if so, execute the write operation first, and if not, execute the read operation, with the priority of the write operation being greater than that of the read operation.
In some examples, the method further comprises: and detecting whether one line of data is cached in fifo corresponding to each tile, and if so, writing the cached one line of data into the corresponding tile.
Specifically, the embodiment of the invention can detect whether each tile is cached with two lines of data, if yes, and if no current line number (local_line_num) is read out, the state is switched back to the previous state, namely, whether fifo1-5 is cached with one line of data is detected, if yes, the data in the corresponding fifo is read out and stored into the corresponding tile of DDR3, and if yes, the line numbers (line_num and line_num_next) of the two lines are sequentially read out.
According to the data acquisition method provided by the embodiment of the application, the synchronism and the reliability of the data acquired by the plurality of camera boards can be ensured, so that the accuracy of picture recovery is improved.
Fig. 4 is a block diagram of a data acquisition system according to one embodiment of the application. As shown in fig. 4, a data acquisition system 600 according to one embodiment of the present application includes: a decision module 610 and a clipping module 620.
The determining module 610 is configured to determine, for each tile in the storage area, whether a data line number of a first data line in the tile is equal to a current line number, and whether a data line number of a second data line in the tile is equal to a sum of the current line number and a preset value; wherein the data in each of the plurality of tiles in the storage area is written by a corresponding fifo on the interposer. The clipping module 620 is configured to clip the first data line in the corresponding tile to the preset space when the determination result of one of the clipping modules is equal to the determination result of the other clipping module, and set the data line number of the first data line clipped to the preset space as the current line number.
In some examples, the data acquisition system 600 described above further includes: the copying module is used for copying the first data line to a preset space when the data line number of the first data line is larger than the current line number and the data line number of the second data line is larger than the sum of the current line number and a preset value, and setting the data line number of the first data line copied to the preset space as the current line number.
In some examples, the data acquisition system 600 described above further includes: and the changing module is used for changing the data reading address of the corresponding fragment when the data line number of the first data line is smaller than the current line number and the data line number of the second data line is smaller than the sum of the current line number and the preset value so as to skip reading the first data line and update the second data line into the first data line.
In some examples, the determination module 610 is specifically configured to: updating the current line number, and setting each fragment in the lower storage area of the current line number to be in an unread state; for each tile in the unread state in the storage area, judging whether the data line number of the first data line in the tile is equal to the current line number, and judging whether the data line number of the second data line in the tile is equal to the sum of the current line number and a preset value.
In some examples, after shearing the first data line in the respective tile to the preset space or copying the data of the first data line in the respective tile to the preset space, the system is further to: and setting the corresponding tile under the current line number to be in a read state.
In some examples, the system further comprises: the detection module is used for detecting whether a first data line and a second data line are cached in each fragment area which is in an unread state under the current line number in the storage area; the judging module 610 is further configured to: if it is detected that the first data line and the second data line are cached in the area which is in an unread state under the current line number in the storage area, judging whether the data line number of the first data line in the area is equal to the current line number or not and whether the data line number of the second data line in the area is equal to the sum of the current line number and a preset value or not according to each area in the storage area.
In some examples, the system further comprises: and detecting whether one line of data is cached in fifo corresponding to each tile, and if so, writing the cached one line of data into the corresponding tile.
In some examples, before shearing the first data line in the respective tile to the preset space or copying the data of the first data line in the respective tile to the preset space, the system further comprises: judging whether a writing operation exists in the corresponding slice area; if so, the write operation is preferentially performed. .
It should be noted that the foregoing explanation of the data acquisition method embodiment is also applicable to the data acquisition system of this embodiment, and will not be repeated herein.
According to the data acquisition system provided by the embodiment of the application, the synchronism and the reliability of the data acquired by the plurality of camera boards can be ensured, so that the accuracy of picture recovery is improved.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.
While embodiments of the present application have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the application, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the application.
Claims (10)
1. The data acquisition method is characterized by comprising the following steps of:
for each tile in the storage area, judging whether the data line number of a first data line in the tile is equal to the current line number, and judging whether the data line number of a second data line in the tile is equal to the sum of the current line number and a preset value; wherein, the data in each of the plurality of tiles in the storage area is written by a corresponding fifo on the interposer;
If the judgment result of one is equal to the judgment result, cutting the first data line in the corresponding fragment to a preset space, and setting the data line number of the first data line cut to the preset space as the current line number;
wherein, the first data line refers to a line of data pointed to by the current read address;
the second data row refers to data arranged after the first data row according to the storage sequence;
The current line number is the line number to be read currently.
2. The method for collecting data according to claim 1, further comprising:
If the data line number of the first data line is larger than the current line number and the data line number of the second data line is larger than the sum of the current line number and a preset value, copying the first data line to the preset space, and setting the data line number of the first data line copied to the preset space as the current line number.
3. The method for collecting data according to claim 1, further comprising:
and if the data line number of the first data line is smaller than the current line number and the data line number of the second data line is smaller than the sum of the current line number and the preset value, changing the data reading address of the corresponding fragment so as to skip reading the first data line and update the second data line into the first data line.
4. The method for collecting data according to claim 2, wherein for each tile in the storage area, determining whether the data line number of the first data line in the tile is equal to the current line number, and whether the data line number of the second data line in the tile is equal to the sum of the current line number and a preset value includes:
Updating the current line number, and setting each tile in the current line number lower storage area to be in an unread state;
For each tile in the unread state in the storage area, judging whether the data line number of the first data line in the tile is equal to the current line number, and judging whether the data line number of the second data line in the tile is equal to the sum of the current line number and a preset value.
5. The data collection method according to claim 2 or 4, wherein after cutting the first data line in the corresponding tile to a preset space or copying the data of the first data line in the corresponding tile to the preset space, the method further comprises:
and setting the corresponding tile under the current line number to be in a read state.
6. A method of collecting data according to claim 3, further comprising: detecting whether a first data line and a second data line are cached in each piece of the storage area which is in an unread state under the current line number;
For each tile in the storage area, determining whether the data line number of the first data line in the tile is equal to the current line number, and whether the data line number of the second data line in the tile is equal to the sum of the current line number and a preset value, includes:
If it is detected that the first data line and the second data line are cached in the area, which is in the unread state, under the current line number in the storage area, then for each area in the storage area, judging whether the data line number of the first data line in the area is equal to the current line number, and whether the data line number of the second data line in the area is equal to the sum of the current line number and a preset value.
7. The method of data acquisition according to claim 2, further comprising:
and detecting whether one line of data is cached in fifo corresponding to each tile, and if so, writing the cached one line of data into the corresponding tile.
8. The data collection method according to claim 2, wherein before cutting the first data line in the corresponding tile to a preset space or copying the data of the first data line in the corresponding tile to the preset space, further comprising:
judging whether a writing operation exists in the corresponding patch;
if so, the write operation is preferentially performed.
9. A data acquisition system, comprising:
The judging module is used for judging whether the data line number of the first data line in each area is equal to the current line number and whether the data line number of the second data line in each area is equal to the sum of the current line number and a preset value; wherein, the data in each of the plurality of tiles in the storage area is written by a corresponding fifo on the interposer; the shearing module is used for shearing the first data line in the corresponding fragment to a preset space when the judging result of one of the data lines is equal to the judging result of the corresponding fragment, and setting the data line number of the first data line sheared to the preset space as the current line number;
wherein, the first data line refers to a line of data pointed to by the current read address;
the second data row refers to data arranged after the first data row according to the storage sequence;
The current line number is the line number to be read currently.
10. The data acquisition system of claim 9, wherein the system further comprises: and the copying module is used for copying the first data line to the preset space when the data line number of the first data line is larger than the current line number and the data line number of the second data line is larger than the sum of the current line number and a preset value, and setting the data line number of the first data line copied to the preset space as the current line number.
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