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CN112803939B - Parallel detection device for high-speed multichannel micro-capacitor - Google Patents

Parallel detection device for high-speed multichannel micro-capacitor Download PDF

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Publication number
CN112803939B
CN112803939B CN202110016850.0A CN202110016850A CN112803939B CN 112803939 B CN112803939 B CN 112803939B CN 202110016850 A CN202110016850 A CN 202110016850A CN 112803939 B CN112803939 B CN 112803939B
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capacitor
switch
pipe
sampling
line control
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CN112803939A (en
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袁中平
邹伯均
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Shenzhen Hisu Core Technology Co ltd
Haisuxin Hangzhou Technology Co ltd
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Shenzhen Hisu Core Technology Co ltd
Haisuxin Hangzhou Technology Co ltd
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/94Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the way in which the control signals are generated
    • H03K17/96Touch switches
    • H03K17/962Capacitive touch switches
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/26Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
    • G01R27/2605Measuring capacitance

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Abstract

The invention discloses a parallel detection device of high-speed multichannel micro-capacitor, comprising: the invention relates to a touch key or touch panel capacitance detection device integrated in a single IC chip, and does not need an external component.

Description

Parallel detection device for high-speed multichannel micro-capacitor
Technical Field
The invention relates to the technical field of electronics, in particular to a parallel detection device of a high-speed multichannel micro capacitor.
Background
In the aspect of detecting the tiny capacitor, a circuit for detecting the tiny capacitor is integrated into a single chip, so that the purpose of detecting the capacitance of a touch key or a touch panel is achieved, the circuit can be applied to sensing the change of the tiny capacitor value generated when a finger presses the key, and currently, in the traditional mode of acquiring and storing the capacitor sampling conversion voltage by sampling and storing the capacitor: the switch of the charge transfer module is required to be cycled hundreds of times no matter whether the switch of the charge transfer module is pressed or not, the capacitance value of the required accumulation capacitor is also very large, the conversion voltage of the accumulation capacitor can reach a preset value, meanwhile, the switch cycle speed of the charge transfer module in the traditional mode is limited, the conduction time of the switch of the charge transfer module must meet the time required by charging the corresponding charging capacitor to be full and the time required by the corresponding charging capacitor to transfer the charge to the accumulation capacitor, the speed limitation and the more switch cycle times slow down the scanning speed of the matrix touch panel and the recognition speed of touch control, and the touch control recognition time is prolonged.
Therefore, a parallel detection device for high-speed multi-channel micro-capacitors is needed to solve the above-mentioned problems.
Disclosure of Invention
The present invention is directed to a parallel detection device for high-speed multi-channel micro-capacitor to solve the above-mentioned problems in the prior art.
In order to solve the technical problems, the invention provides the following technical scheme: a parallel detection device for high-speed multi-channel micro-capacitor, comprising: the device comprises a charge transfer module, a pipe-line control circuit and a chip external circuit, wherein the chip external circuit is connected with the charge transfer module through a switch SW2, the charge transfer module is connected with the pipe-line control circuit through a switch SW1, the charge transfer module is used for enabling a sampling storage capacitor to acquire and store conversion voltage of capacitance sampling, the pipe-line control circuit is used for detecting micro-capacitance of multiple channels in parallel, the chip external circuit is used for charging the sampling storage capacitor, the circuit is integrated into a single chip, the aid is provided for improving the scanning speed of a matrix touch panel, the recognition speed of touch is also improved, and the time of touch recognition is shortened.
Further, the charge transfer module includes a switch SW1, a switch SW2, a switch SW3, an accumulation capacitor Cs and a voltage Vcs, one end of the switch SW1 is connected to the switch SW2, the other end is connected to the accumulation capacitor Cs, one end of the switch SW2 is connected to the external circuit of the chip, the other end is grounded, one end of the accumulation capacitor Cs is connected to the switch SW3, the other end is grounded, the voltage Vcs is provided at two ends of the accumulation capacitor Cs, the cycle times and the on time of the switch SW1 and SW2 must meet the time required by the capacitor CxN to be full and the time required by the capacitor CxN to transfer the charge to the accumulation capacitor Cs, so that the capacitance value of the accumulation capacitor Cs is reduced, the time required by the capacitor CxN to transfer the charge to the accumulation capacitor Cs is facilitated to be quickened, the cycle times of the switch SW1 and SW2 are correspondingly reduced, and the working performance of the detection device is improved.
Further, the pipe-line control circuit includes N sampling storage capacitors CiN, 2N pipe-line control switches SWNa/SWNb, N voltage control oscillators vco# N, N switching voltages ViN and N counters #n, one end of the pipe-line control switch SWNa is connected to the output end of the charge transfer module switch SW1, the other end is connected to the sampling storage capacitor CiN, one end of the sampling storage capacitor CiN is connected to the voltage control oscillators vco#n, the other end is grounded, two ends of the sampling storage capacitor CiN are provided with the switching voltages ViN, the voltage control oscillators vco#n are connected to the counters #n, each stage of circuit of the pipe-line is connected in parallel, the frequency of the voltage control oscillators vco#n is controlled by the switching voltages ViN, the N counters #n are used for calculating the clock number of the vco#n in a certain time, the pipe-line control circuit refers to control, the combination of the sampling storage capacitor CiN is relatively large, the combination of the sampling storage capacitor CiN is divided into several stages, and the micro-line control circuit is used for detecting the data in a small-stage parallel capacitor scale.
Further, the chip external circuit includes a pipe-line control switch SWNb, a chip pin and a capacitor CxN, one end of the pipe-line control switch SWNb is connected to one end of the switch SW2 of the charge transfer module, the other end is connected to the chip pin, the chip pin is connected to the capacitor CxN, one end of the capacitor CxN is connected to the chip pin, the other end is grounded, the chip pin is used for charging the capacitor CxN when the switch SW2 is turned on, each stage of circuit of the chip external circuit is connected in parallel, and the main function of the chip external circuit is to charge the capacitor CxN through the chip pin, so that the capacitor CxN transfers the charge to the accumulation capacitor Cs.
Further, the sampling and storing capacitor obtains and stores the conversion voltage sampled by the capacitor in the following manner: the switches SW1 and SW2 circulate for a certain number of times to make the voltage Vcs reach 2V, the voltage Vcs is sampled and stored by the sampling storage capacitor CiN, and the voltage control oscillator vco#n oscillates and the counter #n counts, the counter #n counts a certain number of clocks in a preset time in a state that the finger is not pressed, when the finger is pressed, the sampling value of the switching voltage ViN rises along with the increase of the capacitor CxN, and the ratio of the increase of the capacitance value of the capacitor CxN to the increase of the sampling value of the switching voltage ViN is 1:1, the oscillation frequency of the VCO #n also increases, and the clock count of the counter #n increases within a predetermined time, for example: the counter counts 1000 clocks in a state that the finger does not press in a preset time, when the finger presses, the capacitance value of the capacitance CxN is increased by 4%, the sampling value of the conversion voltage ViN is also increased by 4%, the clock number of the counter in the preset time can be increased to 1040, and the counter is used for judging static pressing and dynamic gestures by software calculation, and the larger the data value of the key, the faster the sampling speed is, so that the software calculation is more beneficial to judging the static pressing and the dynamic gestures.
Further, the speed of the switching cycle of the switches SW1 and SW2 is limited, the on time of the switches SW1 and SW2 must satisfy the time required for the capacitor CxN to be fully charged and the time required for the capacitor CxN to transfer the charge to the accumulation capacitor Cs, and after the converted voltage ViN of the capacitor sample is obtained, the oscillation speed of the vco#n is not limited, so that the counter#n can obtain a larger value in a short time, the value obtained by the counter is positively correlated with the finger pressing, and the larger value obtained by the counter is the more the finger pressing times, compared with the conventional method, the speed of the VCO is not limited any more, so that the oscillation frequency of the VCO is increased with the increase of the capacitor CxN, thereby increasing the speed of sensing the finger pressing.
Further, the manner in which the pipe-line controls the switch SWNa, SWNb to be turned on is: the chip hardware sets a period and a time sequence according to an N-channel key scanning list required by software, when the sampling time sequence of a corresponding key is reached, the pipe-line control switches SWNa and SWNb are turned on, and the pipe-line control switches SWNa and SWNb are corresponding to a touch key: and the key N is used for conducting the pipe-line control switches SWNa and SWNb for sampling, the stored sampling voltage is transmitted to the voltage control oscillator and the counter to generate data, and software can judge whether a finger is pressed according to the generated data research.
Further, the counting acquisition mode of the counter is as follows: the count of each counter is sequentially acquired according to a preset sequence in a period, and the definition of the period is as follows: the first channel scans keys to the N-th channel, and acquires data of each channel, wherein the data of N key channels can be acquired in one period, N data are collected through a software algorithm after the period is finished, whether static pressing is met or not is judged by the data of a plurality of periods, and data of keys at different positions on a panel are required to be researched and judged by dynamic gestures.
Further, the operation flow of the detecting device is as follows: firstly, turning on the pipe-line control switches SWNa and SWNb corresponding to the key N of the sampling time sequence, turning off the other pipe-line control switches, then turning on the switch SW3 in the charge transfer module, zeroing the capacitor Cs+CiN, and resetting the corresponding counter #N, wherein the switch SW2 charges the capacitor CxN when turned on, the charge of the capacitor CxN is poured into Cs+CiN when turned on, the switches of SW1 and SW2 are recycled, the charges charged in the capacitor CxN are sequentially poured into Cs+CiN until the switch cycle reaches the preset times, the corresponding pipe-line control switch SWNa is turned off, viN =Vcs is used for saving the conversion voltage sampled by the capacitor CiN, the corresponding pipe-line control switch is turned on when the next time sequence of the sampling time sequence is reached, the other pipe-line control switches are turned off, meanwhile, the sampling storage capacitor corresponding to the previous sampling time sequence is already obtained and stored, the corresponding voltage control oscillator is used for storing the corresponding capacitor, the corresponding capacitor is used for sampling voltage control oscillator is used for synchronously pressing the voltage corresponding to the capacitor, and the voltage of the corresponding capacitor is counted up, the data of the corresponding to the sensor is synchronously counted down in the three periods of the corresponding voltage oscillators, and the data of the sensor is synchronously counted, and the data of the corresponding cycle is synchronously is needed is synchronously counted, and the data is synchronously counted.
Compared with the prior art, the invention has the following beneficial effects:
1. the invention uses the pipe-line capacitance sampling and the voltage control oscillators to achieve the parallel detection of the capacitance of the high-speed N channel, integrates the detection device into a single IC chip, and applies the detection device to the change of a tiny capacitance value generated when the finger presses the key, and the detection device does not need other external components, thus the invention has simple structure, high working efficiency of the chip and better performance.
2. The invention improves the traditional mode of sampling and storing the capacitor sampling conversion voltage: in the conventional manner, the number of cycles required for the switch of the charge transfer module is about 500 times, and the capacitance value of the accumulation capacitor is also required to be greater than 3000pF, so that the difference of the capacitance values of CxN is less than 5% when the finger is pressed or not. The difference value of the switch cycle count of whether the finger is pressed or not is required to be more than 10, so that software can recognize the pressing action, the voltage at the two ends of the accumulation capacitor can reach 2V after 400 times of switch cycles without the finger pressing, the voltage at the two ends of the accumulation capacitor can reach 2V after 385 times of switch cycles without the finger pressing, and the accumulation capacitor value of the invention only needs 200pF, so that the switch cycle of the charge transfer module only needs about 30 times, the voltage at the two ends of the accumulation capacitor can reach 2V, and the frequency of switch cycle is reduced.
3. According to the invention, after the sampling storage capacitor obtains the capacitor sampling conversion voltage, the oscillation speed of the voltage control oscillator is not limited, so that the counter can obtain a larger value in a short time, the larger the data value of the key is, the faster the sampling speed is more favorable for software calculation and judgment of static pressing and dynamic gestures, the scanning speed of the matrix touch panel is improved, the touch recognition speed is improved, and the touch recognition time is shortened.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate the invention and together with the embodiments of the invention, serve to explain the invention. In the drawings:
FIG. 1 is a simplified diagram of an integrated circuit of a parallel detection device for high-speed multi-channel micro-capacitance according to the present invention;
FIG. 2 is a diagram of pulse signals of a parallel detection device of high-speed multi-channel micro-capacitor according to the present invention;
FIG. 3 is a flow chart showing the operation of a parallel detection device for high-speed multi-channel micro-capacitance according to the present invention.
Detailed Description
The preferred embodiments of the present invention will be described below with reference to the accompanying drawings, it being understood that the preferred embodiments described herein are for illustration and explanation of the present invention only, and are not intended to limit the present invention.
Referring to fig. 1-3, the present invention provides the following technical solutions: a parallel detection device for high-speed multi-channel micro-capacitor, comprising: the device comprises a charge transfer module, a pipe-line control circuit and a chip external circuit, wherein the chip external circuit is connected with the charge transfer module through a switch SW2, the charge transfer module is connected with the pipe-line control circuit through a switch SW1, the charge transfer module is used for enabling a sampling storage capacitor to acquire and store conversion voltage of capacitance sampling, the pipe-line control circuit is used for detecting multichannel tiny capacitors in parallel, the chip external circuit is used for charging the sampling storage capacitor, the circuit is integrated into a single chip, assistance is provided for improving the scanning speed of a matrix touch panel, the speed of touch identification is improved conveniently, and the time of touch identification is shortened.
The charge transfer module comprises a switch SW1, a switch SW2, a switch SW3, an accumulation capacitor Cs and a voltage Vcs, wherein one end of the switch SW1 is connected with the switch SW2, the other end of the switch SW2 is connected with the accumulation capacitor Cs, one end of the switch SW2 is connected with an external circuit of the chip, the other end of the switch SW2 is grounded, one end of the accumulation capacitor Cs is connected with the switch SW3, the other end of the accumulation capacitor Cs is grounded, the voltage Vcs is arranged at two ends of the accumulation capacitor Cs, the switch SW3 is grounded, the capacitance value required by the accumulation capacitor Cs is reduced, the time required by the charge transfer from the capacitor CxN to the accumulation capacitor Cs can be shortened, and therefore the cycle times of the switch SW1 and the switch SW2 are correspondingly reduced, and the working performance of the detection device is improved.
The pipe-line control circuit comprises N sampling storage capacitors CiN, 2N pipe-line control switches SWNa/SWNb, N voltage control oscillators VCO# N, N, N conversion voltages ViN and N counters #N, one end of each pipe-line control switch SWNa is connected with the output end of the charge transfer module switch SW1, the other end of each pipe-line control switch SWNa is connected with the sampling storage capacitor CiN, one end of each sampling storage capacitor CiN is connected with the voltage control oscillator VCO#N, the other end of each sampling storage capacitor CiN is grounded, the two ends of each sampling storage capacitor CiN are provided with the conversion voltage ViN, the voltage control oscillator VCO#N is connected with the counter #N, each stage of the pipe-line control circuit is connected in parallel, the frequency of each voltage control oscillator VCO#N is controlled by the conversion voltage ViN, the N counters #N are used for calculating the clock number of the VCO#N in a certain time, the pipe-line control circuit refers to multistage control, namely, a combination logic circuit with larger scale and more layers is divided into a plurality of stages, registers are inserted into each stage and data are temporarily stored, and the pipe-line control circuit is used for accelerating the speed of detecting the micro-capacity value of the micro-capacity parallel circuit through the detection circuit.
The chip external circuit comprises a pipe-line control switch SWNb, a chip pin and a capacitor CxN, one end of the pipe-line control switch SWNb is connected with one end of a switch SW2 of the charge transfer module, the other end of the pipe-line control switch is connected with the chip pin, the chip pin is connected with the capacitor CxN, one end of the capacitor CxN is connected with the chip pin, the other end of the capacitor CxN is grounded, the chip pin is used for charging the capacitor CxN when the switch SW2 is opened, each stage of circuit of the chip external circuit is connected in parallel, and the main function of the chip external circuit is to charge the capacitor CxN through the chip pin so that the capacitor CxN can transfer charges to the accumulation capacitor Cs conveniently.
The sampling and storing capacitor obtains and stores the conversion voltage sampled by the capacitor in the following way: the switches SW1 and SW2 circulate for a certain number of times to make the voltage Vcs reach 2V, the voltage Vcs is sampled and stored by the sampling storage capacitor CiN, and the voltage control oscillator vco#n oscillates and the counter #n counts, the counter #n counts a certain number of clocks in a state that the finger is not pressed in a preset time, when the finger is pressed, the sampling value of the switching voltage ViN rises along with the increase of the capacitor CxN, and the ratio of the capacitance value increase of the capacitor CxN to the sampling value rise of the switching voltage ViN is 1:1, the oscillation frequency of the VCO #n also becomes faster, and the clock count of the counter #n increases within a predetermined time, so as to be used for software algorithm to determine static pressing and dynamic gestures.
The speed of the switching cycle of the switches SW1 and SW2 is limited, the on time of the switches SW1 and SW2 must satisfy the time required for the capacitor CxN to be fully charged and the time required for the capacitor CxN to transfer the charge to the accumulation capacitor Cs, and after the converted voltage ViN of the capacitor sampling is obtained, the oscillation speed of the voltage controlled oscillator vco#n is not limited, so that the counter#n can take a large value in a short time, and this value taken by the counter is positively correlated with the finger pressing.
The manner in which the pipe-line controls the conduction of the switches SWNa, SWNb is: the chip hardware sets a period and a time sequence according to an N-channel key scanning list required by software, when the sampling time sequence of the corresponding key is reached, the pipe-line control switches SWNa and SWNb are turned on, and the pipe-line control switches SWNa and SWNb correspond to a touch key: the objective of conduction of the buttons N, pipe-line control switches SWNa and SWNb is sampling, the stored sampling voltage is transmitted to the voltage control oscillator and the counter to generate data, and software can study and judge whether a finger is pressed or not according to the generated data.
The count acquisition mode of the counter is as follows: sequentially acquiring the count of each counter in a preset sequence in a period, wherein the definition of the period is as follows: the first channel scans keys to the N-th channel, data of each channel is obtained, data of N key channels can be obtained in one period, N data are collected through a software algorithm after the period is finished, whether static pressing is met or not is judged by the aid of the data of the plurality of periods, and data of keys at different positions on a plurality of panels are needed to be studied and judged by the aid of dynamic gestures.
The operation flow of the detection device is as follows: firstly, turning on the pipe-line control switches SWNa and SWNb corresponding to the key N of the sampling time sequence, turning off the other pipe-line control switches, then turning on the switch SW3 in the charge transfer module, zeroing the capacitor Cs+CiN, zeroing the corresponding counter #N, charging the capacitor CxN when the switch SW2 is turned on, pouring the charge of the capacitor CxN into Cs+CiN when the switch SW1 is turned on, recirculating the switches of SW1 and SW2, successively pouring the charge filled in the capacitor CxN into Cs+CiN until the switching cycle reaches the preset times, turning off the corresponding pipe-line control switch SWNa, at this time ViN =Vcs, wherein the capacitor CiN is used for saving the conversion voltage sampled by the capacitor CxN, turning on the corresponding pipe-line control switch when the next time sequence of the sampling time sequence is reached, turning off the other pipe-line control switches, simultaneously, saving the capacitor corresponding to the previous sampling time sequence has obtained and saved the conversion voltage sampled by the corresponding capacitor, and the corresponding voltage control oscillator counts synchronously.
Embodiment one: the method is characterized in that the capacitance of an accumulation capacitor Cs is 200pF, the voltage value Vcs of the accumulation capacitor Cs can reach 2V only by 30 switching cycles, the Vcs voltage is sampled and stored by the capacitor CiN, a voltage control oscillator VCO#N oscillates and a counter#N counts, the counter is set to count 1000 clocks in a preset time, the capacitance value of the CxN increases by 5% when the finger is pressed, the sampling value of a conversion voltage ViN also increases by 5%, the oscillation frequency of the VCO#N becomes fast, the clock number of the counter can increase to 1000+1000X15% = 1050 in a preset time.
Finally, it should be noted that: the foregoing is merely a preferred example of the present invention, and the present invention is not limited thereto, but it is to be understood that modifications and equivalents of some of the technical features described in the foregoing embodiments may be made by those skilled in the art, although the present invention has been described in detail with reference to the foregoing embodiments. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (6)

1. A parallel detection device for high-speed multichannel micro-capacitor, which is characterized in that: comprising the following steps: the chip comprises a charge transfer module, a pipe-line control circuit and a chip external circuit, wherein the chip external circuit is connected with the charge transfer module through a switch SW2, the charge transfer module is connected with the pipe-line control circuit through a switch SW1, the charge transfer module is used for enabling a sampling storage capacitor to acquire and store a conversion voltage of capacitor sampling, the pipe-line control circuit is used for detecting multichannel tiny capacitors in parallel through the sampling storage capacitor, and the chip external circuit is used for charging the sampling storage capacitor;
The charge transfer module comprises a switch SW1, a switch SW2, a switch SW3, an accumulation capacitor Cs and a voltage Vcs, wherein one end of the switch SW1 is connected with the switch SW2, the other end of the switch SW2 is connected with the accumulation capacitor Cs, one end of the switch SW2 is connected with an external circuit of the chip, the other end of the switch SW2 is grounded, one end of the accumulation capacitor Cs is connected with the switch SW3, the other end of the accumulation capacitor Cs is grounded, the voltage Vcs is arranged at two ends of the accumulation capacitor Cs, and the switch SW3 is grounded;
The pipe-line control circuit comprises N sampling storage capacitors CiN, 2N pipe-line control switches SWNa/SWNb, N voltage control oscillators VCO# N, N conversion voltages ViN and N counters #N, one end of each pipe-line control switch SWNa is connected with the output end of the corresponding charge transfer module switch SW1, the other end of each pipe-line control switch SWNa is connected with the sampling storage capacitor CiN, one end of each sampling storage capacitor CiN is connected with the corresponding voltage control oscillator VCO#N, the other end of each sampling storage capacitor CiN is grounded, two ends of each sampling storage capacitor CiN are provided with the corresponding conversion voltage ViN, each stage of circuits of the pipe-line are connected in parallel, the frequency of each voltage control oscillator VCO#N is controlled by the corresponding conversion voltage ViN, and the N counters #N are used for calculating the clock number of the VCO#N in a certain time;
The chip external circuit comprises a pipe-line control switch SWNb, a chip pin and a capacitor CxN, one end of the pipe-line control switch SWNb is connected with one end of a switch SW2 of the charge transfer module, the other end of the pipe-line control switch is connected with the chip pin, the chip pin is connected with the capacitor CxN, one end of the capacitor CxN is connected with the chip pin, the other end of the capacitor CxN is grounded, the chip pin is used for charging the capacitor CxN when the switch SW2 is opened, and each stage of circuit of the chip external circuit is connected in parallel.
2. The parallel detection device of high-speed multi-channel micro-capacitor of claim 1, wherein: the sampling and storing capacitor obtains and stores the conversion voltage sampled by the capacitor in the following way: the switches SW1 and SW2 circulate for a certain number of times to make the voltage Vcs reach 2V, the voltage Vcs is sampled and stored by the sampling storage capacitor CiN, and the voltage control oscillator vco#n oscillates and the counter #n counts, the counter #n counts a certain number of clocks in a preset time in a state that the finger is not pressed, when the finger is pressed, the sampling value of the switching voltage ViN rises along with the increase of the capacitor CxN, and the ratio of the increase of the capacitance value of the capacitor CxN to the increase of the sampling value of the switching voltage ViN is 1:1, the oscillation frequency of the VCO #n also becomes faster, and the clock number of the counter #n increases within a preset time, so as to be used for software algorithm to determine static pressing and dynamic gestures.
3. The parallel detection device of high-speed multi-channel micro-capacitor of claim 2, wherein: the speed of the switching cycle of the switches SW1 and SW2 is limited, the on-time of the switches SW1 and SW2 must satisfy the time required for the capacitor CxN to be fully charged and the time required for the capacitor CxN to transfer the charge to the accumulation capacitor Cs, and the oscillating speed of the vco#n is not limited after the converted voltage ViN of the capacitor sampling is obtained, so that the counter#n can take a large value in a short time, which value the counter takes is positively correlated with the finger pressing.
4. The parallel detection device of high-speed multi-channel micro-capacitor of claim 1, wherein: the manner in which the pipe-line controls the switch SWNa and SWNb to be conducted is as follows: the chip hardware sets a period and a time sequence according to an N-channel key scanning list required by software, when the sampling time sequence of a corresponding key is reached, the pipe-line control switches SWNa and SWNb are turned on, and the pipe-line control switches SWNa and SWNb are corresponding to a touch key: and the key N is used for conducting the pipe-line control switches SWNa and SWNb for sampling, the stored sampling voltage is transmitted to the voltage control oscillator and the counter to generate data, and software can judge whether a finger is pressed according to the generated data research.
5. The parallel detection device of high-speed multi-channel micro-capacitor of claim 2, wherein: the counting acquisition mode of the counter is as follows: the count of each counter is sequentially acquired according to a preset sequence in a period, and the definition of the period is as follows: the first channel scans keys to the N-th channel, and acquires data of each channel, wherein the data of N key channels can be acquired in one period, N data are collected through a software algorithm after the period is finished, whether static pressing is met or not is judged by the data of a plurality of periods, and data of keys at different positions on a panel are required to be researched and judged by dynamic gestures.
6. The parallel detection device of high-speed multi-channel micro-capacitor of claim 1, wherein: the operation flow of the detection device is as follows: firstly, turning on the pipe-line control switches SWNa and SWNb corresponding to the key N taking turns to the sampling time sequence, turning off the other pipe-line control switches, then turning on the switch SW3 in the charge transfer module, zeroing the capacitor Cs+CiN, zeroing the corresponding counter #N, charging the capacitor CxN when the switch SW2 is turned on, pouring the charge of the capacitor CxN into Cs+CiN when the switch SW1 is turned on, recirculating the switches of SW1 and SW2, pouring the charge filled in the capacitor CxN into Cs+CiN successively until the switch cycle reaches the preset times, turning off the corresponding pipe-line control switch SWNa, at this time ViN =Vcs, the capacitor CiN is used for saving the conversion voltage sampled by the CxN capacitor, turning off the corresponding pipe-line control switch when the next time sequence is reached, simultaneously, the sampling capacitor corresponding to the previous time sequence is already obtained and saved, and the corresponding voltage of the corresponding capacitor is saved, and the counter is synchronized.
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