CN112803931B - Tri-state switching value identification system - Google Patents
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Abstract
一种三态开关量识别系统，属于汽车仪表技术领域，本发明为解决现有技术组合仪表采样电路采集信号单一的问题。它包括电阻R1～R7、三极管KT1、场效应管KT2和二极管RD1；电阻R6和电阻R7的连接端作为mi输入端；电阻R1的另一端作为mo输出端；电阻R5和电阻R6的连接端作为开关量识别输出端；根据mi输入端和mo输出端的不同逻辑识别开关量识别输出端的开光量识别状态。本发明用于对汽车仪表进行采样。
A three-state switching value identification system belongs to the technical field of automobile instruments. The invention solves the problem of single signal acquisition by a sampling circuit of a combined instrument in the prior art. It includes resistors R1~R7, triode KT1, field effect transistor KT2 and diode RD1; the connecting end of resistor R6 and resistor R7 is used as mi input; the other end of resistor R1 is used as mo output; the connecting end of resistor R5 and resistor R6 is used as Switching value identification output terminal; according to the different logic of mi input terminal and mo output terminal, identify the switching value recognition output terminal's switching value recognition status. The invention is used for sampling the automobile instrument.
Description
技术领域technical field
本发明涉及一种三态开关量识别系统，属于汽车仪表技术领域。The invention relates to a three-state switching value identification system, which belongs to the technical field of automobile instruments.
背景技术Background technique
随着整个汽车行业的发展，车身的功能变得越来越丰富，进入仪表的信号也更加多元化。传统的仪表接入的信号相对固定、单一，但是现在主机厂更加倾向于一口多用，可以在不改动车身原有硬线布局的情况下，直接切换为新功能、新状态。With the development of the entire automobile industry, the functions of the body have become more and more abundant, and the signals entering the instrument are also more diversified. The signal connected to the traditional instrument is relatively fixed and single, but now OEMs are more inclined to use one port for multiple purposes, and can directly switch to new functions and new states without changing the original hard wiring layout of the car body.
现有技术中，组合仪表采样电路比较固定单一，一旦制板完成，只能对高低电平做单一的判断，装车后更加不易更改，针对不同的车型，不同的采集，需要匹配不同的电路，一旦需求较多且复杂，就必须重新设计，进入新一轮的设计开发过程，大大增加了设计成本，所以急需一种新的采集方式，提升效率，提高设计灵活性。In the existing technology, the sampling circuit of the combination meter is relatively fixed and single. Once the board is made, only a single judgment can be made on the high and low levels, and it is more difficult to change after loading. For different models and different acquisitions, different circuits need to be matched , once the requirements are large and complex, it must be redesigned and enter a new round of design and development process, which greatly increases the design cost. Therefore, a new collection method is urgently needed to improve efficiency and design flexibility.
发明内容Contents of the invention
本发明目的是为了解决现有技术组合仪表采样电路采集信号单一的问题，提供了一种三态开关量识别系统。The object of the present invention is to provide a three-state switching value identification system in order to solve the problem of single signal acquisition by the sampling circuit of the combination meter in the prior art.
本发明所述一种三态开关量识别系统，它包括电阻R1～R7、三极管KT1、场效应管KT2和二极管RD1；A three-state switching value identification system according to the present invention, which includes resistors R1-R7, triode KT1, field effect transistor KT2 and diode RD1;
电阻R7的一端连接电阻R6的一端，电阻R7的另一端接GND；One end of resistor R7 is connected to one end of resistor R6, and the other end of resistor R7 is connected to GND;
电阻R6和电阻R7的连接端作为mi输入端；The connecting end of the resistor R6 and the resistor R7 is used as the mi input end;
电阻R6的另一端连接电阻R5的一端，电阻R5的另一端连接二极管RD1的阴极，二极管RD1的阳极连接效应管KT2的漏极，场效应管KT2的源极连接电阻R4的一端，场效应管KT2的源极同时接VCC，场效应管KT2的栅极同时连接电阻R4的另一端和电阻R3的一端，电阻R3的另一端连接三极管KT1的集电极，三极管KT1的发射极和电阻R2的一端同时接GND，三极管KT1的基极同时连接电阻R2的另一端和电阻R1的一端；The other end of the resistor R6 is connected to one end of the resistor R5, the other end of the resistor R5 is connected to the cathode of the diode RD1, the anode of the diode RD1 is connected to the drain of the effect transistor KT2, and the source of the field effect transistor KT2 is connected to one end of the resistor R4. The source of KT2 is connected to VCC at the same time, the gate of field effect transistor KT2 is connected to the other end of resistor R4 and one end of resistor R3 at the same time, the other end of resistor R3 is connected to the collector of triode KT1, the emitter of triode KT1 and one end of resistor R2 Connect to GND at the same time, and the base of the transistor KT1 is connected to the other end of the resistor R2 and one end of the resistor R1 at the same time;
电阻R1的另一端作为mo输出端；The other end of the resistor R1 is used as the mo output end;
电阻R5和电阻R6的连接端作为开关量识别输出端；The connection end of the resistor R5 and the resistor R6 is used as the switch value identification output end;
根据mi输入端和mo输出端的不同逻辑识别开关量识别输出端的开关量识别状态。According to the different logics of the mi input terminal and the mo output terminal, the switch quantity identification state of the switch quantity identification output terminal is identified.
优选的，所述开关量识别状态包括：悬空状态、高电平状态和低电平状态。Preferably, the switch value identification state includes: floating state, high level state and low level state.
优选的，根据mi输入端和mo输出端的不同逻辑识别开关量识别输出端的开关量识别状态具体包括：Preferably, according to the different logics of the mi input terminal and the mo output terminal, identifying the switch quantity identification state of the switch quantity identification output terminal specifically includes:
在一个周期范围内，mo输出电平为11、mi输入电平为10时，开关量识别状态为悬空状态；Within a cycle range, when the mo output level is 11 and the mi input level is 10, the switching value identification state is suspended;
在一个周期范围内，mo输出电平为10、mi输入电平为11时，开关量识别状态为高电平状态；Within a cycle range, when the output level of mo is 10 and the input level of mi is 11, the switch value identification state is a high level state;
在一个周期范围内，mo输出电平为10、mi输入电平为00时，开关量识别状态为低电平状态。Within a cycle range, when the mo output level is 10 and the mi input level is 00, the switching quantity identification state is a low level state.
本发明的优点：本发明提出的一种三态开关量识别系统，能够在不改变车身原有布局布线的基础上，仪表硬件也不需要更新换代，通过CPU对逻辑的识别就可以完美适配车身开关量信号。极大地提高了仪表的可适配性，可配置性，可兼容性。The advantages of the present invention: a three-state switch value recognition system proposed by the present invention can be perfectly adapted through the identification of the logic by the CPU without changing the original layout and wiring of the car body, and the instrument hardware does not need to be updated. Body switch signal. It greatly improves the adaptability, configurability and compatibility of the instrument.
附图说明Description of drawings
图1是本发明所述一种三态开关量识别系统的结构示意图。Fig. 1 is a schematic structural diagram of a three-state switching value identification system according to the present invention.
具体实施方式Detailed ways
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动的前提下所获得的所有其他实施例，都属于本发明保护的范围。The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.
需要说明的是，在不冲突的情况下，本发明中的实施例及实施例中的特征可以相互组合。It should be noted that, in the case of no conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other.
具体实施方式一：下面结合图1说明本实施方式，本实施方式所述一种三态开关量识别系统，它包括电阻R1～R7、三极管KT1、场效应管KT2和二极管RD1；Specific embodiment 1: The present embodiment will be described below in conjunction with FIG. 1. A three-state switching value identification system described in this embodiment includes resistors R1 to R7, transistor KT1, field effect transistor KT2 and diode RD1;
电阻R7的一端连接电阻R6的一端，电阻R7的另一端接GND；One end of resistor R7 is connected to one end of resistor R6, and the other end of resistor R7 is connected to GND;
电阻R6和电阻R7的连接端作为mi输入端；The connecting end of the resistor R6 and the resistor R7 is used as the mi input end;
电阻R6的另一端连接电阻R5的一端，电阻R5的另一端连接二极管RD1的阴极，二极管RD1的阳极连接场效应管KT2的漏极，场效应管KT2的源极连接电阻R4的一端，场效应管KT2的源极同时接电源VCC，场效应管KT2的栅极同时连接电阻R4的另一端和电阻R3的一端，电阻R3的另一端连接三极管KT1的集电极，三极管KT1的发射极和电阻R2的一端同时接GND，三极管KT1的基极同时连接电阻R2的另一端和电阻R1的一端；The other end of the resistor R6 is connected to one end of the resistor R5, the other end of the resistor R5 is connected to the cathode of the diode RD1, the anode of the diode RD1 is connected to the drain of the field effect transistor KT2, and the source of the field effect transistor KT2 is connected to one end of the resistor R4. The source of the tube KT2 is connected to the power supply VCC at the same time, the gate of the field effect tube KT2 is connected to the other end of the resistor R4 and one end of the resistor R3 at the same time, the other end of the resistor R3 is connected to the collector of the triode KT1, the emitter of the triode KT1 and the resistor R2 One end of the transistor KT1 is connected to GND at the same time, and the base of the triode KT1 is connected to the other end of the resistor R2 and one end of the resistor R1 at the same time;
电阻R1的另一端作为mo输出端；The other end of the resistor R1 is used as the mo output end;
电阻R5和电阻R6的连接端作为开关量识别输出端；The connection end of the resistor R5 and the resistor R6 is used as the switch value identification output end;
根据mi输入端和mo输出端的不同逻辑识别开关量识别输出端的开关量识别状态。According to the different logics of the mi input terminal and the mo output terminal, the switch quantity identification state of the switch quantity identification output terminal is identified.
进一步的，所述开关量识别状态包括：悬空状态、高电平状态和低电平状态。Further, the switch value identification state includes: floating state, high level state and low level state.
再进一步的，根据mi输入端和mo输出端的不同逻辑识别开关量识别输出端的开关量识别状态具体包括：Furthermore, according to the different logic identification of the mi input terminal and the mo output terminal, the switch quantity identification state of the switch quantity identification output terminal specifically includes:
在一个周期范围内，mo输出电平为11、mi输入电平为10时，开关量识别状态为悬空状态；Within a cycle range, when the mo output level is 11 and the mi input level is 10, the switching value identification state is suspended;
在一个周期范围内，mo输出电平为10、mi输入电平为11时，开关量识别状态为高电平状态；Within a cycle range, when the mo output level is 10 and the mi input level is 11, the switching value identification state is a high level state;
在一个周期范围内，mo输出电平为10、mi输入电平为00时，开关量识别状态为低电平状态。Within a cycle range, when the mo output level is 10 and the mi input level is 00, the switching quantity identification state is a low level state.
结合图1说明本发明的工作原理：The working principle of the present invention is illustrated in conjunction with Fig. 1:
当开关量为悬空状态时，此电路采集逻辑如下：When the switch value is suspended, the acquisition logic of this circuit is as follows:
首先，mo为单片机的电平信号输出，当输出为高电平时，A点电压达到三极管KT1导通电压，三极管发射极与集电极导通，电阻R3对地短路，这样电阻R3与R4线路就有电流流通，R3与R4就有各自的电压降，此时B点的电压就是R3所承担的压降，KT2选用了一颗P-MOS，当R4承担压降后，MOS管的G极与S极形成了负压，当这个电压达到MOS管的导通阈值，MOS管的射极与源极就会导通，VCC会加载到二极管RD1上，与电阻R5，R6，R7组成一个回路，mi为单片机采集电平，KT2导通后，R7上形成压降，mi采集到高电平，输入给单片机为逻辑“1”；First, mo is the level signal output of the single-chip microcomputer. When the output is high level, the voltage at point A reaches the conduction voltage of the triode KT1, the emitter of the triode is connected to the collector, and the resistor R3 is short-circuited to the ground, so that the circuit between the resistor R3 and R4 is With current flowing, R3 and R4 have their own voltage drops. At this time, the voltage at point B is the voltage drop borne by R3. KT2 uses a P-MOS. When R4 bears the voltage drop, the G pole of the MOS tube and the The S pole forms a negative voltage. When this voltage reaches the conduction threshold of the MOS transistor, the emitter and source of the MOS transistor will be turned on, and VCC will be loaded on the diode RD1, forming a loop with resistors R5, R6, and R7. mi is the acquisition level of the single-chip microcomputer. After KT2 is turned on, a voltage drop is formed on R7, mi is collected at a high level, and the input to the single-chip microcomputer is logic "1";
当mo输出为低电平时，A点电压为零，没有达到三极管KT1导通电压，三极管发射极与集电极之间无法导通，R3没有连接到GND，这样电阻R3与R4线路就没有电流流通，此时B点的电压值等同于VCC的电压值，R4两端没有形成压降，所以MOS管的G极与S极也没有形成负压，无法达到MOS管的导通阈值，MOS管的射极与源极不会导通，VCC没有加载到RD1上，电阻R5，R6，R7没有电流流过，mi采集到的电平就等同于GND，输入给单片机为逻辑“0”；When the output of mo is low, the voltage at point A is zero, and the conduction voltage of the triode KT1 is not reached, and the emitter and collector of the triode cannot be conducted, and R3 is not connected to GND, so that there is no current flow in the circuit between resistor R3 and R4 At this time, the voltage value of point B is equal to the voltage value of VCC, and there is no voltage drop across R4, so the G pole and S pole of the MOS tube do not form a negative pressure, and the conduction threshold of the MOS tube cannot be reached. The emitter and source will not conduct, VCC is not loaded on RD1, resistors R5, R6, and R7 have no current flowing, the level collected by mi is equal to GND, and the input to the microcontroller is logic "0";
当开关量为高电平状态时，此电路采集逻辑如下：When the switching value is in a high level state, the acquisition logic of this circuit is as follows:
首先，mo为单片机的电平信号输出，当输出为高电平时，A点电压达到三极管KT1导通电压，三极管发射极与集电极导通，电阻R3对地短路，这样电阻R3与R4线路就有电流流通，R3与R4就有各自的电压降，此时B点的电压就是R3所承担的压降，KT2选用了一颗P-MOS，当R4承担压降后，MOS管的G极与S极形成了负压，当这个电压达到MOS管的导通阈值，MOS管的射极与源极就会导通，VCC会加载到二极管RD1上，与电阻R5，R6，R7组成一个回路，mi为单片机采集电平，KT2导通后，R7上形成压降，mi采集到高电平，输入给单片机为逻辑“1”；First, mo is the level signal output of the single-chip microcomputer. When the output is high level, the voltage at point A reaches the conduction voltage of the triode KT1, the emitter of the triode is connected to the collector, and the resistor R3 is short-circuited to the ground, so that the circuit between the resistor R3 and R4 is With current flowing, R3 and R4 have their own voltage drops. At this time, the voltage at point B is the voltage drop borne by R3. KT2 uses a P-MOS. When R4 bears the voltage drop, the G pole of the MOS tube and the The S pole forms a negative voltage. When this voltage reaches the conduction threshold of the MOS transistor, the emitter and source of the MOS transistor will be turned on, and VCC will be loaded on the diode RD1, forming a loop with resistors R5, R6, and R7. mi is the acquisition level of the single-chip microcomputer. After KT2 is turned on, a voltage drop is formed on R7, mi is collected at a high level, and the input to the single-chip microcomputer is logic "1";
当mo输出为低电平时，A点电压为零，没有达到三极管KT1导通电压，三极管发射极与集电极之间无法导通，R3没有连接到GND，这样电阻R3与R4线路就没有电流流通，此时B点的电压值等同于VCC的电压值，R4两端没有形成压降，所以MOS管的G极与S极也没有形成负压，无法达到MOS管的导通阈值，MOS管的射极与源极不会导通，VCC没有加载到RD1上，但因为此时开关量为高电平，与电阻R5，R6，R7依然会组成一个通路，形成电流，电阻R7上形成压降mi采集到高电平，输入给单片机为逻辑“1”；When the output of mo is low, the voltage at point A is zero, and the conduction voltage of the triode KT1 is not reached, and the emitter and collector of the triode cannot be conducted, and R3 is not connected to GND, so that there is no current flow in the circuit between resistor R3 and R4 At this time, the voltage value of point B is equal to the voltage value of VCC, and there is no voltage drop across R4, so the G pole and S pole of the MOS tube do not form a negative pressure, and the conduction threshold of the MOS tube cannot be reached. The emitter and the source will not conduct, and VCC is not loaded on RD1, but because the switching value is at a high level at this time, it will still form a path with resistors R5, R6, and R7 to form a current, and a voltage drop will be formed on resistor R7 When mi collects a high level, the input to the microcontroller is a logic "1";
当开关量为低电平状态时，此电路采集逻辑如下：When the switching value is in a low level state, the acquisition logic of this circuit is as follows:
首先，mo为单片机的电平信号输出，当输出为高电平时，A点电压达到三极管KT1导通电压，三极管发射极与集电极导通，电阻R3对地短路，这样电阻R3与R4线路就有电流流通，R3与R4就有各自的电压降，此时B点的电压就是R3所承担的压降，KT2选用了一颗P-MOS，当R4承担压降后，MOS管的G极与S极形成了负压，当这个电压达到MOS管的导通阈值，MOS管的射极与源极就会导通，VCC会加载到二极管RD1上，但是因为此时开关量为低电平，所以C点的电位就是零，VCC与二极管RD1，电阻R5构成回路，电阻R6，R7没有电流流通，mi采集到低电平，输入给单片机为逻辑“0”；First, mo is the level signal output of the single-chip microcomputer. When the output is high level, the voltage at point A reaches the conduction voltage of the triode KT1, the emitter of the triode is connected to the collector, and the resistor R3 is short-circuited to the ground, so that the circuit between the resistor R3 and R4 is With current flowing, R3 and R4 have their own voltage drops. At this time, the voltage at point B is the voltage drop borne by R3. KT2 uses a P-MOS. When R4 bears the voltage drop, the G pole of the MOS tube and the The S electrode forms a negative voltage. When this voltage reaches the conduction threshold of the MOS transistor, the emitter and source of the MOS transistor will be turned on, and VCC will be loaded on the diode RD1. However, because the switching value is low at this time, So the potential at point C is zero, VCC, diode RD1, and resistor R5 form a loop, resistors R6 and R7 have no current flow, mi collects a low level, and the input to the microcontroller is logic "0";
当mo输出为低电平时，A点电压为零，没有达到三极管KT1导通电压，三极管发射极与集电极之间无法导通，R3没有连接到GND，这样电阻R3与R4线路就没有电流流通，此时B点的电压值等同于VCC的电压值，R4两端没有形成压降，所以MOS管的G极与S极也没有形成负压，无法达到MOS管的导通阈值，MOS管的射极与源极不会导通，VCC没有加载到RD1上，电阻R5，R6，R7没有电流流过，mi采集到的电平就等同于GND，输入给单片机为逻辑“0”。When the output of mo is low, the voltage at point A is zero, and the conduction voltage of the triode KT1 is not reached, and the emitter and collector of the triode cannot be conducted, and R3 is not connected to GND, so that there is no current flow in the circuit between resistor R3 and R4 At this time, the voltage value of point B is equal to the voltage value of VCC, and there is no voltage drop across R4, so the G pole and S pole of the MOS tube do not form a negative pressure, and the conduction threshold of the MOS tube cannot be reached. The emitter and source will not conduct, VCC is not loaded on RD1, resistors R5, R6, and R7 have no current flowing, the level collected by mi is equal to GND, and the input to the microcontroller is logic "0".
上述根据逻辑识别出开关量的状态如表1所示：The state of the switching value identified above based on the logic is shown in Table 1:
表1Table 1
虽然在本文中参照了特定的实施方式来描述本发明，但是应该理解的是，这些实施例仅仅是本发明的原理和应用的示例。因此应该理解的是，可以对示例性的实施例进行许多修改，并且可以设计出其他的布置，只要不偏离所附权利要求所限定的本发明的精神和范围。应该理解的是，可以通过不同于原始权利要求所描述的方式来结合不同的从属权利要求和本文中所述的特征。还可以理解的是，结合单独实施例所描述的特征可以使用在其他所述实施例中。Although the invention is described herein with reference to specific embodiments, it should be understood that these embodiments are merely illustrative of the principles and applications of the invention. It is therefore to be understood that numerous modifications may be made to the exemplary embodiments and that other arrangements may be devised without departing from the spirit and scope of the invention as defined by the appended claims. It shall be understood that different dependent claims and features described herein may be combined in a different way than that described in the original claims. It will also be appreciated that features described in connection with individual embodiments can be used in other described embodiments.
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