CN112786549A - Chip packaging structure - Google Patents
Chip packaging structure Download PDFInfo
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- CN112786549A CN112786549A CN202110031946.4A CN202110031946A CN112786549A CN 112786549 A CN112786549 A CN 112786549A CN 202110031946 A CN202110031946 A CN 202110031946A CN 112786549 A CN112786549 A CN 112786549A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/145—Organic substrates, e.g. plastic
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D18/00—Thyristors
- H10D18/60—Gate-turn-off devices
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
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- Power Engineering (AREA)
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Abstract
本发明提供一种芯片封装结构，所述芯片封装结构包括芯片，所述芯片第一表面的边缘设有第一电极；所述第一电极上设有第一电极金属环；所述第一电极金属环上设有第一电极连接环；所述第一电极与所述第一电极金属环通过压力接触；所述第一电极金属环与所述第一电极连接环通过压力接触。本发明的芯片封装结构使得在集成门极换流晶闸管封装结构中，一方面极大缩短了门极连接环与阴极连接环的间距、降低了换流电感，另一方面保证了腔体内部的真空度；通过在外侧安装聚丙烯等材料制造的芯片固定环，易于实现芯片的安装定位。
The invention provides a chip package structure, the chip package structure includes a chip, a first electrode is provided on the edge of a first surface of the chip; a first electrode metal ring is provided on the first electrode; the first electrode A first electrode connection ring is arranged on the metal ring; the first electrode and the first electrode metal ring are in pressure contact; the first electrode metal ring and the first electrode connection ring are in pressure contact. The chip packaging structure of the present invention enables, in the packaging structure of the integrated gate commutated thyristor, on the one hand, the distance between the gate connecting ring and the cathode connecting ring is greatly shortened, and the commutation inductance is reduced; Vacuum degree; by installing a chip fixing ring made of polypropylene and other materials on the outside, it is easy to realize the installation and positioning of the chip.
Description
Technical Field
The invention belongs to the technical field of power semiconductor devices, and particularly relates to a chip packaging structure.
Background
An Integrated Gate Commutated Thyristor (IGCT) device is a new generation of current control devices developed on the basis of a gate turn-off thyristor (GTO). From the chip level, the GCT chip adopts the transparent anode technology and the buffer layer design, and the trigger current level and the conduction voltage drop of the device are reduced. From the view of a gate driving circuit and an on-off mechanism, the IGCT adopts an integrated driving circuit mode, reduces stray parameters of a current conversion loop to a nano-Henry magnitude by optimizing a circuit layout, a tube shell packaging structure and the like, enables current to be completely converted to a gate from a cathode in a short time in the device turn-off process, and then enables the PNP triode to be naturally turned off. Under the condition of low bus voltage turn-off, reducing the stray inductance of the commutation loop is beneficial to improving the limit turn-off current capability limited by the hard drive condition. Under the condition of high bus voltage turn-off, the reduction of the stray inductance of the commutation loop is beneficial to improving the current distribution uniformity, and further improves the current turn-off capability.
Fig. 1 is a schematic cross-sectional view of a simplified conventional IGCT device package structure, in which in fig. 1, a is an anode molybdenum sheet, b is an anode copper block, c is an anode solder ring 1, d is an anode solder ring 2, e is a ceramic shed, f is a gate electrode connecting ring, g is a ceramic spacer ring, h is a cathode connecting ring, i is a cathode solder ring, j is an outer-cathode molybdenum sheet, k is a cathode block, and l is an inner-cathode molybdenum sheet. The commutation paths near the center and near the outside of the chip in this structure are shown by the arrow paths in fig. 2 and 3, respectively. The inductance of the commutation loop of the IGCT device package is mainly determined by the area included in the commutation path, and the larger the area is, the larger the stray inductance of the loop is. As can be seen from comparing fig. 2 and 3, the area of the commutation path in fig. 2 is larger than that in fig. 3, so that the chip in fig. 2 has a larger stray inductance of the commutation loop near the center, which is mainly caused by the slot structure of the cathode block and the ceramic spacer ring between the gate connection ring and the cathode connection ring in the conventional IGCT package structure.
Disclosure of Invention
In view of the above problems, the present invention provides a chip package structure.
The chip packaging structure of the invention comprises: the chip is provided with a plurality of chips,
a first electrode is arranged at the edge of the first surface of the chip;
a first electrode metal ring is arranged on the first electrode;
a first electrode connecting ring is arranged on the first electrode metal ring;
the first electrode is in pressure contact with the first electrode metal ring;
the first electrode metal ring is in pressure contact with the first electrode connection ring.
Further, in the present invention,
the chip packaging structure also comprises a second electrode metal sheet and a second electrode metal block,
two surfaces of the second electrode metal sheet are flat, one surface of the second electrode metal sheet is attached to the second electrode on the first surface of the chip, and the other surface of the second electrode metal sheet is attached to one end face of the second electrode metal block.
Further, in the present invention,
the second electrode metal sheet and the outer edge of the periphery of one end, attached to the second electrode metal sheet, of the second electrode metal block are separated from the first electrode metal ring through a separation ring.
Further, in the present invention,
the outer edge of the periphery of the first electrode metal ring is provided with a chip fixing ring, the inner edge of the chip fixing ring is fixed in a contact mode with the chip, and the height of the chip fixing ring is not smaller than the sum of the height of the first electrode metal ring and the thickness of the chip.
Further, in the present invention,
the chip packaging structure comprises a packaging umbrella skirt, and the chip fixing ring is arranged in a cavity of the packaging umbrella skirt;
the first electrode connecting ring extends outwards from the periphery of the isolating ring and extends outwards from the edge of one end of the packaging umbrella skirt through the edge of the chip fixing ring.
Further, in the present invention,
and the periphery of the outer edge of the isolating ring is provided with an isolating gasket.
Further, in the present invention,
a second electrode connecting ring is arranged on the periphery of the outer edge of the isolating ring, the isolating gasket is arranged between the second electrode connecting ring and the first electrode connecting ring, and the second electrode connecting ring is fixedly connected with the second electrode metal block;
one end of the packaging umbrella skirt, the first electrode connecting ring, the isolating gasket, the second electrode connecting ring and the second electrode metal block are in airtight connection.
Further, in the present invention,
the first electrode metal ring and the first electrode connecting ring are connected together through a copper foil, and the copper foil is bent inwards;
the copper foil inward bending part is provided with a butterfly spring, the butterfly spring is formed by installing 2 butterfly springs back to back, and the butterfly spring is fixed at the copper foil inward bending part through a spring fixing sheet.
Further, in the present invention,
the air-tight connection is welding, and the sealing mode between the first electrode connecting ring and the second electrode connecting ring is realized by welding the second electrode metal block and the isolating ring.
Further, in the present invention,
the chip is an integrated gate pole commutation thyristor chip;
the first electrode is a gate electrode;
the first electrode metal ring is a gate electrode ring;
the first electrode connecting ring is a gate pole connecting ring;
the second electrode is a cathode;
the second electrode metal sheet is a cathode sheet;
the second electrode metal block is a cathode block;
the second electrode connecting ring is a cathode connecting ring.
Further, in the present invention,
the isolating ring is a ceramic isolating ring;
the chip fixing ring is made of polypropylene;
the packaging umbrella skirt is a ceramic umbrella skirt.
The chip packaging structure of the invention ensures that in the integrated gate pole commutation thyristor packaging structure, on one hand, the distance between a gate pole connecting ring and a cathode connecting ring is greatly shortened, the commutation inductance is reduced, and on the other hand, the vacuum degree in the cavity is ensured; the chip fixing ring made of polypropylene and the like is arranged on the outer side, so that the chip is easy to mount and position.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 shows a schematic cross-sectional view of a conventional IGCT device package structure according to the prior art;
FIG. 2 shows a schematic diagram of the commutation path of a conventional GCT chip near the center cell, according to the prior art;
FIG. 3 shows a schematic diagram of the commutation path of a conventional GCT chip near the outer cell according to the prior art;
FIG. 4 is a cross-sectional view of a novel IGCT package structure with low stray inductance characteristics, in accordance with embodiments of the present invention;
FIG. 5 is a schematic diagram illustrating an exploded structure of a novel IGCT package structure with low stray inductance characteristics according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a new IGCT package structure commutation path with low stray inductance characteristics according to an embodiment of the present invention;
FIG. 7 illustrates a schematic view of an IGCT gate crimp assembly in accordance with an embodiment of the present invention;
fig. 8 shows a schematic diagram of a final packaged product according to an embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 4 and 5 are a schematic cross-sectional view and a schematic exploded view of a novel IGCT package structure with low stray inductance according to an embodiment of the present invention. In fig. 4 and 5, 1 is an anode copper block, 2 is a first anode welding ring, 3 is a second anode welding ring, 4 is a ceramic shed, 5 is an anode molybdenum sheet, 6 is a GCT chip, 7 is a cathode sheet, 8 is a gate ring, 9 is a gate connecting ring, 10 is a spacer ring, 11 is a cathode connecting ring, and 12 is a cathode block.
As shown in fig. 4 and 5, taking an IGCT package structure as an example, the chip package structure with low commutation inductance of the present invention includes a laminated structure, and the laminated structure includes an anode copper block 1, an anode molybdenum sheet 5, a GCT chip 6, a cathode sheet 7, and a cathode block (which may be a copper block) 12, which are laminated in sequence. The laminated structure is arranged in an inner cavity of the ceramic umbrella skirt 4, and the anode copper block 1 and the cathode block 12 are respectively arranged at the ports at the two ends of the ceramic umbrella skirt 4.
A first anode welding ring 2 is fixed outside the anode copper block 1, a second anode welding ring 3 is fixedly welded outside the first anode welding ring 2, and the second anode welding ring 3 is fixed on the edge of one end of the ceramic umbrella skirt 4.
The GCT chip 6 is provided with a chip fixing ring around, the chip fixing ring is used for fixing the GCT chip 6, and the chip fixing ring can be made of polypropylene. The cathode disk (which may be a molybdenum disk) 7 has two opposing flat surfaces: the cathode plate comprises a first surface and a second surface, wherein the first surface of the cathode plate 7 is attached to a cathode on the surface of the GCT chip 6, the second surface of the cathode plate 7 is attached to one end face of the cathode block 12, one end of the cathode plate 7, close to the cathode block 12, of the cathode plate 7 is connected with the gate pole ring 8 outwards, and a gate pole connecting ring 9 is arranged in the gate pole ring 8. The edge of the surface of the GCT chip 6 is provided with a gate pole, the gate pole ring 8 is connected with the gate pole on the GCT chip 6 through pressure contact in the vertical direction, meanwhile, the gate pole ring 8 is connected with a gate pole connecting ring 9 extending outwards through pressure contact, the gate pole connecting ring 9 extends outwards from the inner periphery of the gate pole ring 8, the gate pole connecting ring 9 extends outwards from the edge of the other end of the ceramic umbrella skirt 4 through the edge of the chip fixing ring, and the height of the chip fixing ring is not less than the sum of the height of the gate pole ring 8 and the thickness of the GCT chip 6.
The gate connection ring 9 and the cathode block 12 are separated by a spacer ring 10. Cathode connecting rings 11 are attached to the peripheries of the cathode blocks 12, and the gate connecting rings 9 and the cathode connecting rings 11 are also separated by isolating rings 10.
During packaging, after the GCT chip 6 is arranged in the ceramic umbrella skirt 4, the first anode welding ring 2 and the second anode welding ring 3 are fixed and welded so as to ensure the air tightness of a cavity in the ceramic umbrella skirt 4. The GCT chip 6 is positioned in a cavity of the ceramic umbrella skirt 4, and the air-tight connection is realized by welding the anode copper block 1, the first anode welding ring 2, the second anode welding ring 3, the ceramic umbrella skirt 4, the gate pole connecting ring 9, the cathode connecting ring 11, the isolating ring 10 and the cathode block 12.
After the packaging structure of the invention is adopted, the commutation paths of the chip close to the center and close to the outer side are as shown in fig. 6, namely, the gate electrode-gate electrode ring 8-gate electrode connecting ring 9-cathode connecting ring 11-cathode block 12-cathode sheet 7-chip cathode, and the area of the commutation paths is far smaller than that of the commutation paths in the prior art, so that the packaging structure of the invention has lower commutation inductance than that in the prior art.
The gate of the GCT chip 6 is connected with the package structure and the chip through a gate connecting ring 9 in a crimping mode, and the gate is positioned on the outermost edge of the whole chip. Due to the outward movement of the gate structure, the surface of the cathode block 12 does not need to be provided with a groove structure for placing the gate connecting ring 9 as in the prior art.
Fig. 7 shows a middle IGCT gate crimping assembly according to the present invention, which includes a gate ring 8, a gate connecting ring 9, a gate copper foil 13, a belleville spring 14, and a spring fixing plate 15, wherein the gate ring 8 may be a molybdenum ring. The gate pole ring 8 and the gate pole connecting ring 9 are connected together through a gate pole copper foil 13. The gate copper foil 13 is bent inward to conduct the gate current. The design can obviously reduce stray inductance in the circuit and ensure the stability of gate pole current through-flow. The butterfly springs 14 are 2 disc springs which are arranged together in a butt joint mode and fixed through the spring fixing pieces 15, the butterfly springs 14 provide stable pressure for the gate pole ring 8, the gate pole connecting ring 9 and the gate pole copper foil 13, and the fact that uniform current passes through the crimping surfaces of the gate pole ring 8, the gate pole connecting ring 9 and the gate pole copper foil 13 is guaranteed. The magnitude of the pressure is determined by the requirements of the GCT chip 6. The ceramic isolating ring 10 plays a role in sealing and fixing the gate copper foil 13 and isolating the gate and cathode potentials.
Figure 7 also shows the manner of sealing between the gate connection ring 9 and the cathode connection ring 11. The sealing mode is realized by welding the cathode block 12 and the ceramic isolating ring 10 instead of directly welding and fixing the ceramic isolating ring in the prior art, so that the distance between the gate connecting ring 9 and the cathode connecting ring 11 is greatly shortened, the process difficulty is reduced, the stray inductance in a circuit is reduced, and the vacuum degree in the cavity is ensured.
The GCT chip 6 is easy to mount and position by mounting a chip fixing ring made of polypropylene and the like on the outer side.
Fig. 8 shows a schematic diagram of a final packaged product of the chip packaging structure of the present invention.
The chip packaging structure of the invention ensures that in the integrated gate pole commutation thyristor packaging structure, on one hand, the distance between the gate pole connecting ring 9 and the cathode connecting ring 11 is greatly shortened, the commutation inductance is reduced, and on the other hand, the vacuum degree in the cavity is ensured; the chip fixing ring made of polypropylene and the like is arranged on the outer side, so that the chip is easy to mount and position.
Although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (11)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110031946.4A CN112786549A (en) | 2021-01-11 | 2021-01-11 | Chip packaging structure |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110031946.4A CN112786549A (en) | 2021-01-11 | 2021-01-11 | Chip packaging structure |
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| CN112786549A true CN112786549A (en) | 2021-05-11 |
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| CN202110031946.4A Pending CN112786549A (en) | 2021-01-11 | 2021-01-11 | Chip packaging structure |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115621233A (en) * | 2022-12-01 | 2023-01-17 | 清华大学 | A tube shell for fully controlled power electronic devices |
| CN118198118A (en) * | 2024-03-01 | 2024-06-14 | 北京怀柔实验室 | Integrated composite lead structure, tube shell and manufacturing method thereof, and power device |
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| US5777351A (en) * | 1995-05-31 | 1998-07-07 | Mitsubishi Denki Kabushiki Kaisha | Compression bonded type semiconductor element and semiconductor device |
| JPH10270675A (en) * | 1997-03-24 | 1998-10-09 | Mitsubishi Electric Corp | Compression bonded semiconductor device |
| US6465881B1 (en) * | 1999-01-18 | 2002-10-15 | Mitsubishi Denki Kabushiki Kaisha | Compression bonded type semiconductor device |
| CN105934821A (en) * | 2014-01-21 | 2016-09-07 | Abb 技术有限公司 | Power semiconductor device |
| CN111933588A (en) * | 2020-06-24 | 2020-11-13 | 株洲中车时代半导体有限公司 | IGCT packaging structure |
| CN215988733U (en) * | 2021-01-11 | 2022-03-08 | 清华大学 | A chip packaging structure |
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2021
- 2021-01-11 CN CN202110031946.4A patent/CN112786549A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5777351A (en) * | 1995-05-31 | 1998-07-07 | Mitsubishi Denki Kabushiki Kaisha | Compression bonded type semiconductor element and semiconductor device |
| JPH10270675A (en) * | 1997-03-24 | 1998-10-09 | Mitsubishi Electric Corp | Compression bonded semiconductor device |
| US6465881B1 (en) * | 1999-01-18 | 2002-10-15 | Mitsubishi Denki Kabushiki Kaisha | Compression bonded type semiconductor device |
| CN105934821A (en) * | 2014-01-21 | 2016-09-07 | Abb 技术有限公司 | Power semiconductor device |
| CN111933588A (en) * | 2020-06-24 | 2020-11-13 | 株洲中车时代半导体有限公司 | IGCT packaging structure |
| CN215988733U (en) * | 2021-01-11 | 2022-03-08 | 清华大学 | A chip packaging structure |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115621233A (en) * | 2022-12-01 | 2023-01-17 | 清华大学 | A tube shell for fully controlled power electronic devices |
| CN115621233B (en) * | 2022-12-01 | 2023-05-16 | 清华大学 | A shell for full accuse formula power electronic device |
| WO2024113479A1 (en) * | 2022-12-01 | 2024-06-06 | 清华大学 | Tube shell for fully-controlled power electronic device |
| CN118198118A (en) * | 2024-03-01 | 2024-06-14 | 北京怀柔实验室 | Integrated composite lead structure, tube shell and manufacturing method thereof, and power device |
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