CN112786448B - A processing technology of IGBT wafer - Google Patents

Abstract

The invention discloses a processing technology of an IGBT wafer, which comprises the following steps: a processing technology of an IGBT wafer comprises the following steps: s1, depositing an ILD layer on the front surface of the IGBT wafer; s2, permanently bonding a silicon-based carrier plate on the front surface of the wafer; s3, thinning the back of the wafer, implanting ions and activating; s4, manufacturing a reverse metal coating; s5, bonding the glass carrier plate on the back of the wafer temporarily, and removing the silicon-based carrier plate; s6, etching the ILD layer to form a gradual slope contact hole, and sputtering thick film Al to fill the contact hole; s7, completing the front process of the wafer; and S8, bonding and removing the glass carrier plate. The invention overcomes the limitation of high-temperature tempering temperature after the glass plate is temporarily bonded in the traditional process and the defect that deep ions can not be activated by laser local ion activation by permanently bonding the silicon-based carrier plate, can process ultrathin IGBT wafers and reduces the processing cost of I GBT wafers.

Description

A processing technology of IGBT wafer

technical field

The invention relates to the field of IGBT chip processing, in particular to a processing technology of an IGBT wafer.

Background technique

Insulated Gate Bipolar Transistor (IGBT) is a new type of composite power device developed on the basis of metal oxide field effect transistor (MOSFET) and bipolar transistor (Bipolar). It has MOS input and bipolar output. Function. IGBT combines the advantages of Bipolar device with low on-state voltage drop, high current carrying density, high withstand voltage, low power MOSFET driving power, fast switching speed, high input impedance and good thermal stability. It is widely used in AC motors, frequency conversion devices, switching power supplies, lighting circuits, traction drives and other fields. As the core device of the power electronic converter, it lays the foundation for the high frequency, miniaturization, high performance and high reliability of the application device.

The IGBT chip is composed of tens of thousands of cells (repetitive units) in structure, and is manufactured by large-scale integrated circuit technology and power device technology in the process. Each cell structure can be divided into three parts: a bulk structure, a front MOS structure and a back collector region structure. In the existing IGBT chip manufacturing process, the processing of ultra-thin wafers is realized by bonding glass substrates to overcome the fragile problem of ultra-thin wafers. However, after bonding the glass substrates, high-temperature processes, such as backside ion implantation, cannot be performed. After that, high temperature tempering is required to activate the ions. Therefore, in the existing IGBT chip manufacturing process, the laser is usually used for local activation after the backside ion implantation. However, the laser can only be used for shallow ion activation, and deep ion activation is not easy to achieve.

SUMMARY OF THE INVENTION

In order to solve the deficiencies mentioned in the above background technology, the purpose of the present invention is to provide a processing technology of an IGBT wafer. The present invention skips the step of opening a contact hole after finishing the ILD layer, and permanently bonds the ILD layer to the silicon wafer. , Do the backside ion implantation and activation directly. After the backside process of the wafer is completed, the backside of the wafer is temporarily bonded to the glass carrier, and then the silicon wafer is removed by grinding and etching, and then the ILD layer is opened and the subsequent process is performed.

The object of the present invention can be realized through the following technical solutions:

A processing technology of an IGBT wafer, comprising the following steps:

S1. Deposit an ILD layer on the front side of the IGBT wafer with the deep trench gate;

S2. The front side of the wafer with the ILD layer will be permanently bonded to the silicon-based carrier;

S3, flip the silicon-based carrier plate to complete the thinning of the back of the wafer, then implant ions on the back of the wafer, and activate the implanted ions through high temperature tempering;

S4, making a reverse metal coating on the back of the tempered wafer;

S5. Temporarily bond the back of the wafer to the glass carrier, flip the glass carrier, and remove the silicon-based carrier by grinding and etching;

S6, etching the ILD layer to form a gentle slope-shaped contact hole, and by sputtering thick film Al, the contact hole is completely filled to form the Emittor structure of the IGBT;

S7, metal coating, yellow light and etching are performed on the front side of the wafer to form a front metal pattern and a PAD bonding area;

S8, debonding, removing the glass carrier, cleaning and removing the adhesive layer, and completing the IGBT wafer processing.

Further preferably, the deposition method of the ILD layer in step S1 is one of LPCVD, APCVD and PECVD, the bottom layer of the LID layer is an undoped dielectric, and the upper layer of the ILD layer is a P-doped dielectric.

Further preferably, the method for permanently bonding the silicon-based carrier on the front side of the wafer in step S2 includes the following steps:

S201, cleaning the surface of the silicon-based carrier and the ILD layer of the IGBT wafer and removing the natural oxide layer, and treating the surface of the silicon-based carrier by plasma to excite the atomic active bonds of the silicon-based carrier;

S202, bonding the IGBT wafer on the surface of the silicon-based carrier, and then putting it into a high-temperature furnace tube together for high-temperature tempering, so that the LID layer of the IGBT wafer and the silicon-based carrier form a permanent bonding structure.

Further preferably, the temperature of the high-temperature tempering in step S202 is 800-1400° C., and the heating rate of the high-temperature furnace tube is less than 15° C./min.

Further preferably, in step S3, the thickness of the backside of the wafer after thinning is less than 150um, and the high-temperature tempering is heated by a furnace tube or a rapid LAMP heating device RTP.

Further preferably, in step S6, the inclination angle of the side wall of the gently slope-shaped contact hole is 75-85°, and the temperature during sputtering thick Al film is >400°C.

Beneficial effects of the present invention:

Compared with the traditional IGBT wafer manufacturing process, the IGBT wafer processing technology of the present invention skips the step of opening the contact hole after the ILD layer is completed, the ILD layer and the silicon wafer are permanently bonded, and the backside ion implantation and activation are directly performed. After the backside process of the wafer is completed, the backside of the wafer is temporarily bonded to the glass carrier, and then the silicon wafer is removed by grinding and etching, and then the ILD layer is opened and the subsequent processes are performed. The invention overcomes the limitation of high temperature tempering temperature after temporary bonding of glass plates in traditional technology and the defect that laser local ion activation cannot activate deep ions by permanently bonding the silicon substrate carrier plate, and can process ultra-thin IGBT wafers , reducing the processing cost of IGBT wafers.

Description of drawings

The present invention will be further described below in conjunction with the accompanying drawings.

Fig. 1 is the molding schematic diagram of process step S1 of the present invention;

Fig. 2 is the molding schematic diagram of process step S2 of the present invention;

Fig. 3 is the molding schematic diagram of process step S3 of the present invention;

Fig. 4 is the molding schematic diagram of process step S4 of the present invention;

Fig. 5 is the molding schematic diagram of process step S5 of the present invention;

Fig. 6 is the molding schematic diagram of process step S6 of the present invention;

Fig. 7 is the molding schematic diagram of process step S7 of the present invention;

Fig. 8 is the molding schematic diagram of process step S8 of the present invention;

In the picture:

1-IGBT wafer, 2-ILD layer, 3-deep trench, 4-silicon substrate carrier, 5-implanted ion layer, 6-backside metal coating, 7-adhesion layer, 8-glass carrier, 9- Contact hole, 10-front PAD.

Detailed ways

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

In the description of the present invention, it is to be understood that the terms "opening", "upper", "lower", "thickness", "top", "middle", "length", "inside", "around", etc. Indicates the orientation or positional relationship, only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the components or elements referred to must have a specific orientation, are constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present invention .

Example 1

A processing technology of an IGBT wafer, comprising the following steps:

S1. Deposit an ILD layer by LPCVD on the front of the IGBT wafer with the deep trench gate, the bottom layer of the LID layer is an undoped dielectric, and the upper layer of the ILD layer is a P-doped dielectric;

S2. The front side of the wafer with the ILD layer will be permanently bonded to the silicon-based carrier;

S3. Flip the silicon-based carrier to thin the back of the wafer to 40um, then implant ions on the back of the wafer, and heat it through a furnace tube or a rapid LAMP heating device RTP, and high-temperature tempering activates the implanted ions;

S4, making a reverse metal coating on the back of the tempered wafer;

S5. Temporarily bond the back of the wafer to the glass carrier, flip the glass carrier, and remove the silicon-based carrier by grinding and etching;

S6, etching the ILD layer to form a gentle slope-shaped contact hole with a sidewall inclination angle of 75°, and by sputtering a thick film of Al at 450°C, the contact hole is completely filled to form the Emittor structure of the IGBT;

S7, metal coating, yellow light and etching are performed on the front side of the wafer to form a front metal pattern and a PAD bonding area;

S8, debonding, removing the glass carrier, cleaning and removing the adhesive layer, and completing the IGBT wafer processing.

The method for permanently bonding the silicon-based carrier on the front side of the wafer in step S2 includes the following steps:

S201, cleaning the surface of the silicon-based carrier and the ILD layer of the IGBT wafer and removing the natural oxide layer, and treating the surface of the silicon-based carrier by plasma to excite the atomic active bonds of the silicon-based carrier;

S202, bond the IGBT wafer on the surface of the silicon-based carrier, and then put it into a high-temperature furnace tube at a rate of 10°C/min to heat up to 1200°C for high-temperature tempering, so that the LID layer of the IGBT wafer and the silicon-based carrier are formed Permanently bonded structure.

Example 2

A processing technology of an IGBT wafer, comprising the following steps:

S1. An ILD layer is deposited by APCVD on the front side of the IGBT wafer with the deep trench gate. The bottom layer of the LID layer is an undoped dielectric, and the upper layer of the ILD layer is a P-doped dielectric;

S2. The front side of the wafer with the ILD layer will be permanently bonded to the silicon-based carrier;

S3. Flip the silicon-based carrier to thin the back of the wafer to 80um, then implant ions on the back of the wafer, and heat it through a furnace tube or a rapid LAMP heating device RTP, and high-temperature tempering activates the implanted ions;

S4, making a reverse metal coating on the back of the tempered wafer;

S5. Temporarily bond the back of the wafer to the glass carrier, flip the glass carrier, and remove the silicon-based carrier by grinding and etching;

S6, etching the ILD layer to form a gentle slope-shaped contact hole with a sidewall inclination angle of 80°, and by sputtering a thick film of Al at 500°C, the contact hole is completely filled to form the Emittor structure of the IGBT;

S7, metal coating, yellow light and etching are performed on the front side of the wafer to form a front metal pattern and a PAD bonding area;

S8. Laser debonding, removing the glass carrier, cleaning and removing the adhesive layer, and completing the IGBT wafer processing.

The method for permanently bonding the silicon-based carrier on the front side of the wafer in step S2 includes the following steps:

S201, cleaning the surface of the silicon-based carrier and the ILD layer of the IGBT wafer and removing the natural oxide layer, and treating the surface of the silicon-based carrier by plasma to excite the atomic active bonds of the silicon-based carrier;

S202. Bond the IGBT wafer on the surface of the silicon-based carrier, and then put it into a high-temperature furnace tube at a rate of 8°C/min to raise the temperature to 1400°C for high-temperature tempering, so that the LID layer of the IGBT wafer and the silicon-based carrier are formed Permanently bonded structure.

Example 3

A processing technology of an IGBT wafer, comprising the following steps:

S1. Deposit an ILD layer by PECVD on the front of the IGBT wafer with the deep trench gate. The bottom layer of the LID layer is an undoped dielectric, and the upper layer of the ILD layer is a P-doped dielectric;

S2. The front side of the wafer with the ILD layer will be permanently bonded to the silicon-based carrier;

S3. Flip the silicon-based carrier to thin the back of the wafer to 140um, then implant ions on the back of the wafer, and heat it through a furnace tube or a rapid LAMP heating device RTP, and high-temperature tempering activates the implanted ions;

S4, making a reverse metal coating on the back of the tempered wafer;

S5. Temporarily bond the back of the wafer to the glass carrier, flip the glass carrier, and remove the silicon-based carrier by grinding and etching;

S6, etching the ILD layer to form a gentle slope-shaped contact hole with a sidewall inclination angle of 85°, and by sputtering a thick film of Al at 550°C, the contact hole is completely filled to form the Emittor structure of the IGBT;

S7, metal coating, yellow light and etching are performed on the front side of the wafer to form a front metal pattern and a PAD bonding area;

S8. Laser debonding, removing the glass carrier, cleaning and removing the adhesive layer, and completing the IGBT wafer processing.

The method for permanently bonding the silicon-based carrier on the front side of the wafer in step S2 includes the following steps:

S201, cleaning the surface of the silicon-based carrier and the ILD layer of the IGBT wafer and removing the natural oxide layer, and treating the surface of the silicon-based carrier by plasma to excite the atomic active bonds of the silicon-based carrier;

S202. Bond the IGBT wafer on the surface of the silicon-based carrier, and then put it into a high-temperature furnace tube at a rate of 12°C/min to raise the temperature to 800°C for high-temperature tempering, so that the LID layer of the IGBT wafer and the silicon-based carrier are formed. Permanently bonded structure.

In the description of this specification, description with reference to the terms "one embodiment," "example," "specific example," etc. means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one aspect of the present invention. in one embodiment or example. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

The foregoing has shown and described the basic principles, main features and advantages of the present invention. It should be understood by those skilled in the art that the present invention is not limited by the above-mentioned embodiments. What is described in the above-mentioned embodiments and the description is only to illustrate the principle of the present invention. Without departing from the spirit and scope of the present invention, the present invention will also have Various changes and modifications fall within the scope of the claimed invention.

Claims (5)

1. a processing technique of IGBT wafer, is characterized in that, comprises the following steps: S1. Deposit an ILD layer on the front side of the IGBT wafer with the deep trench gate; S2. The front side of the wafer with the ILD layer will be permanently bonded to the silicon-based carrier; S3, flip the silicon-based carrier plate to complete the thinning of the back of the wafer, then implant ions on the back of the wafer, and activate the implanted ions through high temperature tempering; S4, making a reverse metal coating on the back of the tempered wafer; S5. Temporarily bond the back of the wafer to the glass carrier, flip the glass carrier, and remove the silicon-based carrier by grinding and etching; S6, etching the ILD layer to form a gentle slope-shaped contact hole, and filling the contact hole completely by sputtering a thick film of Al to form the Emittor structure of the IGBT; S7, metal coating, yellow light and etching are performed on the front side of the wafer to form a front metal pattern and a PAD bonding area; S8. Debonding, removing the glass carrier, cleaning and removing the adhesive layer, and completing the IGBT wafer processing; The method for permanently bonding the silicon-based carrier on the front side of the wafer in step S2 includes the following steps: S201, cleaning the surface of the silicon-based carrier and the ILD layer of the IGBT wafer and removing the natural oxide layer, and treating the surface of the silicon-based carrier by plasma to excite the atomic active bonds of the silicon-based carrier; S202, bonding the IGBT wafer on the surface of the silicon-based carrier, and then putting it into a high-temperature furnace tube together for high-temperature tempering, so that the LID layer of the IGBT wafer and the silicon-based carrier form a permanent bonding structure. 2. The processing technique of IGBT wafer according to claim 1, is characterized in that, in described step S1, ILD layer deposition method is a kind of LPCVD, APCVD and PECVD, and described ILD layer bottom layer is undoped dielectric , the upper layer of the ILD layer is a P-doped dielectric. 3 . The processing technology of IGBT wafer according to claim 1 , wherein, in the step S202 , the temperature of the high-temperature tempering is 800-1400° C., and the heating rate of the high-temperature furnace tube is less than 15° C./min. 4 . 4. The processing technique of the IGBT wafer according to claim 1, wherein in the step S3, the thickness of the back of the wafer after thinning is <150um, and the high temperature tempering passes through a furnace tube or a rapid LAMP heating device RTP to heat. 5. The process for processing an IGBT wafer according to claim 1, wherein in the step S6, the inclination angle of the sidewall of the gentle slope-shaped contact hole is 75-85°, and the temperature during the thick film Al sputtering is > 400°C.

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