CN112710893B - Electronic device and bottom current testing device - Google Patents
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- CN112710893B CN112710893B CN201911025172.3A CN201911025172A CN112710893B CN 112710893 B CN112710893 B CN 112710893B CN 201911025172 A CN201911025172 A CN 201911025172A CN 112710893 B CN112710893 B CN 112710893B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
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Abstract
The present disclosure relates to an electronic device and a bottom current testing device. An electronic device comprises a battery module, a bottom current sampling circuit, a USB interface circuit and a main board; the bottom current sampling circuit is respectively and electrically connected with a battery in the battery module, the main board and the USB interface circuit, and is used for collecting bottom current data provided by the battery for the main board and providing the data for external bottom current testing equipment through the USB interface circuit; the bottom current sampling circuit is composed of a plurality of resistors. In the embodiment of the disclosure, the bottom current sampling circuit formed by a plurality of resistors is arranged in the electronic equipment, so that the production cost is low; in addition, the resistor does not need to be controlled, so that control resources in the electronic equipment are not occupied; in addition, technicians can measure the bottom current at any time through the USB interface circuit of the electronic equipment, and the utilization rate of the bottom current sampling circuit can be improved.
Description
Technical Field
The disclosure relates to the field of detection technology, and in particular relates to electronic equipment and bottom current testing equipment.
Background
In the mobile phone testing process, the bottom current test is a very important test item, because the excessive bottom current can cause the mobile phone to consume power fast in the normal use process, so that the standby time of the battery is shortened.
Currently, the bottom current test is typically set before the battery is installed and is performed using a dummy battery. However, after the bottom current test is completed and before the phone is fully assembled, there are a series of other tests; other tests may operate devices within the handset or cause handset bottom current anomalies. Considering that the bottom current has been tested, some manufacturers choose not to test the bottom current until the handset assembly is completed. In practical application, some factories can set a switching device (such as a MOS tube) in a mobile phone for testing the bottom current again, but the switching device needs to occupy more resources on the mobile phone, and the utilization rate of the switching device is low (only can be used for a plurality of times), so that the production cost of the mobile phone is increased.
Disclosure of Invention
The present disclosure provides an electronic device and a bottom current testing device to solve the deficiencies of the related art.
According to a first aspect of embodiments of the present disclosure, there is provided an electronic device including a battery module, a bottom current sampling circuit, a USB interface circuit, and a motherboard; the bottom current sampling circuit is respectively and electrically connected with a battery in the battery module, the main board and the USB interface circuit, and is used for collecting bottom current data provided by the battery for the main board and providing the data for external bottom current testing equipment through the USB interface circuit;
the bottom current sampling circuit is composed of a plurality of resistors.
Optionally, the bottom current sampling circuit includes a sampling resistor, a first series resistor and a second series resistor; the sampling resistor is respectively and electrically connected with the battery and the main board; the first series resistor is respectively and electrically connected with the first end of the sampling resistor and a first auxiliary use pin of the USB interface circuit; the second series resistor is electrically connected with the second end of the sampling resistor and a second auxiliary use pin of the USB interface circuit respectively.
Optionally, the sampling resistor includes one of: and the sampling resistor is connected with the output end of the battery in series and is independently arranged.
Optionally, the resistance value of the sampling resistor is 2-20 milliohms.
Optionally, the resistance values of the first series resistor and the second series resistor exceed a preset resistance value threshold.
Optionally, the first series resistor is disposed in the battery module; or,
the second series resistor is arranged on the main board.
According to a second aspect of embodiments of the present disclosure, there is provided a bottom current testing apparatus comprising an interface circuit and an analog-to-digital conversion circuit;
the interface circuit is used for being in butt joint with a USB interface circuit of the electronic equipment for testing the bottom current so as to acquire the bottom current acquired by the bottom current sampling circuit in the electronic equipment through the USB interface circuit; the bottom current sampling circuit is composed of a plurality of resistors;
the analog-to-digital conversion circuit is electrically connected with the interface circuit and is used for performing analog-to-digital conversion on the bottom current data so as to acquire the bottom current of the electronic equipment.
Optionally, the interface circuit includes a first pin and a second pin; the first pin is electrically connected with a first auxiliary use pin in a USB interface in the electronic equipment, and the second pin is electrically connected with a second auxiliary use pin in the USB interface in the electronic equipment; pin VBUS, pin CC1 and pin CC2 in the USB interface of the electronic device remain in a suspended state.
Optionally, a differential amplifying circuit is further included; the first input end of the differential amplification circuit is electrically connected with the first pin of the interface circuit, the second input end of the differential amplification circuit is electrically connected with the second pin of the interface circuit, and the output end of the differential amplification circuit is electrically connected with the analog-to-digital conversion circuit and is used for carrying out differential amplification on the bottom current data acquired by the first input end and the second input end and sending the bottom current data after differential amplification to the analog-to-digital conversion circuit.
Optionally, the amplification factor of the differential amplification circuit exceeds a preset multiple threshold.
The technical scheme provided by the embodiment of the disclosure can comprise the following beneficial effects:
as can be seen from the above embodiments, in the embodiments of the present disclosure, by providing a bottom current sampling circuit formed by a plurality of resistors in an electronic device, the production cost is low; in addition, the resistor does not need to be controlled, so that control resources in the electronic equipment are not occupied; in addition, technicians can measure the bottom current at any time through the USB interface circuit of the electronic equipment, and the utilization rate of the bottom current sampling circuit can be improved.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure.
Fig. 1 is a block diagram of an electronic device, according to an example embodiment.
Fig. 2 is a block diagram of another electronic device, shown in accordance with an exemplary embodiment.
Fig. 3 is a block diagram of a bottom current detection device, according to an example embodiment.
Fig. 4 is a block diagram of another base current detection device, shown according to an exemplary embodiment.
Fig. 5 is a block diagram illustrating yet another bottom current detection device according to an exemplary embodiment.
FIG. 6 is a scene graph illustrating a bottom current detection according to an example embodiment.
Fig. 7 is a block diagram of an electronic device, according to an example embodiment.
Detailed Description
Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. Rather, they are merely examples of apparatus consistent with some aspects of the disclosure as detailed in the accompanying claims.
In the mobile phone testing process, the bottom current test is a very important test item, because the excessive bottom current can cause the mobile phone to consume power fast in the normal use process, so that the standby time of the battery is shortened.
Currently, the bottom current test is typically set before the battery is installed and is performed using a dummy battery. However, after the bottom current test is completed and before the phone is fully assembled, there are a series of other tests; other tests may operate devices within the handset or cause handset bottom current anomalies. Considering that the bottom current has been tested, some manufacturers choose not to test the bottom current until the handset assembly is completed. In practical application, some factories can set a switching device (such as a MOS tube) in a mobile phone for testing the bottom current again, but the switching device needs to occupy more resources on the mobile phone, and the utilization rate of the switching device is low (only can be used for a plurality of times), so that the production cost of the mobile phone is increased.
To solve the above technical problems, embodiments of the present disclosure provide an electronic device, and fig. 1 is a block diagram of an electronic device according to an exemplary embodiment. It should be noted that, for simplicity of the drawing, only a part of the modules in the electronic device are shown in fig. 1. Referring to fig. 1, an electronic device 100 includes a battery module 10, a bottom current sampling circuit 20, a main board 30, and a USB interface circuit 40. Wherein,,
the bottom current sampling circuit 20 is electrically connected to the battery in the battery module 10, the main board 30 and the USB interface circuit 40, respectively, for collecting bottom current data provided from the battery to the main board 30 and providing the collected data to an external bottom current testing device (not shown in fig. 1) via the USB interface circuit 40.
The bottom current sampling circuit 20 is constituted by a plurality of resistors.
The bottom current data is potential data at both ends of the sampling resistor 21 in the standby state of the electronic device.
In this embodiment, the battery module 10 includes, in addition to the battery, a circuit related to the battery, such as a battery protection circuit, a battery management circuit, etc., and the structure of the battery module 10 is referred to in the related art and will not be described in detail herein.
In this embodiment, the motherboard 30 may provide corresponding control resources, computing resources, and other resources for the electronic device, and the specific structure and function thereof may refer to the related art, which will not be described in detail herein.
In this embodiment, the USB interface circuit 40 may be a USB (Universal Serial Bus ) Type C interface circuit. The arrangement and the function of each pin in the USB Type C interface circuit may refer to related technologies, and in the following embodiments, the pins of the USB Type C interface may be directly referred to.
In one embodiment, referring to fig. 2, the bottom current sampling circuit 20 includes a sampling resistor 21, a first series resistor 22, and a second series resistor 23. Wherein,,
the sampling resistor 21 is electrically connected to (the output end VBAT of) the battery and (the power input end VBAT of) the main board 30, respectively; the first series resistor 22 is electrically connected to a first end (a left end in fig. 2) of the sampling resistor 21 and a first auxiliary Use (SBU 1) pin of the USB interface circuit 40, respectively; the second series resistor 23 is electrically connected to a second terminal (right terminal in fig. 2) of the sampling resistor 21 and a second auxiliary use pin SBU2 of the USB interface circuit 40, respectively.
In the present embodiment, the sampling resistor 21 is implemented by a high-precision sampling resistor. For example, the output VBAT of the battery in the electronic device is typically provided with a sampling resistor for detecting its current usage by the operating system of the electronic device, so that the sampling resistor 21 may be implemented by using a sampling resistor connected in series to the output VBAT of the battery. As another example, the sampling resistor 21 in this embodiment may be separately provided, that is, one sampling resistor may be provided in the electronic device 100. That is, in the present embodiment, the sampling resistor 21 may include one of the following: and the sampling resistor is connected with the output end of the battery in series and is independently arranged.
In this embodiment, the resistance value of the sampling resistor 21 is 2-20 milliohms, so that a small bottom current (typically between 6-20 mA) supplied from the battery to the main board 30 in the standby condition can be collected, thereby ensuring the collection accuracy.
In this embodiment, in a theoretical case, the first auxiliary use pin SBU1 and the second auxiliary use pin SBU2 of the USB interface circuit 40 may be electrically connected to two ends of the sampling resistor 21, respectively, so as to collect the bottom current data of the sampling resistor 21. In practical applications, the first auxiliary pin SBU1 and the second auxiliary pin SBU2 in the USB interface circuit 40 may contact the external conductors, thereby causing the battery to be directly grounded and causing a short circuit. Such that the battery is not powered to the motherboard 30, causing the electronic device to be passively powered off. For this reason, in this embodiment, resistors are connected in series between the first auxiliary use pin SBU1 and the first end of the sampling resistor 21, and the second auxiliary use pin SBU2 and the second end of the sampling resistor 21, respectively, that is, the first series resistor 22 is electrically connected to the first auxiliary use pin SBU1 and the first end of the sampling resistor 21, respectively, and the second series resistor 23 is electrically connected to the second auxiliary use pin SBU2 and the second end of the sampling resistor 21, respectively. It can be understood that in this embodiment, by setting the first series resistor 22 and the second series resistor 23, the battery can continue to supply power to the motherboard 30 due to the voltage division effect of the first series resistor 22 and/or the second series resistor 23 when the first auxiliary use pin SBU1 and/or the second auxiliary use pin SBU2 are/is used, so as to ensure the normal operation of the electronic device.
In an embodiment, the resistance values of the first series resistor 22 and the second series resistor 23 may exceed a preset resistance value threshold. Wherein the resistance threshold may be set to 1000 ohms. In an example, the resistance values of the first series resistor 22 and the second series resistor 23 may be 10K ohms, so that the leakage current flowing through the first series resistor 22 and/or the second series resistor 23 when the battery is grounded can be reduced as much as possible, and a sufficient standby time of the battery is ensured.
In an embodiment, in the case that the resistance values of the first series resistor 22 and the second series resistor 23 are fixed, the first series resistor 22 may be disposed as close to the battery as possible, and/or the second series resistor 23 may be disposed as close to the motherboard 30 as possible. In an example, the first series resistor 22 is disposed in the battery module 10, and the second series resistor 23 is disposed on the motherboard 30. In this way, under the condition that the connection point between the first series resistor 22 and the sampling resistor 21 is unchanged, the lead between the first series resistor 22 and the sampling resistor 21 is lengthened, the resistance value of the lead is increased, and the leakage current in the first series resistor 22 can be further reduced, so that the method is suitable for detecting the bottom current under the scene that the resistance value of the sampling resistor 21 is smaller and the bottom current is smaller. It is understood that the working principle of the second series resistor 23 disposed on the main board 30 is similar to the working principle of the first series resistor 22 disposed in the battery module 10, and will not be described herein.
Thus, in the embodiment of the disclosure, the bottom current sampling circuit formed by a plurality of resistors is arranged in the electronic equipment, so that the production cost is low; in addition, the resistor does not need to be controlled, so that control resources in the electronic equipment are not occupied; in addition, technicians can measure the bottom current at any time through the USB interface circuit of the electronic equipment, and the utilization rate of the bottom current sampling circuit can be improved.
The disclosed embodiments also provide a bottom current testing device, which is compatible with the electronic device 100, and can detect a bottom current in the electronic device, and fig. 3 is a block diagram of a bottom current testing device according to an exemplary embodiment. It should be noted that, for simplicity of the drawing, only a part of the modules in the bottom current testing apparatus are shown in fig. 3. Referring to fig. 3, a bottom current testing apparatus 200 includes an interface circuit 50 and an analog-to-digital conversion circuit 60. Wherein,,
the interface circuit 50 is used for interfacing with a USB interface circuit of the electronic device 100 for bottom current testing, so as to obtain a bottom current collected by a bottom current sampling circuit in the electronic device through the USB interface circuit; the bottom current sampling circuit is composed of a plurality of resistors;
the analog-to-digital conversion circuit 60 is electrically connected to the interface circuit 50 and is configured to perform analog-to-digital conversion on the bottom current data to obtain a bottom current of the electronic device 100.
It should be noted that, considering that the bottom current is small, the analog-to-digital conversion circuit 60 in this embodiment selects the analog-to-digital conversion circuit with high precision as much as possible, such as the multi-channel, multi-bit and high frequency analog-to-digital conversion circuit, so as to fully collect the bottom current data. The model of the analog-to-digital conversion circuit 60 may be selected according to a specific scenario, which is not limited herein.
In one embodiment, referring to FIG. 4, interface circuit 50 includes a first pin SBU1 and a second pin SBU2. The first pin SBU1 is electrically connected with a first auxiliary use pin SBU1 in a USB interface in the electronic equipment, and the second pin SBU2 is electrically connected with a second auxiliary use pin SBU2 in the USB interface in the electronic equipment. In this way, after the interface in the interface circuit 50 is connected to the USB interface in the electronic device, the pins VBUS, CC1 and CC2 in the USB Type C interface in the electronic device remain in a suspended state, so that the electronic device cannot detect the access of the bottom current testing device 200, and the normal detection of the bottom current is ensured. Of course, in an example, the bottom current testing device 200 and the electronic device 100 may be connected by a dedicated USB wire or a controllable USB wire, where the dedicated USB wire or the controllable USB wire may ensure that the pin VBUS, the pin CC1, and the pin CC2 in the USB type c interface in the electronic device remain in a suspended state after the bottom current testing device 200 is connected, and a technician may select according to a specific scenario, which is not limited herein.
In one embodiment, referring to fig. 5, a bottom current testing apparatus 200 further includes a differential amplification circuit 70. The differential amplification circuit 70 has a first input terminal electrically connected to the first pin SBU1 of the interface circuit 50, a second input terminal electrically connected to the second pin SBU1 of the interface circuit 50, and an output terminal connected to the analog-to-digital conversion circuit 60, and is configured to differentially amplify the bottom current data acquired by the first input terminal and the second input terminal, and send the bottom current data after differential amplification to the analog-to-digital conversion circuit 60. In this embodiment, the bottom current data may be amplified to a preset multiple by setting the differential amplifying circuit 70, for example, exceeding a preset multiple threshold, the multiple threshold may be set to 1000 times.
In this embodiment, the differential amplifying circuit 70 can reduce the accuracy requirement of the analog-to-digital conversion circuit 60 and reduce the cost. In addition, since the differential amplifying circuit 70 includes an amplifier, the input resistance of the amplifier is very large (in megaohm level), so that the leakage current on the first series resistor 22 and the second series resistor 23 is very small (can be ignored), and the error caused by connecting the series resistors 22 and 23 can be ignored.
FIG. 6 is a scenario diagram illustrating a bottom current test, according to an example embodiment. Referring to fig. 6, in the standby state of the electronic device 100, the bottom current testing device 200 interfaces to the USB interface circuit 40 of the electronic device through the interface circuit 50 such that the first pin SBU1 is electrically connected to the first auxiliary use pin SBU1 and the second pin SBU2 is electrically connected to the second auxiliary use pin SBU2.
The battery supplies a bottom current (assuming 10 mA) to the main board, and after the bottom current flows through the sampling resistor 21 (assuming 10mΩ), a partial voltage (0.0001V) is formed in the sampling resistor 21. The electric potential of the first end of the sampling resistor 21 is transmitted to the first auxiliary use pin SBU1 through the first series resistor 22.
The electric potential of the second end of the sampling resistor 21 is transmitted to the second auxiliary use pin SBU2 through the second series resistor 23.
The first pin SBU1 transmits the electric potential of the first end of the sampling resistor 21 to the first input end of the differential amplifying circuit, and the second pin SBU2 transmits the electric potential of the second end of the sampling resistor 21 to the second input end of the differential amplifying circuit. The differential amplifier circuit 70 performs differential amplification on the input potential, and obtains a voltage (0.0001×1000=0.1V) after differential amplification assuming that the amplification factor is 1000 times.
The analog-to-digital conversion circuit 60 performs analog-to-digital conversion on the voltage amplified by the differential amplification to obtain a voltage (0.1V) across the sampling resistor 21. Then, according to ohm's law, the bottom current flowing through the sampling resistor 21, that is, 0.1V/10mΩ=10ma, can be obtained according to the resistance value and the voltage value of the sampling resistor 21.
Fig. 7 is a block diagram of an electronic device, according to an example embodiment. For example, electronic device 700 may be a smart phone, computer, digital broadcast terminal, tablet device, medical device, exercise device, personal digital assistant, or the like that includes a bottom current sampling circuit.
Referring to fig. 7, an electronic device 700 may include one or more of the following components: a processing component 702, a memory 704, a power component 706, a multimedia component 708, an audio component 710, an input/output (I/O) interface 712, a sensor component 714, a communication component 716, and an image acquisition component 718.
The processing component 702 generally operates overall with the electronic device 700, such as operations associated with display, telephone calls, data communications, camera operations, and recording operations. The processing component 702 may include one or more processors 720 to execute instructions. Further, the processing component 702 can include one or more modules that facilitate interaction between the processing component 702 and other components. For example, the processing component 702 can include a multimedia module to facilitate interaction between the multimedia component 808 and the processing component 802.
The memory 704 is configured to store various types of data to support operations at the electronic device 700. Examples of such data include instructions for any application or method operating on the electronic device 700, contact data, phonebook data, messages, pictures, videos, and so forth. The memory 704 may be implemented by any type or combination of volatile or nonvolatile memory devices such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disk.
The power supply component 706 provides power to the various components of the electronic device 700. Power supply components 706 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for electronic device 700.
The multimedia component 708 includes a screen that provides an output interface between the electronic device 700 and the target object. In some embodiments, the screen may include a Liquid Crystal Display (LCD) and a Touch Panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from a target object. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensor may sense not only the boundary of a touch or slide action, but also the duration and pressure associated with the touch or slide operation.
The audio component 710 is configured to output and/or input audio signals. For example, the audio component 710 includes a Microphone (MIC) configured to receive external audio signals when the electronic device 700 is in an operational mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signals may be further stored in the memory 704 or transmitted via the communication component 716. In some embodiments, the audio component 710 further includes a speaker for outputting audio signals.
The I/O interface 712 provides an interface between the processing component 702 and peripheral interface modules, which may be a keyboard, click wheel, buttons, etc.
The sensor assembly 714 includes one or more sensors for providing status assessment of various aspects of the electronic device 700. For example, the sensor assembly 714 may detect an on/off state of the electronic device 700, a relative positioning of the components, such as a display and keypad of the electronic device 700, a change in position of the electronic device 700 or one of the components, the sensor assembly 714 may also detect the presence or absence of a target object in contact with the electronic device 700, an orientation or acceleration/deceleration of the electronic device 700, and a change in temperature of the electronic device 700.
The communication component 716 is configured to facilitate communication between the electronic device 700 and other devices, either wired or wireless. The electronic device 700 may access a wireless network based on a communication standard, such as WiFi,2G, or 3G, or a combination thereof. In one exemplary embodiment, the communication component 716 receives broadcast signals or broadcast related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 716 further includes a Near Field Communication (NFC) module to facilitate short range communications. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID) technology, infrared data association (IrDA) technology, ultra Wideband (UWB) technology, bluetooth (BT) technology, and other technologies.
In an exemplary embodiment, the electronic device 700 can be implemented by one or more Application Specific Integrated Circuits (ASICs), digital Signal Processors (DSPs), digital Signal Processing Devices (DSPDs), programmable Logic Devices (PLDs), field Programmable Gate Arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic elements.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This disclosure is intended to cover any adaptations, uses, or adaptations of the disclosure following the general principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
It is to be understood that the present disclosure is not limited to the precise arrangements and instrumentalities shown in the drawings, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.
Claims (5)
1. The electronic equipment is characterized by comprising a battery module, a bottom current sampling circuit, a USB interface circuit and a main board; the bottom current sampling circuit is respectively and electrically connected with a battery in the battery module, the main board and the USB interface circuit, and is used for collecting bottom current data provided by the battery for the main board and providing the data for external bottom current testing equipment through the USB interface circuit;
the bottom current sampling circuit is composed of a plurality of resistors;
the bottom current sampling circuit comprises a sampling resistor, a first series resistor and a second series resistor; the sampling resistor is respectively and electrically connected with the battery and the main board; the first series resistor is respectively and electrically connected with the first end of the sampling resistor and a first auxiliary use pin of the USB interface circuit; the second series resistor is electrically connected with the second end of the sampling resistor and a second auxiliary use pin of the USB interface circuit respectively.
2. The electronic device of claim 1, wherein the sampling resistor comprises one of: and the sampling resistor is connected with the output end of the battery in series and is independently arranged.
3. The electronic device of claim 1 or 2, wherein the sampling resistor has a resistance value of 2-20 milliohms.
4. The electronic device of claim 1, wherein the resistance values of the first and second series resistors exceed a preset resistance value threshold.
5. The electronic device of claim 1 or 4, wherein the first series resistor is disposed within the battery module; or,
the second series resistor is arranged on the main board.
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| US20220284853A1 (en) * | 2020-12-14 | 2022-09-08 | Hefei Boe Joint Technology Co., Ltd. | Display module and method for driving the same, and display apparatus |
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| CN112710893A (en) | 2021-04-27 |
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