CN112688788B - Discrete PD circuit and power supply system - Google Patents

Abstract

The invention relates to the technical field of POE power supply, and discloses a discrete PD circuit and a power supply system, wherein the discrete PD circuit comprises a detection circuit, a classification circuit and a power supply circuit; the first end of the detection circuit is connected with a power supply anode, and the second end of the detection circuit is connected with a power supply cathode; the first end of the grading circuit is connected with the power supply anode, and the second end of the grading circuit is connected with the power supply cathode; the first end of the power supply circuit is connected with the positive power supply electrode, and the second end of the power supply circuit is connected with the negative power supply electrode. The discrete PD circuit and the power supply system provided by the embodiment of the invention can support wide voltage input, avoid the use of a special function integrated PD chip and reduce the power supply cost of the dual-standard POE.

Description

A discrete PD circuit and power supply system

technical field

The present invention relates to the technical field of POE, in particular to a discrete PD circuit and a power supply system.

Background technique

At present, in the POE (Power Over Ethernet, Power over Ethernet) power supply system, the IEEE Std 802.3 standard requires that the PD terminal voltage input range is 36V to 57V, and the traditional integrated PD (Powered Decices, powered equipment) chip is related to this standard. However, with changes in engineering applications, 24V non-standard POE power supply has also evolved into the mainstream power supply demand, and more and more products require support for dual-standard (standard/non-standard) POE power supply. However, all power supply requirements cannot be realized using only a single traditional integrated PD chip.

In the prior art, an integrated PD chip with a special function (for example, an integrated PD chip with an APD function) is required to implement dual-standard POE power supply, and the cost is relatively high.

Contents of the invention

The technical problem to be solved by the embodiments of the present invention is to provide a discrete PD circuit and power supply system, avoid the use of special function integrated PD chips, and reduce the cost of dual-standard POE power supply.

In order to solve the above technical problems, in the first aspect, an embodiment of the present invention provides a discrete PD circuit, the discrete PD circuit includes a detection circuit, a classification circuit, and a power supply circuit; wherein,

The first end of the detection circuit is connected to the positive pole of the power supply, and the second end of the detection circuit is connected to the negative pole of the power supply;

The first end of the classification circuit is connected to the positive pole of the power supply, and the second end of the classification circuit is connected to the negative pole of the power supply;

The first terminal of the power supply circuit is connected to the positive pole of the power supply, and the second terminal of the power supply circuit is connected to the negative pole of the power supply.

As a preferred solution, the detection circuit includes a first capacitor and a first resistor; wherein,

One end of the first capacitor is connected to the first end of the detection circuit, and the other end of the first capacitor is connected to the second end of the detection circuit;

The first resistor is connected in parallel with the first capacitor.

As a preferred solution, the grading circuit includes a second resistor, a third resistor, a first diode, a fourth resistor, a first switch tube, a fifth resistor, a second diode, a sixth resistor, and a seventh resistor , the eighth resistor, the second switch tube and the third diode; where,

One end of the second resistor is connected to the second end of the classification circuit, and the other end of the second resistor is connected to one end of the third resistor;

The other end of the third resistor is connected to the anode of the first diode;

The other end of the first diode is connected to the first end of the classification circuit;

One end of the fourth resistor is connected to one end of the third resistor, and the other end of the fourth resistor is connected to the first end of the first switch tube;

The second end of the first switch tube is connected to the second end of the classification circuit, and the third end of the first switch tube is connected to one end of the fifth resistor;

The other end of the fifth resistor is connected to the first end of the classification circuit;

The anode of the second diode is connected to the second end of the first switch tube, and the cathode of the second diode is connected to the third end of the first switch tube;

One end of the sixth resistor is connected to the first end of the classification circuit, and the other end of the sixth resistor is connected to the cathode of the third diode;

The seventh resistor is connected in parallel with the sixth resistor;

The eighth resistor is connected in parallel with the sixth resistor;

The anode of the third diode is connected to the third terminal of the second switch tube;

The first end of the second switch transistor is connected to the third end of the first switch transistor, and the second end of the second switch transistor is connected to the second end of the first switch transistor.

As a preferred solution, the first switch tube is an NPN transistor, then the first end of the first switch tube is a base, the second end of the first switch tube is an emitter, and the first The third end of the switch tube is the collector;

The second switch tube is an NMOS tube, and the first end of the second switch tube is a gate, the second end of the second switch tube is a source, and the third end of the second switch tube is for the drain.

As a preferred solution, the first diode is a Zener diode;

The second diode is a Zener diode;

The third diode is a Zener diode.

As a preferred solution, the power supply circuit includes a fourth diode, a ninth resistor, a fifth diode, a second capacitor, a tenth resistor, a third switch tube, an eleventh resistor, a fourth switch tube, a Twelve resistors, a third capacitor, a thirteenth resistor, a fifth switch tube, and a post-stage load; wherein,

The anode of the fourth diode is connected to the second end of the power supply circuit, and the cathode of the fourth diode is connected to one end of the ninth resistor;

The other end of the ninth resistor is connected to the anode of the fifth diode;

The cathode of the fifth diode is connected to the first end of the power supply circuit;

One end of the second capacitor is connected to the second end of the third switch tube, and the other end of the second capacitor is connected to the first end of the third switch tube;

The tenth resistor is connected in parallel with the second capacitor;

The first end of the third switch tube is connected to one end of the ninth resistor, the second end of the third switch tube is connected to the second end of the power supply circuit, and the third end of the third switch tube The end is connected to the second end of the fourth switching tube;

One end of the eleventh resistor is connected to the first end of the third switch tube, and the other end of the eleventh resistor is connected to the first end of the fourth switch tube;

The third end of the fourth switch tube is connected to one end of the twelfth resistor;

The other end of the twelfth resistor is connected to the first end of the fifth switch tube;

One end of the third capacitor is connected to the first end of the fifth switch tube, and the other end of the third capacitor is connected to the second end of the fifth switch tube;

The thirteenth resistor is connected in parallel with the third capacitor;

The second end of the fifth switch tube is connected to the first end of the power supply circuit, and the third end of the fifth switch tube is connected to the positive pole of the subsequent load;

The negative electrode of the post-stage load is connected to the second end of the fourth switch tube.

As a preferred solution, the power supply circuit further includes a sixth diode and a fourteenth resistor, the sixth diode and the fourteenth resistor are arranged between the negative pole of the subsequent load and the fourth between the second ends of the switch tube; among them,

The anode of the sixth diode is connected to the cathode of the subsequent load, and the cathode of the sixth diode is connected to one end of the fourteenth resistor;

The other end of the fourteenth resistor is connected to the second end of the fourth switch tube.

As a preferred solution, the fourth diode is a Zener diode;

The fifth diode is a Zener diode;

The sixth diode is a rectifier diode.

As a preferred solution, the third switch tube is an NMOS tube, then, the first end of the third switch tube is a gate, the second end of the third switch tube is a source, and the third switch The third end of the tube is the drain;

The fourth switch tube is an NPN transistor, and the first end of the fourth switch tube is a base, the second end of the fourth switch tube is an emitter, and the third end of the fourth switch tube is an emitter. The terminal is the collector;

The fifth switch tube is a PMOS tube, and the first end of the fifth switch tube is a gate, the second end of the fifth switch tube is a source, and the third end of the fifth switch tube for the drain.

In order to solve the above technical problem, in a second aspect, an embodiment of the present invention provides a power supply system, where the power supply system includes the discrete PD circuit described in any one of the first aspect.

Compared with the prior art, a discrete PD circuit and a power supply system provided by the embodiment of the present invention have beneficial effects in that: a discrete PD circuit is designed by using a simple Zener diode, triode, and MOS tube, which can simultaneously meet the standard POE power supply and non-standard POE power supply, support wide voltage input from 22V to 57V; and avoid the use of special function integrated PD chips, reduce material costs, and realize a low-power, low-cost dual-standard POE power supply design.

Description of drawings

In order to more clearly illustrate the technical features of the embodiments of the present invention, the following will briefly introduce the accompanying drawings that need to be used in the embodiments of the present invention. Obviously, the accompanying drawings described below are only some embodiments of the present invention. Those skilled in the art can also obtain other drawings based on these drawings without any creative work.

FIG. 1 is a schematic structural diagram of a preferred embodiment of a discrete PD circuit provided by the present invention;

Fig. 2 is a schematic circuit diagram of a preferred embodiment of a discrete PD circuit provided by the present invention;

Fig. 3 is a schematic circuit diagram of another preferred embodiment of a discrete PD circuit provided by the present invention.

Detailed ways

In order to have a clearer understanding of the technical features, purpose, and effects of the present invention, the specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. The following examples are only used to illustrate the present invention, but are not used to limit the protection scope of the present invention. Based on the embodiments of the present invention, other embodiments obtained by those skilled in the art without making creative efforts shall all belong to the protection scope of the present invention.

In the description of the present invention, it should be understood that the numbers themselves, such as "first", "second", etc., are only used to distinguish the described objects, and have no order or technical meaning, and cannot be interpreted as stipulating Or hint at the importance of the object being described.

In the description of the invention, it should be noted that unless otherwise specified and limited, the terms "connected" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integrated Connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediary, and it can be the internal communication of two components. Those of ordinary skill in the art can understand the specific meanings of the above terms in the present invention in specific situations.

FIG. 1 is a schematic structural diagram of a preferred embodiment of a discrete PD circuit provided by the present invention.

As shown in FIG. 1, the discrete PD circuit includes a detection circuit 100, a classification circuit 200, and a power supply circuit 300; wherein,

The first end of the detection circuit 100 is connected to the positive pole P1 of the power supply, and the second end of the detection circuit 100 is connected to the negative pole N1 of the power supply;

The first end of the classification circuit 200 is connected to the positive power supply P1, and the second end of the classification circuit 200 is connected to the negative power supply N1;

A first end of the power supply circuit 300 is connected to the positive power supply P1, and a second end of the power supply circuit 300 is connected to the negative power supply N1.

The discrete PD circuit provided by the embodiment of the present invention avoids the use of a special-function integrated PD chip, and reduces the cost of dual-standard POE power supply.

In a preferred embodiment, as shown in FIG. 2, the detection circuit 100 includes a first capacitor C1 and a first resistor R1; wherein,

One end of the first capacitor C1 is connected to the first end of the detection circuit 100, and the other end of the first capacitor C1 is connected to the second end of the detection circuit 100;

The first resistor R1 is connected in parallel with the first capacitor C1.

In a preferred embodiment, as shown in FIG. 2, the grading circuit 200 includes a second resistor R2, a third resistor R3, a first diode D1, a fourth resistor R4, a first switch tube Q1, a fifth resistor R5, the second diode D2, the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, the second switching tube Q2 and the third diode D3; wherein,

One end of the second resistor R2 is connected to the second end of the classification circuit 200, and the other end of the second resistor R2 is connected to one end of the third resistor R3;

The other end of the third resistor R3 is connected to the anode of the first diode D1;

The other end of the first diode D1 is connected to the first end of the classification circuit 200;

One end of the fourth resistor R4 is connected to one end of the third resistor R3, and the other end of the fourth resistor R4 is connected to the first end of the first switching tube Q1;

The second end of the first switching transistor Q1 is connected to the second end of the classification circuit 200, and the third end of the first switching transistor Q1 is connected to one end of the fifth resistor R5;

The other end of the fifth resistor R5 is connected to the first end of the classification circuit 200;

The anode of the second diode D2 is connected to the second end of the first switching transistor Q1, and the cathode of the second diode D2 is connected to the third end of the first switching transistor Q1;

One end of the sixth resistor R6 is connected to the first end of the classification circuit 200, and the other end of the sixth resistor R6 is connected to the cathode of the third diode D3;

The seventh resistor R7 is connected in parallel with the sixth resistor R6;

The eighth resistor R8 is connected in parallel with the sixth resistor R6;

The anode of the third diode D3 is connected to the third end of the second switching transistor Q2;

A first end of the second switching transistor Q2 is connected to a third end of the first switching transistor Q1, and a second end of the second switching transistor Q2 is connected to a second end of the first switching transistor Q1.

Further, the first switching transistor Q1 is an NPN transistor, then the first end of the first switching transistor Q1 is a base, the second end of the first switching transistor Q2 is an emitter, and the first switching transistor Q2 is an emitter. The third end of a switch tube Q1 is a collector;

The second switching tube Q2 is an NMOS tube, and the first end of the second switching tube Q2 is a gate, the second end of the second switching tube Q2 is a source, and the second switching tube Q2 The third terminal is the drain.

Further, the first diode D1 is a Zener diode;

The second diode D2 is a Zener diode;

The third diode D3 is a Zener diode.

In a preferred embodiment, as shown in FIG. 2, the power supply circuit 300 includes a fourth diode D4, a ninth resistor R9, a fifth diode D5, a second capacitor C2, a tenth resistor R10, a third The switch tube Q3, the eleventh resistor R11, the fourth switch tube Q4, the twelfth resistor R12, the third capacitor C3, the thirteenth resistor R13, the fifth switch tube Q5, and the post-stage load Rload; wherein,

The anode of the fourth diode D4 is connected to the second end of the power supply circuit 300, and the cathode of the fourth diode D4 is connected to one end of the ninth resistor R9;

The other end of the ninth resistor R9 is connected to the anode of the fifth diode D5;

The cathode of the fifth diode D5 is connected to the first end of the power supply circuit 300;

One end of the second capacitor C2 is connected to the second end of the third switching transistor Q3, and the other end of the second capacitor C2 is connected to the first end of the third switching transistor Q3;

The tenth resistor R10 is connected in parallel with the second capacitor C2;

The first end of the third switching transistor Q3 is connected to one end of the ninth resistor R9, the second end of the third switching transistor Q3 is connected to the second end of the power supply circuit 300, and the third switch The third end of the tube Q3 is connected to the second end of the fourth switching tube Q4;

One end of the eleventh resistor R11 is connected to the first end of the third switching tube Q3, and the other end of the eleventh resistor R11 is connected to the first end of the fourth switching tube Q4;

The third terminal of the fourth switching tube Q4 is connected to one terminal of the twelfth resistor R12;

The other end of the twelfth resistor R12 is connected to the first end of the fifth switching transistor Q5;

One end of the third capacitor C3 is connected to the first end of the fifth switching transistor Q5, and the other end of the third capacitor C3 is connected to the second end of the fifth switching transistor Q5;

The thirteenth resistor R13 is connected in parallel with the third capacitor C3;

The second terminal of the fifth switching tube Q5 is connected to the first terminal of the power supply circuit 300, and the third terminal of the fifth switching tube Q5 is connected to the positive pole of the subsequent load Rload;

The negative electrode of the post-stage load Rload is connected to the second end of the fourth switching transistor Q4.

In a preferred embodiment, as shown in FIG. 3 , the power supply circuit 300 further includes a sixth diode D6 and a fourteenth resistor R14, the sixth diode D6 and the fourteenth resistor R14 are set between the negative pole of the post-stage load Rload and the second end of the fourth switching transistor Q4; wherein,

The anode of the sixth diode D6 is connected to the cathode of the subsequent load Rload, and the cathode of the sixth diode D6 is connected to one end of the fourteenth resistor R14;

The other end of the fourteenth resistor R14 is connected to the second end of the fourth switching transistor Q4.

Further, the fourth diode D4 is a Zener diode;

The fifth diode D5 is a Zener diode;

The sixth diode D6 is a rectifier diode.

Further, the third switching transistor Q3 is an NMOS transistor, then, the first end of the third switching transistor Q3 is a gate, the second end of the third switching transistor Q3 is a source, and the third switching transistor Q3 The third end of the switch tube Q3 is the drain;

The fourth switching tube Q4 is an NPN transistor, and the first end of the fourth switching tube Q4 is a base, the second end of the fourth switching tube Q4 is an emitter, and the fourth switching tube Q4 is an emitter. The third terminal of Q4 is the collector;

The fifth switching transistor Q5 is a PMOS transistor, and the first end of the fifth switching transistor Q5 is a gate, the second end of the fifth switching transistor Q5 is a source, and the fifth switching transistor Q5 The third terminal is the drain.

The specific working principle of the discrete PD circuit provided by the embodiment of the present invention is as follows:

(1) First, the present invention meets the requirements of the detection stage, classification stage, and power supply stage in the standard POE power supply process.

①Detection stage: IEEE Std 802.3 standard requires PSE (Power Sourcing Equipment, power supply equipment) to detect the resistance and capacitance between P1-N1 (that is, the positive and negative poles of power supply) to determine whether PD exists, so as to determine Whether to output standard POE voltage. At this stage, the output voltage of P1-N1 is 2.8V~10V, and the characteristics for judging the existence of PD are: the DC impedance is 19KΩ~26.5KΩ and the capacitance value does not exceed 150nF.

The detection circuit 100 is used for the PSE to detect the PD, that is, the first capacitor C1 and the first resistor R1 are used to determine the existence of the PD at the PSE terminal, and the possible values are C1=0.1uF and R1=24.9K, which meet the standard requirements.

②Classification stage: The IEEE Std 802.3 standard requires the PSE side to determine the PD power consumption level requirements by detecting the current on P1-N1, so as to determine the power level that the PSE side needs to output. At this stage, the output voltage of P1-N1 is 15.5V ~ 20.5V.

The classification circuit 200 is used for the PSE to determine the classification current required by the PD, and the resistance values of the sixth resistor R6, the seventh resistor R7 and the eighth resistor R8 can be adjusted to meet the requirements of different classification currents of Class0-4 in the protocol. At this stage, the power supply circuit 300 does not work.

Working principle at this stage: the first diode D1 is a 21V regulator, the second diode D2 is a 10V regulator, the third diode D3 is a 10V regulator, and the resistance of the sixth resistor R6 is 430Ω , the resistance value of the seventh resistor R7 is 430Ω, and the resistance value of the eighth resistor R8 is 430Ω.

At this stage, the Zener tube D1 does not work, the lines of the Zener tube D1, the second resistor R2, and the third resistor R3 are not conducting, and the first triode Q1 is in a cut-off state; the voltage regulator D2 is reversed through the fifth resistor R5. Breakdown voltage regulation, at this time, the gate of NMOS transistor Q2 is clamped at 10V, VGS>VT, NMOS transistor Q2 is turned on; voltage regulator D3 passes through NMOS transistor Q2, sixth resistor R6, seventh resistor R7, eighth resistor The R8 line reverses the breakdown voltage, the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, the voltage regulator tube D3, and the NMOS tube Q2 are turned on, VGD>VT (VT is the turn-on voltage, the typical value is about 2V ), then the NMOS transistor Q2 works in the variable resistance area, and the VDS is very small. It can be estimated that the minimum current ID on P1-N1 at this time exceeds (15.5-10)*3/430≈38.3mA, according to the classification of PDs according to IEEE Std 802.3 Standard, the power level is Class4, that is, the PSE side needs to output the highest power level.

③Power supply stage: When the PSE detects that there is a legal PD on P1-N1 and completes the classification of the PD, the PSE starts to supply power to the subsequent load Rload. At this stage, the output voltage of P1-N1 is 36V~57V.

At this stage, the classification circuit 200 is turned off to reduce the power consumption of the PD, and the power supply circuit 300 is turned on to supply power to the subsequent load Rload.

Working principle at this stage: the fifth diode D5 is an 11V regulator, the fourth diode D4 is a 10V regulator, the resistance of the second resistor R2 is 300KΩ, the resistance of the third resistor R3 is 300KΩ, and the fourth diode D4 is 300KΩ. The resistance value of the fourteenth resistor R14 is 0.1Ω.

At this stage, the voltage regulator D1 is reversely broken down and stabilized by the third resistor R3 and the second resistor R2. At this time, the base of the transistor Q1 is clamped at 7.5V～18V ((36-21)/2～(57 -21)/2), VBE>Von (Von is the turn-on voltage, the typical value is about 0.7V), the voltage regulator D1, the third resistor R3, and the fourth resistor R4 are turned on, and the transistor Q1 is on; at this time The VGS of the NMOS transistor Q2 is ≈0V, the NMOS transistor Q2 is turned off, and the regulator tube D3 does not work, reducing the load consumption of the resistors R6-R8.

At this stage, voltage regulator D5 and voltage regulator D4 pass through voltage regulator D5, the ninth resistor R9, and voltage regulator D4 to reverse breakdown and stabilize the voltage. The gate of NMOS transistor Q3 is clamped at 10V, VGS>VT, NMOS The tube Q3 is turned on, and the negative pole of the post-stage load Rload is connected to the negative pole of the POE power supply through the sixth diode D6 and the fourteenth resistor R14; at this time, the base of the triode Q4 is also clamped at 10V, VBE>Von, and the triode Q4 conducts At this time, the VSG of the PMOS transistor Q5≈36V～57V, VSG>VT, the PMOS transistor Q5 is turned on, and the positive pole of the post-stage load Rload is connected to the positive pole of the POE power supply to realize power supply for the post-stage load Rload.

Among them, the main function of the second capacitor C2, the tenth resistor R10, the third capacitor C3, and the thirteenth resistor R13 in the power supply circuit 300 is to provide a charging and discharging circuit between the MOS tubes GS, and to open and close the MOS tubes in time; and the power supply circuit The ninth resistor R9 and the eleventh resistor R11 in 300 and the fourth resistor R4 and fifth resistor R5 in the classification circuit 200 mainly play a role of current limiting.

In the power supply circuit 300, the fourteenth resistor R14 and the sixth diode D6 are added behind the NMOS transistor Q3. The main function is to suppress the reverse current, because the MOS transistor generally has a junction diode between the source and the gate, which will lead to detection classification. The current of the junction diode flows back from the negative pole of the post-stage load Rload, resulting in abnormal classification.

(2) Secondly, the present invention meets the requirements of non-standard POE power supply, because non-standard POE is a direct power supply, there is no detection and classification stage requirements, so it only needs to meet the normal power supply stage requirements.

Common P1-N1 output voltage ranges for non-standard POE power supply are 22.8V~25.2V and 45.6V~50.4V. The working principle of the latter is the same as that of the standard POE power supply stage, so I won’t go into details here. The working principle of the former is as follows:

When the output voltage range of P1-N1 is 22.8V～25.2V, the voltage regulator D1 is reversely broken down and stabilized through the third resistor R3 and the second resistor R2. At this time, the base of the transistor Q1 is clamped at 0.9V～ 2.1V ((22.8-21)/2～(25.2-21)/2), VBE>Von (Von is the turn-on voltage, the typical value is about 0.7V), Zener tube D1, the third resistor R3, the fourth resistor The R4 line is turned on, and the transistor Q1 is turned on; at this time, the VGS of the NMOS transistor Q2≈0V, the NMOS transistor Q2 is turned off, and the regulator tube D3 does not work, reducing the load consumption of the resistors R6~R8.

And voltage regulator D5, voltage regulator D4 through voltage regulator D5, ninth resistor R9, voltage regulator D4 circuit reverse breakdown voltage regulation, NMOS transistor Q3 gate G clamped at 10V, VGS>VT, NMOS The tube Q3 is turned on, and the negative pole of the post-stage load Rload is connected to the negative pole of the POE power supply through the sixth diode D6 and the fourteenth resistor R14; at this time, the base of the triode Q4 is also clamped at 10V, VBE>Von, and the triode Q4 conducts At this time, the VSG of the PMOS transistor Q5≈22.8V～25.2V, VSG>VT, the PMOS transistor Q5 is turned on, and the positive pole of the post-stage load Rload is connected to the positive pole of the POE power supply to realize power supply for the post-stage load Rload.

It should be noted that the values of the electronic components in the embodiments of the present invention are not limited to the above values, and those skilled in the art can adjust the values according to specific circumstances to achieve the same function as the embodiments of the present invention.

It should be understood that the embodiment of the present invention takes the dual-standard POE power supply circuit as an example, but is not limited to the POE power supply circuit. Other application circuits with the same or similar functions, such as the use of similar hierarchical detection or clamp + MOS power supply schemes , all belong to the protection scope of the present invention.

Correspondingly, an embodiment of the present invention further provides a power supply system, where the power supply system includes the discrete PD circuit described in any one of the foregoing embodiments.

It should be understood that the power supply system may be of different types, such as a power supply system with a passivePOE function or a power supply system with a DC-Jack function, but the present invention is not limited thereto.

Based on the above, a discrete PD circuit and power supply system provided by the embodiment of the present invention adopts a simple Zener diode, triode, and MOS tube to design a discrete PD circuit, which can simultaneously meet standard POE power supply and non-standard POE power supply, and supports Wide voltage input from 22V to 57V; and avoids the use of special function integrated PD chips, reduces material costs, and realizes a low-power, low-cost dual-standard POE power supply design.

The above is only a preferred embodiment of the present invention, but the protection scope of the present invention is not limited thereto. It should be pointed out that those skilled in the art can also do There are several equivalent obvious modification ways and/or equivalent replacement ways, and these obvious modification ways and/or equivalent replacement ways should also be regarded as the protection scope of the present invention.

Claims (9)

1. A discrete PD circuit is characterized in that the discrete PD circuit comprises a detection circuit, a classification circuit and a power supply circuit; wherein,

the first end of the detection circuit is connected with the positive electrode of the power supply, and the second end of the detection circuit is connected with the negative electrode of the power supply;

the first end of the grading circuit is connected with the power supply anode, and the second end of the grading circuit is connected with the power supply cathode;

the first end of the power supply circuit is connected with the power supply anode, and the second end of the power supply circuit is connected with the power supply cathode;

the grading circuit comprises a second resistor, a third resistor, a first diode, a fourth resistor, a first switching tube, a fifth resistor, a second diode, a sixth resistor, a seventh resistor, an eighth resistor, a second switching tube and a third diode; wherein,

one end of the second resistor is connected with the second end of the grading circuit, and the other end of the second resistor is connected with one end of the third resistor;

the other end of the third resistor is connected with the anode of the first diode;

the other end of the first diode is connected with the first end of the grading circuit;

one end of the fourth resistor is connected with one end of the third resistor, and the other end of the fourth resistor is connected with the first end of the first switch tube;

the second end of the first switch tube is connected with the second end of the grading circuit, and the third end of the first switch tube is connected with one end of the fifth resistor;

the other end of the fifth resistor is connected with the first end of the grading circuit;

the anode of the second diode is connected with the second end of the first switch tube, and the cathode of the second diode is connected with the third end of the first switch tube;

one end of the sixth resistor is connected with the first end of the grading circuit, and the other end of the sixth resistor is connected with the cathode of the third diode;

the seventh resistor is connected in parallel with the sixth resistor;

the eighth resistor is connected with the sixth resistor in parallel;

the anode of the third diode is connected with the third end of the second switch tube;

the first end of the second switch tube is connected with the third end of the first switch tube, and the second end of the second switch tube is connected with the second end of the first switch tube.

2. The discrete PD circuit of claim 1, wherein the detection circuit comprises a first capacitor and a first resistor; wherein,

one end of the first capacitor is connected with the first end of the detection circuit, and the other end of the first capacitor is connected with the second end of the detection circuit;

the first resistor is connected in parallel with the first capacitor.

3. The discrete PD circuit according to claim 1, wherein the first switch tube is an NPN-type transistor, and then the first terminal of the first switch tube is a base, the second terminal of the first switch tube is an emitter, and the third terminal of the first switch tube is a collector;

if the second switch tube is an NMOS tube, the first end of the second switch tube is a gate, the second end of the second switch tube is a source, and the third end of the second switch tube is a drain.

4. The discrete PD circuit of claim 1 or 3, characterized in that,

the first diode is a voltage stabilizing diode;

the second diode is a voltage stabilizing diode;

the third diode is a zener diode.

5. The discrete PD circuit of claim 1, wherein the power supply circuit comprises a fourth diode, a ninth resistor, a fifth diode, a second capacitor, a tenth resistor, a third switch tube, an eleventh resistor, a fourth switch tube, a twelfth resistor, a third capacitor, a thirteenth resistor, a fifth switch tube and a rear-stage load; wherein,

the anode of the fourth diode is connected with the second end of the power supply circuit, and the cathode of the fourth diode is connected with one end of the ninth resistor;

the other end of the ninth resistor is connected with the anode of the fifth diode;

the cathode of the fifth diode is connected with the first end of the power supply circuit;

one end of the second capacitor is connected with the second end of the third switching tube, and the other end of the second capacitor is connected with the first end of the third switching tube;

the tenth resistor is connected in parallel with the second capacitor;

the first end of the third switching tube is connected with one end of the ninth resistor, the second end of the third switching tube is connected with the second end of the power supply circuit, and the third end of the third switching tube is connected with the second end of the fourth switching tube;

one end of the eleventh resistor is connected with the first end of the third switching tube, and the other end of the eleventh resistor is connected with the first end of the fourth switching tube;

the third end of the fourth switching tube is connected with one end of the twelfth resistor;

the other end of the twelfth resistor is connected with the first end of the fifth switching tube;

one end of the third capacitor is connected with the first end of the fifth switch tube, and the other end of the third capacitor is connected with the second end of the fifth switch tube;

the thirteenth resistor is connected in parallel with the third capacitor;

the second end of the fifth switching tube is connected with the first end of the power supply circuit, and the third end of the fifth switching tube is connected with the positive electrode of the rear-stage load;

and the negative electrode of the rear-stage load is connected with the second end of the fourth switching tube.

6. The discrete PD circuit of claim 5, wherein the power supply circuit further includes a sixth diode and a fourteenth resistor, the sixth diode and the fourteenth resistor being disposed between a negative terminal of the rear-stage load and the second terminal of the fourth switching tube; wherein,

the anode of the sixth diode is connected with the cathode of the rear-stage load, and the cathode of the sixth diode is connected with one end of the fourteenth resistor;

the other end of the fourteenth resistor is connected with the second end of the fourth switching tube.

7. The discrete PD circuit of claim 6, wherein,

the fourth diode is a voltage stabilizing diode;

the fifth diode is a voltage regulator diode;

the sixth diode is a rectifier diode.

8. The discrete PD circuit of any one of claims 5 to 7, wherein the third switch tube is an NMOS tube, then the first end of the third switch tube is a gate, the second end of the third switch tube is a source, and the third end of the third switch tube is a drain;

the fourth switching tube is an NPN type triode, a first end of the fourth switching tube is a base electrode, a second end of the fourth switching tube is an emitting electrode, and a third end of the fourth switching tube is a collector electrode;

if the fifth switching tube is a PMOS tube, the first end of the fifth switching tube is a gate, the second end of the fifth switching tube is a source, and the third end of the fifth switching tube is a drain.

9. A power supply system characterized in that it comprises a discrete PD circuit according to any one of claims 1 to 8.

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