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CN112635683B - Display panel, preparation method thereof and display device - Google Patents

Display panel, preparation method thereof and display device Download PDF

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Publication number
CN112635683B
CN112635683B CN202011511844.4A CN202011511844A CN112635683B CN 112635683 B CN112635683 B CN 112635683B CN 202011511844 A CN202011511844 A CN 202011511844A CN 112635683 B CN112635683 B CN 112635683B
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layer
carrier
opening
substrate
display panel
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CN112635683A (en
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刘彬
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Beijing Visionox Technology Co Ltd
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Beijing Visionox Technology Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/10OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/14Carrier transporting layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/84Passivation; Containers; Encapsulations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/122Pixel-defining structures or layers, e.g. banks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10Deposition of organic active material
    • H10K71/12Deposition of organic active material using liquid deposition, e.g. spin coating
    • H10K71/13Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
    • H10K71/135Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing using ink-jet printing

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  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

A display panel, a preparation method thereof and a display device are provided, wherein the display panel comprises: a substrate; a pixel defining layer on the substrate, the pixel defining layer having a pixel opening therein, the pixel opening being separated into a first sub-opening and a second sub-opening by a barrier structure; a light emitting layer and a first carrier layer in the first sub-opening, the first carrier layer being between the light emitting layer and the substrate; and the second carrier layer is positioned in the pixel opening, spans the blocking structure from the second sub-opening and extends to the surface of the light-emitting layer, which is opposite to the side of the substrate. The display panel provides a new design structure and, secondly, the first and second carrier layers are confined in the pixel openings, the first carrier layers in different pixel openings are spaced apart, and the second carrier layers in different pixel openings are spaced apart, thus reducing lateral cross-talk of current between different pixel openings.

Description

Display panel, preparation method thereof and display device
Technical Field
The invention relates to the technical field of display, in particular to a display panel, a preparation method thereof and a display device.
Background
An Organic Light-Emitting Diode (OLED) display, also called an Organic electroluminescent display, is an emerging display. The OLED display has a series of advantages of autonomous luminescence, wide visual angle, light weight, thinness, high brightness, low power consumption, quick response and the like, so that the OLED display becomes a very popular display product at home and abroad, and has a wide application prospect. The structure of the OLED display includes: a substrate; an anode, an organic functional layer, and a cathode stacked on the substrate; and an encapsulation layer.
Disclosure of Invention
The invention aims to provide a new design structure of a display panel and reduce transverse crosstalk of current.
In order to solve the above technical problems, the present invention provides a display panel, comprising: a substrate; a pixel defining layer on the substrate, the pixel defining layer having a pixel opening therein, the pixel opening being separated into a first sub-opening and a second sub-opening by a barrier structure; a light emitting layer and a first carrier layer in the first sub-opening, the first carrier layer being between the light emitting layer and the substrate; and the second carrier layer is positioned in the pixel opening, spans the blocking structure from the second carrier opening and extends to the surface of the light-emitting layer, which is opposite to the side of the substrate.
Optionally, the first carrier layer includes: a first carrier injection layer located in the first sub-opening; a first carrier transport layer located between the first carrier injection layer and the light emitting layer; the second carrier layer includes: a second carrier injection layer located in the second sub-opening; and the second carrier transmission layer is positioned in the pixel opening and positioned on one side of the light-emitting layer and the second carrier injection layer, which is opposite to the substrate.
Optionally, in a direction perpendicular to the surface of the substrate, a surface of the light emitting layer facing away from the substrate is not higher than a top surface of the barrier structure facing away from the substrate, and a distance between the surface of the light emitting layer facing away from the substrate and the top surface of the barrier structure facing away from the substrate is less than 10 nanometers.
Optionally, a surface of the light emitting layer facing away from the substrate is flush with a top surface of the barrier structure facing away from the substrate.
Optionally, the method further comprises: a first electrode layer at least positioned on the surface of the substrate at the bottom of the first carrier layer; and the second electrode layer is at least positioned on the surface of the bottom substrate of the second sub-opening.
Optionally, the first electrode layer is located on a bottom wall and a side wall of the first sub-opening, the side wall of the first carrier injection layer is in contact with the first electrode layer, the first electrode layer is a cathode layer, the second electrode layer is an anode layer, and the first carrier injection layer is an electron injection layer; or, the second electrode layer is located at the bottom wall and the side wall of the second sub-opening, the side wall of the second carrier injection layer is in contact with the second electrode layer, the first electrode layer is an anode layer, the second electrode layer is a cathode layer, and the second carrier injection layer is an electron injection layer.
Optionally, the display panel further includes: and the top layer reflecting film is positioned on the surface of the second carrier transmission layer, which is opposite to the side of the substrate.
Optionally, the top layer reflective film is connected to the cathode layer.
Optionally, the top reflective film covers the second carrier transport layer and extends to a side surface of the pixel defining layer facing away from the substrate.
Optionally, the top layer reflecting film has a whole surface structure.
Optionally, the barrier structure includes a first barrier region and a second barrier region arranged parallel to and adjacent to the surface of the substrate, the first barrier region having a height less than a height of the second barrier region, the second barrier region being located between the first barrier region and the second sub-opening.
Optionally, a ratio of an area of the second blocking area projected on the surface of the substrate to an area of the first blocking area projected on the surface of the substrate is 1: 8-1: 10.
optionally, the display panel further includes: an additional reflecting layer, which is positioned between the surface of the first blocking area, which is opposite to the side of the substrate, and the first carrier transmission layer; the first electrode layer and the first carrier injection layer are located at sides of the additional reflection layer.
Optionally, in a direction perpendicular to the substrate surface, a distance between a surface of the first carrier injection layer facing away from the substrate side and a surface of the additional reflection layer facing the substrate side is greater than zero.
Optionally, the height of the barrier structure is less than the thickness of the pixel defining layer outside the pixel opening.
Optionally, the difference between the height of the barrier structure and the thickness of the pixel defining layer outside the pixel opening is 10 nm to 50 nm.
Optionally, a ratio of a projected area of the first sub-opening on the substrate surface to a projected area of the second sub-opening on the substrate surface is 50:1 to 10:1.
optionally, the barrier structure is part of the pixel defining layer.
Optionally, the first carrier layer is a hole functional layer, the first carrier injection layer is a hole injection layer, the first carrier transport layer is a hole transport layer, the second carrier layer is an electron functional layer, the second carrier injection layer is an electron injection layer, and the second carrier transport layer is an electron transport layer.
Optionally, the first carrier layer is an electron functional layer, the first carrier injection layer is an electron injection layer, the first carrier transport layer is an electron transport layer, the second carrier layer is a hole functional layer, the second carrier injection layer is a hole injection layer, and the second carrier transport layer is a hole transport layer.
The invention also provides a preparation method of the display panel, which comprises the following steps: providing a substrate; forming a pixel defining layer on the substrate, the pixel defining layer having a pixel opening therein, the pixel opening being separated into a first sub-opening and a second sub-opening by a barrier structure; forming a first carrier layer in the first sub-opening; forming a light-emitting layer on the surface of one side of the first carrier layer, which is opposite to the substrate; and forming a second carrier layer, wherein the second carrier layer is positioned in the pixel opening, spans the barrier structure from the second carrier opening and extends to the surface of the light-emitting layer, which is opposite to the side of the substrate.
Optionally, the method for forming the first carrier layer includes: forming a first carrier injection layer in the first sub-opening; forming a first carrier transport layer on a side of the first carrier injection layer facing away from the substrate; the method for forming the second carrier layer comprises the following steps: forming a second carrier injection layer in the second sub-opening; after the light emitting layer is formed, a second carrier transport layer is formed in the pixel opening on a side of the light emitting layer and the second carrier injection layer facing away from the substrate.
Optionally, the process of forming the light emitting layer is an inkjet printing process; the process of forming the first carrier layer is an inkjet printing process, and the process of forming the second carrier layer is an inkjet printing process.
Optionally, the method for manufacturing the display panel further includes: and forming a top layer reflecting film on the surface of one side of the second carrier transmission layer, which is opposite to the substrate.
Optionally, the barrier structure includes a first barrier region and a second barrier region arranged parallel to and adjacent to the surface of the substrate, the first barrier region having a height less than a height of the second barrier region, the second barrier region being located between the first barrier region and the second sub-opening.
Optionally, the method for manufacturing the display panel further includes: before forming the first carrier transport layer, an additional reflective layer is formed on the surface of the first blocking region facing away from the substrate.
Optionally, the method further comprises: forming a first electrode layer on part of the surface of the substrate before forming the pixel defining layer, wherein the first electrode layer is positioned at the bottom wall of the first sub-opening after forming the pixel defining layer, and the first electrode layer is an anode layer; before the first carrier layer is formed, a second electrode layer is formed on at least the surface of the bottom substrate of the second sub-opening, and the second electrode layer is a cathode layer.
Optionally, the second electrode layer is formed on the bottom wall and the side wall of the second sub-opening, the side wall of the second carrier injection layer is in contact with the second electrode layer, and the second carrier injection layer is an electron injection layer.
Optionally, the step of forming a second electrode layer on the bottom wall and the side wall of the second sub-opening includes: forming a second electrode material film on the bottom wall and the side wall of the first sub-opening, the bottom wall and the side wall of the second sub-opening, and the surface of the side of the pixel defining layer facing away from the substrate; and etching to remove the second electrode material film of the bottom wall and the side wall of the first sub-opening and the second electrode material film positioned on the surface of one side of the pixel limiting layer, which is opposite to the substrate, so as to form the second electrode layer.
Optionally, before forming the pixel defining layer, forming a second electrode layer on a part of the surface of the substrate, and after forming the pixel defining layer, the second electrode layer is located at the bottom wall of the second sub-opening, and the second electrode layer is an anode layer; before the first carrier layer is formed, a first electrode layer is formed on at least the surface of the bottom substrate of the first sub-opening, and the first electrode layer is a cathode layer.
Optionally, the first electrode layer is formed on the bottom wall and the side wall of the first sub-opening, the side wall of the first carrier injection layer is in contact with the first electrode layer, and the first carrier injection layer is an electron injection layer.
Optionally, the step of forming a first electrode layer on the bottom wall and the side wall of the first sub-opening includes: forming a first electrode material film on the bottom wall and the side wall of the first sub-opening, the bottom wall and the side wall of the second sub-opening, and the surface of one side of the pixel defining layer, which is opposite to the substrate; and etching to remove the second electrode material film of the bottom wall and the side wall of the second sub-opening and the second electrode material film positioned on the surface of one side of the pixel limiting layer, which is opposite to the substrate, so as to form the first electrode layer.
The invention also provides a display device comprising the display panel.
The technical scheme of the invention has the following advantages:
1. the display panel provided by the technical scheme of the invention comprises: a substrate; a pixel defining layer on the substrate, the pixel defining layer having a pixel opening therein, the pixel opening being separated into a first sub-opening and a second sub-opening by a barrier structure; a light emitting layer and a first carrier layer in the first sub-opening, the first carrier layer being between the light emitting layer and the substrate; and the second carrier layer is positioned in the pixel opening and extends from the second sub-opening to the surface of the light-emitting layer, which is opposite to the side of the substrate, across the blocking structure. The first carrier layer provides a first carrier for the light-emitting layer, the second carrier layer provides a second carrier for the light-emitting layer, and the first carrier and the second carrier are combined in the light-emitting layer to enable the light-emitting layer to emit light. The display panel provides a new design structure; second, the first and second carrier layers are confined in the pixel openings, the first carrier layers in different pixel openings being spaced apart, and the second carrier layers in different pixel openings being spaced apart, thus reducing lateral cross-talk of current between different pixel openings.
2. Further, the second electrode layer is at least located on the surface of the substrate at the bottom of the second sub-opening, the second carrier injection layer is located in the second sub-opening, and the second carrier transport layer is located in the pixel opening and located on one side of the light emitting layer and the second carrier injection layer, which is away from the substrate. The second carrier injection layer injects second carriers into the second carrier transport layer in the second carrier opening, the second carrier transport layer in the second carrier opening transports the second carriers to the second carrier transport layer in the first carrier opening, and the second carrier transport layer in the first carrier opening transports the second carriers to the light emitting layer for recombination with the first carriers, so that the light emitting layer emits light.
Further, the second electrode layer is located at the bottom wall and the side wall of the second sub-opening, the side wall of the second carrier injection layer is in contact with the second electrode layer, the second electrode layer is a cathode layer, and the second carrier injection layer is an electron injection layer. The side wall of the second carrier injection layer is in contact with the second electrode layer, so that the second electrode layer protects the second carrier injection layer, the second electrode layer can prevent water and oxygen from entering the second carrier injection layer from the pixel limiting layer, and the second electrode layer can also prevent some active substances in the pixel limiting layer from diffusing into the second carrier injection layer, so that the probability of erosion of the second carrier injection layer by water and oxygen and active substances is reduced, the stability of the second carrier injection layer is improved, and the stability of the display panel is improved.
3. Further, the first electrode layer is located on the bottom wall and the side wall of the first sub-opening, the side wall of the first carrier injection layer is in contact with the first electrode layer, the first electrode layer is a cathode layer, and the first carrier injection layer is an electron injection layer. The side wall of the first carrier injection layer is in contact with the first electrode layer, so that the first electrode layer protects the first carrier injection layer, the first electrode layer can prevent water and oxygen from entering the first carrier injection layer from the pixel limiting layer, and the first electrode layer can also prevent some active substances in the pixel limiting layer from diffusing into the first carrier injection layer, so that the probability of erosion of the first carrier injection layer by water and oxygen and active substances is reduced, the stability of the first carrier injection layer is improved, and the stability of the display panel is improved.
4. Further, the display panel further includes: and the top layer reflecting film is positioned on the surface of the second carrier transmission layer, which is opposite to one side of the substrate, and is suitable for forming a microcavity structure with the first electrode layer. And the second electrode layer is at least positioned on the surface of the substrate at the bottom of the second sub-opening, and the second electrode layer is not used as a part of the microcavity structure. This allows the thickness of the second electrode layer to be selected to be relatively large in order to reduce the voltage drop between the second electrode layers of adjacent pixel regions without being limited by the cavity length requirements of the microcavity structure. Further, the material of the second electrode layer is not limited by the reflective performance of the microcavity structure, so that the material of the second electrode layer can be selected to be a material with smaller sheet resistance so as to reduce the voltage drop between the second electrode layers of adjacent pixel areas. Furthermore, the top layer reflecting film has a whole surface structure, and is simple in structure and easy to manufacture.
5. Further, a ratio of a projected area of the first sub-opening on the substrate surface to a projected area of the second sub-opening on the substrate surface is 50:1 to 10:1. therefore, the projection area of the first sub-opening on the surface of the substrate is larger, so that the projection area of the light-emitting layer on the surface of the base occupies a larger proportion of the projection area of the pixel opening on the surface of the base, the light-emitting area is increased, and the light-emitting brightness is improved.
6. Further, the barrier structure comprises a first barrier region and a second barrier region arranged parallel to the surface of the substrate and adjacent to each other, wherein the height of the first barrier region is smaller than that of the second barrier region, and the second barrier region is positioned between the first barrier region and the second sub-opening. The display panel further includes: an additional reflecting layer, which is positioned between the surface of the first blocking area, which is opposite to the side of the substrate, and the first carrier transmission layer; the first electrode layer and the first carrier injection layer are located at sides of the additional reflection layer. Thus, two microcavity structures with cavity lengths are formed, one microcavity structure is composed of the first electrode layer and the top reflecting film, the microcavity structure composed of the first electrode layer and the top reflecting film is suitable for adjusting light-emitting efficiency, the other microcavity structure is composed of the additional reflecting layer and the top reflecting film, and the microcavity structure composed of the additional reflecting layer and the top reflecting film is suitable for adjusting the visual angle of the display panel. Thereby improving the performance of the display panel in terms of light emission.
7. According to the preparation method of the display panel, the pixel limiting layer is formed on the substrate, the pixel limiting layer is provided with the pixel opening, and the pixel opening is separated into the first sub-opening and the second sub-opening by the blocking structure; forming a first carrier layer in the first sub-opening; forming a light-emitting layer on the surface of one side of the first carrier layer, which is opposite to the substrate; and forming a second carrier layer, wherein the second carrier layer is positioned in the pixel opening, spans the barrier structure from the second carrier opening and extends to the surface of the light-emitting layer, which is opposite to the side of the substrate. The display panel provides a new design structure; second, the first and second carrier layers are confined in the pixel openings, the first carrier layers in different pixel openings being spaced apart, and the second carrier layers in different pixel openings being spaced apart, thus reducing lateral cross-talk of current between different pixel openings.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described, and it is obvious that the drawings in the description below are some embodiments of the present invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic top view of a display panel according to an embodiment of the invention;
FIG. 2 is a schematic view of a partial cross-sectional structure of the display panel shown in FIG. 1;
FIG. 3 is a schematic cross-sectional view of a display panel according to another embodiment of the present invention;
fig. 4 to 9 are schematic structural views illustrating a manufacturing process of a display panel according to an embodiment of the invention;
fig. 10 to 13 are schematic structural views illustrating a manufacturing process of a display panel according to another embodiment of the invention.
Detailed Description
Referring to fig. 1 to 2, fig. 1 is a schematic top view of a display panel according to an embodiment of the invention; fig. 2 is a schematic view of a partial cross-sectional structure of the display panel shown in fig. 1, the display panel including: a substrate 100; a pixel defining layer 110 on the substrate 100, the pixel defining layer 110 having a pixel opening therein, the pixel opening being divided into a first sub-opening 121 (refer to fig. 1 and 2) and a second sub-opening 122 (refer to fig. 1 and 2) by a barrier structure barrier 110 a; a light emitting layer 160 and a first carrier layer located in the first sub-opening 121, the first carrier layer being located between the light emitting layer 160 and the substrate 100; the second carrier layer is located in the pixel opening, and extends from the second sub-opening 122 across the barrier structure 110a to a surface of the light emitting layer 160 facing away from the substrate 100.
The display panel of the application provides a new design structure, and secondly, the first carrier layer and the second carrier layer are limited in the pixel openings, the first carrier layers in different pixel openings are separated, and the second carrier layers in different pixel openings are separated, so that the transverse crosstalk of current between different pixel openings is reduced.
In this embodiment, the substrate 100 is an array substrate, and the array substrate includes: the display panel is an AMOLED (Active-matrix organic lightemitting diode) display panel.
The substrate 100 includes a plurality of discrete pixel regions a (refer to fig. 1) and a spacer region B (refer to fig. 1) located between the pixel regions a. In order to realize a colorized display, the display panel pixel region may include a red pixel region, a green pixel region, and a blue pixel region.
Specifically, in the present embodiment, the barrier structure 110a is a part of the pixel defining layer 110, that is, the pixel defining layer 110 between the first sub-opening 121 and the second sub-opening 122 forms the barrier structure 110a. The material of the pixel defining layer 110 is a photoresist material.
In other embodiments, the barrier structure 110a and the pixel defining layer 110 are separate two parts, that is, may be made of different materials in separate processes.
The ratio of the projected area of the first sub-opening 121 on the surface of the substrate 100 to the projected area of the second sub-opening 122 on the surface of the substrate 100 is 50:1 to 10:1, such as 50: 1. 40: 1. 30: 1. 20:1 or 10:1. in this way, the projection area of the first sub-opening 121 on the surface of the substrate 100 is larger, and the light-emitting layer is suitable for being placed in the first sub-opening 121, so that the proportion of the projection area of the light-emitting layer on the surface of the substrate 100 to the projection area of the pixel opening on the surface of the substrate 100 is larger, the light-emitting area is increased, and the light-emitting brightness is improved.
The height of the barrier structure 110a is smaller than the thickness of the pixel defining layer 110 outside the pixel opening. The difference between the height of the barrier structure 110a and the thickness of the pixel defining layer 110 outside the pixel opening is 10 nm to 50 nm.
The height of the barrier structure 110a and the thickness of the pixel defining layer 110 each refer to a dimension in a direction perpendicular to the surface of the substrate 100. The height difference between the thicknesses of the barrier structure 110a and the pixel defining layer 110 outside the pixel opening facilitates the preparation of the second carrier layer, reduces the process difficulty, and satisfies the existence interval of the second carrier layer of the adjacent pixel opening.
In this embodiment, the surface of the blocking structure 110a facing away from the substrate 100 is flush, and the projection of the blocking structure 110a on the surface of the substrate is a strip structure, and the extending direction of the strip structure is perpendicular to the arrangement direction of the first sub-openings 121 to the second sub-openings 122. In other embodiments, the shape of the projection of the barrier structure on the substrate surface is other shapes or irregular shapes, so long as the barrier structure 110a exists, the pixel opening can be divided into the first sub-opening 121 and the second sub-opening 122, so as to satisfy the new design structure of the display panel of the present application.
The first carrier layer includes: a first carrier injection layer 140 located in the first sub-opening 121; a first carrier transport layer 150 located between the first carrier injection layer 140 and the light emitting layer 160.
The second carrier layer includes: a second carrier injection layer 170 located in the second sub-opening 122; the second carrier transport layer 180 located in the pixel opening and on the side of the light emitting layer 160 and the second carrier injection layer 170 facing away from the substrate 100, that is, the second carrier transport layer 180 is located in the pixel opening, and the orthographic projection of the second carrier transport layer 180 on the substrate 100 covers the orthographic projection of the light emitting layer 160 and the second carrier injection layer 170 on the substrate 100.
The second carrier injection layer 170 injects the second carriers into the second carrier transport layer 180 in the second carrier opening 122, the second carrier transport layer 180 in the second carrier opening 122 transports the second carriers to the second carrier transport layer 180 in the first carrier opening 121, and the second carrier transport layer 180 in the first carrier opening 121 transports the second carriers to the light emitting layer 160. The first carrier injection layer 140 injects first carriers into the first carrier transport layer 150, and the first carrier transport layer 150 transports the first carriers to the light emitting layer 160. The first carriers and the second carriers transferred into the light emitting layer 160 are recombined, so that the light emitting layer 160 emits light.
Of course, the first carrier layer and the second carrier layer may further include other film layers as needed, for example, when the display panel includes the first carrier blocking layer, the second carrier layer includes the first carrier blocking layer, and the first carrier blocking layer is located between the light emitting layer and the second carrier transporting layer, and is used for blocking the first carrier and transporting the second carrier.
In a direction perpendicular to the surface of the substrate 100, the surface of the light emitting layer 160 facing away from the substrate 100 is not higher than the top surface of the barrier structure 110a facing away from the substrate 100, and a distance between the surface of the light emitting layer 160 facing away from the substrate 100 and the top surface of the barrier structure 110a facing away from the substrate 100 is less than 10 nanometers, such as 8 nanometers, 6 nanometers, 4 nanometers, 2 nanometers, or 0 nanometer.
In this embodiment, the surface of the light emitting layer 160 facing away from the substrate 100 is flush with the top surface of the barrier structure 110a facing away from the substrate 100.
The display panel further includes: a first electrode layer 131 located at least on the surface of the substrate 100 at the bottom of the first carrier layer; at least the second electrode layer 132 is located on the surface of the bottom substrate 100 of the second sub-opening 122.
In this embodiment, the second electrode layer 132 is located on the bottom wall and the side wall of the second opening 122, the side wall of the second carrier injection layer 170 contacts the second electrode layer 132, the first electrode layer 131 is an anode layer, the second electrode layer 132 is a cathode layer, and the second carrier injection layer 170 is an electron injection layer. The entire sidewall of the further second carrier injection layer 170 is in contact with the second electrode layer 132. Since the sidewall of the second carrier injection layer 170 is in contact with the second electrode layer 132, the second electrode layer 132 protects the second carrier injection layer 170, the second electrode layer 132 can block water oxygen from entering the second carrier injection layer 170 from the pixel defining layer 110, and the second electrode layer 132 can also block some active substances in the pixel defining layer 110 from diffusing into the second carrier injection layer 170, so that the probability of erosion of the second carrier injection layer 170 by water oxygen and active substances is reduced, the stability of the second carrier injection layer 170 is improved, and the stability of the display panel is improved. It should be noted that, in general, the organic light emitting diode in the display panel has a high sensitivity to water and oxygen. If residual water oxygen exists in the preparation process of the organic light-emitting diode or poor packaging of the organic light-emitting diode occurs, the organic light-emitting diode is easily eroded by the water oxygen, so that the stability of the OLED display is reduced. Currently, there are several methods for dealing with the failure of an organic light emitting diode device, one of which is: the packaging performance of the thin film packaging layer covering the organic light-emitting diode is improved, so that the water-oxygen resistance of the thin film packaging layer is improved. However, after the packaging performance of the thin film packaging layer is reduced due to damage of the organic light emitting diode in the use process, or when the organic light emitting diode is introduced with water oxygen before the thin film packaging layer in the manufacturing process, the shielding function of the thin film packaging layer on the water oxygen is reduced, or the water oxygen can erode the organic light emitting diode, so that the method for improving the packaging performance of the thin film packaging layer has a limitation on improving the failure problem caused by the erosion of the organic light emitting diode by the water oxygen. According to research, in the organic light-emitting diode, the area which is sensitive to water and oxygen is the area where the electron injection layer is located, generally, the electron injection layer is usually made of active metal, and the active metal is easy to react with water and oxygen, so that the electron injection layer is corroded by water and oxygen, and the organic light-emitting diode is further disabled. Therefore, the stability of the electron injection layer can be improved effectively. When the second carrier injection layer 170 is an electron injection layer, the stability of the organic light emitting diode can be effectively improved, and the stability of the display panel can be improved.
In other embodiments, the first electrode layer 131 is located on the bottom wall and the side wall of the first sub-opening 121, the side wall of the first carrier injection layer 140 contacts the first electrode layer 131, the first electrode layer 131 is a cathode layer, the second electrode layer 132 is an anode layer, and the first carrier injection layer 140 is an electron injection layer. Further, the entire sidewall of the first carrier injection layer 140 is in contact with the first electrode layer 131.
In this embodiment, the first carrier layer is a hole functional layer, the first carrier injection layer 140 is a hole injection layer, the first carrier transport layer 150 is a hole transport layer, the second carrier layer is an electron functional layer, the second carrier injection layer 170 is an electron injection layer, and the second carrier transport layer 180 is an electron transport layer. Correspondingly, the first electrode layer 131 is an anode layer, and the second electrode layer 132 is a cathode layer.
In this embodiment, the second electrode layer 132 is a cathode layer, and the materials of the cathode layer include: the first electrode layer 131 is an anode layer made of metal silver or magnesium silver alloy material, and the material of the anode layer comprises ITO.
In other embodiments, the first carrier layer is an electron functional layer, the first carrier injection layer is an electron injection layer, the first carrier transport layer is an electron transport layer, the second carrier layer is a hole functional layer, the second carrier injection layer is a hole injection layer, and the second carrier transport layer is a hole transport layer. Correspondingly, the first electrode layer is a cathode layer, and the second electrode layer is an anode layer. The cathode layer comprises the following materials: metallic silver or magnesium silver alloy material, and the material of the anode layer comprises ITO.
The second electrode layer 132 is at least located on the surface of the substrate 100 at the bottom of the second sub-opening 122, and the second electrode layer 132 is not a part of the microcavity structure, so that the thickness of the second electrode layer 132 is not limited by the requirement of the cavity length of the microcavity structure, and the thickness of the second electrode layer 132 can be selected to be relatively large so as to reduce the voltage drop between the second electrode layers 132 of adjacent pixel regions. In one embodiment, the thickness of the second electrode layer 132 is 10 nm to 100 nm, such as 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm.
The material of the second electrode layer 132 is not limited by the reflective properties of the microcavity structure, so that the material of the second electrode layer 132 can be selected to have a smaller sheet resistance to reduce the voltage drop between the second electrode layers 132 in adjacent pixel regions. In one embodiment, fang Zuxiao of the second electrode layer 132 is a sheet resistance of a subsequent top-layer reflective film. Note that, the sheet resistance of the second electrode layer 132 may be the same as the sheet resistance of the subsequent top layer reflective film, and the material of the second electrode layer 132 may be the same as the material of the subsequent top layer reflective film.
In this embodiment, the second electrode layer 132 is a cathode layer, the thickness of the cathode layer is 10 nm-100 nm, and the sheet resistance of the cathode layer is smaller than that of the subsequent top layer reflective film, or the sheet resistance of the cathode layer is consistent with that of the subsequent top layer reflective film. The material of the cathode layer may be selected to be the same as the material of the subsequent top reflective film.
The display panel further includes: and a top reflection film 190 on a surface of the second carrier transport layer 180 facing away from the substrate 100.
The top reflective film 190 is connected to the second electrode layer 132 such that an operating voltage can be selectively supplied to the second electrode layer 132 by applying a voltage to the top reflective film 190. In other embodiments, the top reflective film is not connected to the second electrode layer, and a conductive connection member may be disposed in the substrate 100 to realize the electrical requirement of the first electrode 131 or the second electrode 132.
The top reflective film 190 covers the second carrier transport layer 180 and extends to a side surface of the pixel defining layer 110 facing away from the substrate 100. In this case, the top reflection film 190 between the adjacent pixel regions may be disconnected or connected together.
When the top reflection films 190 between the adjacent pixel regions are all connected together, the top reflection film 190 has a whole surface structure, and the structure is simple and the manufacturing is easy.
In this embodiment, the power line is disposed in the substrate 100, the second conductive connecting member 102 is disposed at the bottom of the second electrode layer 132 in the substrate 100, the first conductive connecting member 101 is disposed at the bottom of the first electrode layer 131 in the substrate 100, and the first conductive connecting member 101 is connected to the first electrode layer 131.
In this embodiment, the second electrode layer 132 is a cathode layer, and the cathode layer is electrically connected to the power line through the second conductive connection member 102, and further, the second conductive connection member 102 has a square resistance at the cathode layer of Fang Zuxiao. In this case, the second conductive connection 102 supplies an operating voltage to the cathode layer, so that the top reflective film and the cathode layer may be selectively disconnected. It should be noted that, when the second conductive connection 102 provides an operating voltage to the cathode layer, the top reflective film may be selectively connected to the cathode layer. In this embodiment, the first electrode layer is an anode layer, and the first conductive connection member 101 is connected to the anode layer.
In this embodiment, the cathode layer is located in the second sub-opening 122, and the cathode layer may be disposed on the side wall and the bottom wall of the second sub-opening 122, and the cathode layer may cover the entire side wall of the second sub-opening 122, and meanwhile, while the connection between the cathode layer and the top layer reflective film 190 is achieved, a barrier is formed between the second carrier layer and the pixel defining layer 110, so as to protect the second carrier layer. Of course, the cathode layer may also extend to the top surface of the pixel defining layer, thereby reducing the difficulty of the process and improving the connection stability between the cathode layer and the top reflective film 190.
In other embodiments, the first electrode layer 131 is a cathode layer, and the cathode layer is electrically connected to the power line through the first conductive connection member 101, and further, the first conductive connection member 101 has a square resistance at the cathode layer of Fang Zuxiao. The second electrode layer 132 is an anode layer, and the second conductive connection member 102 is connected to the anode layer.
Correspondingly, another embodiment of the present invention further provides a display panel, referring to fig. 3, the display panel of this embodiment is different from the previous embodiment in that: the barrier structure 210ab includes a first barrier region 210a and a second barrier region 210b arranged parallel to the surface of the substrate 200 and adjacent to each other, the first barrier region 210a having a height smaller than that of the second barrier region 210b, the second barrier region 210b being located between the first barrier region 210a and the second sub-opening 222; the display panel further includes an additional reflective layer 233, where the additional reflective layer 233 is located between a surface of the first blocking region 210a facing away from the substrate 200 and the first carrier transporting layer 250.
In this embodiment, two microcavity structures with a cavity length are formed, one microcavity structure is composed of the first electrode layer 231 and the top reflecting film 290, the microcavity structure composed of the first electrode layer 231 and the top reflecting film 290 is suitable for adjusting the light-emitting efficiency, and the other microcavity structure is composed of the additional reflecting layer 233 and the top reflecting film 290, and the microcavity structure composed of the additional reflecting layer 233 and the top reflecting film 290 is suitable for adjusting the viewing angle of the display panel. The two microcavity structures improve the performance of the display panel in terms of light emission.
In a direction perpendicular to the surface of the substrate 200, a distance between the surface of the first carrier injection layer 240 facing away from the substrate 200 and the surface of the additional reflection layer 233 facing toward the substrate 200 is greater than zero.
The first electrode layer 231 and the first carrier injection layer 240 are located at the sides of the additional reflection layer 233.
The ratio of the area of the second barrier region 210b projected on the surface of the substrate 200 to the area of the first barrier region 210a projected on the surface of the substrate is 1: 8-1: 10. this allows: the larger area of the first blocking area 210a projected on the surface of the substrate provides a basis for forming the additional reflective layer with a larger area, so that the microcavity structure formed by the additional reflective layer 233 and the top-layer reflective film 290 can better adjust the viewing angle of the display panel.
In this embodiment, the ratio of the area of the first electrode layer 231 to the area of the top reflection film 290 is 1: 5-5: 1, the higher luminous efficiency and better visual angle are considered like this, and better visual angle surface is at: at a large viewing angle, the attenuation of the light emission luminance of the display panel is small.
The materials of the pixel defining layer 210 and the barrier structure 210ab refer to the previous embodiments.
The ratio of the projected area of the first sub-opening 221 on the surface of the substrate 200 to the projected area of the second sub-opening 222 on the surface of the substrate 200 is 50:1 to 10:1.
The height of the barrier structure 210ab is less than the thickness of the pixel defining layer 210 outside the pixel opening.
The difference between the height of the barrier structure 210ab and the thickness of the pixel defining layer 210 outside the pixel opening is 10 nm to 50 nm.
The light emitting layer 260 refers to the light emitting layer 160 of the previous embodiment. The second carrier transport layer 280 refers to the second carrier transport layer 180 of the previous embodiment, and the second carrier injection layer 270 refers to the second carrier injection layer 170 of the previous embodiment. The description of the second electrode layer 232 refers to the second electrode layer 132 of the previous embodiment.
The same parts of the present embodiment as those of the display panel of the previous embodiment will not be described in detail.
Fig. 4 to 9 are schematic structural views illustrating a manufacturing process of a display panel according to an embodiment of the invention.
Referring to fig. 4, a substrate 100 is provided.
In this embodiment, the substrate 100 is an array substrate, and the array substrate includes: the display device comprises a substrate base plate and an array circuit layer positioned on the substrate base plate, wherein the array circuit layer is suitable for driving the display panel to emit light.
In this embodiment, the substrate 100 has a power line therein, the substrate 100 has a first conductive connection member 101 therein, and the first conductive connection member 101 is adapted to be connected to the first electrode layer. The substrate 100 further has a second conductive connection 102 therein, the second conductive connection 102 being adapted to be connected to a second electrode layer.
With continued reference to fig. 4, a pixel defining layer 110 is formed on the substrate 100, the pixel defining layer 110 having a pixel opening therein, the pixel opening being separated into a first sub-opening 121 and a second sub-opening 122 by a barrier structure 110a.
Specifically, in the present embodiment, the barrier structure 110a is a part of the pixel defining layer 110, that is, the pixel defining layer 110 between the first sub-opening 121 and the second sub-opening 122 forms the barrier structure 110a. The material of the pixel defining layer 110 is a photoresist material.
The method of forming the pixel defining layer 110 includes: forming a pixel defining material layer (not shown) on the substrate 100; the pixel defining material layer is subjected to an exposure process and a development process such that the pixel defining material layer forms the pixel defining layer 110.
In other embodiments, the barrier structure 110a is two separate parts from the pixel defining layer 110.
The position of the barrier structure 110a may be set according to practical needs, for example, after the barrier structure 110a is formed, the ratio of the projected area of the first sub-opening 121 on the surface of the substrate 100 to the projected area of the second sub-opening 122 on the surface of the substrate 100 is 50:1 to 10:1, such as 50: 1. 40: 1. 30: 1. 20:1 or 10:1.
the height of the barrier structure 110a is smaller than the thickness of the pixel defining layer 110 outside the pixel opening. The difference between the height of the barrier structure 110a and the thickness of the pixel defining layer 110 outside the pixel opening is 10 nm to 50 nm.
The height of the barrier structure 110a and the thickness of the pixel defining layer 110 each refer to a dimension in a direction perpendicular to the surface of the substrate 100.
In this embodiment, the surface of the blocking structure 110a facing away from the substrate 100 is flush, and the projection of the blocking structure 110a on the surface of the substrate is a strip structure, and the extending direction of the strip structure is perpendicular to the arrangement direction of the first sub-openings 121 to the second sub-openings 122. In other embodiments, the projected shape of the barrier structure on the substrate surface is other shapes or irregular shapes.
In this embodiment, the method further includes: forming a first carrier layer in the first sub-opening 121; forming a light emitting layer on a surface of the first carrier layer facing away from the substrate 100; a second carrier layer is formed in the pixel opening, extending from the second sub-opening 122 across the barrier structure 110a to a surface of the light emitting layer facing away from the substrate 100.
The method for forming the first carrier layer comprises the following steps: forming a first carrier injection layer in the first sub-opening 121; a first carrier transport layer is formed on a side of the first carrier injection layer facing away from the substrate 100. The method for forming the second carrier layer comprises the following steps: forming a second carrier injection layer in the second sub-opening 122; after the light emitting layer is formed, a second carrier transport layer is formed in the pixel opening on a side of the light emitting layer and the second carrier injection layer facing away from the substrate 100.
In this embodiment, the first carrier layer is a hole functional layer, the first carrier injection layer is a hole injection layer, the first carrier transport layer is a hole transport layer, the second carrier layer is an electron functional layer, the second carrier injection layer is an electron injection layer, and the second carrier transport layer is an electron transport layer. Correspondingly, the first electrode layer is an anode layer, and the second electrode layer is a cathode layer.
In other embodiments, the first carrier layer is an electron functional layer, the first carrier injection layer is an electron injection layer, the first carrier transport layer is an electron transport layer, the second carrier layer is a hole functional layer, the second carrier injection layer is a hole injection layer, and the second carrier transport layer is a hole transport layer. Correspondingly, the first electrode layer is a cathode layer, and the second electrode layer is an anode layer. The cathode layer comprises the following materials: the metal silver or magnesium silver alloy material and the anode layer material comprise.
Referring to fig. 5, a first electrode layer 131 is formed on a part of the surface of the substrate 100; the second electrode layer 132 is formed at least on a portion of the surface of the substrate 100.
In this embodiment, after the pixel defining layer 110 is formed, the first electrode layer 131 and the second electrode layer 132 are formed.
In other embodiments, it may also be: the first electrode layer 131 is formed before the pixel defining layer 110 is formed. When the second electrode layer is located only on a part of the surface of the substrate 100, the step of forming the second electrode layer may also be performed before forming the pixel defining layer 110. Alternatively, in other embodiments, the first electrode layer is formed before the pixel defining layer is formed, and the second electrode layer is formed after the pixel defining layer is formed before the first carrier layer is formed, preferably, the first electrode layer is an anode layer and the second electrode layer is a cathode layer.
In this embodiment, specifically, the first electrode layer 131 is formed at the bottom of the first sub-opening 121, and the second electrode layer 132 is formed at the bottom wall and the side wall of the second sub-opening 122.
The step of forming the second electrode layer 132 at the bottom wall and the side wall of the second sub-opening 122 includes: forming a second electrode material film on the bottom wall and side wall of the first sub-opening 121, the bottom wall and side wall of the second sub-opening 122, and a side surface of the pixel defining layer 110 facing away from the substrate 100; the second electrode layer 132 is formed by etching to remove the second electrode material film of the bottom wall and the side wall of the first sub-opening 121 and the second electrode material film on the surface of the pixel defining layer 110 facing away from the substrate 100.
Specifically, the second electrode material film is further formed on a surface of the barrier structure 110a facing away from the substrate 100; in the process of etching and removing the second electrode material film of the bottom wall and the side wall of the first sub-opening 121 and the second electrode material film on the surface of the pixel defining layer 110 facing away from the substrate 100, the second electrode material film on the surface of the barrier structure 110a facing away from the substrate 100 is etched and removed.
The process of forming the second electrode material film includes a deposition process, such as a plasma chemical vapor deposition process or an atomic layer deposition process.
The thickness of the second electrode layer 132 is referred to above. The description of the material and sheet resistance of the second electrode layer 132 refers to the foregoing. The description of the first electrode layer 131 refers to the contents of the foregoing embodiments.
In this embodiment, the second electrode layer 132 is electrically connected to the power line through the second conductive connection member 102, and Fang Zuxiao of the second conductive connection member 102 is disposed on the sheet resistor of the second electrode layer 132. Because of the sheet resistance of Fang Zuxiao of the second conductive connection member 102 to the second electrode layer 132, the voltage drop between the second electrode layers 132 of the adjacent pixel regions is reduced. Referring to fig. 6, after the first electrode layer 131 is formed, a first carrier injection layer 140 is formed in the first sub-opening 121; the first carrier transport layer 150 is formed on a side of the first carrier injection layer 140 facing away from the substrate 100.
Specifically, the first carrier injection layer 140 is formed on a side of the first electrode layer 131 facing away from the substrate 100. The process of forming the first carrier injection layer 140 is an inkjet printing process, and the process of forming the first carrier transport layer 150 is an inkjet printing process.
Referring to fig. 7, a light emitting layer 160 is formed on a side surface of the first carrier transport layer 150 facing away from the substrate 100.
The process of forming the light emitting layer 160 is an inkjet printing process.
In a direction perpendicular to the surface of the substrate 100, the surface of the light emitting layer 160 facing away from the substrate 100 is not higher than the top surface of the barrier structure 110a facing away from the substrate 100, and a distance between the surface of the light emitting layer 160 facing away from the substrate 100 and the top surface of the barrier structure 110a facing away from the substrate 100 is less than 10 nanometers, such as 8 nanometers, 6 nanometers, 4 nanometers, 2 nanometers, or 0 nanometer.
In this embodiment, the surface of the light emitting layer 160 facing away from the substrate 100 is flush with the top surface of the barrier structure 110a facing away from the substrate 100.
Referring to fig. 8, after forming the second electrode layer 132, a second carrier injection layer 170 is formed in the second sub-opening 122; after the light emitting layer 160 is formed, a second carrier transport layer 180 is formed in the pixel opening at a side of the light emitting layer 160 and the second carrier injection layer 170 facing away from the substrate 100.
In this embodiment, after the light emitting layer 160 is formed, the second carrier injection layer 170 is formed. In other embodiments, it may also be: after the first carrier injection layer and the second electrode layer are formed, a second carrier injection layer is formed, after which a first carrier transport layer and a light emitting layer are formed, and after which a second carrier transport layer is formed. In other embodiments, it may also be: after the first carrier injection layer, the first carrier transport layer, and the second electrode layer are formed, the second carrier injection layer is formed, then the light emitting layer is formed, and then the second carrier transport layer is formed. In a forming embodiment, the second carrier injection layer may be formed after the first electrode layer and the second electrode layer are formed and before the first carrier injection layer is formed.
The process of forming the second carrier transport layer 180 is an inkjet printing process; the process of forming the second carrier injection layer 170 is an inkjet printing process.
In this embodiment, the sidewall of the second carrier injection layer 170 contacts the second electrode layer 132, the second carrier injection layer is an electron injection layer, the second electrode layer is a cathode layer, and further, the entire sidewall of the second carrier injection layer 170 contacts the second electrode layer 132.
In other embodiments, before forming the pixel defining layer, forming a second electrode layer on a part of the surface of the substrate, after forming the pixel defining layer, the second electrode layer is located at the bottom wall of the second sub-opening, and the second electrode layer is an anode layer; after forming the pixel defining layer, before forming the first carrier layer, forming a first electrode layer, which is a cathode layer, on at least the bottom substrate surface of the first sub-opening. Further, a first electrode layer may be formed at the bottom wall and the side wall of the first sub-opening. And forming a first electrode layer on the bottom wall and the side wall of the first sub-opening, wherein the side wall of the first carrier injection layer is contacted with the first electrode layer, and the first carrier injection layer is an electron injection layer. The step of forming a first electrode layer on the bottom wall and the side wall of the first sub-opening includes: forming a first electrode material film on the bottom wall and the side wall of the first sub-opening, the bottom wall and the side wall of the second sub-opening, and the surface of the side opposite to the pixel defining layer; and etching to remove the second electrode material film of the bottom wall and the side wall of the second sub-opening and the second electrode material film on the surface of the side, facing away from the substrate, of the pixel limiting layer to form a first electrode layer.
Referring to fig. 9, a top reflection film 190 is formed on a side surface of the second carrier transport layer 180 facing away from the substrate 100.
In this embodiment, the top reflective film 190 is connected to the second electrode layer 132. In other embodiments, the top reflective film is not in contact with the second electrode layer.
The top reflective film 190 covers the second carrier transport layer 180 and extends to a side surface of the pixel defining layer 110 facing away from the substrate 100, so that the second carrier injection layer 170, the second carrier transport layer 180, the first carrier transport layer 150, and the first carrier injection layer 140 in the pixel opening are better sealed in the pixel opening.
In one embodiment, the top reflective film 190 is a full-face structure, simple in structure, and easy to manufacture.
In one embodiment, the thickness of the top reflective film 190 is smaller than that of the second electrode layer 132, and the thickness of the top reflective film 190 is smaller, so as to avoid excessive reflectivity of the top reflective film 190, and ensure that more light can exit from the top reflective film 190 after being reflected back and forth in the microcavity formed by the top reflective film 190 and the anode layer 131. The material of the top reflection film 190 is metallic silver or magnesium silver alloy. The thickness of the top reflective film 190 is 10 nm to 50 nm.
In this embodiment, the method further includes: a thin film encapsulation layer (not shown) is formed on the side of the top reflective film facing away from the substrate.
Fig. 10 to 13 are schematic structural views illustrating a manufacturing process of a display panel according to another embodiment of the invention.
Referring to fig. 10, a substrate 200 is provided, a pixel defining layer 210 is formed on the substrate 200, the pixel defining layer 210 has a pixel opening therein, and the pixel opening is partitioned into a first sub-opening 221 and a second sub-opening 222 by a barrier structure 210 ab; the barrier structure 210ab includes a first barrier region 210a and a second barrier region 210b arranged parallel to the surface of the substrate 200 and adjacent to each other, the first barrier region 210a having a height smaller than that of the second barrier region 210b, and the second barrier region 210b being located between the first barrier region 210a and the second sub-opening 222.
The materials of the pixel defining layer 210 and the barrier structure 210ab refer to the previous embodiments.
The ratio of the area of the second barrier region 210b projected on the surface of the substrate 200 to the area of the first barrier region 210a projected on the surface of the substrate is 1: 8-1: 10. the ratio of the projected area of the first sub-opening 221 on the surface of the substrate 200 to the projected area of the second sub-opening 222 on the surface of the substrate 200 is 50:1 to 10:1.
the height of the barrier structure 210ab is less than the thickness of the pixel defining layer 210 outside the pixel opening. The difference between the height of the barrier structure 210ab and the thickness of the pixel defining layer 210 outside the pixel opening is 10 nm to 50 nm.
The substrate 200 has a power line therein, and the substrate 200 also has a second conductive connector 202 and a first conductive connector 201 therein, wherein the second conductive connector 202 is adapted to be connected to the second electrode layer, and the first conductive connector 201 is adapted to be connected to the first electrode layer.
Next, a first carrier layer is formed in the first sub-opening 221; forming a light emitting layer on a surface of the first carrier layer facing away from the substrate 200; a second carrier layer is formed in the pixel opening, extending from the second sub-opening 222 across the barrier structure 210ab to a surface of the light emitting layer facing away from the substrate 100.
Referring to fig. 11, a first electrode layer 231 is formed on a part of the surface of the substrate 200, and a second electrode layer 232 is formed on at least a part of the surface of the substrate 200; an additional reflective layer 233 is formed on a surface of the first blocking region 210a facing away from the substrate 200.
In this embodiment, after the pixel defining layer 210 is formed, the first electrode layer 231 and the second electrode layer 232 are formed. In other embodiments, it may also be: before forming the pixel defining layer 210, the first electrode layer 231 is formed. When the second electrode layer 232 is located only on a portion of the surface of the substrate 200, the step of forming the second electrode layer may also be performed before forming the pixel defining layer 210.
In this embodiment, specifically, the first electrode layer 231 is formed at the bottom of the first sub-opening 221, and the second electrode layer 232 is formed at the bottom wall and the side wall of the second sub-opening 222.
Referring to fig. 12, after the first electrode layer 231 is formed, a first carrier injection layer 240 is formed in the first sub-opening 221; a first carrier transport layer 250 is formed on the side of the first carrier injection layer 240 and the additional reflection layer 233 facing away from the substrate 200; a light emitting layer 260 is formed on a surface of the first carrier transport layer 250 facing away from the substrate 200.
Specifically, the first carrier injection layer 240 is formed on a side of the first electrode layer 231 facing away from the substrate 200.
The additional reflective layer 233 is located between the first carrier transport layer 250 and a surface of the first blocking region 210a facing away from the substrate 200. The first electrode layer 231 and the first carrier injection layer 240 are located at the sides of the additional reflection layer 233.
The thickness, material, and sheet resistance of the first electrode layer 231 are described with reference to the foregoing embodiments.
The material of the additional reflective layer 233 is a high reflectivity metal material such as Ag. The thickness of the additional reflective layer 233 is 100 nm to 500 nm.
The reflectivity of the additional reflective layer 233 is higher than that of the subsequent top reflective film, and specifically, the reflectivity of the additional reflective layer 233 is 80% -100%.
In a direction perpendicular to the surface of the substrate 200, the surface of the light emitting layer 260 facing away from the substrate 200 is not higher than the top surface of the barrier structure 210ab facing away from the substrate 200, and a distance between the surface of the light emitting layer 260 facing away from the substrate 200 and the top surface of the barrier structure 210ab facing away from the substrate 200 is less than 10 nanometers, such as 8 nanometers, 6 nanometers, 4 nanometers, 2 nanometers, or 0 nanometer. Specifically, the distance between the surface of the light emitting layer 260 facing away from the substrate 200 and the top surface of the second blocking region 210b facing away from the substrate 200 is less than 10 nm.
Referring to fig. 13, after forming the second electrode layer 232, forming the second carrier injection layer 270 in the second carrier opening 222, forming the light emitting layer 260, and then forming the second carrier transport layer 280 in the pixel opening on the side of the light emitting layer 260 and the second carrier injection layer 270 facing away from the substrate 200; a top reflection film 290 is formed on a surface of the second carrier transport layer 280 facing away from the substrate 200.
In this embodiment, the second electrode layer 232 is located on the bottom wall and the side wall of the first sub-opening 222, and the side wall of the second carrier injection layer 270 contacts the second electrode layer 232, and further, the entire side wall of the second carrier injection layer 270 contacts the second electrode layer 232.
The top reflection film 290 is connected to the second electrode layer 232. The top reflective film 290 covers the second carrier transport layer 280 and extends to a side surface of the pixel defining layer 210 facing away from the substrate 200. In one embodiment, the top reflective film 290 has a full-face structure, and is simple in structure and easy to manufacture.
In other embodiments, the top reflective film is not in contact with the second electrode layer.
In one embodiment, the thickness, material, and description of the top reflective film 290 with reference to the top reflective film 190 in the previous embodiments.
In this embodiment, the method further includes: a thin film encapsulation layer (not shown) is formed on a side of the top reflection film 290 facing away from the substrate 200.
The preparation method of this embodiment is the same as that of the previous embodiment, and will not be described in detail.
Correspondingly, the invention further provides a display device which comprises the display panel.
It is apparent that the above examples are given by way of illustration only and are not limiting of the embodiments. Other variations or modifications of the above teachings will be apparent to those of ordinary skill in the art. It is not necessary here nor is it exhaustive of all embodiments. While still being apparent from variations or modifications that may be made by those skilled in the art are within the scope of the invention.

Claims (32)

1. A display panel, comprising:
a substrate;
a pixel defining layer on the substrate, the pixel defining layer having a pixel opening therein, the pixel opening being separated into a first sub-opening and a second sub-opening by a barrier structure;
A light emitting layer and a first carrier layer in the first sub-opening, the first carrier layer being between the light emitting layer and the substrate; the light emitting layer is only located in the first sub-opening in the pixel opening;
and the second carrier layer is positioned in the pixel opening, spans the blocking structure from the second carrier opening and extends to the surface of the light-emitting layer, which is opposite to the side of the substrate.
2. The display panel of claim 1, wherein the first carrier layer comprises: a first carrier injection layer located in the first sub-opening; a first carrier transport layer located between the first carrier injection layer and the light emitting layer;
the second carrier layer includes: a second carrier injection layer located in the second sub-opening; and the second carrier transmission layer is positioned in the pixel opening and positioned on one side of the light-emitting layer and the second carrier injection layer, which is opposite to the substrate.
3. The display panel of claim 1, wherein the display panel comprises,
in the direction perpendicular to the surface of the substrate, the surface of the light-emitting layer, which is away from the substrate, is not higher than the top surface of the barrier structure, which is away from the substrate, and the distance between the surface of the light-emitting layer, which is away from the substrate, and the top surface of the barrier structure, which is away from the substrate, is less than 10 nanometers.
4. The display panel of claim 1, wherein the display panel comprises,
the surface of the light-emitting layer facing away from the substrate is flush with the top surface of the barrier structure facing away from the substrate.
5. The display panel of claim 2, further comprising: a first electrode layer at least positioned on the surface of the substrate at the bottom of the first carrier layer; and the second electrode layer is at least positioned on the surface of the bottom substrate of the second sub-opening.
6. The display panel of claim 5, wherein the display panel comprises,
the first electrode layer is positioned on the bottom wall and the side wall of the first sub-opening, the side wall of the first carrier injection layer is in contact with the first electrode layer, the first electrode layer is a cathode layer, the second electrode layer is an anode layer, and the first carrier injection layer is an electron injection layer; or, the second electrode layer is located at the bottom wall and the side wall of the second sub-opening, the side wall of the second carrier injection layer is in contact with the second electrode layer, the first electrode layer is an anode layer, the second electrode layer is a cathode layer, and the second carrier injection layer is an electron injection layer.
7. The display panel of claim 6, further comprising: and the top layer reflecting film is positioned on the surface of the second carrier transmission layer, which is opposite to the side of the substrate.
8. The display panel of claim 7, wherein the display panel comprises,
the top layer reflective film is connected to the cathode layer.
9. The display panel according to claim 7, wherein the top reflective film covers the second carrier transport layer and extends to a side surface of the pixel defining layer facing away from the substrate.
10. The display panel of claim 7, wherein the display panel comprises,
the top layer reflecting film is of a whole surface structure.
11. The display panel of claim 5, wherein the barrier structure comprises a first barrier region and a second barrier region arranged parallel to and contiguous with the surface of the substrate, the first barrier region having a height less than a height of the second barrier region, the second barrier region being located between the first barrier region and the second sub-opening.
12. The display panel of claim 11, wherein the display panel comprises,
the ratio of the area of the second barrier area projected on the surface of the substrate to the area of the first barrier area projected on the surface of the substrate is 1:8-1:10.
13. The display panel of claim 11, further comprising: an additional reflecting layer, which is positioned between the surface of the first blocking area, which is opposite to the side of the substrate, and the first carrier transmission layer; the first electrode layer and the first carrier injection layer are located at sides of the additional reflection layer.
14. The display panel of claim 13, wherein the display panel comprises,
in a direction perpendicular to the substrate surface, a distance between a surface of the first carrier injection layer facing away from the substrate side and a surface of the additional reflection layer facing the substrate side is greater than zero.
15. The display panel of claim 1, wherein a height of the barrier structure is less than a thickness of the pixel defining layer outside the pixel opening.
16. The display panel of claim 15, wherein the display panel comprises,
the difference between the height of the barrier structure and the thickness of the pixel defining layer outside the pixel opening is 10-50 nanometers.
17. The display panel of claim 1, wherein a ratio of a projected area of the first sub-opening on the substrate surface to a projected area of the second sub-opening on the substrate surface is 50: 1-10: 1.
18. the display panel of claim 1, wherein the display panel comprises,
the barrier structure is part of the pixel defining layer.
19. The display panel of claim 2, wherein the first carrier layer is a hole functional layer, the first carrier injection layer is a hole injection layer, the first carrier transport layer is a hole transport layer, the second carrier layer is an electron functional layer, the second carrier injection layer is an electron injection layer, and the second carrier transport layer is an electron transport layer;
Or the first carrier layer is an electron functional layer, the first carrier injection layer is an electron injection layer, the first carrier transport layer is an electron transport layer, the second carrier layer is a hole functional layer, the second carrier injection layer is a hole injection layer, and the second carrier transport layer is a hole transport layer.
20. A method for manufacturing a display panel, comprising:
providing a substrate;
forming a pixel defining layer on the substrate, the pixel defining layer having a pixel opening therein, the pixel opening being separated into a first sub-opening and a second sub-opening by a barrier structure;
forming a first carrier layer in the first sub-opening;
forming a light-emitting layer on the surface of one side of the first carrier layer, which is opposite to the substrate; the light emitting layer is only located in the first sub-opening in the pixel opening;
and forming a second carrier layer, wherein the second carrier layer is positioned in the pixel opening, spans the barrier structure from the second carrier opening and extends to the surface of the light-emitting layer, which is opposite to the side of the substrate.
21. The method of manufacturing a display panel according to claim 20, wherein the method of forming the first carrier layer comprises: forming a first carrier injection layer in the first sub-opening; forming a first carrier transport layer on a side of the first carrier injection layer facing away from the substrate;
The method for forming the second carrier layer comprises the following steps: forming a second carrier injection layer in the second sub-opening; after the light emitting layer is formed, a second carrier transport layer is formed in the pixel opening on a side of the light emitting layer and the second carrier injection layer facing away from the substrate.
22. The method of claim 20, wherein the step of forming the display panel,
the process for forming the light-emitting layer is an inkjet printing process; the process of forming the first carrier layer is an inkjet printing process, and the process of forming the second carrier layer is an inkjet printing process.
23. The method of manufacturing a display panel according to claim 21, further comprising: and forming a top layer reflecting film on the surface of one side of the second carrier transmission layer, which is opposite to the substrate.
24. The method of claim 21, wherein the step of forming the display panel comprises,
the barrier structure comprises a first barrier region and a second barrier region which are arranged parallel to the surface of the substrate and are adjacent, the height of the first barrier region is smaller than that of the second barrier region, and the second barrier region is positioned between the first barrier region and the second sub-opening.
25. The method of claim 24, wherein the step of forming the display panel comprises,
the preparation method of the display panel further comprises the following steps: before forming the first carrier transport layer, an additional reflective layer is formed on the surface of the first blocking region facing away from the substrate.
26. The method of manufacturing a display panel according to claim 21, further comprising:
forming a first electrode layer on part of the surface of the substrate before forming the pixel defining layer, wherein the first electrode layer is positioned at the bottom wall of the first sub-opening after forming the pixel defining layer, and the first electrode layer is an anode layer; before the first carrier layer is formed, a second electrode layer is formed on at least the surface of the bottom substrate of the second sub-opening, and the second electrode layer is a cathode layer.
27. The method of claim 26, wherein the step of forming the display panel,
and forming a second electrode layer on the bottom wall and the side wall of the second sub-opening, wherein the side wall of the second carrier injection layer is in contact with the second electrode layer, and the second carrier injection layer is an electron injection layer.
28. The method of claim 27, wherein the step of forming the display panel,
The step of forming a second electrode layer on the bottom wall and the side wall of the second sub-opening comprises: forming a second electrode material film on the bottom wall and the side wall of the first sub-opening, the bottom wall and the side wall of the second sub-opening, and the surface of the side of the pixel defining layer facing away from the substrate; and etching to remove the second electrode material film of the bottom wall and the side wall of the first sub-opening and the second electrode material film positioned on the surface of one side of the pixel limiting layer, which is opposite to the substrate, so as to form the second electrode layer.
29. The method of manufacturing a display panel according to claim 21, further comprising:
forming a second electrode layer on part of the surface of the substrate before forming the pixel defining layer, wherein the second electrode layer is positioned at the bottom wall of the second sub-opening after forming the pixel defining layer, and the second electrode layer is an anode layer; before the first carrier layer is formed, a first electrode layer is formed on at least the surface of the bottom substrate of the first sub-opening, and the first electrode layer is a cathode layer.
30. The method of claim 29, wherein the step of forming the display panel comprises,
and forming the first electrode layer on the bottom wall and the side wall of the first sub-opening, wherein the side wall of the first carrier injection layer is contacted with the first electrode layer, and the first carrier injection layer is an electron injection layer.
31. The method of claim 30, wherein the step of forming the display panel comprises,
the step of forming a first electrode layer on the bottom wall and the side wall of the first sub-opening comprises: forming a first electrode material film on the bottom wall and the side wall of the first sub-opening, the bottom wall and the side wall of the second sub-opening, and the surface of one side of the pixel defining layer, which is opposite to the substrate; and etching to remove the second electrode material film of the bottom wall and the side wall of the second sub-opening and the second electrode material film positioned on the surface of one side of the pixel limiting layer, which is opposite to the substrate, so as to form the first electrode layer.
32. A display device comprising the display panel of any one of claims 1 to 19.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160034807A (en) * 2014-09-22 2016-03-30 가부시키가이샤 재팬 디스프레이 Display device
CN110797468A (en) * 2019-10-15 2020-02-14 深圳市华星光电半导体显示技术有限公司 Display panel and manufacturing method thereof
CN110993678A (en) * 2019-12-20 2020-04-10 京东方科技集团股份有限公司 A display substrate, its preparation method and display device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160104161A (en) * 2015-02-25 2016-09-05 삼성디스플레이 주식회사 Light emitting display device and method of manufacturing the same
US10651412B2 (en) * 2017-06-21 2020-05-12 Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. OLED display panel to reduce light leakage and method for manufacturing the same, and display device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160034807A (en) * 2014-09-22 2016-03-30 가부시키가이샤 재팬 디스프레이 Display device
CN110797468A (en) * 2019-10-15 2020-02-14 深圳市华星光电半导体显示技术有限公司 Display panel and manufacturing method thereof
CN110993678A (en) * 2019-12-20 2020-04-10 京东方科技集团股份有限公司 A display substrate, its preparation method and display device

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