CN112582433B - Display panel and display device - Google Patents

Abstract

Embodiments of the present invention disclose a display panel and a display device, including a substrate, the substrate includes a hollow portion, a first non-display area, a display area, and a second non-display area; the first non-display area surrounds the hollow portion, and the display area Surrounding the first non-display area, the second non-display area surrounds the display area; the wiring area, the wiring area is located in the first non-display area and surrounds the hollow part; a plurality of signal lines arranged along the first direction, the plurality of signal lines include at least one a first signal line, the first signal line partially overlaps with the first non-display area; the first signal line includes a first sub-signal line and a second sub-signal line located on both sides of the hollow portion along the second direction, the first sub-signal line The line and the second sub-signal line are located in the display area; the signal lead line is located in the first non-display area, the signal lead line is connected to the first sub-signal line and the second sub-signal line of the same first signal line, and at least part of the signal lead line is located in the wiring area The side near the cutout. Therefore, the crack detection efficiency of the display panel can be effectively improved.

Description

A display panel and display device

technical field

The present invention relates to the field of display technology, and in particular, to a display panel and a display device.

Background technique

With the development of the market, consumers are becoming more and more strict with the display effect of the display screen. The full-screen technology, through ultra-narrow bezel or even bezel-less design, pursues a higher screen ratio, and the body remains unchanged. , the display area is maximized, and the display effect is more stunning. Based on the structural design of the full screen, holes need to be punched in the panel display area to install cameras, earpieces, sensors, etc.

During the manufacturing process of the display panel, the display area is punched, and cracks may occur around the holes due to thermal influence or mechanical impact. These cracks expand to the interior of the display screen after the electronic product is used for a period of time, damage the circuit, and cause the display screen to display. At the same time, impurities such as water vapor and dust from the outside are also easy to enter the display screen from the crack, which makes the reliability of the display screen low.

SUMMARY OF THE INVENTION

In view of this, the present invention provides a display panel and a display device, which can effectively improve the crack detection efficiency of the display panel and improve product quality.

In one aspect, the present invention provides a display panel, comprising:

a substrate, the substrate includes a hollow part, a first non-display area, a display area and a second non-display area; the first non-display area surrounds the hollow part, and the display area surrounds the first non-display area area, the second non-display area surrounds the display area; wiring area, the wiring area is located in the first non-display area and surrounds the hollow part; a plurality of signal lines arranged along the first direction, a plurality of The signal line includes at least one first signal line, and the first signal line partially overlaps the first non-display area; the first signal line includes first signal lines located on both sides of the hollow portion along the second direction. A sub-signal line and a second sub-signal line, the first sub-signal line and the second sub-signal line are located in the display area, and the first direction intersects the second direction; the signal lead line is located in the display area. the first non-display area, the signal leads are connected to the first sub-signal line and the second sub-signal line of the same first signal line, and at least part of the signal leads are located in the wiring area and close to the hollow side of the department.

On the other hand, the present invention also provides a display device, comprising:

The display panel according to the first aspect.

Compared with the prior art, the display panel and the display device provided by the present invention achieve the following beneficial effects: by arranging the signal leads, the first sub-signal line and the second sub-signal line of the same first signal line are connected to realize the first sub-signal line and the second sub-signal line of the same first signal line. Signal transmission of a signal line; at the same time, at least part of the signal leads are arranged on the side of the wiring area close to the hollow part, and the display condition of the sub-pixel connected to the first signal line can be used to detect whether there is a crack around the hollow part, so as to detect whether there is a crack around the hollow part. There is no need to set up a separate crack detection line, while realizing real-time detection, it is beneficial to simplify the layout of signal lines and ensure display quality.

Description of drawings

FIG. 1 is a schematic plan view of a display panel according to an embodiment of the present invention;

Fig. 2 is a kind of partial structure schematic diagram of region Q1 in Fig. 1;

Fig. 3 is another kind of partial structure schematic diagram of region Q1 in Fig. 1;

FIG. 4 is a schematic plan view of another display panel provided by an embodiment of the present invention;

Fig. 5 is another kind of partial structure schematic diagram of region Q1 in Fig. 1;

Fig. 6 is another kind of partial structure schematic diagram of region Q1 in Fig. 1;

Fig. 7 is another kind of partial structure schematic diagram of region Q1 in Fig. 1;

Fig. 8 is a kind of sectional structure schematic diagram of CC' section in Fig. 7;

Fig. 9 is another sectional structure schematic diagram of CC' section in Fig. 7;

Fig. 10 is another kind of sectional structure schematic diagram of CC' section in Fig. 7;

Fig. 11 is another kind of sectional structure schematic diagram of CC' section in Fig. 7;

Fig. 12 is another kind of sectional structure schematic diagram of CC' section in Fig. 7;

Fig. 13 is another kind of sectional structure schematic diagram of CC' section in Fig. 7;

FIG. 14 is a schematic structural diagram of a display device provided by an embodiment of the present invention.

Detailed ways

Reference herein to an "embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the present invention. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor a separate or alternative embodiment that is mutually exclusive of other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

It should be understood that the preferred embodiments described below are only used to illustrate and explain the present invention, but not to limit the present invention. And the embodiments in this application and the features in the embodiments may be combined with each other without conflict. Moreover, the shapes and sizes of the components in the accompanying drawings do not reflect the actual scale, and are only intended to illustrate the content of the present invention.

In order to better understand the above technical solutions, the technical solutions of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. It is not intended to limit the technical solutions of the present invention, and the embodiments of the present invention and the technical features in the embodiments may be combined with each other without conflict.

Please refer to FIG. 1 and FIG. 2 in combination. FIG. 1 is a schematic plan view of a display panel according to an embodiment of the present invention, and FIG. 2 is a partial structure view of a region Q1 in FIG. 1 . The present invention provides a display panel, comprising: a substrate (not shown in the figure), the substrate includes a hollow part LA, a first non-display area NA1, a display area AA and a second non-display area NA2; the first non-display area The area NA1 surrounds the hollow part LA, the display area AA surrounds the first non-display area NA1, and the second non-display area NA2 surrounds the display area AA; the wiring area NW, the wiring area NW is located in the first non-display area NA1 and surrounds the hollow part LA; A plurality of signal lines 10 arranged along the first direction a, the plurality of signal lines 10 include at least one first signal line 11, the first signal line 11 partially overlaps with the first non-display area NA1; the first signal line 11 includes The first sub-signal lines 111 and the second sub-signal lines 112 are located on both sides of the hollow portion LA in the two directions b. The first sub-signal lines 111 and the second sub-signal lines 112 are located in the display area AA. The first direction a and the second sub-signal line b cross; the signal lead Y is located in the first non-display area NA1, the signal lead Y is connected to the first sub-signal line 111 and the second sub-signal line 112 of the same first signal line 11, and at least part of the signal lead Y is located in the wiring area NW Close to the side of the cutout LA.

Specifically, the display area AA of the display panel is mainly used for displaying pictures, and the part of the display panel other than the display area AA is a non-display area, and the non-display area does not display pictures. Usually, a circuit for driving and/or detecting picture display can be set, circuit board, etc. In this embodiment, the non-display area includes a first non-display area NA1 and a second non-display area NA2, the first non-display area NA1 is arranged around the hollow portion LA, the second non-display area NA2 is arranged around the display area AA, and the display area The AA is arranged around the first non-display area NA1, so that devices such as a camera can be installed in the hollow part LA, which is beneficial to increase the screen ratio of the display panel and make it easier to realize a narrow frame design.

It should be noted that, on the basis of satisfying the above-mentioned structural relationship, the shape and quantity of the hollow portion LA can be designed according to actual use requirements. In FIG. 2 , the shape of the hollow portion LA is exemplarily set as a circle, which is only a specific example of the present application, rather than a limitation of the present application. In actual setting, optionally, the shape of the hollow portion LA is set to be a polygon (eg, a rectangle) or an ellipse. Similarly, the shape of the first non-display area NA1 may also be a polygon, a circle, an ellipse, or the like.

It should be noted that the first direction a may be the arrangement direction of the scan lines (not shown in FIG. 1 and FIG. 2 ) in the display panel, or may be the arrangement direction of the data lines (not shown in FIG. 1 and FIG. 2 ). The embodiment is not limited to this. For convenience of description, in this embodiment, only the first direction a is the row direction and the second direction b is the column direction as an example for explanation.

It can be understood that the hollow portion LA is a through hole passing through the display panel. Due to the existence of the hollow portion LA, in order to achieve uninterrupted signal transmission, the relevant wirings originally passing through the location of the hollow portion LA need to be wound around the hollow portion LA to form a wiring area NW. In order to realize a narrow frame of the display panel, the related wires are closely arranged in the wiring area NW.

The display panel is usually provided with a plurality of sub-pixels arranged along the first direction a and the second direction b. The first signal line 11 can be electrically connected to the pixel circuit of the sub-pixels in the same column, so as to provide relevant display for the display of the sub-pixels in the same column. desired signal. The first signal line 11 partially overlaps with the first non-display area NA1, and the first signal line 11 includes a first sub-signal line 111 and a second sub-signal line 112 located on both sides of the hollow portion LA along the second direction b. Due to the existence of the hollow portion LA, some line segments of the first signal line 11 need to be located in the first non-display area NA1; in other words, the signal transmission of the first signal line 11 needs to pass through the first non-display area NA1.

The signal lead Y is connected to the first sub-signal line 111 and the second sub-signal line 112 of the same first signal line 11 , that is, it is located on both sides of the hollow portion LA along the second direction and corresponds to the first sub-signal line 111 of the same column of sub-pixels It is connected with the second sub-signal line 112 through the signal Y, so as to realize signal transmission.

During the manufacturing process of the display panel, the display area is punched, and cracks may occur around the holes due to thermal influence or mechanical impact, and the cracks may affect the normal display of the display panel. In the present invention, at least part of the signal lead Y is arranged on the side of the wiring area NW close to the hollow part LA, and the part of the signal lead can be as close as possible to the cutting line of the hollow part LA, so that when a crack occurs around the hollow part LA , the signal lead Y located on the side of the wiring area NW close to the hollow part LA will be broken. If the circuit (such as the driver chip IC) that provides the relevant signal source for the first signal line 11 is located at the lower end of the hollow part LA (as shown in FIG. 1 and FIG. 1 ) 2), then the first sub-signal line 111 and the second sub-signal line 112 corresponding to the same column of sub-pixels cannot be electrically connected, so the related signals can only be loaded on the second sub-signal line 112, and cannot be loaded on the first sub-signal line 112. on the sub-signal line 111 . Therefore, the sub-pixels correspondingly connected to the second sub-signal line 112 can be lit/brighter, and the sub-pixels correspondingly connected to the first sub-signal line 111 cannot be lit/brighter. The sub-pixels corresponding to the stacked signal lines 10 can be lit/brighter; or, the sub-pixels correspondingly connected to the second sub-signal line 112 cannot be lit/brighter, and the sub-pixels corresponding to the first sub-signal line 111 It can be turned on/brighter. At this time, the sub-pixels corresponding to the signal lines 10 that do not overlap with the hollowed-out portion LA cannot be turned on/brighter. That is to say, when there is a wire crack around the hollow part LA, when the same picture needs to be displayed, the sub-pixels located on the upper side of the hollow part LA are compared with other remaining areas (such as the lower, left and right areas of the hollow part LA). ) sub-pixels will appear brighter or darker, that is, the display conditions are different and abnormal.

For example, the display panel is an organic light emitting diode (Organic Light Emitting Diode, OLED) display panel, and the signal line 10 is an initialization signal line (Vref). Compared with other areas, the pixels cannot be initialized. When displaying the first frame, the difference of the entire display panel may not be obvious. However, when the next frame needs to be displayed in a dark state, because the sub-pixels on the upper side of the hollow part LA correspond to The N1 node of the pixel circuit (for example, the pixel circuit is 7T1C, and the N1 node is connected to the gate of the driving transistor) cannot be initialized, so that the sub-pixel cannot emit darker light than the previous frame, and the sub-pixels in the remaining areas The N1 node of the circuit can be initialized normally, so that it can emit darker light than the previous frame; the final display result is that the area on the upper side of the hollow part LA is brighter than other areas. It can be understood that, if the next frame needs to be displayed in a bright state, the area on the upper side of the hollow portion LA is darker than other areas. Therefore, by observing whether the sub-pixels on the upper side of the hollowed-out portion LA display abnormality, it can be directly determined whether a crack occurs around the hollowed-out portion LA.

The display panel provided by this embodiment has at least the following technical effects:

By arranging signal leads to connect the first sub-signal line 111 and the second sub-signal line 112 of the same first signal line 11, the signal transmission of the first signal line 11 is realized; meanwhile, at least part of the signal leads Y are arranged in the wiring area NW On the side close to the hollow part LA, whether there is a crack around the hollow part LA can be detected by using the display conditions of the sub-pixels connected to the first signal line 11, so that there is no need to set up a separate crack detection line, while realizing real-time detection, It is beneficial to simplify the signal line arrangement and ensure the display quality.

In some alternative embodiments, with continued reference to FIGS. 1 and 2 , the signal line 10 is a power supply voltage signal line (PVDD). The display panel is usually provided with a plurality of power supply voltage signal lines extending along the column direction. The sub-pixel usually includes a light-emitting element and a driving circuit for driving the light-emitting element to emit light. The power supply voltage signal line can provide a power supply voltage signal for the driving circuit of the sub-pixel. , which helps to realize the display function of the OLED display panel.

The signal line 10 is a power supply voltage signal line. When a crack emerges around the hollow part LA, if the crack occurs before the screen is displayed, the sub-pixels located on the upper side of the hollow part LA can still perform initialization and data signal writing compared to other areas. However, it cannot receive the power supply voltage signal in the light-emitting stage, so it cannot be lit; and the sub-pixels in the remaining areas can still be lit normally. If the crack occurs during the image display process, when the next frame of image is displayed, the sub-pixels on the upper side of the hollow portion LA cannot receive the power supply voltage signal, and will be darker or brighter than other areas. Therefore, by observing whether the sub-pixels on the upper side of the hollowed-out portion LA display abnormality, it can be directly determined whether a crack occurs around the hollowed-out portion LA.

In some optional embodiments, the signal leads Y may correspond to the first signal lines 11 one-to-one, that is, one signal lead is connected to one first sub-signal line 111 and one second sub-signal line 112 correspondingly. Since more signal leads need to be arranged in the first non-display area at this time, the detection accuracy can be improved during crack detection.

In some optional implementations, referring to FIGS. 1-6 , FIG. 3 is another partial schematic structural diagram of the region Q1 in FIG. 1 , and FIG. 4 is a planar structural schematic diagram of another display panel provided by an embodiment of the present invention, FIG. 5 is a schematic diagram of another partial structure of the area Q1 in FIG. 1 , and FIG. 6 is a schematic diagram of another partial structure of the area Q1 in FIG. 1 . The signal lead Y is connected to the first sub-signal line 111 and the second sub-signal line 112 of the plurality of first signal lines 11 .

Specifically, in FIG. 2, one signal lead Y corresponds to two first signal lines 11, that is, one signal lead Y is connected to two first sub-signal lines 111 and two second sub-signal lines 112; FIGS. 3-6 Among them, one signal lead Y corresponds to four first signal lines 11 , that is, one signal lead Y is connected to four first sub-signal lines 111 and four second sub-signal lines 112 . By connecting one signal lead Y to the first sub-signal line 111 and the second sub-signal line 112 of the plurality of first signal lines 11 correspondingly, the first signal line 11 can be used to realize crack detection, and at the same time, the first non-display can be reduced. The number of signal leads Y in the area NA1 is adjusted, so as to realize a narrow frame, increase the screen ratio, and improve the user experience.

In some optional embodiments, referring to FIGS. 3-6 , the hollow portion LA is configured as a circular shape, which has an axis of symmetry (neither shown in the figures) parallel to the second direction b, and is bounded by the axis of symmetry, The first sub-signal lines 111 and the second sub-signal lines 112 of all the first signal lines 11 located on the left side of the symmetry axis are connected by a signal lead Y; The sub-signal line 111 and the second sub-signal line 112 are connected by one signal lead Y. In this way, taking this symmetry axis as a boundary, when a crack occurs on the left side of the hollow part LA, the sub-pixels in the upper left area of the hollow part LA cannot be displayed normally, and an abnormality occurs; when a crack occurs on the right side of the hollow part LA, the hollow part LA is The sub-pixels in the upper right area cannot be displayed normally and are abnormal. Thus, the position where the crack appears can be roughly determined. In addition, one signal lead Y is provided on the left and right sides of the hollow part LA close to the wiring area NW, which can reduce the number of signal leads Y arranged between the hollow part LA and the wiring area NW, which is beneficial to realize a narrow frame of the display panel. to increase the screen-to-body ratio. In addition, setting a small number of signal lines Y can reduce the overlapping area of the signal lines Y and the wiring area NW, avoid signal interference, improve signal stability, and improve display effect.

In some optional embodiments, referring to FIG. 4 , the second non-display area NA2 includes a first sub-non-display area NA21 and a second sub-non-display area NA22 located on both sides of the display area AA along the second direction b. The sub-non-display area NA21 is provided with a plurality of pads 30; the plurality of signal lines 10 includes a plurality of second signal lines 12, and the second signal lines 12 do not overlap with the first non-display area NA1; in the first sub-non-display area In the NA21, at least one first signal line 11 and at least one second signal line 12 are short-circuited through the first connecting line L1; in the second sub-non-display area NA22, all the first signal lines 11 are spaced from each other and are connected to any one of the first signal lines 11. The two signal lines 12 are spaced apart, and at least two of the second signal lines 12 are short-circuited through the second connecting line L2.

The display panel includes a substrate 20, the second non-display area NA2 includes a first sub-non-display area NA21 and a second sub-non-display area NA22, the first sub-non-display area NA21 is provided with a plurality of pads, and the pads can correspond to IC The first sub-non-display area NA21 is an IC binding area or an area close to the IC, and the second sub-non-display area NA22 is an area away from the IC. That is to say, the first sub-signal line 111 is located in the display area AA on the side of the hollow part LA away from the IC, and the second sub-signal line 112 is located in the display area AA on the side of the hollow part LA close to the IC.

The present embodiment will be described by taking the signal line 10 as a power supply voltage signal line as an example.

Since the power supply voltage signal line provides a power supply voltage signal for each sub-pixel in the display area AA, the power supply voltage signal line is generally set to be longer. Due to the effect of internal resistance, the power supply voltage signal may be attenuated, resulting in a voltage drop and affecting the display. The display quality of the picture; therefore, by short-circuiting all the first signal lines 11 and the second signal lines 12 through the first connecting line L1 in the first sub-non-display area NA21 (ie, the second sub-signal line 112 and the second signal line 12) The line 12 is short-circuited through the first connecting line L1 in the first sub-non-display area NA21), and at least two second signal lines 12 are short-circuited through the second connecting line L2 in the second sub-non-display area NA22, which can reduce the voltage. to improve the display quality of the display panel.

In the second sub-non-display area NA22, all the first signal lines 11 are spaced apart from each other and any second signal line 12, that is, one end of all the first sub-signal lines 111 in the second sub-non-display area NA22 They are no longer connected to each other by connecting lines, and one end of any first sub-signal line 111 in the second sub-non-display area NA22 is also not connected to the second signal line 12. In this way, when a crack occurs around the hollow portion LA, the first sub-signal line 111 is not connected to the second signal line 12. A sub-signal line 111 cannot receive the power supply voltage signal, so the sub-pixels on the upper side of the hollow portion LA display abnormally. Therefore, by observing whether the sub-pixels on the upper side of the hollowed-out portion LA display abnormality, it can be directly determined whether a crack occurs around the hollowed-out portion LA.

In the second sub-non-display area NA22, at least two second signal lines 12 are short-circuited through the second connecting line L2, which can further reduce the voltage drop and improve the display quality of the display panel.

In some optional embodiments, referring to FIGS. 5 and 6 , the signal lead Y includes a first sub-lead Y1, a second sub-lead Y2, and a first sub-winding connecting the first sub-lead Y1 and the second sub-lead Y2 Y3, the first sub-lead Y1 and the second sub-lead Y2 at least partially overlap the wiring area NW, the first sub-winding Y3 is located on the side of the wiring area NW close to the hollow part LA; the first sub-winding Y3 surrounds the hollow part LA serpentine traces.

The part where the first sub-lead Y1 and the second sub-lead Y2 at least partially overlap with the wiring area NW, that is, when the signal line Y extends from the side of the wiring area NW away from the hollow part LA to the side of the wiring area NW close to the hollow part LA , at least partially overlapping the wiring area NW.

Referring to FIG. 5 , the first sub-winding Y3 is in the left area of the hollow part LA close to the wiring area NW, and roughly presents three and a half circles of windings. The first sub-winding Y3 is in the hollow part LA close to the right side of the wiring area NW. The side area, roughly showing 3 and a half turns of winding. Referring to FIG. 6 , the first sub-winding Y3 is in the left area of the hollow part LA close to the wiring area NW, roughly showing five and a half circles of windings, and the first sub-winding Y3 is in the hollow part LA close to the right side of the wiring area NW. The side area, roughly showing 5 half-turns of winding. The present invention is only described by taking the first sub-winding Y3 of one signal lead Y as an example of three and a half turns or five and a half turns. Through the windings of multiple half-turns, the first sub-winding Y3 is serpentine. Shaped traces (curved traces or bow-shaped traces).

By serpentine routing of the first sub-winding Y3 around the hollow portion LA, that is, the first sub-winding Y3 is set as a curved portion, so that the signal lead Y can be more coiled between the wiring area NW and the hollow portion LA, thereby Cracks around the cutout LA are more easily detected.

In some optional embodiments, referring to FIG. 1 and FIG. 7 , FIG. 7 is another partial structural schematic diagram of the region Q1 in FIG. 1 .

The display panel also includes a plurality of data lines 40 arranged along the first direction a; the data lines 40 passing through the wiring area NW include a first sub-data line 41, a second sub-data line 42 and a data lead 43, the first sub-data line 41 and the second sub data line 42 are located in the display area AA, and the data lead 43 is located in the wiring area NW; A plurality of scan lines 50 arranged along the second direction; the scan lines 50 passing through the wiring area NW include a first sub-scan line 51, a second sub-scan line 52 and a scan lead 53, the first sub-scan line 51 and the second sub-scan line 53 The line 52 is located in the display area AA, and the scan line 53 is located in the wiring area NW; the first sub-scan line 51 and the second sub-scan line 52 of the same scan line 50 are connected by the corresponding scan line 53 .

Due to the existence of the hollow portion LA, the data line 40 is divided into a first sub-data line 41 and a second sub-data line 42 located in the display area AA, and a data lead 43 located in the first non-display area NA1. For example, to minimize the size of the first non-display area NA1 and the crosstalk between different signal lines 40, it is necessary to properly route the data leads 43 located in the first non-display area NA1. Similarly, the same is true for the scan lines 50, and the scan lines 53 located in the first non-display area NA1 also need to be properly wired. Specifically, as shown in FIG. 7 , at the position where the first non-display area NA1 is close to the display area AA, the wiring area NW surrounding the hollow part LA, the data leads 43 of the data lines 40 and the scan leads 53 of the scan lines 50 are arranged. All routing can be done in this area. Therefore, each area of the display panel can be fully utilized to achieve the purpose of enabling the normal installation and use of devices with large sizes on the premise of ensuring that the screen ratio of the display panel is relatively high.

In some optional embodiments, referring to FIGS. 1 and 7-11 , FIG. 8 is a schematic cross-sectional structure diagram of the CC' section in FIG. 7 , and FIG. 9 is another cross-sectional structure schematic diagram of the CC' section in FIG. 7 . . Fig. 10 is another schematic cross-sectional structure diagram of the CC' section in Fig. 7 , and Fig. 11 is another cross-sectional structure schematic diagram of the CC' cross-section in Fig. 7 .

The display panel also includes a driving circuit, including a thin film transistor 130 and a storage capacitor Cs; the storage capacitor Cs includes a first electrode plate 141 and a second electrode plate 142; the thin film transistor 130 includes a channel 131, a gate 132, a first electrode 133 and a second electrode Diode 134; along the direction away from the substrate 20, the display panel further includes an active layer 13a, a first metal layer 13b, a second metal layer 13c, a third metal layer 13d, and a fourth metal layer 13e; The layer 13b includes the gate electrode 132 of the thin film transistor 130 and the first electrode plate 141 of the storage capacitor Cs; the second metal layer 13c includes the second electrode plate 142 of the storage capacitor Cs; the third metal layer 13d includes the first electrode plate of the thin film transistor 130 133 and the second pole 134; the first sub-data line 41 and the second sub-data line 42 (not shown) are located on the third metal layer 13d; the first sub-scan line 51 and the second sub-scan line 52 (not shown) on the first metal layer 13b.

It can be understood that the display panel further includes an anode layer on the side of the driving circuit away from the substrate 20 , a light-emitting layer on the side of the anode layer away from the substrate 20 , and a cathode layer on the side of the light-emitting layer away from the substrate 20 . The anode layer, light emitting layer and cathode layer are not shown in FIGS. 8 and 9 . In addition, the display panel further includes an insulating layer between the active layer 13a and the first metal layer 13b and between adjacent metal layers.

In the embodiment of the present invention, in the display area AA, the data lines 40 and the signal lines 10 are arranged along the first direction a. Therefore, in the display area AA, the first sub-data line 41 , the second sub-data line 42 , the first sub-signal line 111 , the second sub-signal line 112 , and the first sub-data line 41 , the second sub-signal line 112 , and the first non-display area NA1 not overlapping The two signal lines 12 and the remaining data lines 40 are all disposed on the third metal layer 13d, so that they can be formed through the same preparation process, which is beneficial to simplify the preparation process of the display panel and reduce the cost. In addition, in the display area AA, the scan lines 50 are arranged along the second direction b. Therefore, in the display area AA, the first sub-scanning lines 51, the second sub-scanning lines 52, and the remaining scanning lines 50 that do not overlap with the first non-display area NA1 are disposed on the first metal layer 13b, so as to avoid the Short-circuit with the data line 40 and the signal line 10 .

In some optional embodiments, referring to FIG. 10 and FIG. 11 , the display panel further includes a first wire 121 located in the fourth metal layer 13e, the first wire 121 corresponds to the signal line 10 and is electrically connected through a via hole. Therefore, the resistance on the signal line 10 can be reduced, the power supply voltage is less likely to be significantly attenuated, the voltage drop is improved, and the OLED display panel has a more uniform display brightness.

In some optional embodiments, with reference to FIGS. 1 and 7 , and with reference to FIGS. 8 and 10 , the data leads 43 are located on the second metal layer 13c, and/or the third metal layer 13d; the scan leads 53 are located on the first metal layer 13c. The metal layer 13b; the signal lead Y is located in the fourth metal layer 13e.

It can be understood that in FIG. 8 and FIG. 9, only one data lead 43 is shown, and the data lead 43 is located in the third metal layer 13d. The first sub-signal line 111, the second sub-signal line 112, etc. are formed through the same manufacturing process, which simplifies the manufacturing process of the display panel. In some optional embodiments, the data leads may be located on the second metal layer 13c, so that the data leads may be prepared with the same layer and material and the same process as the second electrode plate 142 of the storage capacitor Cs, which simplifies the process. Of course, when the number of data leads 43 is large, part of the data leads 43 can be arranged on the second metal layer 13c, and part of the data leads 43 can be arranged on the third metal layer 13d, so that the narrow border can be achieved while reducing the number of different data leads 43 Signal interference (such as coupling) between them improves the display effect of the display panel.

Specifically, in this embodiment, by arranging the data lead 43 , the scan lead 53 and the signal lead Y on different metal film layers, short circuits between different signal lines can be avoided, and at the same time, a narrow frame of the display panel can be achieved.

In some optional embodiments, with reference to FIGS. 1 and 7 , and with reference to FIGS. 9 and 11 , the data leads 43 are located on the third metal layer 13d, and/or the fourth metal layer 13e; the scan leads 53 are located on the first metal layer 13d. Metal layer 13b; the signal lead Y is located on the second metal layer 13c.

In this embodiment, by arranging the data lead 43 , the scan lead 53 and the signal lead Y on different metal film layers, short circuits between different signal lines can be avoided, and at the same time, a narrow frame of the display panel can be realized.

In addition, the materials of the first metal layer 13b and the second metal layer 13c are generally the same, and both are molybdenum; the materials of the third metal layer 13d and the fourth metal layer 13e are generally the same, and both are titanium-aluminum-titanium. When the number of data leads 43 is large, part of the data leads 43 can be arranged on the third metal layer 13d, and part of the data leads 43 can be arranged on the fourth metal layer 13e, so as to achieve a narrow frame and reduce signal interference between different data leads 43 At the same time, the data signal is transmitted through the signal line of the same material, which is beneficial to improve the voltage drop and improve the display effect.

In some optional embodiments, referring to FIG. 1 , FIG. 7 , FIG. 12 and FIG. 13 , FIG. 12 is another schematic cross-sectional structure diagram of the CC' section in FIG. 7 , and FIG. 13 is another cross-sectional view of the CC' section in FIG. 7 . A schematic diagram of a cross-sectional structure. The display panel further includes a first encapsulation area NF, the first encapsulation area NF surrounds the hollow part LA, the wiring area NW surrounds the first encapsulation area NF; the signal lead Y is located on the side of the first encapsulation area NF away from the hollow part LA.

It can be understood that the same reference numerals represent the same or similar structures, and will not be repeated in the present invention.

It should be noted that, in order to reflect the positional relationship between the signal lead Y and the first packaging area NF. 12 and 13 are simplified, and data lines and scan lines are no longer shown.

By setting the encapsulation area, water vapor, oxygen, etc. in the environment can be prevented from entering the interior of the display panel, thereby ensuring the performance of each device inside the display panel and improving the service life of the display panel. At the same time, compared with the fact that the signal lead Y is disposed on the side of the first encapsulation area NF close to the hollow portion LA, the encapsulation effect of the display panel will be affected, and the encapsulation may even be caused to fail, resulting in poor display. Therefore, if the signal lead Y is located on the side of the first packaging area NF away from the hollow part LA, the hollow part LA can be detected according to the display condition of the sub-pixel connected to the first sub-signal line 111 when the signal lead Y is used to transmit the signal. Whether there are cracks around, ensure the packaging effect of the display panel and improve the display quality.

In some optional embodiments, referring to FIG. 1 , FIG. 7 and FIG. 12 , the display panel further includes an upper substrate 80 , and the first encapsulation area NF includes a pad metal 60 and an encapsulation glue 70 . The upper substrate 80 can be a cover plate, so as to protect the display panel, and can also be a touch panel, so that the display panel has both a touch function.

It should be noted that, in FIG. 12 , only the pad metal 60 and the signal lead Y are located on the second metal layer 13c (ie, the same layer as the second electrode plate of the storage capacitor) as an example for illustration. The pad metal 60 can be located on the first metal layer (ie, the same layer as the scan lines 50 located in the display area AA), or can be located on the third metal layer (ie, the same layer as the data lines 40 located in the display area AA) or the fourth metal layer. (ie, the same layer as the first wire located in the display area AA), those skilled in the art can set the specific film layer of the pad metal 60 according to the actual situation.

The encapsulant 70 can be frit. When encapsulating the display panel, a laser sintering method needs to be used to set the pad metal 60, and the pad metal can be used to reflect the laser light irradiated thereon, so as to improve the utilization of the laser light. Rate. At the same time, the pad metal 60 can also be patterned according to the distribution of the laser energy, such as providing openings or through holes, which are not specifically limited in the present invention.

In the embodiment of the present invention, by arranging the backing metal 60 and the encapsulating glue 70, the rigid display panel can be encapsulated, the anti-water and oxygen intrusion capability of the rigid display panel can be improved, and the lifespan and display effect of the display panel can be improved.

In some optional embodiments, referring to FIGS. 1 , 7 and 13 , the display panel further includes a thin film encapsulation layer 90 , and the first encapsulation area NF includes at least one first blocking wall 91 , and the first blocking wall 91 surrounds the hollow portion LA.

It should be noted that, in FIG. 13 , only the first encapsulation area NF includes two first retaining walls 91 as an example for description.

In an embodiment of the present invention, the thin film encapsulation layer 90 may include multiple layers of organic layers and inorganic layers alternately formed, so as to improve the resistance to water and oxygen intrusion of the flexible display panel. The first blocking wall 91 is disposed around the hollow portion LA, which can block the water and oxygen in the hollow portion LA from entering the display panel, thereby improving the service life and display effect of the display panel.

It should be noted that the technical features of the above-mentioned embodiments of the display panel provided by the present invention can be freely combined without conflict, and the present invention is not exhaustive.

An embodiment of the present invention further provides a display device. As shown in FIG. 14 , FIG. 14 is a schematic structural diagram of a display device provided by an embodiment of the present invention, and the display device includes the above-mentioned display panel. In addition, an optical device 100 is also included, which can be a camera or an earpiece. The specific structure of the display panel has been described in detail in the above embodiments, and will not be repeated here. Of course, the display device shown in FIG. 14 is only a schematic illustration, and the display device may be any electronic device with a display function, such as a mobile phone, a tablet computer, a notebook computer, an electronic paper book, or a television.

The display panel and the display device provided by the present invention achieve the following beneficial effects: by arranging signal leads to connect the first sub-signal line and the second sub-signal line of the same first signal line, the signal transmission of the first signal line is realized; Meanwhile, by arranging at least part of the signal leads on the side of the wiring area close to the hollowed-out portion, the display condition of the sub-pixel connected to the first signal line can be used to detect whether there is a crack around the hollowed-out portion, so that there is no need to set up a separate crack detection line , while realizing real-time detection, it is beneficial to simplify the arrangement of signal lines and ensure display quality.

The back display panel and the display device provided by the embodiments of the present invention have been introduced in detail above. The principles and implementations of the present invention are described in this paper using specific examples. The descriptions of the above embodiments are only used to help understand the present invention. method and its core idea; at the same time, for those skilled in the art, according to the idea of the present invention, there will be changes in the specific implementation and application scope. Invention limitations.

Claims (12)

1. A display panel, characterized in that, comprising: a substrate, the substrate includes a hollow part, a first non-display area, a display area and a second non-display area; the first non-display area surrounds the hollow part, and the display area surrounds the first non-display area area, the second non-display area surrounds the display area; a wiring area, the wiring area is located in the first non-display area and surrounds the hollow part; a plurality of signal lines arranged along a first direction, the plurality of the signal lines include a plurality of first signal lines, the first signal lines partially overlap the first non-display area; the first signal lines include a first sub-signal line and a second sub-signal line located on both sides of the hollow portion along a second direction, the first sub-signal line and the second sub-signal line are located in the display area, the first direction intersecting the second direction; a signal lead, located in the first non-display area, the signal lead is connected to the first sub-signal line and the second sub-signal line of the same first signal line, and at least part of the signal lead is located in the wiring one side of the area close to the hollow part; the signal lead is connected to the first sub-signal line and the second sub-signal line of the plurality of first signal lines; The second non-display area includes a first sub-non-display area and a second sub-non-display area located on both sides of the display area along the second direction, and the first sub-non-display area is provided with a plurality of pads ; The plurality of signal lines includes a plurality of second signal lines, and the second signal lines do not overlap with the first non-display area; In the first sub-non-display area, at least one of the first signal lines and at least one of the second signal lines are short-circuited through a first connection line; in the second sub-non-display area, all the The first signal lines are spaced apart from each other and from any one of the second signal lines, and at least two of the second signal lines are short-circuited through second connection lines. 2. The display panel according to claim 1, wherein, The signal lines are power supply voltage signal lines. 3. The display panel according to claim 1, wherein, The signal lead includes a first sub-lead, a second sub-lead, and a first sub-winding connecting the first sub-lead and the second sub-lead, the first sub-lead and the second sub-lead are both at least partially overlapping with the wiring area, the first sub-winding is located on the side of the wiring area close to the hollow part; The first sub-winding is serpentinely routed around the hollow portion. 4. The display panel according to claim 1, wherein, Also includes a plurality of data lines arranged along the first direction; The data lines passing through the wiring area include first sub-data lines, second sub-data lines and data leads, the first and second sub-data lines are located in the display area, and the data The leads are located in the wiring area; the first sub-data line and the second sub-data line of the same data line are connected through the corresponding data leads. 5. The display panel according to claim 4, further comprising: a plurality of scan lines arranged along the second direction; The scan lines passing through the wiring area include a first sub-scan line, a second sub-scan line and a scan wire, the first sub-scan line and the second sub-scan line are located in the display area, the scan line A lead line is located in the wiring area; the first sub-scan line and the second sub-scan line of the same scan line are connected through the corresponding scan lead line. 6. The display panel according to claim 5, further comprising: A drive circuit includes a thin film transistor and a storage capacitor; the storage capacitor includes a first electrode plate and a second electrode plate; the thin film transistor includes a channel, a gate, a first electrode and a second electrode; Along a direction away from the substrate, the display panel further includes an active layer, a first metal layer, a second metal layer, a third metal layer, and a fourth metal layer; wherein the first metal layer includes the The gate of the thin film transistor and the first plate of the storage capacitor; the second metal layer includes the second plate of the storage capacitor; the third metal layer includes the first electrode of the thin film transistor and the first plate of the storage capacitor; two poles; the first sub-data line and the second sub-data line are located on the third metal layer; The first sub-scan line and the second sub-scan line are located on the first metal layer. 7. The display panel according to claim 6, wherein, the data leads are located in the second metal layer, and/or the third metal layer; the scan leads are located in the first metal layer; The signal leads are located on the fourth metal layer. 8. The display panel according to claim 6, wherein, the data leads are located in the third metal layer, and/or the fourth metal layer; the scan leads are located in the first metal layer; The signal leads are located on the second metal layer. 9. The display panel according to claim 1, further comprising: a first packaging area, the first packaging area surrounds the hollow portion, and the wiring area surrounds the first packaging area; The signal lead is located on a side of the first package area away from the hollow portion. 10. The display panel according to claim 9, wherein, The first encapsulation area includes pad metal and encapsulation glue. 11. The display panel according to claim 9, wherein, The first packaging area includes at least one first blocking wall surrounding the hollow portion. 12. A display device, comprising the display panel according to any one of claims 1-11.

Images