CN112490174A - Chip device transfer method - Google Patents
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- CN112490174A CN112490174A CN202011356778.8A CN202011356778A CN112490174A CN 112490174 A CN112490174 A CN 112490174A CN 202011356778 A CN202011356778 A CN 202011356778A CN 112490174 A CN112490174 A CN 112490174A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
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- Engineering & Computer Science (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
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- Microelectronics & Electronic Packaging (AREA)
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Abstract
本申请提供一种芯片器件的转移方法，该芯片器件的转移方法包括在设有多个芯片器件的支撑衬底上形成键合层及临时衬底层，采用激光剥离、化学腐蚀或者研磨方式去除支撑衬底以将多个芯片器件转移至临时衬底层，刻蚀键合层以露出多个芯片器件的侧壁，去除键合层以使得多个芯片器件从临时衬底层脱落，通过承接载具承接多个芯片器件。通过上述方式，本申请提供的芯片器件的转移方法，更容易实现键合层的均匀分解，从而保证芯片转移过程中的掉落精度和良品率，实现芯片器件图形化有序排列并进行转移。
The present application provides a method for transferring a chip device. The method for transferring a chip device includes forming a bonding layer and a temporary substrate layer on a support substrate provided with a plurality of chip devices, and removing the support by means of laser lift-off, chemical etching or grinding. substrate to transfer the plurality of chip devices to the temporary substrate layer, etching the bonding layer to expose the sidewalls of the plurality of chip devices, removing the bonding layer to make the plurality of chip devices fall off from the temporary substrate layer, and receiving by a receiving carrier multiple chip devices. Through the above method, the chip device transfer method provided by the present application can more easily achieve uniform decomposition of the bonding layer, thereby ensuring the drop accuracy and yield during the chip transfer process, and realizing the patterned and orderly arrangement and transfer of chip devices.
Description
Technical Field
The application relates to the technical field of chip manufacturing, in particular to a chip device transfer method.
Background
The chip manufacturing process mainly comprises the steps of wafer manufacturing, wafer coating, wafer photoetching and developing, etching, ion implantation, wafer testing and packaging. In each processing process, the chips need to be arranged in order in a batch graphic mode and transferred. In the prior art, one scheme is to completely surround the chip by using glue and transfer the chip by using laser, but the completely-covered structure can tightly hold the chip, so that the chip cannot fall off well. The other scheme is that the chip is bonded with the temporary substrate through the adhesive film, and then the adhesive film is decomposed through laser, so that the chip falls off. However, the decomposition condition of the whole adhesive film is difficult to control, and when the chip is thin and light, for example, when the chip is a micro led, the uniformity of the separation between the chip and the adhesive film is not sufficient due to the uneven decomposition of the film, so that the chip may turn over and shift when falling, and the arrangement accuracy is affected.
Disclosure of Invention
The application provides a chip device transfer method, which aims to solve the technical problems that in the prior art, the consistency of chip and glue film separation is not enough, so that the chips can turn over and shift when falling, and the arrangement precision is influenced.
In order to solve the technical problem, the application adopts a technical scheme that: a chip device transfer method is provided, which includes:
forming a bonding layer and a temporary substrate layer on a supporting substrate provided with a plurality of chip devices;
removing the support substrate by laser stripping, chemical etching or grinding to transfer the plurality of chip devices to the temporary substrate layer;
etching the bonding layer to expose the side walls of the plurality of chip devices;
removing the bonding layer to cause the plurality of chip devices to fall off the temporary substrate layer;
and receiving the plurality of chip devices through the receiving carrier.
According to a specific embodiment of the present application, in the step of forming the bonding layer and the temporary substrate layer on the support substrate provided with the plurality of chip devices, a laser sacrificial layer is formed between the bonding layer and the temporary substrate layer, and the laser sacrificial layer includes ultraviolet photosensitive glue, organic amine, phenolic resin, polyimide, silicon nitride, indium tin oxide, titanium oxide, and amorphous silicon.
According to a specific embodiment of the present application, the step of removing the bonding layer to make the plurality of chip devices fall off from the temporary substrate layer further includes removing the sacrificial layer to make the plurality of chip devices fall off from the temporary substrate layer.
According to a specific embodiment of the present application, the bonding layer is a bonding material that can be decomposed by ultraviolet band laser, and includes an ultraviolet photosensitive adhesive, organic amine, phenolic resin, divinyl siloxane, polyimide, epoxy resin, hot melt adhesive, glass cement, silicon nitride, indium tin oxide, titanium oxide, and amorphous silicon, or the bonding layer is a material that is decomposed by non-ultraviolet band laser, and includes silicon oxide; the temporary substrate layer is made of rigid materials capable of transmitting ultraviolet light below 400nm, and the temporary substrate layer is made of quartz, glass or sapphire.
According to a specific embodiment of the present application, in the step of forming the bonding layer and the temporary substrate layer on the supporting substrate provided with the plurality of chip devices, the bonding layer is formed of the same material or a combination of a plurality of different materials.
According to a specific embodiment of the present application, in the step of etching the bonding layer to expose the sidewalls of the plurality of chip devices, an etching depth d satisfies that d is greater than or equal to H1 and less than or equal to H2, where H1 is a thickness of the bonding layer embedded in the sidewalls of the chip devices, and H2 is an overall thickness of the bonding layer.
According to a specific embodiment of the present application, in the step of etching the bonding layer to expose the sidewalls of the plurality of chip devices, the bonding layer is etched longitudinally in a direction perpendicular to a thickness of the bonding layer, and then the bonding layer is etched transversely in a direction perpendicular to the thickness of the bonding layer.
According to a specific embodiment of the present application, in the step of removing the bonding layer to make the plurality of chip devices fall off from the temporary substrate layer, ultraviolet light is applied in a manner of placing a mask on the temporary substrate to make the chip devices corresponding to the light-transmitting regions of the mask fall off.
According to a specific embodiment of the present application, the chip device includes a luminescent material substrate and an electrode disposed on the luminescent material substrate, a magnetic material is disposed in the electrode, and an electromagnet or a permanent magnet is disposed below the carrier.
According to an embodiment of the present application, the upper surface of the receiving carrier is provided with an adhesive layer, and the adhesive layer is a plurality of independent blocks.
The beneficial effect of this application is: the chip device transfer method is characterized in that a bonding layer and a temporary substrate layer are formed on a supporting substrate of a plurality of chip devices, the chip is grabbed in a semi-surrounding or fully-surrounding mode which enables at least one fifth of the chip devices to be embedded into the bonding layer, the high yield of the chip can be kept in the process that the supporting substrate is stripped, meanwhile, the bonding area of the bonding layer and the chip devices is reduced through etching, so that the bonding layer is more easily uniformly decomposed, the chip devices can fall after the bonding layer and small bonding parts corresponding to the chip devices are decomposed by laser, and accordingly, the falling precision and the yield of the chip devices are achieved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without inventive efforts, wherein:
fig. 1 is a schematic flow chart of a chip device transfer method provided in an embodiment of the present application;
fig. 2 is a schematic structural diagram of a chip device and a supporting substrate of a chip device transfer method provided by an embodiment of the present application;
fig. 3 is a schematic structural diagram of a bonding layer and a temporary substrate layer of a chip device transfer method provided by an embodiment of the application;
fig. 4 is a schematic diagram of an embodiment of a bonding layer of a transfer method of a chip device according to an embodiment of the present disclosure;
fig. 5 is a schematic diagram of another embodiment of a bonding layer of a transfer method of a chip device according to an embodiment of the present application;
fig. 6 is a schematic diagram of a chip device embedding depth of a chip device transfer method provided by an embodiment of the present application;
fig. 7 is a schematic diagram of a laser sacrificial layer of a chip device transfer method provided by an embodiment of the present application;
fig. 8 is a schematic diagram of a supporting substrate removal method of a chip device provided by an embodiment of the present application;
FIG. 9 is a schematic diagram illustrating a depth of an etched bonding layer of a transfer method of a chip device according to an embodiment of the present disclosure;
fig. 10 is a schematic diagram of an embodiment of an etched bonding layer of a transfer method of a chip device according to an embodiment of the present application;
fig. 11 is a schematic diagram of an embodiment of an etched bonding layer of a transfer method of a chip device according to an embodiment of the present application;
fig. 12 is a schematic diagram of an embodiment of an etched bonding layer of a transfer method of a chip device according to an embodiment of the present application;
fig. 13 is a schematic diagram of a mask plate and a receiving carrier according to a transfer method of a chip device provided in an embodiment of the present application;
fig. 14 is a schematic view of an electromagnet provided in the transfer method of the chip device according to the embodiment of the present application;
fig. 15 is a schematic diagram of an adhesive glue layer provided in the transfer method of the chip device according to the embodiment of the present application;
fig. 16 is a schematic diagram of an independent block formed by an adhesive glue layer of the chip device transfer method according to the embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the present application.
Examples, rather than all examples. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that if directional indications (such as up, down, left, right, front, and back … …) are referred to in the embodiments of the present application, the directional indications are only used to explain the relative positional relationship between the components, the movement situation, and the like in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indications are changed accordingly.
In addition, if there is a description of "first", "second", etc. in the embodiments of the present application, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present application.
Referring to fig. 1, the present application provides a method for transferring a chip device 120, which includes the following steps:
step S10 is to form a bonding layer 130 and a temporary substrate layer 150 on a support substrate 110 provided with a plurality of chip devices 120.
Specifically, referring to fig. 2 to 3, the respective independent and separate chip devices 120 having specific functions are formed by performing a semiconductor process such as photolithography, dry/wet etching, physical/chemical deposition, etc. on the wafer 100 with the supporting substrate 110. The chip device 120 may be a Micro-LED, and includes an electrode 121 and a light emitting material layer 122, wherein the electrode 121 is disposed on the light emitting material layer 122. In the manufacturing process, nickel, iron, cobalt or an alloy layer of these three metals having magnetism may be added to the electrode 121 so that the chip device 120 can be attracted by a magnet. The temporary substrate layer 150 and the face of the chip devices 120 of the wafer 100 are bonded together by the bonding layer 130.
The bonding layer 130 may be a bonding material that can be decomposed by ultraviolet band laser, and at this time, the bonding layer also serves as a sacrificial layer for laser decomposition, including but not limited to materials such as ultraviolet photosensitive glue, organic amine, phenolic resin, divinyl siloxane, polyimide, epoxy resin, hot melt adhesive, glass glue, silicon nitride, Indium Tin Oxide (ITO), titanium oxide, amorphous silicon, and the like; materials that are not decomposed by the ultraviolet band laser may also be used, including but not limited to materials such as silicon oxide. Any one of the above-mentioned materials may be disposed on the temporary substrate layer 150 and one side of the chip device 120 of the wafer 100 to form the bonding layer 130 (as shown in fig. 4), so as to form a better bonding effect. Optionally, the temporary substrate layer 150 and one side of the chip devices 120 of the wafer 100 may be respectively provided with the above-mentioned multiple different materials to form the composite bonding layer 130, so as to enhance the bonding effect. For example, any two materials are selected to be disposed on the temporary substrate layer 150 and one side of the chip device 120 of the wafer 100, respectively, so as to form a bonding layer 130 formed by combining a first bonding layer 131 and a second bonding layer 132 (as shown in fig. 5).
During the bonding process, it is necessary to ensure that at least one fifth of the sidewall of the chip device 120 is embedded into the bonding layer 130 and wrapped by the bonding layer 130, so as to ensure that the chip device 120 has sufficient adhesion, so that the chip device 120 can be completely retained on the temporary substrate 150 during the subsequent processing steps. Alternatively, as shown in fig. 2, the chip device 120 is completely embedded in the bonding layer 130, and the bonding layer 130 forms a full enclosure to adhere the chip device 120. Alternatively, as shown in fig. 6, the chip device 120 is partially embedded in the bonding layer 130, and the bonding layer 130 forms a half-enclosure manner to adhere the chip device 120, where the thickness H1 of the embedded bonding layer 130 at the sidewall of the chip device 120 is greater than or equal to H/5, where H is the height of the whole chip device 120. This semi-encapsulation ensures that sufficient adhesion is provided and that subsequent laser irradiation of the bonding layer 130 makes it relatively easier to detach the chip device 120.
The temporary substrate layer 150 is a rigid material that is capable of transmitting ultraviolet light below 400nm, and may be quartz, glass, or sapphire.
Alternatively, referring to fig. 7, when the material of the bonding layer 130 has a low laser absorption rate and cannot be decomposed smoothly after being irradiated by the laser, a laser sacrificial layer 140 may be disposed between the bonding layer 130 and the temporary substrate layer 150. The laser sacrificial layer 140 includes an ultraviolet sensitive adhesive, organic amine, phenolic resin, polyimide, silicon nitride, indium tin oxide, titanium oxide, and amorphous silicon. When laser with a specific wavelength is irradiated thereon, the laser sacrificial layer 140 may be decomposed, so that the bonding layer 130 and the temporary substrate layer 150 on both sides of the laser sacrificial layer 140 may be smoothly separated.
Step S20, removing the supporting substrate 110 by laser lift-off, chemical etching or grinding to transfer the plurality of chip devices 120 to the temporary substrate layer 150.
Specifically, referring to fig. 8, laser is irradiated from one side of the supporting substrate 110, so that the interface where the light emitting material layer 122 of the chip device 120 is bonded to the supporting substrate 110 is decomposed, thereby removing the supporting substrate 110 and exposing the light emitting material layer 122.
In some embodiments, the supporting substrate 110 of the light emitting material layer 122 of the chip device 120 is etched by the chemical solution through the chemical wet etching on one side of the supporting substrate 110, so that the supporting substrate 110 is removed to expose the light emitting material layer 122.
Alternatively, the support substrate 110 of the light emitting material layer 122 of the chip device 120 is removed by physical grinding through a grinding and polishing method on one side of the support substrate 110, so that the support substrate 110 is removed to expose the light emitting material layer 122.
Step S30, the bonding layer 130 is etched to expose sidewalls of the plurality of chip devices 120.
In this step, the bonding layer 130 and the laser sacrificial layer 140 between the chip devices 120 are partially or completely removed by selecting an embodiment that has substantially no effect on the light emitting material layer 122 and has an effect on the bonding layer 130 and the laser sacrificial layer 140, such as dry etching with a specific gas or wet etching with a specific solution, so as to expose the sidewalls of the entire chip device 120, and the etching depth d is required to satisfy H1 ≦ d ≦ H2 (as shown in fig. 9), where H1 is the thickness of the bonding layer 130 at the sidewalls of the chip device 120, and H2 is the entire thickness of the bonding layer 130. The etching method may first etch the bonding layer 130 longitudinally along the thickness direction of the bonding layer 130, and then etch the bonding layer 130 transversely along the direction perpendicular to the thickness direction of the bonding layer 130.
In some embodiments, referring to fig. 10, a dry etching process is performed to strip one side of the supporting substrate 110 from the chip device 120, and a plasma (plasma) etching process is performed. And applying 150W of downward bias in the etching process to etch the bonding layer 130 at the gap between the chip devices 120 at a vertical angle as much as possible until the temporary substrate layer 150 is completely exposed, so that the chip devices 120 are not connected with each other. Then, by changing the process gas or pressure or power, for example, turning off the lower bias, using plasma (plasma) to perform lateral etching processing, and removing part of the bonding layer 130, the area of the bonding layer 130 corresponding to the lower side of each chip device 120 is smaller than that of the chip device 120, thereby reducing the requirement for uniformity of the corresponding laser spot when the bonding layer 130 corresponding to a single chip device 120 is decomposed by laser irradiation in the subsequent step, so that the bonding layers 130 corresponding to the single chip devices 120 can be decomposed almost simultaneously, and the chip devices 120 can be ensured to fall vertically without being skewed.
In some embodiments, referring to fig. 11, one side of the supporting substrate 110 is stripped from the chip devices 120, and an etching process is performed by using plasma (plasma) to etch away the bonding layer 130 in the gaps between the chip devices 120 until the temporary substrate layer 150 is completely exposed, so that the chip devices 120 are not connected to each other.
In some embodiments, referring to fig. 12, one side of the supporting substrate 110 is stripped from the chip devices 120, and an etching process is performed by using plasma (plasma), so as to etch away the bonding layer 130 in the gaps between the chip devices 120 until all the side portions of the chip devices 120 are completely exposed, thereby making the chip devices 120 not connected to each other.
Step S40: removing the bonding layer 130 to cause the plurality of chip devices 120 to fall off the temporary substrate layer 150. Step S40 can be divided into the following embodiments:
s41, a mask 180 is placed on the temporary substrate layer 150 to determine whether the chip devices 120 in the corresponding positions fall off.
Referring to fig. 13, the mask 180 has a transparent region and an opaque region, and the chip device 120 at the corresponding transparent region can be detached and transferred by corresponding to the opaque region of the mask 180 at the position of the chip device 120 that does not need to be placed and the transparent region at the position of the chip device 120 that needs to be placed.
S42, irradiating one side of the temporary substrate layer 150 with a laser beam of ultraviolet wavelength.
By irradiating the temporary substrate layer 150 from the light-transmitting position where the mask plate 180 is placed, the bonding layer 130 or the laser sacrificial layer 140 at the corresponding position is decomposed, so that the bonding force between the chip device 120 and the temporary substrate layer 150 corresponding to the bonding layer is greatly weakened and even directly falls off from the temporary substrate layer 150.
Step S50: a plurality of chip devices 120 are received by receiving carrier 190.
In an alternative embodiment, referring to fig. 14, an electromagnet or permanent magnet 170 may be placed under the carrier 190 to generate a magnetic field. When the bonding layer 130 or the sacrificial layer 140 is irradiated by laser light to cause decomposition, the bonding force between the chip device 120 and the temporary substrate layer 150 is very weak or even already separated, and at this time, the chip device 120 can be assisted or accelerated to reach and be temporarily fixed at the corresponding position of the receiving carrier 190 by the attraction of the magnetic field generated by the electromagnet 170 to the chip device 120 (because the electrode 121 is provided with the magnetically attracted substance).
In some embodiments, referring to fig. 15, an adhesive layer 191, typically silicone, polyimide material with specific adhesive property, etc., may be disposed on a side of the receiving carrier 190 for receiving the chip devices 120, so as to help the chip devices 120 falling from the temporary substrate layer 150 to be fixed under their corresponding falling positions without displacement. Or when the chip device 120 is not completely separated from the temporary substrate layer 150, the receiving carrier 190 with the adhesive layer 191 is attached to one surface of the chip device 120 of the temporary substrate layer 150, and when the viscosity of the adhesive layer 191 is greater than the bonding force between the bonding layer 130 and the chip device 120 after being irradiated by laser, the chip device 120 can be bonded from the temporary substrate layer 150, and the original arrangement accuracy is kept unchanged. Considering that the subsequent chip devices 120 are placed on the carrier 190, a thermocompression bonding process may be performed together, and in this process, due to the influence of temperature, the thermal expansion coefficients of the adhesive glue layer 191 and the bonding target substrate thereon may be different, thereby causing variation in the chip device arrangement accuracy on the adhesive glue layer 191. To solve this problem, as shown in fig. 16, after the chip devices 120 are arranged on the adhesive layer 191, the adhesive layer 191 may be divided into independent blocks by, but not limited to, a laser, and the width of the scribe 192 therebetween is between 0.1um and 30 um. The size of the independent block is not particularly limited, but the expansion mismatch degree of the independent block when the independent block bears the temperature is related to the size of the block, and the smaller the size of the independent block is, the smaller the influence of the corresponding expansion mismatch degree is, namely, the higher the precision is; conversely, the higher the expansion mismatch, i.e., the worse the accuracy. Generally, the size of the individual blocks is preferably not more than 1cm by 1 cm. Or wet or dry etching is used to remove the adhesive glue layer 191 between the chip devices 120, so that each chip device 120 is independent of each other and is located on the adhesive glue layer 191 which is not connected to each other.
In summary, as will be understood by those skilled in the art, in the chip device 120 transfer method provided in the present application, the bonding layer 130 and the temporary substrate layer 150 are formed on the support substrate 110 of the plurality of chip devices 120, and the chip is gripped in such a way that at least one fifth of the chip devices 120 is embedded into the half-surrounding or full-surrounding manner of the bonding layer 130, so that the chip can maintain a high yield of the chip in the process of peeling the support substrate 110, and the bonding area between the bonding layer 130 and the chip device 120 is reduced by etching, so that the uniform decomposition of the bonding layer 130 is more easily achieved, and the chip device 120 can be dropped after the bonding layer 130 and the small bonding portion corresponding to the chip device 120 are decomposed by laser, thereby achieving the drop accuracy and the yield of the chip device 120 transfer.
The above embodiments are merely examples and are not intended to limit the scope of the present disclosure, and all modifications, equivalents, and flow charts using the contents of the specification and drawings of the present disclosure, which are directly or indirectly applied to other related technical fields, are included in the scope of the present disclosure.
Claims (10)
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| CN114497292A (en) * | 2021-12-24 | 2022-05-13 | 华灿光电（浙江）有限公司 | Three-primary-color light emitting diode chip and preparation method thereof |
| CN115763650A (en) * | 2022-11-30 | 2023-03-07 | 惠科股份有限公司 | Display panel and manufacturing method thereof |
| CN117317079A (en) * | 2023-11-29 | 2023-12-29 | 昆山麦沄显示技术有限公司 | Preparation technology of chip mass transfer arrangement |
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