CN112486856A - Display scanning control method and device, storage medium and control equipment - Google Patents
Display scanning control method and device, storage medium and control equipment Download PDFInfo
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- CN112486856A CN112486856A CN202011369349.4A CN202011369349A CN112486856A CN 112486856 A CN112486856 A CN 112486856A CN 202011369349 A CN202011369349 A CN 202011369349A CN 112486856 A CN112486856 A CN 112486856A
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- 238000000034 method Methods 0.000 title claims abstract description 42
- 238000004590 computer program Methods 0.000 claims description 19
- 238000010586 diagram Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 230000001360 synchronised effect Effects 0.000 description 4
- 230000006870 function Effects 0.000 description 2
- 230000002035 prolonged effect Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006386 memory function Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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- 230000003287 optical effect Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
- G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0646—Configuration or reconfiguration
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Abstract
The invention provides a display scanning control method, a display scanning control device, a storage medium and a control device, wherein the method comprises the following steps: configuring a display scanning period to enable the display scanning period to be larger than or equal to erasing and writing time required by the chip to erase and write the Flash storage area; when the timing of the display scanning period is finished, acquiring the identification state of an erasing flag bit, wherein the erasing flag bit is used for identifying whether erasing Flash operation is required in the next display scanning period; judging whether Flash erasing operation is needed or not according to the identification state of the flag bit; and if the flag state of the flag bit is Flash erasing operation, synchronously performing Flash erasing operation during display scanning updating. According to the invention, on the premise of ensuring that the display scanning period is greater than or equal to the erasing and writing time required by the chip for erasing and writing the Flash storage area, the operation of erasing and writing the Flash storage area by the chip is synchronously performed when the display scanning is updated, so that the phenomenon of display jitter and Flash caused by the influence of the chip on the display scanning period when the Flash storage area is erased and written is avoided, and the user experience is improved.
Description
Technical Field
The present invention relates to the field of display control technologies, and in particular, to a display scan control method, an apparatus, a storage medium, and a control device.
Background
When the data storage is carried out by utilizing the specific Flash storage area of the single chip microcomputer, the time for erasing and writing the Flash storage area of the chip is long, and other functional modules of the chip cannot normally operate in the period of time, so that the display effect is influenced when the display scanning mode is adopted for controlling and displaying.
Disclosure of Invention
The invention provides a display scanning control method, a display scanning control device, a storage medium and a control device, and solves the problem that when a display scanning mode is adopted for display scanning control, the display scanning period is prolonged due to the fact that a Flash storage area is erased and written by a chip for a long time, and further the display effect is affected.
In one aspect of the present invention, a display scan control method is provided, the method including:
configuring a display scanning period to enable the display scanning period to be larger than or equal to erasing and writing time required by the chip to erase and write the Flash storage area;
when the timing of the display scanning period is finished, acquiring the identification state of an erasing flag bit, wherein the erasing flag bit is used for identifying whether the next display scanning period needs to be subjected to the Flash erasing operation;
judging whether Flash erasing operation is needed according to the identification state of the flag bit;
and if the identification state of the flag bit is Flash erasing operation, synchronously performing Flash erasing operation during display scanning updating.
Optionally, the method further comprises:
judging whether the current chip needs to be erased or written;
and if the current chip needs to carry out Flash erasing operation, configuring the identification state of the erasing flag bit into Flash erasing operation.
Optionally, the method further comprises:
and setting the erasing time required by the chip to erase the Flash storage area according to the maximum erasing time corresponding to the chip.
Optionally, the method further comprises:
and if the identification state of the flag bit is that Flash erasing operation is not needed, directly performing display scanning updating.
In another aspect of the present invention, there is provided a display scan control apparatus, including:
the first configuration unit is used for configuring a display scanning period so that the display scanning period is larger than or equal to erasing time required by the chip for erasing the Flash storage area;
the device comprises an acquisition unit, a processing unit and a processing unit, wherein the acquisition unit is used for acquiring the identification state of an erasing flag bit when the timing of a display scanning cycle is finished, and the erasing flag bit is used for identifying whether erasing Flash operation is needed in the next display scanning cycle or not;
the first judging unit is used for judging whether Flash erasing operation is needed or not according to the identification state of the flag bit;
and the processing unit is used for synchronously performing Flash erasing operation when the display scanning updating is performed when the judgment result of the first judgment unit is that the flag bit identification state needs to be subjected to Flash erasing operation.
Optionally, the apparatus further comprises:
the second judging unit is used for judging whether the current chip needs to carry out Flash erasing operation;
and the second configuration unit is used for configuring the identification state of the erasing flag bit into Flash operation needing erasing when the judgment result of the second judgment unit is that the current chip needs to be subjected to the Flash operation.
Optionally, the first configuration unit is further configured to set an erasing time required for the chip to erase the Flash storage area according to a maximum erasing time corresponding to the chip.
Optionally, the processing unit is further configured to directly perform display scanning update when the determination result of the first determining unit indicates that the flag bit is in the flag state and Flash erasing operation is not required.
Furthermore, the invention also provides a computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of the method as described above.
Furthermore, the present invention also provides a control device comprising a memory, a processor and a computer program stored on the memory and running on the processor, the processor implementing the steps of the method as described above when executing the computer program.
According to the display scanning control method, the display scanning control device, the storage medium and the display scanning control equipment provided by the embodiment of the invention, when the display scanning mode is adopted for display control, on the premise that the condition that T is more than or equal to T between the display scanning period T and the time T required by the chip for erasing the Flash storage area is ensured, the operation of erasing the Flash storage area by the chip is carried out while the display scanning is updated, so that the display scanning is updated and the Flash erasing operation are synchronous, the display scanning is not updated in the time period of erasing the Flash storage area by the chip, the phenomenon of jittering Flash is avoided, and the user experience is improved.
The foregoing description is only an overview of the technical solutions of the present invention, and the embodiments of the present invention are described below in order to make the technical means of the present invention more clearly understood and to make the above and other objects, features, and advantages of the present invention more clearly understandable.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:
FIG. 1 is a timing diagram illustrating Flash erasing operation is not performed when a display scanning mode is used for display control;
FIG. 2 is a timing diagram illustrating asynchronous operations of display scan update and Flash erase/write operations when a display scan mode is used for display control;
fig. 3 is a schematic flowchart of a display scan control method according to an embodiment of the present invention;
fig. 4 is a flowchart illustrating a display scan control method according to another embodiment of the present invention;
FIG. 5 is a timing diagram illustrating synchronization between display scan update and Flash erase operations when a display scan control method is used for display control according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a display scan control apparatus according to an embodiment of the present invention.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
In practical application, when the display is controlled by adopting a display scanning mode, and when the chip does not erase or write the Flash storage area, the display scanning performs display updating at a certain period, as shown in fig. 1, the display brightness is uniform at this time, and the display effect is free from abnormal conditions: however, when the chip erases the Flash storage area, because the time for erasing the Flash storage area by the chip is long and the display scan cannot be updated in the time, the display scan cannot be updated in the time for erasing the Flash storage area by the chip, and the corresponding display scan period is long, as shown in fig. 2, at this time, the display brightness is increased or decreased, after the Flash erasing is finished, the display scan period is normal, the display brightness is recovered, and the display effect appears as a flicker phenomenon when the Flash erasing is finished.
Therefore, the invention provides a display scanning control, which is used for controlling the synchronous operation of the display scanning updating and the Flash erasing operation so as to ensure that the display scanning is not updated in the period of time when the chip erases the Flash storage area and avoid the phenomenon of the display dithering.
Fig. 3 schematically shows a flowchart of a display scan control method according to an embodiment of the present invention. Referring to fig. 3, the display scan control method provided in the embodiment of the present invention specifically includes steps S11 to S14, as follows:
s11, configuring the display scanning period to make the display scanning period larger than or equal to the erasing time of the chip erasing the Flash memory area.
And S12, when the display scanning period is timed to be finished, acquiring the identification state of an erasing flag bit, wherein the erasing flag bit is used for identifying whether erasing Flash operation is needed in the next display scanning period.
Specifically, the erasing time required for erasing the Flash storage area by the chip can be set according to the maximum erasing time corresponding to the chip.
In this embodiment, the display scan cycle is configured in advance, so that the display scan cycle is greater than or equal to the erasing time required for erasing the Flash storage area of the chip, where the erasing time may be based on the maximum erasing time given by the chip data manual, and the display scan cycle meets the condition of being greater than or equal to the maximum erasing time.
S13, judging whether Flash erasing operation is needed according to the identification state of the flag bit, and executing the step S14 if the identification state of the flag bit is that the Flash erasing operation is needed;
and S14, synchronously performing Flash erasing operation during the display scanning updating.
In the embodiment of the invention, when the chip erases and writes the Flash operation, other modules stop running, and the current state is maintained. In the erasing process, because the erasing time is shorter than the display scanning period, the current display state is maintained in the erasing process, and the display scanning updating is not carried out until the timing of the display scanning period is finished, so that the operation of erasing the Flash storage area of the chip can not influence the display effect.
As shown in fig. 4, in another embodiment of the present invention, if the flag bit is marked as being in a state that Flash erasing operation is not required, step S15;
and S15, directly performing display scanning updating.
When the display scanning method is adopted for display control, if the control system has a memory function of erasing the Flash storage area, the setting of the display scanning period needs to meet a certain condition, and the condition that T is more than or equal to T is met between the display scanning period T and the time T required by the chip to erase the Flash storage area is ensured, when the time T required for erasing and writing the Flash memory area of the chip is 1.5T, the display scanning period can be prolonged from T to 2T, the operation of erasing the Flash storage area of the chip is carried out while the display scanning updating is carried out, so that the display scanning updating and the erasing Flash operation are synchronous, so as to ensure that the display scanning is not updated in the period of erasing the Flash storage area of the chip, the operation of erasing the Flash storage area of the chip is put in a display scanning period, as shown in fig. 5, the influence on the display scanning period when the chip erases the Flash memory area is avoided.
According to the display scanning control method provided by the embodiment of the invention, when the display scanning mode is adopted for display control, on the premise that the condition that T is more than or equal to T between the display scanning period T and the time T required by the chip for erasing the Flash storage area is ensured, the operation of erasing the Flash storage area by the chip is carried out while the display scanning is updated, so that the display scanning is not updated in the period of erasing the Flash storage area by the chip, the phenomenon of jittering Flash is avoided, and the user experience is improved.
Furthermore, in the display scanning control method provided by the embodiment of the invention, whether the current chip needs to be erased or written in real time needs to be judged in the display scanning control process; and if the current chip needs to carry out Flash erasing operation, configuring the identification state of the erasing flag bit into Flash erasing operation.
In the embodiment of the invention, the display scanning updating and the Flash memory area erasing are ensured to be synchronous through the following implementation mode. Specifically, whether the current chip needs to be subjected to Flash erasing operation or not is judged in real time, when the Flash erasing operation needs to be carried out, the Flash erasing operation is not carried out immediately, but the flag position 1 of the Flash erasing operation needs to be carried out in a program to indicate that the Flash erasing operation needs to be carried out, when the display scanning updating needs to be carried out after the display scanning period is timed out, whether the flag position of the Flash erasing operation needs to be carried out is judged to be 1, if so, the Flash erasing operation is carried out while the display scanning updating is carried out, otherwise, only the display scanning updating is carried out.
For simplicity of explanation, the method embodiments are described as a series of acts or combinations, but those skilled in the art will appreciate that the embodiments are not limited by the order of acts described, as some steps may occur in other orders or concurrently with other steps in accordance with the embodiments of the invention. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred and that no particular act is required to implement the invention.
Fig. 6 schematically shows a structural diagram of a display scan control apparatus according to an embodiment of the present invention. Referring to fig. 6, the display scan control apparatus according to the embodiment of the present invention specifically includes a first configuration unit 601, an obtaining unit 602, a first determining unit 603, and a processing unit 604, where:
a first configuration unit 601, configured to configure a display scan cycle, so that the display scan cycle is greater than or equal to the erasing time required by the chip to erase the Flash storage area;
an obtaining unit 602, configured to obtain an identifier status of an erasure flag bit when the display scanning cycle is timed out, where the erasure flag bit is used to identify whether an erasure Flash operation needs to be performed in a next display scanning cycle;
a first judging unit 603, configured to judge whether Flash erasing operation needs to be performed according to the identifier state of the flag bit;
a processing unit 604, configured to synchronously perform an erasing Flash operation when performing display scanning update when the determination result of the first determining unit 603 is that the flag bit identifier state is that the erasing Flash operation needs to be performed.
In an embodiment of the invention, the apparatus further comprises a second determining unit and a second configuring unit, not shown in the drawings, wherein:
the second judging unit is used for judging whether the current chip needs to carry out Flash erasing operation;
and the second configuration unit is used for configuring the identification state of the erasing flag bit into Flash operation needing erasing when the judgment result of the second judgment unit is that the current chip needs to be subjected to the Flash operation.
In this embodiment of the present invention, the first configuration unit 601 is further configured to set an erasing time required for the chip to erase the Flash storage area according to a maximum erasing time corresponding to the chip.
In this embodiment of the present invention, the processing unit 604 is further configured to directly perform display scanning and updating when the determination result of the first determining unit 603 is that the flag bit flag state does not need to be subjected to Flash erasing operation.
For the device embodiment, since it is basically similar to the method embodiment, the description is simple, and for the relevant points, refer to the partial description of the method embodiment.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
According to the display scanning control method and device provided by the embodiment of the invention, when the display scanning mode is adopted for display control, on the premise that the condition that T is more than or equal to T between the display scanning period T and the time T required by the chip for erasing the Flash storage area is ensured, the operation of erasing the Flash storage area by the chip is carried out while the display scanning is updated, so that the display scanning is not updated in the time period of erasing the Flash storage area by the chip, the phenomenon of flickering and flashing of the display is avoided, and the user experience is improved.
Furthermore, an embodiment of the present invention also provides a computer-readable storage medium, on which a computer program is stored, which when executed by a processor implements the steps of the method as described above.
In this embodiment, if the module/unit integrated with the display scanning control method is implemented in the form of a software functional unit and sold or used as an independent product, it may be stored in a computer readable storage medium. Based on such understanding, all or part of the flow of the method according to the embodiments of the present invention may also be implemented by a computer program, which may be stored in a computer-readable storage medium, and when the computer program is executed by a processor, the steps of the method embodiments may be implemented. Wherein the computer program comprises computer program code, which may be in the form of source code, object code, an executable file or some intermediate form, etc. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, usb disk, removable hard disk, magnetic disk, optical disk, computer Memory, Read-Only Memory (ROM), Random Access Memory (RAM), electrical carrier wave signals, telecommunications signals, software distribution medium, and the like. It should be noted that the computer readable medium may contain content that is subject to appropriate increase or decrease as required by legislation and patent practice in jurisdictions, for example, in some jurisdictions, computer readable media does not include electrical carrier signals and telecommunications signals as is required by legislation and patent practice.
The control device provided by the embodiment of the present invention includes a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor executes the computer program to implement the steps in the above-mentioned display scan control method embodiments, such as S11 to S14 shown in fig. 3. Alternatively, the processor implements the functions of the modules/units in the display scan control device embodiments when executing the computer program, for example, the first configuration unit 601, the obtaining unit 602, the first judging unit 603, and the processing unit 604 shown in fig. 6.
Illustratively, the computer program may be partitioned into one or more modules/units that are stored in the memory and executed by the processor to implement the invention. The one or more modules/units may be a series of computer program instruction segments capable of performing specific functions, which are used to describe the execution process of the computer program in the display scan control apparatus. For example, the computer program may be divided into a first configuration unit 601, an acquisition unit 602, a first judgment unit 603, and a processing unit 604.
Those skilled in the art will appreciate that while some embodiments herein include some features included in other embodiments, rather than others, combinations of features of different embodiments are meant to be within the scope of the invention and form different embodiments. For example, any of the embodiments claimed herein may be used in any combination.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (10)
1. A display scan control method, the method comprising:
configuring a display scanning period to enable the display scanning period to be larger than or equal to erasing and writing time required by the chip to erase and write the Flash storage area;
when the timing of the display scanning period is finished, acquiring the identification state of an erasing flag bit, wherein the erasing flag bit is used for identifying whether the next display scanning period needs to be subjected to the Flash erasing operation;
judging whether Flash erasing operation is needed according to the identification state of the flag bit;
and if the identification state of the flag bit is Flash erasing operation, synchronously performing Flash erasing operation during display scanning updating.
2. The method of claim 1, further comprising:
judging whether the current chip needs to be erased or written;
and if the current chip needs to carry out Flash erasing operation, configuring the identification state of the erasing flag bit into Flash erasing operation.
3. The method of claim 1, further comprising:
and setting the erasing time required by the chip to erase the Flash storage area according to the maximum erasing time corresponding to the chip.
4. The method of claim 3, further comprising:
and if the identification state of the flag bit is that Flash erasing operation is not needed, directly performing display scanning updating.
5. A display scan control apparatus, characterized in that the apparatus comprises:
the first configuration unit is used for configuring a display scanning period so that the display scanning period is larger than or equal to erasing time required by the chip for erasing the Flash storage area;
the device comprises an acquisition unit, a processing unit and a processing unit, wherein the acquisition unit is used for acquiring the identification state of an erasing flag bit when the timing of a display scanning cycle is finished, and the erasing flag bit is used for identifying whether erasing Flash operation is needed in the next display scanning cycle or not;
the first judging unit is used for judging whether Flash erasing operation is needed or not according to the identification state of the flag bit;
and the processing unit is used for synchronously performing Flash erasing operation when the display scanning updating is performed when the judgment result of the first judgment unit is that the flag bit identification state needs to be subjected to Flash erasing operation.
6. The apparatus of claim 5, further comprising:
the second judging unit is used for judging whether the current chip needs to carry out Flash erasing operation;
and the second configuration unit is used for configuring the identification state of the erasing flag bit into Flash operation needing erasing when the judgment result of the second judgment unit is that the current chip needs to be subjected to the Flash operation.
7. The apparatus of claim 5, wherein the first configuration unit is further configured to set an erase/write time required for the chip to erase/write the Flash storage area according to a maximum erase/write time corresponding to the chip.
8. The apparatus according to claim 5, wherein the processing unit is further configured to directly perform a display scan update when the determination result of the first determining unit is that the flag bit is identified as being in a status that no Flash operation is required.
9. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 4.
10. A control device comprising a memory, a processor and a computer program stored on the memory and running on the processor, characterized in that the steps of the method according to any of claims 1-4 are implemented when the computer program is executed by the processor.
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Application publication date: 20210312 |