CN112467971B

CN112467971B - Slow starting circuit

Info

Publication number: CN112467971B
Application number: CN202011344112.0A
Authority: CN
Inventors: 霍文超; 李飞; 姚欣
Original assignee: Henan Jiachen Intelligent Control Co Ltd
Current assignee: Henan Jiachen Intelligent Control Co Ltd
Priority date: 2020-11-25
Filing date: 2020-11-25
Publication date: 2022-04-19
Anticipated expiration: 2040-11-25
Also published as: CN112467971A

Abstract

The invention discloses a slow starting circuit which is applied to various power supplies and hot plug application scenes. The circuit comprises a capacitor CE1, a bypass switch MOS tube Q2 and a bypass switch control circuit; the bypass switch control circuit is used for controlling the bypass switch Q2 to be closed to reduce surge current when the voltage difference between the voltage at the two ends of the capacitor CE1 and the input voltage Vin is reduced to a certain threshold value. The slow starting circuit provided by the invention has the advantages of simple structure, few components and low manufacturing cost.

Description

Slow starting circuit

Technical Field

The invention relates to the field of circuit protection in the power-on starting/plugging process of electronic equipment, in particular to a slow starting circuit for preventing an internal circuit of the electronic equipment from being damaged by surge during power-on starting/plugging.

Background

When a circuit system comprising a large-capacity energy storage capacitor is powered on or plugged in, the system can generate a large surge current, and two methods are generally used for solving the problem.

The first method is to concatenate NTC resistors (negative temperature coefficient resistors) in the device power supply branch. The resistance is large in cold state, the current flowing in the access circuit is small, the resistance can generate heat after the current flows through the NTC resistance for a certain time, the resistance value is reduced and the current is increased after the temperature is increased, and the electronic equipment is started only when the current is increased to a certain degree.

The second method is to add a MOS transistor slow start circuit in the power supply branch of the device to realize the slow start and fast discharge during power failure on the device. For example, a soft start circuit for a low input voltage circuit is proposed in patent document with application number CN201820885872 and invention name "a method for manufacturing a circuit for realizing slow power-on and fast power-off discharging based on a MOS transistor". As shown in FIG. 1, when the circuit is powered on, a signal of a controller is input through Vin-EN, the voltage stabilizer U1 circuit is powered on in advance to output 3.3V voltage, and Vout outputs 3.3V voltage. The resistor R6 and the capacitor C6 form an RC delay circuit, after the delay is completed, the MOS transistor Q2 is conducted to enable the Q1 to be conducted, the Q3 is closed, the output Vout rises to 3.8V, when the power is cut off, the U2 stops working, the Q1 is quickly cut off under the action of the D1, the Q2 is cut off, and the Q3 is conducted to discharge.

The first method is a slow start method generally adopted in a power supply, but when the method is adopted, the NTC loses the surge suppression capability after the temperature rises, and the effect of suppressing the surge can be realized again after the temperature of the NTC is reduced. The second method is relatively complex in circuit, relatively many in related devices and relatively high in cost. And because need carry out the precharge to the electric capacity when delaying to start, but when the electric capacity value is great, slow start time can lengthen greatly, lead to the start delay time to lengthen.

Disclosure of Invention

The invention provides a low-cost slow starting circuit with a simple structure and few components, which is applied to the power-on starting/plugging process of electronic equipment, inhibits the generated surge current and avoids damaging the electronic equipment.

The slow starting circuit provided by the invention is specifically realized as follows:

a slow starting circuit comprises a capacitor CE1, a bypass switch MOS tube Q2 and a bypass switch control circuit; the bypass switch control circuit is used for controlling the bypass switch Q2 to be closed to reduce surge current when the voltage difference between the voltage at two ends of the capacitor CE1 and the input voltage Vin is reduced to a certain threshold value, and controlling the MOS transistor Q2 to be rapidly opened in the initial power-down period of the input voltage Vin.

Furthermore, the slow starting circuit also comprises resistors R1-R6, a voltage detector U1, a triode Q1 and a voltage regulator tube ZD 1; the capacitor CE1 is connected in parallel between the positive output terminal Vout + and the negative output terminal Vout-of the slow start circuit. One end of the resistor R6 is connected with the negative input end vin-and the source electrode of the MOS tube Q2, and the other end is connected with the negative output end Vout-and the drain electrode of the MOS tube Q2. The bypass switch control circuit consists of resistors R1-R5, a voltage detector U1, a triode Q1 and a voltage regulator tube; the resistor R4 and the resistor R5 are connected in series and then connected in parallel between a source electrode and a drain electrode of the MOS tube Q2, one end of the resistor R4 is connected with the source electrode of the MOS tube Q2, the other end of the resistor R4 is connected with a base electrode of the triode Q1, a collector electrode of the resistor Q1 is connected with a positive output end Vout + of equipment through the resistor R3, an emitter of the resistor Q3583 is connected with the negative input end vin-, an anode of the voltage regulator tube ZD1 and a cathode of the voltage regulator tube ZD1 are connected with a grid electrode of the MOS tube Q2; the resistors R1 and R2 are connected in series and then connected in parallel between a positive input end Vin + and a negative input end Vin-of the slow starting circuit, the positive input end Vin + and the positive output end Vout + are the same terminal, the connection end of the resistors R1 and R2 is connected with a voltage detection end VDD of a voltage detector U1, the ground end of the voltage detector U1 is connected with the negative input end Vin-, the output end VOUT of the voltage detector U1 is connected with the collector of the triode Q1 and the grid of the MOS transistor Q2, and when the voltage of the voltage detection end VDD is lower than a preset threshold value, the output end VOUT of the voltage detector U1 outputs a low level to turn off the MOS transistor Q2.

Drawings

Fig. 1 is a schematic circuit diagram of a slow start circuit of a MOS transistor in the prior art;

fig. 2 is a schematic circuit diagram of a slow start circuit according to the present invention.

Detailed Description

In order to make the technical problems, technical solutions and advantages solved by the present invention more apparent, the present invention is further described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

The slow start circuit provided by the invention is shown in fig. 2. This slow start circuit includes: the circuit comprises a capacitor CE1, a bypass switch MOS tube Q2, resistors R1-R6, a voltage detector U1, a triode Q1 and a voltage regulator ZD 1. The slow starting circuit comprises a positive input Vin + connected with a power supply, a negative input Vin-, and a positive output Vout + and a negative output Vout-connected with an electronic device. The capacitor CE1 is connected in parallel between the positive output terminal Vout + and the negative output terminal Vout-. One end of the resistor R6 is connected with a negative input end vin-of the slow starting circuit and the source electrode of the MOS tube Q2, and the other end is connected with a negative output end Vout-and the drain electrode of the MOS tube Q2. The resistors R1-R5, the voltage detector U1, the triode Q1 and the voltage regulator ZD1 form a bypass switch control circuit. The resistors R4 and R5 are connected in series and then are connected between the source and the drain of the MOS transistor Q2, one end of the resistor R4 is connected with the source of the MOS transistor Q2, and the other end of the resistor R4 is connected with the base of the triode Q1; the collector of the triode Q1 is connected with the positive output end Vout + of the device through a resistor R3, the emitter of the triode Q1 is connected with the negative input end vin-and the anode of a voltage regulator tube ZD1, and the cathode of the voltage regulator tube ZD1 is connected with the grid of the MOS tube Q2. The resistors R1 and R2 are connected in series and then connected between the positive input end Vin + and the negative input end Vin-, the positive input end Vin + and the positive output end Vout + are the same terminal, the connection point of the resistors R1 and R2 is connected with the voltage detection end VDD of the voltage detector U1, the ground end of the voltage detector U1 is connected with the negative input end Vin-, the output end VOUT of the voltage detector U1 is connected with the collector of the triode Q1 and the grid of the MOS transistor Q2.

When the circuit for slow start provided by the invention is powered on and started or plugged in and out, current flows from R6, and R6 is a power resistor. The voltage at two ends of the resistor R6 is divided by the resistors R4 and R5, the related divided voltage is introduced into the base electrode of the triode Q1, when the divided voltage is larger than 0.7V, the triode Q1 is conducted, the emitter of the triode Q1 is pulled to the ground, and the MOS transistor Q2 is cut off. Then the capacitor CE1 is charged and charged gradually, the current flowing through the resistor R6 is gradually reduced, the divided voltage on the resistor R6 is gradually reduced, when the divided voltage on the resistor R4 is less than 0.7V, the triode Q1 is turned off, the emitter voltage is stabilized through the voltage stabilizing tube ZD1, and at the moment, the MOS transistor Q2 is turned on. The detection end VDD of the voltage detector U1 detects the divided voltage on the resistor R2, and when the divided voltage on the resistor R2 is lower than a preset voltage value, the G pole of the MOS transistor Q2 is pulled to the ground, so that quick leakage is realized.

Compared with the prior art, the slow starting circuit provided by the invention has the advantages of simple structure, less used components and low manufacturing cost.

Claims

1. A slow starting circuit is characterized by comprising a capacitor CE1, a bypass switch MOS tube Q2 and a bypass switch control circuit; the bypass switch control circuit is used for controlling the bypass switch MOS tube Q2 to be closed to reduce surge current during switch attraction when the voltage difference between the voltage at two ends of the capacitor CE1 and the input voltage Vin is reduced to a certain threshold value, and controlling the MOS tube Q2 to be quickly opened in the initial power-down period of the input voltage Vin;

the slow starting circuit further comprises resistors R1-R6, a voltage detector U1, a triode Q1 and a voltage regulator tube ZD 1; the capacitor CE1 is connected between the positive output end Vout + and the negative output end Vout-of the slow start circuit; one end of the resistor R6 is connected with a negative input end vin-and the source electrode of the MOS tube Q2, and the other end is connected with the negative output end Vout-and the drain electrode of the MOS tube Q2; the bypass switch control circuit consists of resistors R1-R5, a voltage detector U1, a triode Q1 and a voltage regulator tube; resistors R4 and R5 are connected in series and then connected between a source electrode and a drain electrode of an MOS tube Q2, one end of the resistor R4 is connected with the source electrode of the MOS tube Q2, the other end of the resistor R4 is connected with a base electrode of a triode Q1, a collector electrode of the resistor R1 is connected with a positive output end Vout + of equipment through a resistor R3, an emitter of the device is connected with the negative input end vin-, an anode of a voltage regulator tube ZD1 and a cathode of a voltage regulator tube ZD1 are connected with a grid electrode of the MOS tube Q2; the resistors R1 and R2 are connected in series and then connected between a positive input end Vin + and a negative input end Vin-, the positive input end Vin + and the positive output end Vout + are the same terminal, the connection end of the resistors R1 and R2 is connected with a voltage detection end VDD of a voltage detector U1, the grounding end of a voltage detector U1 is connected with the collector of a triode Q1 and the grid of an MOS transistor Q2, and the output end VOUT of the voltage detector U1 is connected with the negative input end Vin-, the output end VOUT of the voltage detector U1; when the voltage of the voltage detection end VDD is lower than a preset threshold value, an output end VOUT of the voltage detector U1 outputs a low level to turn off the MOS transistor Q2;

when the soft start circuit is powered on or plugged in and out of a device, current flows from R6, R6 is a power resistor, voltage at two ends of the resistor R6 is divided through resistors R4 and R5, related divided voltage is introduced to a base electrode of a triode Q1, when the divided voltage is larger than 0.7V, a triode Q1 is conducted, an emitter of the triode Q1 is pulled to the ground, an MOS tube Q2 is cut off, then a capacitor CE1 is charged and gradually filled, the current flowing through the resistor R6 is gradually reduced, the divided voltage on a resistor R6 is gradually reduced, when the divided voltage on the resistor R4 is smaller than 0.7V, a triode Q1 is cut off, the emitter voltage is stabilized through a voltage stabilizing tube 1, at the moment, the MOS tube Q2 is conducted, a detection end of a voltage detector U1 detects VDD divided voltage on a VDD detection resistor R2, and when the voltage on the resistor R2 is lower than a preset voltage value, a G pole of a MOS tube Q2 is pulled to the ground, and quick leakage is achieved.