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CN112382558B - Preparation method of controllable quantum structure based on micro-nano metal/semiconductor Schottky junction - Google Patents

Preparation method of controllable quantum structure based on micro-nano metal/semiconductor Schottky junction Download PDF

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CN112382558B
CN112382558B CN202011142806.6A CN202011142806A CN112382558B CN 112382558 B CN112382558 B CN 112382558B CN 202011142806 A CN202011142806 A CN 202011142806A CN 112382558 B CN112382558 B CN 112382558B
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CN112382558A (en
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钟振扬
陈培宗
张宁宁
张立建
樊永良
蒋最敏
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Fudan University
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Abstract

本发明属于半导体量子结构技术领域,具体为一种基于微纳米金属/半导体肖特基结的可控量子结构制备方法。本发明方法,是在含有量子阱的半导体表面,制备金属微纳米结构,形成微纳米尺度的金属/半导体肖特基结,该微纳米肖特基结附近存在一个局域静电场,可以在量子阱层中对载流子产生一个横向限制,从而在半导体量子阱中得到新型可控的量子结构;所述量子结构包括量子点、量子线、量子环及其混合结构和阵列;本发明方法简单易行,在不损坏半导体晶体质量和不引入额外杂质的前提下,制备得到可控的半导体量子结构,甚至可用于制备复杂高质量的半导体量子结构体系,为新型半导体量子器件的制备提供了新途径。

Figure 202011142806

The invention belongs to the technical field of semiconductor quantum structures, in particular to a method for preparing a controllable quantum structure based on micro-nano metal/semiconductor Schottky junctions. The method of the present invention is to prepare a metal micro-nano structure on the semiconductor surface containing a quantum well to form a metal/semiconductor Schottky junction in a micro-nano scale. There is a local electrostatic field near the micro-nano Schottky junction, which can be used in the quantum A lateral confinement is generated to carriers in the well layer, thereby obtaining a new controllable quantum structure in the semiconductor quantum well; the quantum structure includes quantum dots, quantum wires, quantum rings and their hybrid structures and arrays; the method of the present invention is simple It is easy to operate, and under the premise of not damaging the quality of semiconductor crystals and introducing additional impurities, a controllable semiconductor quantum structure can be prepared, and it can even be used to prepare complex and high-quality semiconductor quantum structure systems, which provides a new way for the preparation of new semiconductor quantum devices. way.

Figure 202011142806

Description

基于微纳米金属/半导体肖特基结的可控量子结构制备方法Preparation method of controllable quantum structure based on micro-nano metal/semiconductor Schottky junction

技术领域technical field

本发明属于半导体量子结构技术领域,具体涉及在半导体内部形成可控量子结构的方法。The invention belongs to the technical field of semiconductor quantum structures, and in particular relates to a method for forming a controllable quantum structure inside a semiconductor.

背景技术Background technique

半导体量子结构在新型微电子和光电子器件中具有广泛的应用前景,如:发光二极管、光电探测器、单光子源器件和半导体激光器等;特别是,可控的量子结构对于研究新型光电器件备受青睐。但是,目前常用方法制备的半导体量子结构,要么尺寸、形貌和分布难以控制,例如利用自组织方法生长的量子点或量子线;要么难以进行器件制备和集成,例如用化学合成方法制备的量子点。Semiconductor quantum structures have broad application prospects in new microelectronics and optoelectronic devices, such as light-emitting diodes, photodetectors, single-photon source devices, and semiconductor lasers; in particular, controllable quantum structures are of great interest for researching new optoelectronic devices. favor. However, it is difficult to control the size, shape and distribution of semiconductor quantum structures prepared by common methods at present, such as quantum dots or quantum wires grown by self-organization methods; point.

常见的可控半导体量子结构是通过图形化衬底制备的量子结构,但是由于制备步骤复杂,工艺成本较高,而且由于刻蚀容易引入较多的缺陷导致光电特性不佳等问题。在不损坏半导体内部的晶体质量且不引入杂质和缺陷的前提下,通过在半导体表面制备可控的金属微纳米结构,由于金属微纳米结构与半导体的肖特基接触产生相应的微纳米区域的耗尽层,在不同深度的界面可形成与金属微纳米结构(如纳米盘、纳米线、纳米环等)形状基本相同的横向势阱限制,从而可以在半导体内部不同界面诱导形成相应的量子结构。这种方法为制备可控、多样化和多元化的半导体量子结构提供了新途径。The common controllable semiconductor quantum structure is a quantum structure prepared by a patterned substrate, but due to the complicated preparation steps, the process cost is high, and more defects are easily introduced due to etching, resulting in poor photoelectric properties and other problems. On the premise of not damaging the crystal quality inside the semiconductor and not introducing impurities and defects, by preparing controllable metal micro-nanostructures on the semiconductor surface, the corresponding micro-nano regions are generated due to the Schottky contact between the metal micro-nanostructures and the semiconductor. Depletion layer, the interface at different depths can form a lateral potential well confinement that is basically the same shape as the metal micro-nano structure (such as nano-disk, nano-wire, nano-ring, etc.), so that it can induce the formation of corresponding quantum structures at different interfaces inside the semiconductor . This method provides a new way to prepare controllable, diverse and diversified semiconductor quantum structures.

发明内容Contents of the invention

为了解决量子结构的可控多样化需求和难以器件制备和集成的问题,本发明提出一种利用金属/半导体微纳米接触诱导形成可控的、多样化的量子结构的全新方法,称为基于微纳米金属/半导体肖特基结的可控量子结构制备方法。In order to solve the controllable and diverse requirements of quantum structures and the problems of difficult device fabrication and integration, the present invention proposes a new method of using metal/semiconductor micro-nano contacts to induce the formation of controllable and diverse quantum structures, called micro-based Preparation method of controllable quantum structure of nanometer metal/semiconductor Schottky junction.

本发明提出的基于微纳米金属/半导体肖特基结的可控量子结构制备方法,是在含有量子阱的半导体表面,制备金属微纳米结构,形成微纳米尺度的金属/半导体肖特基结,该微纳米肖特基结附近存在一个局域静电场,可以在量子阱层中对载流子产生一个横向限制,从而在半导体量子阱中得到新型可控的量子结构;所述量子结构包括量子点、量子线、量子环及其混合结构和阵列;具体步骤如下:The method for preparing a controllable quantum structure based on a micro-nano metal/semiconductor Schottky junction proposed by the present invention is to prepare a metal micro-nano structure on a semiconductor surface containing a quantum well to form a micro-nano scale metal/semiconductor Schottky junction, There is a local electrostatic field near the micro-nano Schottky junction, which can generate a lateral confinement to carriers in the quantum well layer, thereby obtaining a new controllable quantum structure in the semiconductor quantum well; the quantum structure includes quantum Dots, quantum wires, quantum rings and their hybrid structures and arrays; the specific steps are as follows:

(1)在单晶半导体衬底上生长带有盖帽层的半导体量子阱层;生长方法可采用分子束外延方法,或其他方法;(1) A semiconductor quantum well layer with a capping layer is grown on a single crystal semiconductor substrate; the growth method can be molecular beam epitaxy or other methods;

(2)然后通过电子束刻蚀或光刻技术,在埋有半导体量子阱的半导体表面制备可控金属微纳米结构;这样就可以在量子阱中得到和表面金属微纳米结构尺寸、形状和分布几乎相同的半导体量子结构。(2) Then, by electron beam etching or photolithography, controllable metal micro-nanostructures are prepared on the semiconductor surface buried with semiconductor quantum wells; in this way, the size, shape and distribution of metal micro-nanostructures in the quantum wells and on the surface can be obtained Almost identical semiconductor quantum structures.

本发明步骤(1)中,半导体量子阱的厚度为1-30nm,量子阱层离半导体表面的距离(即半导体盖帽层的厚度)为5 -100 nm。In the step (1) of the present invention, the thickness of the semiconductor quantum well is 1-30 nm, and the distance between the quantum well layer and the semiconductor surface (ie the thickness of the semiconductor cap layer) is 5-100 nm.

本发明步骤(2)中,单个金属纳米结构的尺度为10-500 nm;所选用的金属需要满足如下条件:

Figure DEST_PATH_IMAGE002
;In step (2) of the present invention, the scale of a single metal nanostructure is 10-500 nm; the selected metal needs to meet the following conditions:
Figure DEST_PATH_IMAGE002
;

其中,W是金属功函数,

Figure DEST_PATH_IMAGE004
为半导体的亲和势,E c 为半导体的导带底能量,E f 为半导体的费米能。金属微纳米结构可以是任何形状,例如纳米盘、纳米线、纳米环及其混合结构或阵列。where W is the metal work function,
Figure DEST_PATH_IMAGE004
is the affinity of the semiconductor, Ec is the conduction band bottom energy of the semiconductor, and Ef is the Fermi energy of the semiconductor . Metallic micro-nanostructures can be in any shape, such as nanodisks, nanowires, nanorings, and hybrid structures or arrays thereof.

下面以金在硅表面为例,进一步说明本发明方法。The method of the present invention will be further described by taking gold on a silicon surface as an example below.

本发明根据金属/半导体肖特基接触对半导体内部产生能带调控的特性,首先计算不同的金纳米结构(金纳米盘和金纳米线)在硅半导体中的能带调控产生的势能变化分布图(如图2),其清晰地显示了在金纳米结构下面不同深度的半导体纳米尺度区域的横向势能分布,从而可以在微纳米金属/半导体肖特基结下面一定深度范围内的半导体量子阱中形成横向的势阱限制,其横向势阱的形状、尺寸和分布几乎与表面的金属微纳米结构的一样;而纵向(垂直于表面)的势阱限制由量子阱与周围半导体的能带偏差所产生。所以,结合这两种势阱限制,就可以在半导体量子阱中得到新型的量子结构。例如,表面的金属纳米盘(提供二维的横向限制)在量子阱(提供一维的纵向限制)中诱导产生量子点,而表面的金属纳米线(提供一维的横向限制)在量子阱(提供一维的纵向限制)中诱导产生量子线。总之,半导体表面的金属微纳米结构可以在半导体量子阱中诱导产生可控的新型半导体量子结构。According to the characteristics of the metal/semiconductor Schottky contact to regulate the energy band inside the semiconductor, the present invention first calculates the distribution diagram of the potential energy change produced by the energy band regulation of different gold nanostructures (gold nanodisks and gold nanowires) in silicon semiconductors (Figure 2), which clearly shows the lateral potential energy distribution of the semiconductor nanoscale region at different depths under the gold nanostructure, so that in the semiconductor quantum wells within a certain depth range under the micro-nano metal/semiconductor Schottky junction The lateral potential well confinement is formed, and the shape, size and distribution of the lateral potential well are almost the same as those of the metal micro-nano structure on the surface; while the vertical (perpendicular to the surface) potential well confinement is determined by the energy band deviation between the quantum well and the surrounding semiconductor. produce. Therefore, by combining these two kinds of potential well confinement, a new type of quantum structure can be obtained in the semiconductor quantum well. For example, metal nanodisks on the surface (providing two-dimensional lateral confinement) induce quantum dots in quantum wells (providing one-dimensional longitudinal confinement), while metal nanowires on the surface (providing one-dimensional lateral confinement) induce quantum dots in quantum wells ( Provides one-dimensional longitudinal confinement) induced quantum wires. In conclusion, metal micro-nanostructures on semiconductor surfaces can induce controllable new semiconductor quantum structures in semiconductor quantum wells.

本发明利用金/硅半导体肖特基接触诱导形成半导体内可控量子结构,具体步骤如下:The present invention uses gold/silicon semiconductor Schottky contacts to induce the formation of a controllable quantum structure in the semiconductor, and the specific steps are as follows:

首先,在Si(001)单晶衬底上,利用分子束外延技术或其他生长方法,生长一层锗硅(GeSi)合金层作为空穴的量子阱层,再利用电子束曝光技术或光刻技术在表面上得到微纳结构的模板;First, on a Si(001) single crystal substrate, a germanium-silicon (GeSi) alloy layer is grown as a quantum well layer of holes by molecular beam epitaxy or other growth methods, and then electron beam exposure technology or photolithography is used to Technology to obtain templates of micro-nano structures on the surface;

然后,通过电子束蒸镀(或热蒸镀,磁控溅射等)方法镀上一层金属薄膜,剥离微纳结构模板后就得到金属的微纳结构;通过表面上的金属微纳结构在量子阱层中诱导得到特定的半导体量子结构;可以通过调节金属微纳结构的形状,在量子阱层内实现特定的半导体量子结构(如量子点、量子线和量子环,以及其组合或阵列)。Then, a layer of metal film is coated by electron beam evaporation (or thermal evaporation, magnetron sputtering, etc.), and the metal micro-nano structure is obtained after peeling off the micro-nano structure template; through the metal micro-nano structure on the surface, the A specific semiconductor quantum structure is induced in the quantum well layer; specific semiconductor quantum structures (such as quantum dots, quantum wires and quantum rings, and their combinations or arrays) can be realized in the quantum well layer by adjusting the shape of the metal micro-nano structure .

本发明中,硅单晶基片采用标准的RCA方法清洗,锗硅(GeSi)合金薄膜可以用分子束外延设备或其他生长设备生长,表面的金纳米结构是通过电子束曝光和电子束蒸镀技术实现。具体操作流程如下:In the present invention, the silicon single crystal substrate is cleaned by the standard RCA method, the germanium silicon (GeSi) alloy thin film can be grown by molecular beam epitaxy equipment or other growth equipment, and the gold nanostructure on the surface is obtained by electron beam exposure and electron beam evaporation Technical realization. The specific operation process is as follows:

(1)取Si(001)单晶片作为衬底,并对其进行化学清洗;(1) Take a Si(001) single wafer as the substrate, and perform chemical cleaning on it;

(2)在清洗干净的Si(001)单晶片衬底上,通过分子束外延设备或其他生长设备生长锗硅(GeSi)合金薄膜以及硅的覆盖层。合金层中锗的组份为:5%-50%,合金层厚度:1-30nm,硅覆盖层厚度:5 - 100 nm;(2) On the cleaned Si(001) single wafer substrate, grow a germanium-silicon (GeSi) alloy thin film and a silicon covering layer by molecular beam epitaxy equipment or other growth equipment. The composition of germanium in the alloy layer is: 5%-50%, the thickness of the alloy layer: 1-30nm, the thickness of the silicon covering layer: 5-100 nm;

(3)在生长有锗硅(GeSi)合金薄膜和硅覆盖层的样品上,先蒸镀一层SiO2薄膜,其厚度为30-100nm;接着通过电子束曝光形成一定结构阵列的PMMA胶掩模板;然后通过在BOE溶液中(20g NH4F:10mlHF:200mlH2O)浸泡20s去除孔洞下方的SiO2,之后通过电子束蒸镀方式蒸镀金薄膜,厚度为10-30nm,然后剥离PMMA胶得到金纳米结构:其中,所述一定结构阵列,包括圆孔阵列(如蜂窝状阵列)、线阵列、环形阵列或其组合的阵列等,则得到的纳米结构为纳米盘(如直径为30-100nm)、纳米线(如尺寸为)或纳米环,或其组合纳米结构。(3) On the sample grown with a germanium-silicon (GeSi) alloy film and a silicon covering layer, a layer of SiO 2 film is evaporated first, with a thickness of 30-100nm; then a PMMA mask with a certain structure array is formed by electron beam exposure. Template; then remove the SiO 2 under the hole by soaking in BOE solution (20g NH 4 F: 10mlHF: 200mlH 2 O) for 20s, then evaporate a gold film by electron beam evaporation with a thickness of 10-30nm, and then peel off the PMMA glue A gold nanostructure is obtained: wherein, the certain structure array includes a circular hole array (such as a honeycomb array), a line array, an annular array or a combined array thereof, and the obtained nanostructure is a nanodisk (such as a diameter of 30- 100nm), nanowires (if the size is ) or nanorings, or their combined nanostructures.

本发明可以根据需求制作不同形状、不同结构、不同周期排列等的微纳结构;也可以通过蒸镀不同金属,根据其功函数不同来调节内部不同界面势能变化的有效值;另外,也可以通过调控覆盖层的厚度改变量子阱层中的势能分布。The present invention can produce micro-nano structures with different shapes, different structures, and different periodic arrangements according to requirements; it can also adjust the effective value of different internal interface potential energy changes according to their different work functions by evaporating different metals; Regulating the thickness of the covering layer changes the potential energy distribution in the quantum well layer.

本发明的创新之处在于:在不损坏半导体晶体质量和不引入额外杂质的前提下,利用表面的金属微纳米结构可以在靠近半导体表面的量子阱层中可控制备各种半导体量子结构(如量子点、量子线、量子环及其复合结构和阵列),可以通过选用不同种金属(具有不同的功函数)或量子阱层上方覆盖层的厚度调控半导体量子结构的势阱深度,可以通过金属微纳结构的尺寸、形状和排布调控半导体量子结构的形貌和分布。The innovation of the present invention lies in that: under the premise of not damaging the semiconductor crystal quality and not introducing additional impurities, various semiconductor quantum structures (such as Quantum dots, quantum wires, quantum rings and their composite structures and arrays), the potential well depth of the semiconductor quantum structure can be adjusted by selecting different metals (with different work functions) or the thickness of the covering layer above the quantum well layer. The size, shape and arrangement of micro-nanostructures regulate the morphology and distribution of semiconductor quantum structures.

附图说明Description of drawings

图1为不同金属微纳米结构示意图。其中,(a)纳米盘,(b)纳米线,(c)纳米环。Figure 1 is a schematic diagram of different metal micro-nanostructures. Among them, (a) nanodisk, (b) nanowire, (c) nanoring.

图2为由于纳米尺度的金属/半导体肖特基接触,金纳米盘和纳米线结构在硅内部产生的电势能变化。Fig. 2 shows the electric potential energy change inside silicon due to the nanoscale metal/semiconductor Schottky contact, gold nanodisk and nanowire structure.

图3为在含有锗硅(GeSi)量子阱层的硅表面上制备的金纳米盘蜂窝状周期阵列的SEM图,金纳米盘的直径60nm,周期120nm。3 is a SEM image of a honeycomb periodic array of gold nanodisks prepared on a silicon surface containing a germanium silicon (GeSi) quantum well layer. The gold nanodisks have a diameter of 60nm and a period of 120nm.

图4为在含有锗硅(GeSi)量子阱层的硅表面上制备的金纳米线阵列的SEM图,金纳米线为。FIG. 4 is an SEM image of a gold nanowire array prepared on a silicon surface containing a germanium silicon (GeSi) quantum well layer, and the gold nanowire is .

图5为在含有锗硅(GeSi)量子阱层的硅表面上制备的镍纳米盘蜂窝状周期阵列的SEM图,金纳米盘的直径45nm,周期100nm。5 is a SEM image of a honeycomb periodic array of nickel nanodisks prepared on a silicon surface containing a germanium silicon (GeSi) quantum well layer. The gold nanodisks have a diameter of 45nm and a period of 100nm.

具体实施方式detailed description

分子束外延设备为型号为Riber EVA-32 的超高真空分子束外延系统;系统由进样室(预室)和生长室(主室)组成。金属微纳结构样品通过电子束曝光技术(型号:RaithElphy Plus)和电子束蒸镀设备(型号:DE400)完成。样品的形貌是通过扫描电子显微镜(型号:Zeiss Sigma)进行表征。The molecular beam epitaxy equipment is a Riber EVA-32 ultra-high vacuum molecular beam epitaxy system; the system consists of a sample chamber (pre-chamber) and a growth chamber (main chamber). Metal micro-nano structure samples were completed by electron beam exposure technology (model: RaithElphy Plus) and electron beam evaporation equipment (model: DE400). The morphology of the samples was characterized by a scanning electron microscope (model: Zeiss Sigma).

实施例1Example 1

本实施例是制备金纳米盘诱导硅半导体内可控量子结构,分为三个步骤:步骤1:RCA清洗;步骤2:带有硅覆盖层的锗硅(GeSi)量子阱层生长;步骤3:金纳米盘结构制备。以下进行详细阐述。This example is to prepare a gold nanodisk to induce a controllable quantum structure in a silicon semiconductor, which is divided into three steps: step 1: RCA cleaning; step 2: growth of a germanium silicon (GeSi) quantum well layer with a silicon capping layer; step 3 : Fabrication of gold nanodisk structures. The details are described below.

步骤1:RCA清洗Step 1: RCA Cleaning

将Si(001)衬底在放入分子束外延设备生长之前需要作清洗处理。清洗程序如下:The Si(001) substrate needs to be cleaned before being put into the molecular beam epitaxy equipment for growth. The cleaning procedure is as follows:

(1) 将Si(100)单晶片在丙酮和甲醇中先后各超声5分钟,用以去除衬底表面的有机物。再在去离子水中超声5分钟。(1) Sonicate the Si(100) single wafer in acetone and methanol successively for 5 minutes to remove organic matter on the substrate surface. Sonicate again for 5 minutes in deionized water.

(2) 在硫酸和双氧水混合溶液(体积比4:1)中浸泡10分钟后,用去离子水冲洗10分钟。(2) Soak in a mixed solution of sulfuric acid and hydrogen peroxide (volume ratio 4:1) for 10 minutes, then rinse with deionized water for 10 minutes.

(3)在氨水、双氧水、水混合溶液(体积比1:1:5)中80 ℃水浴15分钟后,用去离子水冲洗15分钟。(3) After bathing in a water bath at 80°C for 15 minutes in a mixed solution of ammonia, hydrogen peroxide, and water (volume ratio 1:1:5), rinse with deionized water for 15 minutes.

(4) 在盐酸、双氧水、水混合溶液(体积比1:1:5)中80 ℃水浴15分钟后,用去离子水冲洗15分钟。(4) After bathing in a mixed solution of hydrochloric acid, hydrogen peroxide, and water (volume ratio 1:1:5) at 80°C for 15 minutes, rinse with deionized water for 15 minutes.

(5) 在5 wt%的氢氟酸中浸泡60-80秒去除表面的氧化层。随后用去离子水冲洗干净。(5) Soak in 5 wt% hydrofluoric acid for 60-80 seconds to remove the oxide layer on the surface. Then rinse with deionized water.

步骤2:带有硅覆盖层的锗硅(GeSi)量子阱层生长Step 2: Growth of germanium silicon (GeSi) quantum well layer with silicon capping layer

取Si(001)硅单晶片,按照步骤1所述清洗程序进行清洗处理后,放入分子束外延设备进行锗、硅材料的分子束外延生长。该系统的硅源和锗源,均采用电子束加热来蒸发。以下是材料生长的基本工艺条件。Take a Si(001) silicon single wafer, after cleaning according to the cleaning procedure described in step 1, put it into molecular beam epitaxy equipment to carry out molecular beam epitaxy growth of germanium and silicon materials. Both silicon and germanium sources of the system are evaporated by electron beam heating. The following are the basic process conditions for material growth.

i)将衬底加热至860℃(可以更高温度),保持6分钟,脱附表面吸附的杂质分子。i) Heat the substrate to 860°C (higher temperature is possible) and keep it for 6 minutes to desorb the impurity molecules adsorbed on the surface.

ii) 外延生长硅缓冲层,生长温度:500℃,生长速率:0.6 Å/s,生长厚度:100nm。ii) Epitaxial growth of silicon buffer layer, growth temperature: 500°C, growth rate: 0.6 Å/s, growth thickness: 100nm.

iii)外延生长锗硅(GeSi)量子阱层,生长温度:420℃,锗硅(GeSi)合金中锗的组分为38%,其厚度为5nm。厚度和组分可以通过锗和硅的生长速率和时间调控。iii) Epitaxial growth of germanium silicon (GeSi) quantum well layer, growth temperature: 420° C., germanium composition in germanium silicon (GeSi) alloy is 38%, and its thickness is 5 nm. The thickness and composition can be tuned by the growth rate and time of Ge and Si.

iv)继续外延生长硅覆盖层,生长温度:420-500℃,生长速率:0.6 Å/s,生长厚度:30nm。硅覆盖层厚度可通过生长时间调控。生长完毕后立刻把温度降至室温。iv) Continue to epitaxially grow the silicon capping layer, growth temperature: 420-500°C, growth rate: 0.6 Å/s, growth thickness: 30nm. The thickness of the silicon capping layer can be controlled by the growth time. Lower the temperature to room temperature immediately after growth is complete.

步骤3:金纳米盘结构制备Step 3: Preparation of gold nanodisk structure

根据不同需求,可以制备不同形貌和分布的金纳米结构,如纳米盘或纳米线。以下是金纳米盘的制作:According to different needs, gold nanostructures with different shapes and distributions, such as nanodisks or nanowires, can be prepared. The following is the fabrication of gold nanodisks:

通过电子束曝光制作金纳米盘阵列:在样品表面蒸镀30nm的二氧化硅层,然后通过旋涂电子束胶PMMA供电子束刻蚀技术刻蚀成具有圆孔阵列(如蜂窝状排列)的掩模板。将样品放置在BOE溶液中(20gNH4F:10mlHF:200mlH2O)浸泡20s去除掩模板孔洞下的二氧化硅,然后通过电子束蒸镀金薄膜10nm,再剥离PMMA掩模板后形成蜂窝状的纳米尺度的金盘周期排列,金盘的直径和间隔精确可调。Fabrication of gold nanodisk arrays by electron beam exposure: evaporating a 30nm silicon dioxide layer on the surface of the sample, and then etching it into a circular hole array (such as a honeycomb arrangement) by spin-coating electron beam glue PMMA for electron beam etching technology mask board. Place the sample in BOE solution (20gNH 4 F: 10mlHF: 200mlH 2 O) and soak for 20s to remove the silicon dioxide under the hole of the mask, then evaporate a 10nm gold film by electron beam, and then peel off the PMMA mask to form a honeycomb nanometer The standard gold discs are arranged periodically, and the diameter and spacing of the gold discs are precisely adjustable.

通过对实施例1步骤3中的样品进行扫描电镜的形貌表征(如图3),得到样品中金纳米盘的蜂窝状阵列晶格周期为120nm,直径约60nm。由于金属纳米结构/硅肖特基接触,在量子阱层中可以形成蜂窝状周期排列的横向局域势阱分布,因此本发明可以为制备类石墨烯结构提供一种新思路。By performing scanning electron microscope morphology characterization on the sample in Step 3 of Example 1 (as shown in Figure 3), it was obtained that the honeycomb array lattice period of gold nanodisks in the sample was 120 nm, and the diameter was about 60 nm. Due to the metal nanostructure/silicon Schottky contact, a honeycomb-like periodic arrangement of lateral local potential well distribution can be formed in the quantum well layer, so the present invention can provide a new idea for preparing a graphene-like structure.

实施例2Example 2

本实施例是制备金纳米线诱导硅半导体内可控量子结构。其中,步骤1:RCA清洗;步骤2:带有硅覆盖层的锗硅(GeSi)量子阱层生长。前两个步骤与实施例1的步骤1,2相同故不再赘述,以下介绍步骤3:金纳米线结构制备。This example is to prepare a controllable quantum structure in a silicon semiconductor induced by gold nanowires. Wherein, step 1: RCA cleaning; step 2: growth of a germanium silicon (GeSi) quantum well layer with a silicon capping layer. The first two steps are the same as Steps 1 and 2 of Example 1 and will not be described again. Step 3: Preparation of gold nanowire structure will be introduced below.

步骤3:金纳米线结构制备Step 3: Gold nanowire structure preparation

通过电子束曝光制作金纳米线阵列:在样品表面上蒸镀30nm的二氧化硅层,然后通过旋涂电子束胶PMMA供电子束刻蚀技术刻蚀成具有纳米线阵列的的掩模板。将样品放置在BOE溶液中(20gNH4F:10mlHF:200mlH2O)浸泡20s去除掩模板纳米线下的二氧化硅,然后通过热蒸发蒸镀金薄膜10nm,再剥离PMMA掩模板后形成纳米线周期排列。金纳米线的尺寸和周期精确可调。Fabrication of gold nanowire arrays by electron beam exposure: a 30nm silicon dioxide layer was evaporated on the sample surface, and then etched into a mask plate with nanowire arrays by spin-coating electron beam glue PMMA for electron beam etching technology. Place the sample in BOE solution (20gNH 4 F: 10mlHF: 200mlH 2 O) and soak for 20s to remove the silicon dioxide under the mask template nanowires, then evaporate a 10nm gold film by thermal evaporation, and then peel off the PMMA mask template to form nanowire cycles arrangement. The size and period of gold nanowires are precisely tunable.

通过对实施例2步骤3中的样品进行扫描电镜的形貌表征(如图4),得到样品中金纳米线的周期为,单根金纳米线的尺寸为。由于金属纳米结构/硅肖特基接触,可以在半导体量子阱层中实现周期性的半导体量子线结构。By performing scanning electron microscope morphology characterization on the sample in Step 3 of Example 2 (as shown in FIG. 4 ), the period of the gold nanowires in the sample is obtained, and the size of a single gold nanowire is . Due to the metal nanostructure/silicon Schottky contact, a periodic semiconductor quantum wire structure can be realized in the semiconductor quantum well layer.

实施例3Example 3

本实施例是制备镍纳米盘诱导硅半导体内可控量子结构。其中,步骤1:RCA清洗;步骤2:带有硅覆盖层的锗硅(GeSi)量子阱层生长。前两个步骤与实施例1步骤1,2相同故不再赘述,以下介绍步骤3:镍纳米盘结构制备。This example is to prepare a nickel nanodisk to induce a controllable quantum structure in a silicon semiconductor. Wherein, step 1: RCA cleaning; step 2: growth of a germanium silicon (GeSi) quantum well layer with a silicon capping layer. The first two steps are the same as Steps 1 and 2 of Example 1 and will not be described again. Step 3: Preparation of nickel nanodisk structure is introduced below.

步骤3:镍纳米盘结构制备Step 3: Preparation of nickel nanodisk structure

通过电子束曝光制作金纳米盘阵列:在样品表面蒸镀30nm的二氧化硅层,然后通过旋涂电子束胶PMMA供电子束刻蚀技术刻蚀成具有圆孔阵列(如蜂窝状排列)的掩模板。将样品放置在BOE溶液中(20gNH4F:10mlHF:200mlH2O)浸泡20s去除掩模板孔洞下的二氧化硅,然后通过热蒸发蒸镀镍薄膜15nm,再剥离PMMA掩模板后形成蜂窝状的纳米尺度的镍盘周期排列,镍盘的直径和间隔精确可调。Fabrication of gold nanodisk arrays by electron beam exposure: evaporating a 30nm silicon dioxide layer on the surface of the sample, and then etching it into a circular hole array (such as a honeycomb arrangement) by spin-coating electron beam glue PMMA for electron beam etching technology mask board. Place the sample in the BOE solution (20gNH 4 F: 10mlHF: 200mlH 2 O) and soak for 20s to remove the silicon dioxide under the hole of the mask, and then evaporate a 15nm nickel film by thermal evaporation, and then peel off the PMMA mask to form a honeycomb The nanoscale nickel disks are arranged periodically, and the diameter and interval of the nickel disks are precisely adjustable.

通过对实施例3步骤3的样品进行扫描电镜的形貌表征(如图5),得到样品中镍纳米盘的蜂窝状阵列晶格周期为100nm,直径约45nm。由于金属纳米结构/硅肖特基接触,在量子阱层中可以形成蜂窝状周期排列的横向局域势阱分布,因此可以实现带有磁性特性的类石墨烯结构。By performing scanning electron microscope morphology characterization on the sample in Step 3 of Example 3 (as shown in FIG. 5 ), it was obtained that the honeycomb array lattice period of nickel nanodisks in the sample was 100 nm, and the diameter was about 45 nm. Due to the metal nanostructure/silicon Schottky contact, a honeycomb-like periodic arrangement of lateral local potential well distribution can be formed in the quantum well layer, so a graphene-like structure with magnetic properties can be realized.

本发明中,列举了不同的金属微纳米结构可以在半导体内部通过能带调控形成相应的量子结构(如图1);分析了金纳米盘和纳米线在靠近表面的量子阱层中形成较大的能带弯曲(如图2),从而在量子阱层中形成量子点和量子线结构的可行性;通过分子束外延技术生长锗硅(GeSi)合金量子阱(如各实施例中的步骤1,2);利用电子束曝光技术制备了不同金属的纳米盘、纳米线周期阵列(如三个实施例中的步骤3);并用扫描电镜(SEM)进行形貌表征(如图3,图4和图5)。由于纳米尺度的肖特基接触,在半导体表面的金属微纳米结构可以在半导体内部的量子阱层中诱导形成新型的半导体量子结构,而且该半导体量子结构的横向形状和分布跟表面的金属微纳米结构几乎一模一样;特别是,利用本发明制备的半导体量子结构不涉及任何刻蚀过程,从而可以完全避免一般利用刻蚀方法得到的可控半导体量子结构中由于刻蚀带来的缺陷和杂质问题。因此,本发明为设计和制备新型可控的高质量半导体量子结构提供了一种全新的思路,也可以用于新型量子器件的设计和制备领域。In the present invention, it is listed that different metal micro-nanostructures can form corresponding quantum structures through energy band regulation inside the semiconductor (as shown in Figure 1); it is analyzed that gold nanodisks and nanowires form larger quantum structures in the quantum well layer near the surface. energy band bending (as shown in Figure 2), so as to form quantum dots and quantum wire structures in the quantum well layer; grow germanium silicon (GeSi) alloy quantum wells by molecular beam epitaxy (such as step 1 in each embodiment , 2); using electron beam exposure technology to prepare nanodisks and periodic arrays of nanowires of different metals (such as step 3 in the three examples); and use scanning electron microscopy (SEM) for morphology characterization (as shown in Figure 3, Figure 4 and Figure 5). Due to the nanoscale Schottky contact, the metal micro-nanostructure on the semiconductor surface can induce the formation of a new type of semiconductor quantum structure in the quantum well layer inside the semiconductor, and the lateral shape and distribution of the semiconductor quantum structure are similar to those of the metal micro-nanostructure on the surface. The structures are almost identical; in particular, the semiconductor quantum structure prepared by the present invention does not involve any etching process, thereby completely avoiding defects and impurities caused by etching in controllable semiconductor quantum structures generally obtained by etching methods. Therefore, the invention provides a brand-new idea for designing and preparing a new controllable high-quality semiconductor quantum structure, and can also be used in the field of design and preparation of new quantum devices.

Claims (4)

1.一种基于微纳米金属/半导体肖特基结的可控量子结构制备方法,是在含有量子阱的半导体表面,制备金属微纳米结构,形成微纳米尺度的金属/半导体肖特基结,该微纳米肖特基结附近存在一个局域静电场,在量子阱层中对载流子产生一个横向限制,其横向势阱的形状、尺寸和分布几乎与表面的金属微纳米结构的一样;而纵向的势阱限制由量子阱与周围半导体的能带偏差所产生;结合这两种势阱限制,从而在半导体量子阱中得到新型可控的量子结构;所述量子结构包括量子点、量子线、量子环及其混合结构和阵列;具体步骤如下:1. A method for preparing a controllable quantum structure based on a micro-nano metal/semiconductor Schottky junction, which is to prepare a metal micro-nano structure on a semiconductor surface containing a quantum well to form a micro-nano scale metal/semiconductor Schottky junction, There is a local electrostatic field near the micro-nano Schottky junction, which creates a lateral confinement of carriers in the quantum well layer, and the shape, size and distribution of the lateral potential well are almost the same as those of the metal micro-nano structure on the surface; The vertical potential well confinement is produced by the energy band deviation between the quantum well and the surrounding semiconductor; combining these two potential well confinements, a new controllable quantum structure is obtained in the semiconductor quantum well; the quantum structure includes quantum dots, quantum Lines, quantum rings and their hybrid structures and arrays; the specific steps are as follows: (1)在单晶半导体衬底上生长带有盖帽层的半导体量子阱层;(1) growing a semiconductor quantum well layer with a capping layer on a single crystal semiconductor substrate; (2)然后通过电子束刻蚀或光刻技术,在埋有半导体量子阱的半导体表面制备可控金属微纳米结构,从而在量子阱中得到和表面金属微纳米结构尺寸、形状和分布几乎相同的半导体量子结构。(2) Then, by electron beam etching or photolithography, controllable metal micro-nanostructures are prepared on the semiconductor surface buried with semiconductor quantum wells, so that the size, shape and distribution of the surface metal micro-nanostructures in the quantum wells are almost the same semiconductor quantum structures. 2.根据权利要求1所述的制备方法,其特征在于,步骤(1)中所述半导体量子阱的厚度为1-30nm,量子阱层离半导体表面的距离即半导体盖帽层的厚度为5-100nm。2. preparation method according to claim 1, is characterized in that, the thickness of semiconductor quantum well described in step (1) is 1-30nm, and the distance of quantum well layer from semiconductor surface is the thickness of semiconductor cap layer is 5-30nm. 100nm. 3.根据权利要求1所述的制备方法,其特征在于,步骤(2)中,单个金属纳米结构的尺度为10-500nm;所用的金属满足如下条件:|(W-χ)-(Ec-Ef)|>0.005eV;3. preparation method according to claim 1, is characterized in that, in step (2), the scale of single metal nanostructure is 10-500nm; Used metal meets following condition:|(W-x)-( Ec -E f )|>0.005eV; 其中,W是金属功函数,χ为半导体的亲和势,Ec为半导体的导带底能量,Ef为半导体的费米能;金属微纳米结构是任何形状,包括纳米盘、纳米线、纳米环及其混合结构或阵列。Wherein, W is the work function of the metal, χ is the affinity of the semiconductor, Ec is the conduction band bottom energy of the semiconductor, and Ef is the Fermi energy of the semiconductor; the metal micro-nanostructure is any shape, including nanodisks, nanowires, Nanorings and hybrid structures or arrays thereof. 4.根据权利要求1所述的制备方法,其特征在于,所述金属为金,所述半导体量子阱层为锗硅合金层,制备的具体操作流程如下:4. preparation method according to claim 1, is characterized in that, described metal is gold, and described semiconductor quantum well layer is germanium-silicon alloy layer, and the specific operation process of preparation is as follows: (1)取Si(001)单晶片作为衬底,并对其进行化学清洗;(1) get Si(001) single wafer as substrate, and carry out chemical cleaning to it; (2)在清洗干净的Si(001)单晶片衬底上,通过分子束外延设备或其他生长设备生长锗硅合金薄膜以及硅的覆盖层;合金层中锗组份质量为5%-50%,合金层厚度1-30nm,硅覆盖层厚度为5-100nm;(2) On the cleaned Si(001) single wafer substrate, grow germanium-silicon alloy film and silicon covering layer through molecular beam epitaxy equipment or other growth equipment; the quality of germanium component in the alloy layer is 5%-50% , the thickness of the alloy layer is 1-30nm, and the thickness of the silicon covering layer is 5-100nm; (3)在生长有锗硅合金薄膜和硅覆盖层的样品上,先蒸镀一层SiO2薄膜,其厚度为30-100nm;接着通过电子束曝光形成一定结构阵列的PMMA胶掩模板;然后通过在BOE溶液中浸泡20s去除孔洞下方的SiO2,之后通过电子束蒸镀方式蒸镀金薄膜,厚度为10-30nm,然后剥离PMMA胶得到金纳米结构:其中,所述一定结构阵列,包括圆孔阵列、线阵列、环形阵列或其组合的阵列,则得到的纳米结构为纳米盘、纳米线或纳米环,或其组合纳米结构。(3) on the sample that has germanium-silicon alloy thin film and silicon capping layer, evaporate one deck SiO earlier thin film, its thickness is 30-100nm ; Then form the PMMA glue mask plate of certain structure array by electron beam exposure; Then Remove the SiO 2 under the holes by immersing in BOE solution for 20s, and then vapor-deposit a gold film with a thickness of 10-30nm by electron beam evaporation, and then peel off the PMMA glue to obtain a gold nanostructure: wherein, the certain structure array includes a circle Hole arrays, line arrays, ring arrays or combinations thereof, the obtained nanostructures are nanodisks, nanowires or nanorings, or combination nanostructures.
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