CN112230112B - Test structure and test method - Google Patents

Abstract

The application provides a test structure and a test method, wherein the test structure comprises the following components: the device group to be tested comprises a plurality of resistive switching devices to be tested in series; the first switches are connected with the resistive switching devices in parallel in a one-to-one correspondence manner; and two ends of the device group to be tested are respectively and electrically connected with one test electrode. The technical problem of low test efficiency caused by the fact that resistance change devices such as MTJs and the like need to be tested one by one in the prior art is solved.

Description

Test structure and test methods

Technical Field

The present application relates to the field of memory, and in particular, to a test structure and a test method.

Background Art

The magnetic random access memory (MRAM) that has developed rapidly in recent years has excellent characteristics: it overcomes the shortcomings of SRAM, such as large area and high leakage after size reduction; it overcomes the shortcomings of DRAM, such as the need to refresh data all the time and high power consumption; it has short read and write times and a large number of read and write times, and these two properties are several orders of magnitude superior to those of Flash memory.

MTJ is the core storage element of magnetic random access memory (MRAM). The number of read and write times of MRAM is directly related to the life of MTJ devices. In order to obtain the reliability distribution of MRAM's endurance time during the R&D stage and ensure the reliability of products in the mass production stage, a large number of MTJ devices need to be tested.

At present, the method we adopt is to test the MTJ devices one by one. It takes a long time to test a large number of devices.

The above information disclosed in the background technology section is only used to enhance the understanding of the background technology of the technology described in this article. Therefore, the background technology may contain certain information that does not form the prior art known in this country for those skilled in the art.

Summary of the invention

The main purpose of the present application is to provide a test structure and a test method to solve the problem of low test efficiency caused by the need to test resistive switching devices such as MTJs one by one in the prior art.

In order to achieve the above-mentioned purpose, according to one aspect of the present application, a test structure is provided, wherein the test structure includes: at least one group of devices to be tested, the group of devices to be tested includes a plurality of resistive switching devices to be tested connected in series; a plurality of first switches, the first switches are connected in parallel with the resistive switching devices one by one; and at least two test electrodes, with one test electrode being electrically connected to each end of the group of devices to be tested.

Furthermore, the test structure also includes: multiple first control electrodes, the first control electrodes are electrically connected to a first switch or are respectively electrically connected to multiple first switches, the first control electrodes are used to control the switching state of the first switches, and when the first control electrode is electrically connected to multiple first switches, any two first switches electrically connected to a first control electrode are electrically connected to resistive switching devices in different groups of devices to be tested.

Furthermore, there is one device under test group, there are two test electrodes, and the first control electrodes are electrically connected to the first switches in a one-to-one correspondence.

Furthermore, there are multiple groups of devices to be tested, there are two test electrodes, and the first control electrodes are electrically connected to the multiple first switches respectively.

Furthermore, the test structure also includes: multiple second switches, one second switch is electrically connected between a test electrode and a group of devices to be tested, and the second switches are electrically connected to the group of devices to be tested in a one-to-one correspondence; at least one second control electrode, the second control electrode is electrically connected to the second switch to control the switching state of the second switch.

Furthermore, there is one second control electrode, and the second control electrode controls the switching state of each second switch.

Further, the first switch and the second switch are independently selected from an NMOS tube, a PMOS tube, a transmission gate or a triode.

Furthermore, the test electrode is a signal ground structure.

Furthermore, the resistive switching device is an MTJ.

In order to achieve the above-mentioned purpose, according to one aspect of the present application, a test method using the above-mentioned test structure is provided, wherein the test method includes: step S1, controlling each first switch to be in an off state, applying a pulse signal to two test electrodes at both ends of a device group to be tested, and detecting the resistance of the device group to be tested; step S2, repeating step S1 in sequence until the difference between the detected resistance of the device group to be tested and the resistance detected last time is greater than a first predetermined threshold, and then stopping applying the pulse signal; step S3, sequentially controlling the first switches electrically connected to each resistive switching device of the device group to be tested to be in an off state, and the first switches electrically connected to other resistive switching devices to be in a closed state, detecting the resistance of each resistive switching device, and determining that the resistive switching device is damaged when the resistance of the resistive switching device is less than a second predetermined threshold; step S4, determining the durability of one or more resistive switching devices in the device group to be tested according to the detection results of step S2 and step S3; step S5, repeating steps S1 to S4 until all resistive switching devices in the device group to be tested are damaged, or until the number of applications of the pulse signal is equal to the predetermined number of times

Furthermore, before step S1, the method also includes: sequentially controlling the first switches electrically connected to each resistive device in the device group to be tested to be in an off state, and the first switches electrically connected to other resistive devices to be in a closed state, measuring the resistance of each resistive device, and determining that the resistive device is a damaged device when the resistance of the resistive device is less than a second predetermined threshold value, and when the resistive device is already damaged, not detecting the resistance of the damaged device in step S3.

Furthermore, the test structure also includes multiple first control electrodes, which are electrically connected to one first switch or to multiple first switches respectively. In steps S1, S3 and S5, the first switch is controlled to be in an off or closed state by controlling the voltage of the first control electrode.

Furthermore, when the test structure includes M groups of devices to be tested, the method also includes: step S6, repeating steps S1 to S5 multiple times in sequence, the number of repetitions is N, the number of device groups to be tested is M, N=M-1, M is a positive integer greater than or equal to 2, and N is a positive integer greater than or equal to 1.

Furthermore, the first control electrode is electrically connected to multiple first switches respectively, and any two first switches electrically connected to a first control electrode are electrically connected to resistive switching devices in different groups of devices to be tested. The test structure also includes multiple second switches and at least one second control electrode. A second switch is electrically connected between a test electrode and a group of devices to be tested. The second switches are electrically connected to the groups of devices to be tested one-to-one. The second control electrode is electrically connected to the second switch to control the switching state of the second switch. Before each repetition of steps S1 to S5, step S6 also includes: controlling the voltage of the second control electrode to control the second switch connected to the next group of devices to be tested to be in a closed state.

By applying the technical solution of the present application, the test structure includes at least one device group to be tested, multiple first switches, and at least two test electrodes, wherein the device group to be tested includes multiple resistive switching devices to be tested in series, and the two ends of the device group to be tested are respectively electrically connected to a test electrode, and the first switch is connected in parallel with the resistive switching device in a one-to-one correspondence, so that the user can flexibly test the resistive switching devices in the device group to be tested by controlling the first switch connected in parallel with the resistive switching device in a one-to-one correspondence. The test structure can test multiple resistive switching devices at the same time, and thus can solve the problem of low test efficiency caused by the need to test resistive switching devices such as MTJ one by one in the prior art, and achieve the technical effect of efficient testing of resistive switching devices.

BRIEF DESCRIPTION OF THE DRAWINGS

The drawings constituting part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

FIG1 shows an optional schematic diagram of an embodiment of a test structure according to the present application;

FIG2 shows another optional schematic diagram of an embodiment of a test structure according to the present application;

FIG3 shows another optional schematic diagram of an embodiment of a test structure according to the present application; and

FIG. 4 is a schematic diagram showing a resistance jump curve according to an embodiment of the testing method of the present application.

The above drawings include the following reference numerals:

10. Device group to be tested; 11. Resistive device; 20. First switch; 30. Test electrode; 31. First test electrode; 32. Second test electrode; 40. First control electrode; 50. Second switch; 60. Second control electrode.

DETAILED DESCRIPTION

It should be noted that the following detailed descriptions are illustrative and are intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art to which the present application belongs.

It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and/or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and/or combinations thereof.

It should be understood that when an element (such as a layer, film, region, or substrate) is described as being "on" another element, the element may be directly on the other element, or there may be intermediate elements. Moreover, in the specification and claims, when it is described that an element is "connected" to another element, the element may be "directly connected" to the other element, or "connected" to the other element through a third element.

As introduced in the background technology, in the prior art, in order to obtain the reliability distribution of the endurance time of MRAM and ensure the reliability of the product in the mass production stage, a large number of MTJ devices need to be tested. However, when testing a large number of MTJ devices, it often takes a long time. In order to solve the technical problem of high time cost of testing MTJ devices in the research and development stage, this application proposes a method.

That is, the present application proposes a test structure, specifically, the test structure includes: at least one group of devices to be tested 10, the group of devices to be tested 10 includes a plurality of resistive switching devices 11 to be tested connected in series; a plurality of first switches 20, the first switches 20 are connected in parallel with the resistive switching devices 11 one by one; at least two test electrodes 30, the two ends of the group of devices to be tested 10 are respectively electrically connected to one of the test electrodes 30.

In an optional example, the resistive switching device 11 to be tested may be an MTJ device in the background art.

In an optional example, the connection mode of the first switch 20 in parallel with the resistive switching device 11 in a one-to-one correspondence can be as shown in FIG1, that is, by controlling the closed and open states of the first switch 20 connected in parallel with the resistive switching device 11, the technical effect of arbitrarily shielding the resistive switching device 11 in at least one device group 10 to be tested when two test electrodes 30 test at least one device group 10. At this time, if it is determined that the maximum number of pulse signals that the durability of a resistive switching device 11 can tolerate is determined, the resistive switching device 11 can be shielded, and the other resistive switching devices 11 in at least one device group 10 to be tested can continue to be tested.

Optionally, the above-mentioned control of the on/off state of the first switch 20 can be performed in a variety of ways. First, by signal control, and second, by electrode control.

Taking the control electrode controlling the closed and open states of the first switch 20 as an example, the test structure may further include a plurality of first control electrodes 40, wherein the first control electrode 40 is electrically connected to one of the first switches 20 or is electrically connected to a plurality of the first switches 20 respectively, and the first control electrode 40 is used to control the switching state of the first switch 20. When the first control electrode 40 is electrically connected to a plurality of the first switches 20, any two of the first switches 20 electrically connected to one of the first control electrodes 40 are electrically connected to the resistive devices 11 in different groups 10 of devices to be tested.

That is, when the first control electrode 40 controls the switching states of the plurality of first switches 20 , the plurality of first switches 20 are electrically connected to different resistive devices 11 , respectively, so that the first control electrode 40 independently controls the plurality of resistive devices 11 in the device group 10 to be tested.

It should be noted that: in the present application, the connection requirements between the device group 10 to be tested and the test electrode 30 are: both ends of any device group 10 to be tested are respectively connected to a test electrode 30. For example, in the case where there is only one device to be tested, the connection relationship of the test structure can be as shown in FIG1, that is, in the case where there is only one device to be tested, there are two test electrodes 30, and the test electrodes 30 are respectively connected to both ends of the device group 10 to be tested, and the first control electrode 40 is electrically connected to the first switch 20 in a one-to-one correspondence; in the case where there are two devices to be tested, and there are also two test electrodes 30, the connection relationship of the test structure can be as shown in FIG2, that is, there are two device groups 10 to be tested, there are two test electrodes 30, and the first control electrode 40 is electrically connected to multiple first switches 20 respectively.

Further, for the second situation described above, there are two DUT groups 10, two test electrodes 30, and the first control electrode 40 is electrically connected to the plurality of first switches 20, which can lead to various embodiments, as described below:

The test structure includes a plurality of the DUT groups 10, two test electrodes 30, wherein the first control electrodes 40 are respectively electrically connected to the plurality of the first switches 20. At this time, the test structure further includes: a plurality of second switches 50, wherein one second switch 50 is electrically connected between one test electrode 30 and one DUT group 10, and the second switch 50 is electrically connected to the DUT group 10 in a one-to-one correspondence; and at least one second control electrode 60, wherein the second control electrode 60 is electrically connected to the second switch 50 to control the switching state of the second switch 50.

It should be noted that there is only one second control electrode 60 , and the second control electrode 60 controls the switching state of each of the second switches 50 .

The test structure comprises a plurality of the DUT groups 10, more than two test electrodes 30, wherein the first control electrodes 40 are respectively electrically connected to the plurality of the first switches 20. At this time, the test structure further comprises: at least one third switch, the third switch is connected between the test electrode 30 and the DUT, the DUT group 10 is connected to the test electrode 30 through the third switch or directly; and at least one third control electrode, the third control electrode is electrically connected to the third switch to control the switch state of the second switch 50.

Take two groups of device under test 10 and three test electrodes 30 as an example: as shown in FIG3 , the test electrode 30 is divided into an A end and a B end, wherein there are two first test electrodes 31 and one second test electrode 32. At this time, the device under test group 10 is connected to the second test electrode 32 through the third switch, and the device under test group 10 is directly connected to the first test electrode 31. That is, one second test electrode 32 is shared by two device under test groups 10, and one test electrode 30 is shared by multiple device under test groups.

That is, the test structure provided in this embodiment only needs to ensure that both ends of each DUT group 10 are connected to the test electrodes 30 , and the test electrodes 30 can perform independent test processing on any DUT group 10 .

Finally, it is noted that the first switch 20, the second switch 50 and the third switch mentioned above can be independently selected from NMOS tubes, PMOS tubes, transmission gates or triodes; and, the test electrode 30 can adopt a signal ground (Ground-Signal, referred to as GS) structure, and a 50-ohm impedance-matched test electrode is obtained by designing the size and spacing, that is, the impedance between the test electrode of the GS structure and the high-frequency pulse generator signal source is matched. Under such impedance conditions, the high-frequency pulse signal loss can be minimized, further ensuring the test accuracy. In addition, the impedance of the test electrode of the GS structure has nothing to do with the connected device, and is only achieved through the spacing and size design of the test electrode of the GS structure.

The embodiment of the present application also provides a test method. It should be noted that the test method of the embodiment of the present application is a test method executed by using a test structure. The test method provided by the embodiment of the present application is introduced below.

The testing method provided in the embodiment of the present application comprises the following steps:

Step S1, controlling each first switch to be in an off state, applying a pulse signal to two test electrodes at two ends of a device under test group, and detecting the resistance of the device under test group;

Step S2, repeatedly executing step S1 in sequence until the difference between the resistance of the device under test group detected and the resistance detected last time is greater than a first predetermined threshold, and then stopping applying the pulse signal;

Step S3, sequentially controlling the first switches electrically connected to each resistive switching device in the device group to be in an off state, and the first switches electrically connected to other resistive switching devices to be in a closed state, detecting the resistance of each resistive switching device, and determining that the resistive switching device is damaged when the resistance of the resistive switching device is less than a second predetermined threshold value;

Step S4, determining the durability of one or more resistive switching devices in the group of devices to be tested according to the detection results of step S2 and step S3;

Step S5, repeatedly executing the steps S1 to S4 until all the resistive switching devices in the device group to be tested are damaged, or until the number of times the pulse signal is applied is equal to a predetermined number of times.

For the above step S2, the resistance of the resistive switching device is generally a value, and when the resistive switching device fails, the resistance of the resistive switching device is generally less than a value. In the case where the resistive switching device is an MTJ, the resistance of the MTJ is generally above 4 kΩ, and the resistance of the MTJ after failure is generally less than 1 kΩ.

At this time, the calculation is performed by taking the general resistance of the MTJ as 4kΩ, the failure resistance as 1kΩ, and the group of devices to be tested containing 20 MTJs as an example. At this time, the resistance detected by the group of devices to be tested should be 80kΩ. Assuming that one MTJ fails after b cycles of testing, at this time, the resistance detected by the group of devices to be tested should be 19×4kΩ+1kΩ＝77kΩ. That is, the resistance jump value is 3kΩ, that is, the first predetermined threshold in the above step S2 can be 3kΩ. In addition, as shown in FIG4 , if more MTJs of data fail at the same time, the corresponding resistance jumps to a larger value.

In addition, when repeatedly executing steps S1 to S4, before executing step S1, the method further includes: sequentially controlling the first switch electrically connected to each resistive device in the group of devices to be tested to be in an off state, and the first switches electrically connected to other resistive devices to be in a closed state, measuring the resistance of each resistive device, and determining that the resistive device is a damaged device when the resistance of the resistive device is less than a second predetermined threshold value, and not detecting the resistance of the damaged device in step S3 when the resistive device is already damaged.

In addition, based on the embodiment of the above-mentioned test structure, the test structure also includes multiple first control electrodes, and the first control electrode is electrically connected to one first switch or respectively to multiple first switches. In the embodiment of the test method of the present application, in steps S1, S3 and step S5, the first switch is controlled to be in an off or closed state by controlling the voltage of the first control electrode.

In addition, based on the embodiment of the above-mentioned test structure, when the test structure contains multiple groups of device groups to be tested, in the embodiment of the test method of the present application, the test method may also include: step S6, repeating the steps S1 to S5 multiple times in sequence, the number of repetitions is N, the number of the device groups to be tested is M, N=M-1, M is a positive integer greater than or equal to 2, and N is a positive integer greater than or equal to 1.

That is, by making the test method of the present application include step S6, when there are M groups of devices to be tested, the test processing of steps S1 to S5 is performed M times on the M groups of devices to be tested, wherein the 2nd to Mth test processing of steps S1 to S5 is driven by step S6 in the test method.

In addition, based on the embodiment of the above-mentioned test structure, the first control electrode in the test structure is electrically connected to multiple first switches respectively, and any two first switches electrically connected to one first control electrode are electrically connected to the resistive devices in different groups of devices to be tested, and the test structure also includes multiple second switches and at least one second control electrode, one second switch is electrically connected between one test electrode and one group of devices to be tested, the second switch is electrically connected to the group of devices to be tested in a one-to-one correspondence, and the second control electrode is electrically connected to the second switch to control the switching state of the second switch. In this test method, before each repetition of steps S1 to S5, step S6 also includes: controlling the voltage of the second control electrode to control the second switch connected to the next group of devices to be tested to be in a closed state.

In summary, in order to quickly test the reliability of MTJ devices, the present application creates a test structure and a test method used in conjunction with the test structure, thereby achieving the goal of testing multiple MTJ device groups at the same time within a reliability test cycle time and effectively extracting the reliability test results of each MTJ device.

In the test method of the present application, the upper limit of the number of resistive switching devices in the device to be tested depends on the actual number of probes of the actual probe card in the test structure. At this time, the test speed of the test method of the present application is H times the test number of the test method in the background technology, where H = the number of probe cards - 2, which greatly saves the test time.

In addition, the test structure of the present application can be directly manufactured on the chip without adding a mask or additional process steps, and the above test method can be executed by only writing a specific test program to perform reliability tests on multiple MTJ devices.

In order to enable those skilled in the art to more clearly understand the technical solution of the present application, it will be described below in conjunction with specific embodiments.

Example 1

As shown in Figure 1, the test structure includes a device group to be tested, multiple first switches, multiple first control electrodes and two test electrodes, which are respectively the first test electrode and the second test electrode. The device group to be tested includes multiple resistive switching devices connected in series, and the resistive switching devices, the first switches and the first control electrodes correspond to each other one by one, and the number is the same. Each resistive switching device is an MTJ, the first switch is a MOS tube, and the first control electrode and the test electrode are both test pads, i.e., pads.

N MTJs are connected in series, and the two ends of the series connection are respectively connected to the first test electrode and the second test electrode; and each MTJ is connected in parallel with a MOS tube, that is, the two ends of the MTJ are respectively electrically connected to the source and the drain of the MOS tube, and the gate of each MOS tube is connected to a control electrode. In addition, the first test electrode and the second test electrode are respectively connected to the two input ends of the pulse generator through corresponding probes; multiple first control electrodes are connected to the switch matrix and the voltage applying device such as SMU or voltage source through the probes, so that the switch of each MOS tube can be controlled separately.

In addition, in an optional example, a GS structure may be used between the first test electrode and the second test electrode, and a 50 Ohm impedance matching pad structure may be obtained by designing the PAD size and spacing.

The specific test method of the test structure shown in Figure 1 is as follows:

Initial state detection: Except for the first control electrode corresponding to the MTJ to be tested, voltage is applied to the other first control electrodes to make the corresponding MOS tube in the on state, and then the resistance of the MTJ to be tested is tested to determine whether the MTJ to be tested is normal, and the MTJ number sequence of normal status is recorded. Set the pulse repetition number to 0, and test all MTJs in turn;

Step 1: Mark the normal MTJ sequence as 1 to M, and then remove the voltage applied to all first control electrodes connected to the MOS tubes;

Step 2: Apply a constant current pulse sequence of specific pulse width and amplitude between the first test electrode and the second test electrode. The constant current pulse sequence is applied once or repeatedly, and then the measured resistance value of the series resistance between the first test electrode and the second test electrode is read, and the corresponding total number of constant current pulse applications is recorded. Repeat this process until the change in the series resistance is greater than a certain threshold resistance jump value, at which point the corresponding total number of pulse repetitions is d;

Step 3: Apply voltage to the first control electrode corresponding to each MOS tube gate; remove the voltage one by one from the first control electrodes corresponding to the MOS tubes corresponding to the current MTJ sequence, and then measure the resistance of each MTJ, determine whether the MTJ is normal by the resistance value, record the MTJ number sequence of normal status and the MTJ sequence of abnormal status, and record the reliability value as the current total pulse repetition number d.

Repeat steps 1-3 until all MTJs are abnormal or the total number of repetitions is greater than a certain set value D. If the total number of repetitions is greater than a certain set value D, it can be determined that the corresponding reliability value of the MTJ is greater than D. Thus, a set of MTJ reliability test results is obtained.

Example 2

As shown in Figure 2, the test structure includes two groups of devices to be tested, multiple first switches, multiple first control electrodes and two test electrodes, which are first test electrodes and second test electrodes respectively. Each group of devices to be tested includes multiple resistive switching devices connected in series. The resistive switching devices, first switches and first control electrodes correspond to each other one by one, and the number is the same. The resistive switching device is an MTJ, the first switch is a MOS tube, and the first control electrode and the test electrode are both test pads, i.e., pads.

In addition, the test structure also includes two second switches, wherein the two second switches are connected in series between the two groups of devices to be tested and the first test electrode/second test electrode, wherein the groups of devices to be tested, the second switches, and the first test electrode/second test electrode correspond one to one, and the second switches are also MOD tubes.

Two groups of MTJs are connected in series, namely Group 1 and Group 2, wherein Group 1 and Group 2 are connected to the first test electrode and the second test electrode respectively. Each MTJ is connected in parallel with a MOS tube, namely, both ends of the MTJ are electrically connected to the source and drain of the MOS tube respectively, and each first control electrode is connected to the gate of any one of the MOS tubes in Group 1 and Group 2, namely, each first control electrode is connected to two MOS tubes, and the two MOS tubes are taken from Group 1 and Group 2 respectively.

In addition, a second switch is introduced in the series structure of Group 1 and Group 2 respectively, wherein the two second switches are connected to the selection electrodes for selecting Group 1 or Group 2 for testing.

The specific test method of the test structure shown in Figure 1 is as follows:

1. Select the MTJ group to be tested: Apply a high voltage or a low voltage on the selection electrode to select Group 1 or Group 2 for testing.

2. Initial state detection: Except for the first control electrode corresponding to the MTJ to be tested, voltage is applied to the other first control electrodes to make the corresponding MOS tube in the on state, and then the resistance of the MTJ to be tested is tested to determine whether the MTJ to be tested is normal, and the MTJ number sequence of normal status is recorded. Set the pulse repetition number to 0, and test all MTJs in turn.

3. Remove all voltages on the first control electrode, and apply a constant current pulse sequence of specific pulse width and amplitude between the first test electrode and the second test electrode. Apply the pulse sequence once or repeatedly, then read the resistance value measured between the first test electrode and the second test electrode of the series resistor, and record the corresponding total number of pulse applications. Repeat this process until the change in the series resistance is greater than a certain threshold resistance jump value, at which point the corresponding total number of pulse repetitions is e.

4. Apply voltage to the first control electrode corresponding to each MOS tube gate; remove the voltage one by one from the first control electrodes corresponding to the MOS tube gate corresponding to the current MTJ sequence, and then measure the resistance of each MTJ, and judge whether the MTJ is normal by the resistance value, record the MTJ number sequence of normal status and the MTJ sequence of abnormal status, and the reliability value is recorded as the current total pulse repetition number e.

5. Repeat steps 2-4 until all MTJs are abnormal or the total number of repetitions is greater than a certain set value E. If the total number of repetitions is greater than a certain set value D, it can be determined that the corresponding reliability value of the MTJ is greater than E. Thus, a set of MTJ reliability test results is obtained.

6. Change the voltage applied to the selection electrode, select another group of MTJs for testing, repeat steps 2 to 5, and obtain another group of MTJ reliability test results.

The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims (13)

1. A test structure, comprising:

at least one device group (10) to be tested, wherein the device group (10) to be tested comprises a plurality of resistive switching devices (11) to be tested in series;

A plurality of first switches (20), wherein the first switches (20) are connected in parallel with the resistive switching devices (11) in a one-to-one correspondence;

At least two test electrodes (30), wherein two ends of the device group (10) to be tested are respectively and electrically connected with one test electrode (30);

Wherein the test structure further comprises:

A plurality of first control electrodes (40), wherein the first control electrodes (40) are electrically connected with one first switch (20) or are respectively electrically connected with a plurality of first switches (20), the first control electrodes (40) are used for controlling the switching states of the first switches (20), and any two first switches (20) electrically connected with one first control electrode (40) are electrically connected with the resistive devices (11) in different device to be tested (10) under the condition that the first control electrodes (40) are electrically connected with the plurality of first switches (20);

The test method of the test structure comprises the following steps: step S1, controlling each first switch to be in an off state, applying pulse signals to two test electrodes at two ends of a device group to be tested, and detecting the resistance of the device group to be tested;

Step S2, the step S1 is repeatedly executed in sequence until the pulse signal is stopped when the detected difference value between the resistance of the device group to be tested and the resistance detected last time is larger than a first preset threshold value;

Step S3, sequentially controlling the first switches electrically connected with the resistive devices of the device group to be tested to be in an off state, detecting the resistance of each resistive device when the first switches electrically connected with other resistive devices are in an on state, and determining that the resistive devices are damaged when the resistance of the resistive devices is smaller than a second preset threshold value;

step S4, determining the durable times of one or more resistance change devices in the device group to be tested according to the detection results of the step S2 and the step S3;

And step S5, repeating the steps S1 to S4 until all the resistive switching devices in the device group to be tested are damaged or until the application times of the pulse signals are equal to the preset times.

2. The test structure according to claim 1, wherein there is one of the device under test groups (10), two of the test electrodes (30), and the first control electrodes (40) are electrically connected to the first switches (20) in a one-to-one correspondence.

3. The test structure according to claim 1, wherein there are a plurality of the device under test groups (10), two of the test electrodes (30), and the first control electrodes (40) are electrically connected to the plurality of the first switches (20), respectively.

4. A test structure according to claim 3, wherein the test structure further comprises:

A plurality of second switches (50), one second switch (50) is electrically connected between one test electrode (30) and one device group (10) to be tested, and the second switches (50) are electrically connected with the device group (10) to be tested in a one-to-one correspondence;

At least one second control electrode (60), the second control electrode (60) being electrically connected with the second switch (50) to control the switching state of the second switch (50).

5. The test structure according to claim 4, wherein one of the second control electrodes (60) is provided, and the second control electrode (60) controls a switching state of each of the second switches (50).

6. The test structure of claim 4, wherein the first switch (20) and the second switch (50) are independently selected from NMOS transistors, PMOS transistors, transmission gates, or transistors.

7. The test structure according to any one of claims 1 to 6, characterized in that the test electrode (30) is a signal ground structure.

8. The test structure according to any of claims 1 to 6, characterized in that the resistive switching device (11) is an MTJ.

9. A test method employing the test structure of any one of claims 1 to 8, comprising:

Step S1, controlling each first switch to be in an off state, applying pulse signals to two test electrodes at two ends of a device group to be tested, and detecting the resistance of the device group to be tested;

Step S2, the step S1 is repeatedly executed in sequence until the pulse signal is stopped when the detected difference value between the resistance of the device group to be tested and the resistance detected last time is larger than a first preset threshold value;

Step S3, sequentially controlling the first switches electrically connected with the resistive devices of the device group to be tested to be in an off state, detecting the resistance of each resistive device when the first switches electrically connected with other resistive devices are in an on state, and determining that the resistive devices are damaged when the resistance of the resistive devices is smaller than a second preset threshold value;

step S4, determining the durable times of one or more resistance change devices in the device group to be tested according to the detection results of the step S2 and the step S3;

And step S5, repeating the steps S1 to S4 until all the resistive switching devices in the device group to be tested are damaged or until the application times of the pulse signals are equal to the preset times.

10. The method according to claim 9, characterized in that before said step S1, the method further comprises:

Sequentially controlling the first switches electrically connected with each resistive switching device of the device group to be tested to be in an off state, wherein the first switches electrically connected with other resistive switching devices are in an on state, measuring the resistance of each resistive switching device, determining that the resistive switching device is a damaged device under the condition that the resistance of the resistive switching device is smaller than a second preset threshold value,

In case the resistive switching device has been damaged, the resistance of the damaged device is not detected in the step S3.

11. The method according to claim 10, wherein the test structure further comprises a plurality of first control electrodes electrically connected to one of the first switches or to the plurality of first switches, respectively, and the first switches are controlled to be in an off or on state by controlling voltages of the first control electrodes in the steps S1, S3 and S5.

12. The method according to claim 10 or 11, wherein in case the test structure comprises M of the device groups to be tested, the method further comprises:

And S6, sequentially repeating the steps S1 to S5 for a plurality of times, wherein the number of times of repetition is N, the number of the device groups to be tested is M, N=M-1, M is a positive integer greater than or equal to 2, and N is a positive integer greater than or equal to 1.

13. The method of claim 12, wherein the first control electrodes are electrically connected to a plurality of the first switches, respectively, and any two of the first switches electrically connected to one of the first control electrodes are electrically connected to the resistive switching devices in different groups of devices under test, the test structure further comprises a plurality of second switches electrically connected between one of the test electrodes and one of the groups of devices under test, and at least one second control electrode electrically connected to the second switch in a one-to-one correspondence to the group of devices under test, the second control electrode being electrically connected to the second switch to control a switching state of the second switch, the step S6 further comprising, before repeating the steps S1 to S5 each time:

And controlling the second switch connected with the next device group to be tested to be in a closed state by controlling the voltage of the second control electrode.