Background
Astronomical data of submillimeter wave and Far Infrared (FIR) wavelength contains a large amount of important scientific information, including information about dust galaxies, galaxies and fixed star formation; however, these wavelengths are the least studied field in astronomy due to the technical difficulties presented by this research. In the last 20 years, efforts have been made to develop astronomical instruments and telescopes at sub-millimeter and millimeter wavelengths.
MUSIC, the latest instrument of the Caltech submillimeter astronomical stage, is one of the earliest microwave dynamic inductive detector cameras and is the camera with the largest number of detectors sensitive to the submillimeter wavelength range. MUSIC can be used to observe the Sunyaev-zeldovich (sz) effect in the stellar mass, dust formation into the stellar system, and dark matter photorings to solve fundamental problems related to cosmic large-scale structures and cosmic time, and stellar formation history.
Over the past few years, submillimeter/millimeter astronomical instruments have drastically changed our understanding of star, galaxy and astrogle formation by measuring our fundamental parameters of the universe. Therefore, these tools are crucial to help us understand nature and continue new discoveries. The number of detectors is an important attribute of such instruments and is the subject of current research. Future telescopes will require as many as hundreds of thousands of detectors to meet the requirements in terms of field of view, scanning speed and resolution. A large pixel count is an advantage of a reusable detector using dynamic inductance detector (dynamic inductance detector) technology.
For sub-millimeter wavelengths, one commonly used detector technology is the Transition Edge Sensor (TES), which is a low temperature sensor based on the temperature dependent resistance of a superconducting phase transition. To read the signal from the TES, a superconducting quantum interference device (SQUID) is paired with a detector. TES has been used in many types of instruments to detect sub-millimeter/millimeter wavelengths. However, their complex fabrication process and readout method make them difficult to scale to larger arrays. Another relatively new technology was the dynamic inductance probe, which was developed by the california institute of technology/Jet Propulsion Laboratory (JPL) in the early 2000 s. Dynamic inductance detectors can be easily fabricated and frequency domain multiplexed on two to three layer wafers. All reading functions are performed by room temperature electronics, except for one cryogenic amplifier. Dynamic inductive detectors are an ideal choice for realizing large arrays, which will be essential for the development of future telescopes.
However, for a large-scale submillimeter wave detector, there are technical problems that the data processing amount is not satisfactory and the interference is easy to occur in the aspect of data reading.
Disclosure of Invention
Aiming at the problems in the prior art, the invention aims to provide a large-scale submillimeter wave detector reading system and a method, which can realize large-scale processing capacity and meet the technical requirements on the reading system in the submillimeter wave detection process.
The invention provides a large-scale submillimeter wave detector reading system, which is applied to a multi-wavelength submillimeter inductance camera MUSIC and comprises the following components: a plurality of read units, each read unit comprising an ADC/DAC plate, an IF plate and an FPGA plate; each reading unit can read a limited number of resonators, and the reading system uses a combination of a plurality of reading units to read the detection data of thousands of resonators in the telescopic instrument.
Furthermore, the reading system has 16 reading units, can simultaneously read 3000 complex frequency bands, and has a plurality of resonators, each resonator has a bandwidth of 200-400 kHz, and 2MHz intervals are established among the resonators.
Further, the ADC/DAC board is provided with two ADC chips and two DAC chips, in-phase and quadrature-phase components are read, and amplitude and phase information of the whole sampling bandwidth is obtained; the signal and the FPGA form a closed loop as a starting point and an end point; the signal processing has two paths, along one of which the electronic device reading sends a frequency tone to a device in the cryostat, comprising a digital-to-analog converter DAC, an IQ mixer and a digital attenuator; along the other path, including the amplifier, attenuator, IQ mixer and analog-to-digital converter ADC, the readout electronics receive the output signal from the cryostat and process the signal, both signal paths being finally calculated and read out using the DAQ computer.
Further, to read the signal from the detector, a probe frequency comb is generated for all resonators coupled to one transmission line, which is transmitted through a dynamic inductive detector array in which changes in superconductor surface impedance caused by incident photons change the amplitude and phase of the comb signal, and after amplification by a cryogenic amplifier, the frequency comb is transmitted to room temperature electronics for digitization and analysis.
Further, an external clock is used for both the ADC and DAC chips, the external clock of the ADC chip is used for the FPGA for better phase performance and synchronization with the ADC, DAC and FPGA, and clock frequency generation and local oscillator LO frequency generation are integrated on the IF board.
On the other hand, the invention provides a large-scale submillimeter wave detector reading method, which is characterized in that the method is used in a large-scale submillimeter wave detector reading system, and the method comprises the following steps:
s1: the read electronic device sends the frequency tone to a device in the cryostat for processing;
s2: the pre-programmed waveform stored in the storage module sends a baseband signal through a fast DAC card, and generates a microwave detection signal through the up-conversion of the mixture of a resonator and a local oscillator;
s3: the microwave signal is firstly down-converted by a mixer at a receiver end and then digitized by a fast ADC card;
s4: the signal processing of the digitized signal is performed digitally using algorithms on the FPGA and read by a computer.
Further, in order to ensure that the whole signal receiving chain provides good signal-to-noise performance, a high-gain and low-noise component is arranged at the front end of the signal receiving chain, and the component is a low-temperature amplifier HEMT.
Further, calculating the signal-to-noise ratio (SNR) at the HEMT from the read power of the carrier tone of each detector; the read power on the device before the HEMT for each resonator is between 10 and 30 pW; the SNR degradation between the cryostat and the ADC is reduced to 1-2 dB.
Further, the use of two ADC chips and two DAC chips with IQ mixers covers the useful bandwidth of the full sampling rate of 550 MHz.
Further, the read method operates at frequencies as low as about 100MHz, with lower frequencies providing higher responsiveness in the frequency direction, thus reducing two-stage system TLS noise.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
The following detailed description of embodiments of the invention refers to the accompanying drawings. It should be understood that the detailed description and specific examples, while indicating the present invention, are given by way of illustration and explanation only, not limitation.
The large-scale submillimeter-wave detector reading system and method are mainly applicable to the field of astronomical detection, and a multi-wavelength submillimeter-wave inductance camera (MUSIC) instrument constructed by using a dynamic inductance detector (KID) technology covers wavelengths of 0.87, 1.04, 1.33 and 1.98 millimeters. Multi-wavelength submillimeter inductive cameras successfully achieve lithographic focal planes. Four band pass filters 102 (BPFs) are used in this system. Figure 1 shows a MUSIC focal plane wafer containing a broadband phased array antenna for beam definition, four Band Pass Filters (BPFs) for band selection, and a microwave dynamic inductance detector (MKID) for power detection. The phased array antenna 101 used to acquire the signal has a binary summing tree. Four band pass filters 102 divide the signal from the summing tree into four different frequency bands. Fig. 1 also shows a dynamic inductance probe 103 and a substrate 104 of the probe wafer. To minimize the loss of each bandpass filter on the wafer, 150nm thick Nb (niobium) was used as the ground layer 1043, and 400nm thick wiring layer 1041, 400nm thick silicon dioxide or silicon nitride was used as the dielectric layer 1043, all disposed on one 369 μm thick silicon wafer 1044.
A multi-wavelength sub-millimeter inductance camera contains 2304 detectors and provides a large array reading. The basis for developing superconducting microresonator array Open Source Readings (OSRs) was developed using a multi-wavelength submillimeter inductive camera.
A superconducting microresonator array Open Source Reading (OSR) system that performs real-time complex transmission measurements of frequency domain multiplexing to monitor instantaneous resonant frequency and dispersion of a dynamic inductive probe. The superconducting micro-resonator array open-source reading system has 16 reading units in total, and can simultaneously read 3000 complex frequency bands. In 2010 and 2012, all hardware, software and firmware were tested and optimized with the first MKID camera MUSIC successfully installed on the Caltech submillimeter astronomical stage. The system demonstrates its ability to meet detector read-out and data acquisition requirements, as well as telescope operation. As part of a multi-wavelength submillimeter inductive camera instrument, superconducting microresonator array open-source readings have been used for scientific observations in CSO since 2013.
Fig. 2 shows a block diagram of a large scale submillimeter wave detector reading system according to the present invention. The basic concept of resonator readout is to use image reject (IQ) homodyne mixing, which is essentially a two-phase lock-in detection technique. Typically, the signals form a closed loop with an FPGA (field programmable gate array) as a start point and an end point. Along one path in the FPGA, the read electronics send the frequency tones to a device in the cryostat, shown in the lower part of fig. 2, which includes a digital-to-analog converter (DAC), an IQ mixer (i.e., an image rejection mixer) and a digital attenuator; along another path, the upper half of fig. 2, which includes amplifiers, attenuators, IQ mixers and analog-to-digital converters (ADCs), the read electronics receive the output signal from the cryostat and process the signal. Both signal paths use a DAQ computer, a signal processing board and a cryostat are shown in fig. 2. The signal processing board comprises an FPGA board, an ADC/DAC board and an intermediate frequency board of reconfigurable open architecture computing hardware [ ROACH ] 14-19.
Fig. 2 shows the whole receiver system, which includes a constant temperature cooling box 1, a first fixed impedance 2, a variable impedance 3, a second fixed impedance 4, a power amplifier 5, a filter 6, an ADC sampling board (analog-to-digital conversion board) 7, an FPGA computing board 8, a data acquisition server 9, a frequency multiplier 10, a voltage-controlled frequency generator 11, a GPS signal acquirer 13 for acquiring a 1PPS signal, and a DAC board (digital-to-analog conversion board) 14.
Approximately 200 signals are generated by a digital-to-analog conversion board, are up-converted to microwave bands, enter a cooling box, are used for exciting a detector, pass through a low-temperature amplifier, are output, pass through a series of room-temperature amplifiers, are down-converted to a baseband, are sampled by an analog-to-digital circuit board, and are processed in an FPGA.
Specifically, a detection signal is generated from the DCA board card 7, and is up-converted to a microwave band, enters the constant temperature cooling box 1, and is sequentially subjected to down-conversion to a baseband through the first fixed impedance 2, the variable impedance 3, the second fixed impedance 4, the power amplifier 5 and the filter 6 after coming out of the cooling box, and enters the FPGA board for signal processing through the ADC sampling board 7, and signal reading and storage are performed through the data acquisition server 9.
To read signals from the probe wafer, a probe frequency comb is generated for all resonators coupled to one transmission line. The frequency combs are transmitted through a dynamic inductive detector array in which changes in superconductor surface impedance caused by incident photons change the amplitude and phase of the comb signal.
After amplification by a low temperature amplifier such as a High Electron Mobility Transistor (HEMT) or a silicon germanium bipolar junction transistor, the frequency comb is transferred to room temperature electronics for digitization and analysis. The low temperature assembly includes a temperature amplifier, an attenuator, and a dynamic inductance detector die. For resonators operating at several GHz this can be achieved by up-converting baseband signals mixed with a local oscillator, which are generated by a fast DAC card transmitting preprogrammed waveforms stored in a memory module, thereby generating microwave probe signals. At the receiver end, the microwave signal is first down-converted by a mixer and then digitized by a flash ADC card. Recent advances in software radio technology provide other options for fast signal processing. For example, signal processing of the digitized signal may be performed digitally using algorithms on an FPGA.
For noise requirements and computational aspects, the signal power at the detector is less than-70 dBm for most dynamic inductive detector read applications. Therefore, amplification needs to be done in the signal receiving chain before room temperature electronics. In order to ensure that the entire signal receiving chain provides good signal-to-noise performance, a high gain and low noise component must be placed at the front end of the signal receiving chain. Low temperature amplifiers (HEMTs or SiGe) are the best components available for this purpose. Typically, the noise temperature of a cryogenic amplifier is 2-5K over the entire frequency band occupied by the resonator. Therefore, the noise of the read electronics is designed so that the white noise of the HEMT amplifier plays a major role with respect to the rest of the electronics noise.
From the read power of the carrier tone for each detector, we can calculate the signal-to-noise ratio (SNR) requirement at the HEMT. The read power on the device before the HEMT for each resonator is between 10 and 30pW, which means that the total power of 144 resonators is-58.4 dBm. Inside the cryostat, the HEMT gain is 35 dB, the HEMT noise temperature conservative value is 2K. HEMT noise temperature places the most stringent requirements on the rest of the electronics. The SNR at the HEMT output is approximately 56.68 dB.
To develop a multi-wavelength submillimeter inductive camera readout system, the SNR degradation between the cryostat and ADC was reduced to 1-2 dB. For a 2K HEMT noise temperature, the SNR requirement in front of the ADC is about 55.94 dB. The ADC chip used meets the SNR and bandwidth requirements at an amplitude of a few decibels.
The bandwidth of each superconducting microresonator array open source readout system is a trade-off between wafer design (how compact the resonators are packaged with respect to frequency) and the electronic limitations due to SNR, bandwidth, and maximum number of detectors to read. The bandwidth of each resonator is approximately 200-400 kHz. We have established a 2MHz spacing between resonators to account for resonator position shifts caused by manufacturing errors. The relative position of the resonators does not change during the observation or cooling cycle, but manufacturing errors can cause them to shift in position relative to each other.
The SNR of the ADC is greater than 55.9 dB. If only quantization noise is considered, then theoretically, the SNR would require an ADC with at least 10 bits. However, the noise of the flash ADC is greater than the expected quantization noise based on the number of bits. Thus, in practice, a 12-bit ADC is required. The best 12-bit chip marketed in 2009 had a 64dB SNR and a sampling rate of up to 550MSPS (chip model TI ADS 5486). Once the selection of the ADC chip is confirmed, the spacing between the resonators is expanded to 2.5 MHz.
The center frequency requirement for reading is similar to that of the dynamic inductance detector itself, typically ranging from 2 to 8 GHz. For multi-wavelength submillimeter inductive cameras, the initial dynamic inductive probe design has a resonator frequency of about 3-4GHz, and thus, the superconducting microresonator array open-source readout system is also centered in this range. Recent dynamic inductive probe designs can operate at frequencies as low as about 100 MHz. The lower frequency is attractive because it provides a higher response capability in the frequency direction, thus reducing the two stage system (TLS) noise.
The in-phase and quadrature-phase components are read using two ADC and two DAC chips, commonly referred to as I and Q, respectively, since these chips are used with IQ mixers.
Whichever signal processing method is used is limited by the nyquist sampling theorem. The present invention uses two chips to cover a wider bandwidth, providing a useful bandwidth equal to a full sampling rate of 550 MHz. If only amplitude or phase information of the audio needs to be read, various DSP methods can be employed, such as re-overlaying the amplitude information from the data stream (ignoring the phase component) to achieve a full 550MHz bandwidth that can be read using only one DAC and one ADC chip. However, in this case, the phase information will no longer be available. In summary, two ADCs and two DACs are employed to obtain amplitude and phase information for the entire sampling bandwidth.
For detectors that resonate at several gigahertz, a mixer is required to convert the frequency from baseband to gigahertz band. The IQ mixer is a natural alternative to two single sideband mixers, which can convert two signals simultaneously. Using an IQ mixer to exploit the full sampling bandwidth means that the baseband signal can be generated as DAC I and DAC Q, where I and Q have a phase difference of 90 degrees. In a complex data stream, I and Q serve as the real and imaginary parts of the complex data. If we perform a fourier transform on the complex IQ data stream in the time domain, the full bandwidth of 550MHz will be obtained in the frequency domain.
The electronics emit from the DAC and receive through the ADC a driving tone having amplitude and phase information. Submillimeter-level signals from the sky are converted into changes in the surface impedance of the superconducting inductor. We obtain the signal by monitoring the driving tone coupled to the resonator.
The superconducting microresonator array open-source readout system according to the present invention can be divided into three parts: hardware, firmware, and software. Typically, the hardware includes custom ADC/DAC boards, IF boards, FPGA-based signal processing boards, and auxiliary systems [ e.g., frequency standard or Global Positioning System (GPS) ]. Firmware refers to programs running on the FPGA chip, while software includes all programs implemented for control and automated reading. Each portion of the superconducting microresonator array open source readout system is discussed in detail in the sections below.
In terms of design of the ADC and DAC boards, there are several acceptable ADC chips on the market with respect to chip selection, and the SNR and sample rate requirements of the ADC chips have been discussed in the previous section. In addition to these requirements, Spurious Free Dynamic Range (SFDR) and intermodulation distortion (IMD) must be considered to prevent harmonics or spurs from affecting the SNR of the resonator, especially as the number of tones read increases. We chose a chip with a random spurious frequency power level much lower than any level that could affect the resonator. For a multi-wavelength submillimeter inductive camera, the signal considered here lies in the range of 0.1-10 Hz near the carrier tone. The resonator occupies only a small portion of the overall Radio Frequency (RF) bandwidth. Thus, the probability of spurious occurrences within the resonator signal bandwidth is very low. However, for some applications, such as the dynamic inductance detector dark matter detector developed by Caltech, the resonator must be monitored at a higher frequency (a few kilohertz) for pulse detection. In this case, the harmonic or intermodulation frequency is within the range of power levels and frequencies that may affect the resonator detection results; therefore, IMD and harmonics must be considered in generating carrier tones, for example by designing the drive tones to avoid these harmonics and IMD frequencies.
The choice of DAC is more flexible than the choice of ADC. The 16-bit and 1-GSPS DACs are readily available. We finally selected DAC5681 from Analog Devices, Inc. (Nuwood, Mass., USA) and ADS5486 from Texas Instruments (Dallas, Tex.). The DAC can operate up to 1 GSPS with a measured SNR of 75dBFS and the ADC can measure up to 550MSPS with a SNR of 64 dBFS. Both the 16-bit DAC and the 12-bit ADC were evaluated to confirm that they met SNR, SFDR, and IMD requirements. Due to the rapid development of new semiconductor chips, faster ADCs and DACs have appeared on the market, such as the 12-bit 3-GSPS ADC chip announced by Analog Devices, inc. Future ADC/DAC developments.
The ROACH board of choice is connected to the ADC/DAC board using a Zdok connector, thereby enabling the ADC/DAC board to be developed independently and used for different cameras and applications.
With respect to the clock and 1-PPS signals on the hardware board, the ADC and DAC boards require a clock frequency to operate. The clock frequency may be provided by the FPGA or by an external clock source (e.g., a separate frequency synthesizer). The external clock provides the ability to select any clock frequency and more stable performance (to meet higher timing requirements) more flexibly than the FPGA clock. Thus using an external clock for both the ADC and DAC chips. An external clock of the ADC is used for the FPGA for better phase performance and synchronization with the ADC, DAC and FPGA. Clock frequency generation and Local Oscillator (LO) frequency generation are integrated on the IF board. The frequency stability is derived from the 10MHz reference, which is fed into the IF board and used to lock the clock and LO.
To synchronize the system, a synchronization port is added on the ADC board. This port provides a link to the FPGA architecture from an external one Pulse Per Second (PPS) signal generated by the GPS device through the same Zdok connector used by the ADC and DAC boards.